| commit | ba0f00b9fcb02b10cc9929fec660f86d1af6a41a | [log] [tgz] |
|---|---|---|
| author | Ralf Baechle <ralf@linux-mips.org> | Fri Nov 16 14:54:46 2007 +0000 |
| committer | Ralf Baechle <ralf@linux-mips.org> | Sun Dec 09 04:51:10 2007 +0000 |
| tree | c1924fdf5cedb3d8c8d1cbe911290d2c1279d801 | |
| parent | 5ef1b9a0f6cbb1269fc8b8d7704d146f22bf7aa6 [diff] |
[MIPS] Malta: Enable tickless and highres timers. Most Malta use an FPGA CPU card which rarely is good for more than 40MHz. So the performance penalta of the regular timer interrupt, especially for the VSMP kernel model is significant, even at a mere 100Hz. Signed-off-by: Ralf Baechle <ralf@linux-mips.org>