ARM: gic: Use _no_log variants while accessing some registers
Some GIC register accesses happens more frequently flooding the
RTB logs. Since they're not that useful for debugging purposes,
use _no_log variants while accessing those registers.
Change-Id: Idfb48c668eb90a3187fa3afdd7df5cd64062559d
Signed-off-by: Subbaraman Narayanamurthy <subbaram@codeaurora.org>
diff --git a/arch/arm/common/gic.c b/arch/arm/common/gic.c
index 497ed9d..3f40def 100644
--- a/arch/arm/common/gic.c
+++ b/arch/arm/common/gic.c
@@ -311,7 +311,7 @@
if (gic->need_access_lock)
raw_spin_lock(&irq_controller_lock);
- writel_relaxed(gic_irq(d), gic_cpu_base(d) + GIC_CPU_EOI);
+ writel_relaxed_no_log(gic_irq(d), gic_cpu_base(d) + GIC_CPU_EOI);
if (gic->need_access_lock)
raw_spin_unlock(&irq_controller_lock);
}
@@ -389,8 +389,8 @@
bit = 1 << (cpu_logical_map(cpu) + shift);
raw_spin_lock(&irq_controller_lock);
- val = readl_relaxed(reg) & ~mask;
- writel_relaxed(val | bit, reg);
+ val = readl_relaxed_no_log(reg) & ~mask;
+ writel_relaxed_no_log(val | bit, reg);
raw_spin_unlock(&irq_controller_lock);
return IRQ_SET_MASK_OK;
@@ -435,7 +435,7 @@
do {
if (gic->need_access_lock)
raw_spin_lock(&irq_controller_lock);
- irqstat = readl_relaxed(cpu_base + GIC_CPU_INTACK);
+ irqstat = readl_relaxed_no_log(cpu_base + GIC_CPU_INTACK);
if (gic->need_access_lock)
raw_spin_unlock(&irq_controller_lock);
irqnr = irqstat & ~0x1c00;
@@ -449,7 +449,7 @@
if (irqnr < 16) {
if (gic->need_access_lock)
raw_spin_lock(&irq_controller_lock);
- writel_relaxed(irqstat, cpu_base + GIC_CPU_EOI);
+ writel_relaxed_no_log(irqstat, cpu_base + GIC_CPU_EOI);
if (gic->need_access_lock)
raw_spin_unlock(&irq_controller_lock);
#ifdef CONFIG_SMP
@@ -716,19 +716,22 @@
if (!dist_base || !cpu_base)
return;
- saved_cpu_ctrl = readl_relaxed(cpu_base + GIC_CPU_CTRL);
+ saved_cpu_ctrl = readl_relaxed_no_log(cpu_base + GIC_CPU_CTRL);
for (i = 0; i < DIV_ROUND_UP(32, 4); i++)
- gic_data[gic_nr].saved_dist_pri[i] = readl_relaxed(dist_base +
+ gic_data[gic_nr].saved_dist_pri[i] = readl_relaxed_no_log(
+ dist_base +
GIC_DIST_PRI + i * 4);
ptr = __this_cpu_ptr(gic_data[gic_nr].saved_ppi_enable);
for (i = 0; i < DIV_ROUND_UP(32, 32); i++)
- ptr[i] = readl_relaxed(dist_base + GIC_DIST_ENABLE_SET + i * 4);
+ ptr[i] = readl_relaxed_no_log(dist_base +
+ GIC_DIST_ENABLE_SET + i * 4);
ptr = __this_cpu_ptr(gic_data[gic_nr].saved_ppi_conf);
for (i = 0; i < DIV_ROUND_UP(32, 16); i++)
- ptr[i] = readl_relaxed(dist_base + GIC_DIST_CONFIG + i * 4);
+ ptr[i] = readl_relaxed_no_log(dist_base +
+ GIC_DIST_CONFIG + i * 4);
}
@@ -750,18 +753,20 @@
ptr = __this_cpu_ptr(gic_data[gic_nr].saved_ppi_enable);
for (i = 0; i < DIV_ROUND_UP(32, 32); i++)
- writel_relaxed(ptr[i], dist_base + GIC_DIST_ENABLE_SET + i * 4);
+ writel_relaxed_no_log(ptr[i], dist_base +
+ GIC_DIST_ENABLE_SET + i * 4);
ptr = __this_cpu_ptr(gic_data[gic_nr].saved_ppi_conf);
for (i = 0; i < DIV_ROUND_UP(32, 16); i++)
- writel_relaxed(ptr[i], dist_base + GIC_DIST_CONFIG + i * 4);
+ writel_relaxed_no_log(ptr[i], dist_base +
+ GIC_DIST_CONFIG + i * 4);
for (i = 0; i < DIV_ROUND_UP(32, 4); i++)
- writel_relaxed(gic_data[gic_nr].saved_dist_pri[i],
+ writel_relaxed_no_log(gic_data[gic_nr].saved_dist_pri[i],
dist_base + GIC_DIST_PRI + i * 4);
- writel_relaxed(0xf0, cpu_base + GIC_CPU_PRIMASK);
- writel_relaxed(saved_cpu_ctrl, cpu_base + GIC_CPU_CTRL);
+ writel_relaxed_no_log(0xf0, cpu_base + GIC_CPU_PRIMASK);
+ writel_relaxed_no_log(saved_cpu_ctrl, cpu_base + GIC_CPU_CTRL);
}
static int gic_notifier(struct notifier_block *self, unsigned long cmd, void *v)
@@ -996,7 +1001,7 @@
if (gic->need_access_lock)
raw_spin_lock_irqsave(&irq_controller_lock, flags);
/* this always happens on GIC0 */
- writel_relaxed(sgir, gic_data_dist_base(gic) + GIC_DIST_SOFTINT);
+ writel_relaxed_no_log(sgir, gic_data_dist_base(gic) + GIC_DIST_SOFTINT);
if (gic->need_access_lock)
raw_spin_unlock_irqrestore(&irq_controller_lock, flags);
mb();