| commit | c11b46c32c8a9bf05fdb76d70d8dc74fcbfd02d1 | [log] [tgz] |
|---|---|---|
| author | Guennadi Liakhovetski <g.liakhovetski@gmx.de> | Wed Jan 04 15:34:17 2012 +0100 |
| committer | Vinod Koul <vinod.koul@linux.intel.com> | Fri Jan 06 11:40:11 2012 +0530 |
| tree | 970a85e6a577d878c5ee57f31a1ee3df0fb8ad00 | |
| parent | f69f2e264f6388df6d3cae45dd67ddfd52aaa14b [diff] |
dma: shdma: fix runtime PM: clear channel buffers on reset On platforms, supporting power domains, if the domain, containing a DMAC instance is powered down, the driver fails to resume correctly. On those platforms DMAC channels have an additional CHCLR register for clearing channel buffers. Using this register during runtime resume fixes the problem. Signed-off-by: Guennadi Liakhovetski <g.liakhovetski@gmx.de> Signed-off-by: Vinod Koul <vinod.koul@linux.intel.com>