tree cd3a1f9557007ff899ecdd17d1a1f0cc3fd88483
parent 612539e81f655f6ac73c7af1da8701c1ee618aee
author Marc Zyngier <Marc.Zyngier@arm.com> 1327058687 +0100
committer Russell King <rmk+kernel@arm.linux.org.uk> 1327314007 +0000

ARM: 7297/1: smp_twd: make sure timer is stopped before registering it

On secondary CPUs, the Timer Control Register is not reset
to a sane value before the timer is registered, and the TRM
doesn't seem to indicate any reset value either. In some cases,
the kernel will take an interrupt too early, depending on what
junk was present in the registers at reset time.

The fix is to set the Timer Control Register to 0 before
registering the clock_event_device and enabling the interrupt.

Problem seen on VE (Cortex A5) and Tegra.

Signed-off-by: Marc Zyngier <marc.zyngier@arm.com>
Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>