board-8960: Update 8960AB and 8064AB SPM sequences.
8960AB and 8064AB have a new revision of the Krait SPM hardware.
The SPM v1.15x on these targets uses a different bit to control the
apc_pdn signal.
Update the SPM sequences for standalone and power collapse to use the
new sequences.
L2 SPM or Krait WFI/Retention sequences are not affected.
CRs-fixed: 419258
Change-Id: I69ee83ef49cc91c160bf3d24de1f72c8b7b374a6
Signed-off-by: Praveen Chidambaram <pchidamb@codeaurora.org>
diff --git a/arch/arm/mach-msm/board-8960.c b/arch/arm/mach-msm/board-8960.c
index ce2531b..42b9816 100644
--- a/arch/arm/mach-msm/board-8960.c
+++ b/arch/arm/mach-msm/board-8960.c
@@ -1593,26 +1593,41 @@
};
static uint8_t spm_wfi_cmd_sequence[] __initdata = {
- 0x03, 0x0f,
+ 0x03, 0x0f,
};
static uint8_t spm_retention_cmd_sequence[] __initdata = {
- 0x00, 0x05, 0x03, 0x0D,
- 0x0B, 0x00, 0x0f,
+ 0x00, 0x05, 0x03, 0x0D,
+ 0x0B, 0x00, 0x0f,
};
static uint8_t spm_power_collapse_without_rpm[] __initdata = {
- 0x00, 0x24, 0x54, 0x10,
- 0x09, 0x03, 0x01,
- 0x10, 0x54, 0x30, 0x0C,
- 0x24, 0x30, 0x0f,
+ 0x00, 0x24, 0x54, 0x10,
+ 0x09, 0x03, 0x01,
+ 0x10, 0x54, 0x30, 0x0C,
+ 0x24, 0x30, 0x0f,
};
static uint8_t spm_power_collapse_with_rpm[] __initdata = {
- 0x00, 0x24, 0x54, 0x10,
- 0x09, 0x07, 0x01, 0x0B,
- 0x10, 0x54, 0x30, 0x0C,
- 0x24, 0x30, 0x0f,
+ 0x00, 0x24, 0x54, 0x10,
+ 0x09, 0x07, 0x01, 0x0B,
+ 0x10, 0x54, 0x30, 0x0C,
+ 0x24, 0x30, 0x0f,
+};
+
+/* 8960AB has a different command to assert apc_pdn */
+static uint8_t spm_power_collapse_without_rpm_krait_v3[] __initdata = {
+ 0x00, 0x24, 0x84, 0x10,
+ 0x09, 0x03, 0x01,
+ 0x10, 0x84, 0x30, 0x0C,
+ 0x24, 0x30, 0x0f,
+};
+
+static uint8_t spm_power_collapse_with_rpm_krait_v3[] __initdata = {
+ 0x00, 0x24, 0x84, 0x10,
+ 0x09, 0x07, 0x01, 0x0B,
+ 0x10, 0x84, 0x30, 0x0C,
+ 0x24, 0x30, 0x0f,
};
static struct msm_spm_seq_entry msm_spm_boot_cpu_seq_list[] __initdata = {
@@ -1621,13 +1636,11 @@
.notify_rpm = false,
.cmd = spm_wfi_cmd_sequence,
},
-
[1] = {
.mode = MSM_SPM_MODE_POWER_RETENTION,
.notify_rpm = false,
.cmd = spm_retention_cmd_sequence,
},
-
[2] = {
.mode = MSM_SPM_MODE_POWER_COLLAPSE,
.notify_rpm = false,
@@ -3216,15 +3229,32 @@
msm_tsens_early_init(&msm_tsens_pdata);
}
-static void __init msm8960_reset_spm_avs(void)
+static void __init msm8960ab_update_krait_spm(void)
{
int i;
+ /* Reset the AVS registers until we have support for AVS */
for (i = 0; i < ARRAY_SIZE(msm_spm_data); i++) {
struct msm_spm_platform_data *pdata = &msm_spm_data[i];
pdata->reg_init_values[MSM_SPM_REG_SAW2_AVS_CTL] = 0;
pdata->reg_init_values[MSM_SPM_REG_SAW2_AVS_HYSTERESIS] = 0;
}
+
+ /* Update the SPM sequences for SPC and PC */
+ for (i = 0; i < ARRAY_SIZE(msm_spm_data); i++) {
+ int j;
+ struct msm_spm_platform_data *pdata = &msm_spm_data[i];
+ for (j = 0; j < pdata->num_modes; j++) {
+ if (pdata->modes[j].cmd ==
+ spm_power_collapse_without_rpm)
+ pdata->modes[j].cmd =
+ spm_power_collapse_without_rpm_krait_v3;
+ else if (pdata->modes[j].cmd ==
+ spm_power_collapse_with_rpm)
+ pdata->modes[j].cmd =
+ spm_power_collapse_with_rpm_krait_v3;
+ }
+ }
}
static void __init msm8960_cdp_init(void)
@@ -3282,7 +3312,7 @@
msm8960_gfx_init();
if (cpu_is_msm8960ab())
- msm8960_reset_spm_avs();
+ msm8960ab_update_krait_spm();
msm_spm_init(msm_spm_data, ARRAY_SIZE(msm_spm_data));
msm_spm_l2_init(msm_spm_l2_data);