commit | c4632aed3e5b134c55b54af19db49662959384c1 | [log] [tgz] |
---|---|---|
author | Laxman Dewangan <ldewangan@nvidia.com> | Wed Mar 07 16:39:05 2012 +0530 |
committer | Mark Brown <broonie@opensource.wolfsonmicro.com> | Wed Mar 07 19:28:37 2012 +0000 |
tree | ccf9f4aee9a57f52536aab2db929494c32d63b5a | |
parent | 4adf9beda58364497889c06c1badf129a71d48be [diff] |
regulator: tps65910: Configure correct value for VDDCTRL vout reg As per datasheet, the voltage output is defined as from SEL[6:0] = 3 to 64 (dec) Vout= (SEL[6:0] × 12.5 mV + 562.5 mV) The list_voltage returns the vout as 600mV + selector * 12.5mV and so equivalent VSEL is selector + 3. Adding 3 on selector when configuring VSEL register for VDDCTRL output. Signed-off-by: Laxman Dewangan <ldewangan@nvidia.com> Signed-off-by: Mark Brown <broonie@opensource.wolfsonmicro.com>