Merge "msm: mdss: fix wfd tearing"
diff --git a/Documentation/devicetree/bindings/arm/msm/debug-pc-cntr.txt b/Documentation/devicetree/bindings/arm/msm/debug-pc-cntr.txt
deleted file mode 100644
index 01301be..0000000
--- a/Documentation/devicetree/bindings/arm/msm/debug-pc-cntr.txt
+++ /dev/null
@@ -1,18 +0,0 @@
-* MSM PC Debug Counters
-
-MSM PC debug counter reserves 16 registers in the IMEM memory space which
-maintains a count on the state of power collapse on each core. This count
-will be useful to debug the power collapse state on each core.
-
-The required nodes for MSM PC Debug Counters are:
-
-- compatible: "qcom,pc-cntr"
-- reg: physical IMEM address reserved for PC counters
-
-Example:
-
-qcom,pc-cntr@fe800000 {
- compatible = "qcom,pc-cntr";
- reg = <0xfe800664 0x40>;
- };
-
diff --git a/Documentation/devicetree/bindings/arm/msm/mpm_counter.txt b/Documentation/devicetree/bindings/arm/msm/mpm_counter.txt
new file mode 100644
index 0000000..e62b9ec
--- /dev/null
+++ b/Documentation/devicetree/bindings/arm/msm/mpm_counter.txt
@@ -0,0 +1,17 @@
+* MSM Timetick counter (mpm-v2)
+
+The MPM provides a timetick that starts when the device is powered up and
+is not reset by any of the boot loaders or the HLOS. The MPM timetick counter
+driver provides an api to get this value.
+
+The required nodes for the MPM timetick counter driver are:
+
+- compatible: "qcom,mpm-counter"
+- reg: Specifies the physical address of the timetick count register.
+
+Example:
+ qcom,mpm-counter@fc4a3000 {
+ compatible = "qcom,mpm-counter";
+ reg = <0xfc4a3000 0x1000>;
+ };
+
diff --git a/Documentation/devicetree/bindings/arm/msm/pm-8x60.txt b/Documentation/devicetree/bindings/arm/msm/pm-8x60.txt
index b429072..a372912 100644
--- a/Documentation/devicetree/bindings/arm/msm/pm-8x60.txt
+++ b/Documentation/devicetree/bindings/arm/msm/pm-8x60.txt
@@ -5,6 +5,9 @@
the kernel to be notified of idle and suspend states and when called, follows
through the set of instructions in putting the application cores to the lowest
power mode possible.
+The PC debug counter reserves 16 registers in the IMEM memory space which maintains
+a count on the state of power collapse on each core. This count will be useful to
+debug the power collapse state on each core.
The required properties for PM-8x60 are:
@@ -12,17 +15,22 @@
The optional properties are:
+- reg: physical IMEM address reserved for PC counters and the size
- qcom,use-sync-timer: Indicates whether the target uses the synchronized QTimer.
- qcom,pc-mode: Indicates the type of power collapse used by the target. The
- valid values for this are:
+ valid values for this are:
0 (Power collapse terminates in TZ; integrated L2 cache controller)
1, (Power collapse doesn't terminate in TZ; external L2 cache controller)
2 (Power collapse terminates in TZ; external L2 cache controller)
+- qcom,saw-turns-off-pll: Version of SAW2.1 or can turn off the HFPLL, when
+ doing power collapse and so the core need to switch to Global PLL before
+ PC.
Example:
-qcom,pm-8x60 {
+qcom,pm-8x60@fe800664 {
compatible = "qcom,pm-8x60";
+ reg = <0xfe800664 0x40>;
qcom,pc-mode = <0>;
qcom,use-sync-timer;
};
diff --git a/Documentation/devicetree/bindings/spi/spi_qsd.txt b/Documentation/devicetree/bindings/spi/spi_qsd.txt
index 939f77b..4b912f3 100644
--- a/Documentation/devicetree/bindings/spi/spi_qsd.txt
+++ b/Documentation/devicetree/bindings/spi/spi_qsd.txt
@@ -1,25 +1,51 @@
Qualcomm Serial Peripheral Interface (SPI)
Required properties:
-- compatible : should be "qcom,spi-qup-v2".
-- reg : offset and length of the QUP register map.
-- interrupts : should contain the QUP core interrupt.
-- spi-max-frequency : specifies maximum SPI clock frequency, Units - Hz.
+- compatible : Should be "qcom,spi-qup-v2".
+- reg : Offset and length of the register regions for the device
+- reg-names : Register region names referenced in reg above.
+ Required register resource entries are:
+ "spi_physical" : Physical address of controller register blocks.
+- interrupts : Interrupt numbers used by this controller
+- interrupt-names : Interrupt resource names referenced in interrupts above.
+ Required interrupt resource entries are:
+ "spi_irq" : QUP-core interrupt.
+- spi-max-frequency : Specifies maximum SPI clock frequency, Units - Hz.
+
+Required alias:
+- The desired bus-number is specified via an alias with the following format
+ 'spi{n}' where n is the bus number.
Optional properties:
-- gpios : specifies the gpio pins to be used for SPI CLK, MISO, MOSI in
+- gpios : Specifies the gpio pins to be used for SPI CLK, MISO, MOSI in
that order.
-- cs-gpios : specifies the gpio pins to be used for chipselects.
+- cs-gpios : Specifies the gpio pins to be used for chipselects.
+- qcom,infinite-mode: When missing or set to zero, QUP uses infinite-mode. When
+ value is non-zero, the value is the number of words in maximum transfer
+ length.
-SPI slave nodes must be children of the SPI master node and contain
+Optional properties which are required for support of BAM-mode:
+- qcom,ver-reg-exists : Boolean. When present, allows driver to verify if HW
+ version support latest features (e.g. BAM) and then enable them. Should be
+ removed for legacy HW.
+- qcom,use-bam : Boolean. When present, enables BAM-mode.
+- qcom,bam-consumer-pipe-index : BAM consumer-pipe index.
+- qcom,bam-producer-pipe-index : BAM producer-pipe index.
+- reg-names : register region names referenced in reg.
+ Required register resource for BAM are:
+ "spi_bam_physical" : Physical address of BAM for this controller.
+- interrupt-names : interrupt resource names referenced in interrupts.
+ Required interrupt resource from BAM are:
+ "spi_bam_irq" : BAM interrupt used by the controller.
+
+Optional SPI slave nodes must be children of the SPI master node and contain
the following properties.
-- reg : (required) chip select address of device.
-- compatible : (required) name of SPI device following generic names
- recommended practice
+- reg: (required) chip-select address of the device.
+- compatible : (required) Name of SPI device following generic names.
- spi-max-frequency : (required) Maximum SPI clocking speed of device in Hz
-- interrupts : (recommended) should contain the SPI slave interrupt number
+- interrupts : (recommended) Should contain the SPI slave interrupt number
encoded depending on the type of the interrupt controller.
-- interrupt-parent : (recommended) the phandle for the interrupt controller
+- interrupt-parent : (recommended) The phandle for the interrupt controller
that services interrupts for this device.
- spi-cpol : (optional) Empty property indicating device requires inverse
clock polarity (CPOL) mode
@@ -29,18 +55,30 @@
chip select active high
Example:
- spi@f9924000 {
- compatible = "qcom,spi-qup-v2";
- reg = <0xf9924000 0x1000>;
- interrupts = <0 96 0>;
- spi-max-frequency = <24000000>;
- #address-cells = <1>;
- #size-cells = <0>;
-
- device@0 {
- compatible = "spidev";
- reg = <0>;
- spi-max-frequency = <5000000>;
- };
+ aliases {
+ spi0 = &spi_0;
};
+ spi_0: spi@f9923000 {
+ compatible = "qcom,spi-qup-v2";
+
+ reg-names = "spi_physical", "spi_bam_physical";
+ reg = <0xf9923000 0x1000>,
+ <0xf9904000 0x10000>;
+ interrupt-names = "spi_irq", "spi_bam_irq";
+ interrupts = <0 95 0>, <0 238 0>;
+
+ spi-max-frequency = <19200000>;
+ #address-cells = <1>;
+ #size-cells = <0>;
+ gpios = <&msmgpio 3 0>, /* CLK */
+ <&msmgpio 1 0>, /* MISO */
+ <&msmgpio 0 0>; /* MOSI */
+ cs-gpios = <&msmgpio 9 0>;
+
+ qcom,infinite-mode = <0>;
+ qcom,use-bam;
+ qcom,bam-consumer-pipe-index = <12>;
+ qcom,bam-producer-pipe-index = <13>;
+ qcom,ver-reg-exists;
+ };
diff --git a/arch/arm/boot/dts/msm-iommu-v0.dtsi b/arch/arm/boot/dts/msm-iommu-v0.dtsi
index c6eb1b9..59b2a90 100644
--- a/arch/arm/boot/dts/msm-iommu-v0.dtsi
+++ b/arch/arm/boot/dts/msm-iommu-v0.dtsi
@@ -130,14 +130,14 @@
qcom,iommu-ctx@fd860000 {
reg = <0xfd860000 0x1000>;
interrupts = <0 247 0>;
- qcom,iommu-ctx-mids = <>;
+ qcom,iommu-ctx-mids = <0 1 3>;
label = "mdpe_0";
};
qcom,iommu-ctx@fd861000 {
reg = <0xfd861000 0x1000>;
interrupts = <0 247 0>;
- qcom,iommu-ctx-mids = <>;
+ qcom,iommu-ctx-mids = <2>;
label = "mdpe_1";
};
};
@@ -155,14 +155,14 @@
qcom,iommu-ctx@fd870000 {
reg = <0xfd870000 0x1000>;
interrupts = <0 247 0>;
- qcom,iommu-ctx-mids = <>;
+ qcom,iommu-ctx-mids = <0>;
label = "mdps_0";
};
qcom,iommu-ctx@fd871000 {
reg = <0xfd871000 0x1000>;
interrupts = <0 247 0>;
- qcom,iommu-ctx-mids = <>;
+ qcom,iommu-ctx-mids = <1>;
label = "mdps_1";
};
};
diff --git a/arch/arm/boot/dts/msm-pm8226.dtsi b/arch/arm/boot/dts/msm-pm8226.dtsi
index 0e06ac5..ce4513b 100644
--- a/arch/arm/boot/dts/msm-pm8226.dtsi
+++ b/arch/arm/boot/dts/msm-pm8226.dtsi
@@ -16,6 +16,113 @@
interrupt-controller;
#interrupt-cells = <3>;
+ qcom,pm8226@0 {
+ spmi-slave-container;
+ reg = <0x0>;
+ #address-cells = <1>;
+ #size-cells = <1>;
+
+ pm8226_gpios: gpios {
+ spmi-dev-container;
+ compatible = "qcom,qpnp-pin";
+ gpio-controller;
+ #gpio-cells = <2>;
+ #address-cells = <1>;
+ #size-cells = <1>;
+ label = "pm8226-gpio";
+
+ gpio@c000 {
+ reg = <0xc000 0x100>;
+ qcom,pin-num = <1>;
+ };
+
+ gpio@c100 {
+ reg = <0xc100 0x100>;
+ qcom,pin-num = <2>;
+ };
+
+ gpio@c200 {
+ reg = <0xc200 0x100>;
+ qcom,pin-num = <3>;
+ };
+
+ gpio@c300 {
+ reg = <0xc300 0x100>;
+ qcom,pin-num = <4>;
+ };
+
+ gpio@c400 {
+ reg = <0xc400 0x100>;
+ qcom,pin-num = <5>;
+ };
+
+ gpio@c500 {
+ reg = <0xc500 0x100>;
+ qcom,pin-num = <6>;
+ };
+
+ gpio@c600 {
+ reg = <0xc600 0x100>;
+ qcom,pin-num = <7>;
+ };
+
+ gpio@c700 {
+ reg = <0xc700 0x100>;
+ qcom,pin-num = <8>;
+ };
+ };
+
+ pm8226_mpps: mpps {
+ spmi-dev-container;
+ compatible = "qcom,qpnp-pin";
+ gpio-controller;
+ #gpio-cells = <2>;
+ #address-cells = <1>;
+ #size-cells = <1>;
+ label = "pm8226-mpp";
+
+ mpp@a000 {
+ reg = <0xa000 0x100>;
+ qcom,pin-num = <1>;
+ };
+
+ mpp@a100 {
+ reg = <0xa100 0x100>;
+ qcom,pin-num = <2>;
+ };
+
+ mpp@a200 {
+ reg = <0xa200 0x100>;
+ qcom,pin-num = <3>;
+ };
+
+ mpp@a300 {
+ reg = <0xa300 0x100>;
+ qcom,pin-num = <4>;
+ };
+
+ mpp@a400 {
+ reg = <0xa400 0x100>;
+ qcom,pin-num = <5>;
+ };
+
+ mpp@a500 {
+ reg = <0xa500 0x100>;
+ qcom,pin-num = <6>;
+ };
+
+ mpp@a600 {
+ reg = <0xa600 0x100>;
+ qcom,pin-num = <7>;
+ };
+
+ mpp@a700 {
+ reg = <0xa700 0x100>;
+ qcom,pin-num = <8>;
+ };
+ };
+ };
+
qcom,pm8226@1 {
spmi-slave-container;
reg = <0x1>;
diff --git a/arch/arm/boot/dts/msm8226-regulator.dtsi b/arch/arm/boot/dts/msm8226-regulator.dtsi
index f2269d5..50d2dba 100644
--- a/arch/arm/boot/dts/msm8226-regulator.dtsi
+++ b/arch/arm/boot/dts/msm8226-regulator.dtsi
@@ -10,275 +10,300 @@
* GNU General Public License for more details.
*/
- /* Stub Regulators */
+/* Stub Regulators */
- / {
- pm8026_s1: regulator-s1 {
- compatible = "qcom,stub-regulator";
- regulator-name = "8026_s1";
- qcom,hpm-min-load = <100000>;
- regulator-min-microvolt = <1150000>;
- regulator-max-microvolt = <1150000>;
- };
-
+/ {
pm8026_s1_corner: regulator-s1-corner {
compatible = "qcom,stub-regulator";
- regulator-name = "8026_s1_corner";
+ regulator-name = "8226_s1_corner";
qcom,hpm-min-load = <100000>;
regulator-min-microvolt = <1>;
regulator-max-microvolt = <7>;
qcom,consumer-supplies = "vdd_dig", "";
};
+};
- pm8026_s2: regulator-s2 {
- compatible = "qcom,stub-regulator";
- regulator-name = "8026_s2";
- qcom,hpm-min-load = <100000>;
- regulator-min-microvolt = <1050000>;
- regulator-max-microvolt = <1050000>;
- };
+/* QPNP controlled regulators: */
- pm8026_s3: regulator-s3 {
- compatible = "qcom,stub-regulator";
- regulator-name = "8026_s3";
- qcom,hpm-min-load = <100000>;
- regulator-min-microvolt = <1300000>;
- regulator-max-microvolt = <1300000>;
- };
+&spmi_bus {
- pm8026_s4: regulator-s4 {
- compatible = "qcom,stub-regulator";
- regulator-name = "8026_s4";
- qcom,hpm-min-load = <100000>;
- regulator-min-microvolt = <2100000>;
- regulator-max-microvolt = <2100000>;
- };
+ qcom,pm8226@1 {
- pm8026_s5: regulator-s5 {
- compatible = "qcom,stub-regulator";
- regulator-name = "8026_s5";
- qcom,hpm-min-load = <100000>;
- regulator-min-microvolt = <1150000>;
- regulator-max-microvolt = <1150000>;
- };
+ pm8226_s1: regulator@1400 {
+ status = "okay";
+ regulator-name = "8226_s1";
+ qcom,enable-time = <500>;
+ qcom,system-load = <100000>;
+ regulator-always-on;
+ regulator-min-microvolt = <1287500>;
+ regulator-max-microvolt = <1287500>;
+ };
- pm8026_l1: regulator-l1 {
- compatible = "qcom,stub-regulator";
- regulator-name = "8026_l1";
- parent-supply = <&pm8026_s3>;
- qcom,hpm-min-load = <10000>;
- regulator-min-microvolt = <1225000>;
- regulator-max-microvolt = <1225000>;
- };
+ pm8226_s2: regulator@1700 {
+ status = "okay";
+ regulator-name = "8226_s2";
+ qcom,enable-time = <500>;
+ qcom,system-load = <100000>;
+ regulator-always-on;
+ regulator-min-microvolt = <1150000>;
+ regulator-max-microvolt = <1150000>;
+ };
- pm8026_l2: regulator-l2 {
- compatible = "qcom,stub-regulator";
- regulator-name = "8026_l2";
- parent-supply = <&pm8026_s3>;
- qcom,hpm-min-load = <10000>;
- regulator-min-microvolt = <1200000>;
- regulator-max-microvolt = <1200000>;
- };
+ pm8226_s3: regulator@1a00 {
+ status = "okay";
+ regulator-name = "8226_s3";
+ qcom,enable-time = <500>;
+ qcom,system-load = <100000>;
+ regulator-always-on;
+ regulator-min-microvolt = <1300000>;
+ regulator-max-microvolt = <1300000>;
+ };
- pm8026_l3: regulator-l3 {
- compatible = "qcom,stub-regulator";
- regulator-name = "8026_l3";
- parent-supply = <&pm8026_s3>;
- qcom,hpm-min-load = <10000>;
- regulator-min-microvolt = <1150000>;
- regulator-max-microvolt = <1150000>;
- };
+ pm8226_s4: regulator@1d00 {
+ status = "okay";
+ regulator-name = "8226_s4";
+ qcom,enable-time = <500>;
+ qcom,system-load = <100000>;
+ regulator-always-on;
+ regulator-min-microvolt = <2100000>;
+ regulator-max-microvolt = <2100000>;
+ };
- pm8026_l4: regulator-l4 {
- compatible = "qcom,stub-regulator";
- regulator-name = "8026_l4";
- parent-supply = <&pm8026_s3>;
- qcom,hpm-min-load = <10000>;
- regulator-min-microvolt = <1200000>;
- regulator-max-microvolt = <1200000>;
- };
+ pm8226_s5: regulator@2000 {
+ status = "okay";
+ regulator-name = "8226_s5";
+ qcom,enable-time = <500>;
+ regulator-min-microvolt = <1150000>;
+ regulator-max-microvolt = <1150000>;
+ };
- pm8026_l5: regulator-l5 {
- compatible = "qcom,stub-regulator";
- regulator-name = "8026_l5";
- parent-supply = <&pm8026_s3>;
- qcom,hpm-min-load = <10000>;
- regulator-min-microvolt = <1200000>;
- regulator-max-microvolt = <1200000>;
- };
+ pm8226_l1: regulator@4000 {
+ status = "okay";
+ regulator-name = "8226_l1";
+ parent-supply = <&pm8226_s3>;
+ qcom,enable-time = <200>;
+ regulator-min-microvolt = <1225000>;
+ regulator-max-microvolt = <1225000>;
+ };
- pm8026_l6: regulator-l6 {
- compatible = "qcom,stub-regulator";
- regulator-name = "8026_l6";
- parent-supply = <&pm8026_s4>;
- qcom,hpm-min-load = <10000>;
- regulator-min-microvolt = <1800000>;
- regulator-max-microvolt = <1800000>;
- };
+ pm8226_l2: regulator@4100 {
+ status = "okay";
+ regulator-name = "8226_l2";
+ parent-supply = <&pm8226_s3>;
+ regulator-always-on;
+ qcom,enable-time = <200>;
+ qcom,system-load = <10000>;
+ regulator-min-microvolt = <1200000>;
+ regulator-max-microvolt = <1200000>;
+ };
- pm8026_l7: regulator-l7 {
- compatible = "qcom,stub-regulator";
- regulator-name = "8026_l7";
- parent-supply = <&pm8026_s4>;
- qcom,hpm-min-load = <10000>;
- regulator-min-microvolt = <1850000>;
- regulator-max-microvolt = <1850000>;
- };
+ pm8226_l3: regulator@4200 {
+ status = "okay";
+ regulator-name = "8226_l3";
+ parent-supply = <&pm8226_s3>;
+ qcom,system-load = <10000>;
+ regulator-always-on;
+ qcom,enable-time = <200>;
+ regulator-min-microvolt = <1287500>;
+ regulator-max-microvolt = <1287500>;
+ };
- pm8026_l8: regulator-l8 {
- compatible = "qcom,stub-regulator";
- regulator-name = "8026_l8";
- parent-supply = <&pm8026_s4>;
- qcom,hpm-min-load = <5000>;
- regulator-min-microvolt = <1800000>;
- regulator-max-microvolt = <1800000>;
- qcom,consumer-supplies = "vdd_sr2_pll", "";
- };
+ pm8226_l4: regulator@4300 {
+ status = "okay";
+ regulator-name = "8226_l4";
+ parent-supply = <&pm8226_s3>;
+ qcom,enable-time = <200>;
+ regulator-min-microvolt = <1200000>;
+ regulator-max-microvolt = <1200000>;
+ };
- pm8026_l9: regulator-l9 {
- compatible = "qcom,stub-regulator";
- regulator-name = "8026_l9";
- parent-supply = <&pm8026_s4>;
- qcom,hpm-min-load = <10000>;
- regulator-min-microvolt = <2050000>;
- regulator-max-microvolt = <2050000>;
- };
+ pm8226_l5: regulator@4400 {
+ status = "okay";
+ regulator-name = "8226_l5";
+ parent-supply = <&pm8226_s3>;
+ qcom,enable-time = <200>;
+ regulator-min-microvolt = <1200000>;
+ regulator-max-microvolt = <1200000>;
+ };
- pm8026_l10: regulator-l10 {
- compatible = "qcom,stub-regulator";
- regulator-name = "8026_l10";
- parent-supply = <&pm8026_s4>;
- qcom,hpm-min-load = <5000>;
- regulator-min-microvolt = <1800000>;
- regulator-max-microvolt = <1800000>;
- };
+ pm8226_l6: regulator@4500 {
+ status = "okay";
+ regulator-name = "8226_l6";
+ parent-supply = <&pm8226_s4>;
+ qcom,system-load = <10000>;
+ regulator-always-on;
+ qcom,enable-time = <200>;
+ regulator-min-microvolt = <1800000>;
+ regulator-max-microvolt = <1800000>;
+ };
- pm8026_l12: regulator-l12 {
- compatible = "qcom,stub-regulator";
- regulator-name = "8026_l12";
- qcom,hpm-min-load = <5000>;
- regulator-min-microvolt = <1800000>;
- regulator-max-microvolt = <1800000>;
- };
+ pm8226_l7: regulator@4600 {
+ status = "okay";
+ regulator-name = "8226_l7";
+ parent-supply = <&pm8226_s4>;
+ qcom,enable-time = <200>;
+ regulator-min-microvolt = <1850000>;
+ regulator-max-microvolt = <1850000>;
+ };
- pm8026_l14: regulator-l14 {
- compatible = "qcom,stub-regulator";
- regulator-name = "8026_l14";
- qcom,hpm-min-load = <5000>;
- regulator-min-microvolt = <2750000>;
- regulator-max-microvolt = <2750000>;
- };
+ pm8226_l8: regulator@4700 {
+ status = "okay";
+ regulator-name = "8226_l8";
+ parent-supply = <&pm8226_s4>;
+ qcom,enable-time = <200>;
+ regulator-min-microvolt = <1800000>;
+ regulator-max-microvolt = <1800000>;
+ qcom,consumer-supplies = "vdd_sr2_pll", "";
+ };
- pm8026_l15: regulator-l15 {
- compatible = "qcom,stub-regulator";
- regulator-name = "8026_l15";
- qcom,hpm-min-load = <10000>;
- regulator-min-microvolt = <2800000>;
- regulator-max-microvolt = <2800000>;
- };
+ pm8226_l9: regulator@4800 {
+ status = "okay";
+ regulator-name = "8226_l9";
+ parent-supply = <&pm8226_s4>;
+ qcom,enable-time = <200>;
+ regulator-min-microvolt = <2050000>;
+ regulator-max-microvolt = <2050000>;
+ };
- pm8026_l16: regulator-l16 {
- compatible = "qcom,stub-regulator";
- regulator-name = "8026_l16";
- qcom,hpm-min-load = <10000>;
- regulator-min-microvolt = <3000000>;
- regulator-max-microvolt = <3000000>;
- };
+ pm8226_l10: regulator@4900 {
+ status = "okay";
+ regulator-name = "8226_l10";
+ parent-supply = <&pm8226_s4>;
+ qcom,enable-time = <200>;
+ qcom,system-load = <5000>;
+ regulator-always-on;
+ regulator-min-microvolt = <1800000>;
+ regulator-max-microvolt = <1800000>;
+ };
- pm8026_l17: regulator-l17 {
- compatible = "qcom,stub-regulator";
- regulator-name = "8026_l17";
- qcom,hpm-min-load = <10000>;
- regulator-min-microvolt = <2950000>;
- regulator-max-microvolt = <2950000>;
- };
+ pm8226_l12: regulator@4b00 {
+ status = "okay";
+ regulator-name = "8226_l12";
+ qcom,enable-time = <200>;
+ regulator-min-microvolt = <1800000>;
+ regulator-max-microvolt = <1800000>;
+ };
- pm8026_l18: regulator-l18 {
- compatible = "qcom,stub-regulator";
- regulator-name = "8026_l18";
- qcom,hpm-min-load = <10000>;
- regulator-min-microvolt = <2950000>;
- regulator-max-microvolt = <2950000>;
- };
+ pm8226_l14: regulator@4d00 {
+ status = "okay";
+ regulator-name = "8226_l14";
+ qcom,enable-time = <200>;
+ regulator-min-microvolt = <2750000>;
+ regulator-max-microvolt = <2750000>;
+ };
- pm8026_l19: regulator-l19 {
- compatible = "qcom,stub-regulator";
- regulator-name = "8026_l19";
- qcom,hpm-min-load = <10000>;
- regulator-min-microvolt = <2850000>;
- regulator-max-microvolt = <2850000>;
- };
+ pm8226_l15: regulator@4e00 {
+ status = "okay";
+ regulator-name = "8226_l15";
+ qcom,enable-time = <200>;
+ regulator-min-microvolt = <2800000>;
+ regulator-max-microvolt = <2800000>;
+ };
- pm8026_l20: regulator-l20 {
- compatible = "qcom,stub-regulator";
- regulator-name = "8026_l20";
- qcom,hpm-min-load = <5000>;
- regulator-min-microvolt = <3075000>;
- regulator-max-microvolt = <3075000>;
- };
+ pm8226_l16: regulator@4f00 {
+ status = "okay";
+ regulator-name = "8226_l16";
+ qcom,enable-time = <200>;
+ regulator-min-microvolt = <3000000>;
+ regulator-max-microvolt = <3300000>;
+ };
- pm8026_l21: regulator-l21 {
- compatible = "qcom,stub-regulator";
- regulator-name = "8026_l21";
- qcom,hpm-min-load = <5000>;
- regulator-min-microvolt = <1800000>;
- regulator-max-microvolt = <2950000>;
- };
+ pm8226_l17: regulator@5000 {
+ status = "okay";
+ regulator-name = "8226_l17";
+ qcom,enable-time = <200>;
+ regulator-min-microvolt = <2950000>;
+ regulator-max-microvolt = <2950000>;
+ };
- pm8026_l22: regulator-l22 {
- compatible = "qcom,stub-regulator";
- regulator-name = "8026_l22";
- qcom,hpm-min-load = <10000>;
- regulator-min-microvolt = <1800000>;
- regulator-max-microvolt = <2950000>;
- };
+ pm8226_l18: regulator@5100 {
+ status = "okay";
+ regulator-name = "8226_l18";
+ qcom,enable-time = <200>;
+ regulator-min-microvolt = <2950000>;
+ regulator-max-microvolt = <2950000>;
+ };
- pm8026_l23: regulator-l23 {
- compatible = "qcom,stub-regulator";
- regulator-name = "8026_l23";
- qcom,hpm-min-load = <10000>;
- regulator-min-microvolt = <1800000>;
- regulator-max-microvolt = <2950000>;
- };
+ pm8226_l19: regulator@5200 {
+ status = "okay";
+ regulator-name = "8226_l19";
+ qcom,enable-time = <200>;
+ regulator-min-microvolt = <2850000>;
+ regulator-max-microvolt = <2850000>;
+ };
- pm8026_l24: regulator-l24 {
- compatible = "qcom,stub-regulator";
- regulator-name = "8026_l24";
- parent-supply = <&pm8026_s3>;
- qcom,hpm-min-load = <10000>;
- regulator-min-microvolt = <1300000>;
- regulator-max-microvolt = <1300000>;
- };
+ pm8226_l20: regulator@5300 {
+ status = "okay";
+ regulator-name = "8226_l20";
+ qcom,enable-time = <200>;
+ regulator-min-microvolt = <3075000>;
+ regulator-max-microvolt = <3075000>;
+ };
- pm8026_l26: regulator-l26 {
- compatible = "qcom,stub-regulator";
- regulator-name = "8026_l26";
- parent-supply = <&pm8026_s3>;
- qcom,hpm-min-load = <10000>;
- regulator-min-microvolt = <1225000>;
- regulator-max-microvolt = <1225000>;
- };
+ pm8226_l21: regulator@5400 {
+ status = "okay";
+ regulator-name = "8226_l21";
+ qcom,enable-time = <200>;
+ regulator-min-microvolt = <1800000>;
+ regulator-max-microvolt = <2950000>;
+ };
- pm8026_l27: regulator-l27 {
- compatible = "qcom,stub-regulator";
- regulator-name = "8026_l27";
- parent-supply = <&pm8026_s4>;
- qcom,hpm-min-load = <10000>;
- regulator-min-microvolt = <2050000>;
- regulator-max-microvolt = <2050000>;
- };
+ pm8226_l22: regulator@5500 {
+ status = "okay";
+ regulator-name = "8226_l22";
+ qcom,enable-time = <200>;
+ regulator-min-microvolt = <1800000>;
+ regulator-max-microvolt = <2950000>;
+ };
- pm8026_l28: regulator-l28 {
- compatible = "qcom,stub-regulator";
- regulator-name = "8026_l28";
- qcom,hpm-min-load = <10000>;
- regulator-min-microvolt = <1800000>;
- regulator-max-microvolt = <2950000>;
- };
+ pm8226_l23: regulator@5600 {
+ status = "okay";
+ regulator-name = "8226_l23";
+ qcom,enable-time = <200>;
+ regulator-min-microvolt = <1800000>;
+ regulator-max-microvolt = <2950000>;
+ };
- pm8026_lvs1: regulator-lvs1 {
- compatible = "qcom,stub-regulator";
- regulator-name = "8026_lvs1";
- parent-supply = <&pm8026_l6>;
+ pm8226_l24: regulator@5700 {
+ status = "okay";
+ regulator-name = "8226_l24";
+ parent-supply = <&pm8226_s3>;
+ qcom,enable-time = <200>;
+ regulator-min-microvolt = <1300000>;
+ regulator-max-microvolt = <1300000>;
+ };
+
+ pm8226_l26: regulator@5900 {
+ status = "okay";
+ regulator-name = "8226_l26";
+ parent-supply = <&pm8226_s3>;
+ qcom,enable-time = <200>;
+ regulator-min-microvolt = <1225000>;
+ regulator-max-microvolt = <1225000>;
+ };
+
+ pm8226_l27: regulator@5a00 {
+ status = "okay";
+ regulator-name = "8226_l27";
+ parent-supply = <&pm8226_s4>;
+ qcom,enable-time = <200>;
+ regulator-min-microvolt = <2050000>;
+ regulator-max-microvolt = <2050000>;
+ };
+
+ pm8226_l28: regulator@5b00 {
+ status = "okay";
+ regulator-name = "8226_l28";
+ qcom,enable-time = <200>;
+ regulator-min-microvolt = <1800000>;
+ regulator-max-microvolt = <2950000>;
+ };
+
+ pm8226_lvs1: regulator@8000 {
+ status = "okay";
+ regulator-name = "8226_lvs1";
+ parent-supply = <&pm8226_l6>;
+ qcom,enable-time = <200>;
+ };
};
};
diff --git a/arch/arm/boot/dts/msm8226-sim.dts b/arch/arm/boot/dts/msm8226-sim.dts
index 9a0ec17..f9ab957 100644
--- a/arch/arm/boot/dts/msm8226-sim.dts
+++ b/arch/arm/boot/dts/msm8226-sim.dts
@@ -1,4 +1,4 @@
-/* Copyright (c) 2012, The Linux Foundation. All rights reserved.
+/* Copyright (c) 2012-2013, The Linux Foundation. All rights reserved.
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License version 2 and
@@ -39,8 +39,8 @@
qcom,pad-drv-on = <0x7 0x4 0x4>; /* 16mA, 10mA, 10mA */
qcom,pad-drv-off = <0x0 0x0 0x0>; /* 2mA, 2mA, 2mA */
- vdd-supply = <&pm8026_l17>;
- vdd-io-supply = <&pm8026_l6>;
+ vdd-supply = <&pm8226_l17>;
+ vdd-io-supply = <&pm8226_l6>;
qcom,clk-rates = <400000 25000000 50000000 100000000 200000000>;
qcom,sup-voltages = <2950 2950>;
@@ -50,8 +50,8 @@
};
&sdcc2 {
- vdd-supply = <&pm8026_l18>;
- vdd-io-supply = <&pm8026_l21>;
+ vdd-supply = <&pm8226_l18>;
+ vdd-io-supply = <&pm8226_l21>;
qcom,vdd-voltage-level = <2950000 2950000>;
qcom,vdd-current-level = <9000 800000>;
@@ -74,3 +74,57 @@
status = "ok";
};
+
+&pm8226_gpios {
+ gpio@c000 { /* GPIO 1 */
+ };
+
+ gpio@c100 { /* GPIO 2 */
+ };
+
+ gpio@c200 { /* GPIO 3 */
+ };
+
+ gpio@c300 { /* GPIO 4 */
+ };
+
+ gpio@c400 { /* GPIO 5 */
+ };
+
+ gpio@c500 { /* GPIO 6 */
+ };
+
+ gpio@c600 { /* GPIO 7 */
+ };
+
+ gpio@c700 { /* GPIO 8 */
+ };
+};
+
+&pm8226_mpps {
+ mpp@a000 { /* MPP 1 */
+ };
+
+ mpp@a100 { /* MPP 2 */
+ };
+
+ mpp@a200 { /* MPP 3 */
+ };
+
+ mpp@a300 { /* MPP 4 */
+ };
+
+ mpp@a400 { /* MPP 5 */
+ };
+
+ mpp@a500 { /* MPP 6 */
+ };
+
+ mpp@a600 { /* MPP 7 */
+ };
+
+ mpp@a700 { /* MPP 8 */
+ };
+};
+
+
diff --git a/arch/arm/boot/dts/msm8226.dtsi b/arch/arm/boot/dts/msm8226.dtsi
index 5227004..3ae69fd 100644
--- a/arch/arm/boot/dts/msm8226.dtsi
+++ b/arch/arm/boot/dts/msm8226.dtsi
@@ -81,9 +81,9 @@
reg = <0xf9a55000 0x400>;
interrupts = <0 134 0>, <0 140 0>;
interrupt-names = "core_irq", "async_irq";
- HSUSB_VDDCX-supply = <&pm8026_s1>;
- HSUSB_1p8-supply = <&pm8026_l10>;
- HSUSB_3p3-supply = <&pm8026_l20>;
+ HSUSB_VDDCX-supply = <&pm8226_s1>;
+ HSUSB_1p8-supply = <&pm8226_l10>;
+ HSUSB_3p3-supply = <&pm8226_l20>;
qcom,hsusb-otg-phy-type = <2>;
qcom,hsusb-otg-mode = <1>;
@@ -123,23 +123,23 @@
17 18 19 20 21 22 23 24 25 26 27 28>;
qcom,cdc-reset-gpio = <&msmgpio 72 0>;
- cdc-vdd-buck-supply = <&pm8026_s4>;
+ cdc-vdd-buck-supply = <&pm8226_s4>;
qcom,cdc-vdd-buck-voltage = <2100000 2100000>;
qcom,cdc-vdd-buck-current = <650000>;
- cdc-vdd-h-supply = <&pm8026_l6>;
+ cdc-vdd-h-supply = <&pm8226_l6>;
qcom,cdc-vdd-h-voltage = <1800000 1800000>;
qcom,cdc-vdd-h-current = <25000>;
- cdc-vdd-px-supply = <&pm8026_l6>;
+ cdc-vdd-px-supply = <&pm8226_l6>;
qcom,cdc-vdd-px-voltage = <1800000 1800000>;
qcom,cdc-vdd-px-current = <25000>;
- cdc-vdd-a-1p2v-supply = <&pm8026_l4>;
+ cdc-vdd-a-1p2v-supply = <&pm8226_l4>;
qcom,cdc-vdd-a-1p2v-voltage = <1200000 1200000>;
qcom,cdc-vdd-a-1p2v-current = <10000>;
- cdc-vdd-cx-supply = <&pm8026_l4>;
+ cdc-vdd-cx-supply = <&pm8226_l4>;
qcom,cdc-vdd-cx-voltage = <1200000 1200000>;
qcom,cdc-vdd-cx-current = <10000>;
@@ -466,8 +466,8 @@
compatible = "qcom,acpuclk-a7";
reg = <0xf9011050 0x8>;
reg-names = "rcg_base";
- a7_cpu-supply = <&pm8026_s2>;
- a7_mem-supply = <&pm8026_l3>;
+ a7_cpu-supply = <&pm8226_s2>;
+ a7_mem-supply = <&pm8226_l3>;
};
qcom,ocmem@fdd00000 {
@@ -510,7 +510,7 @@
<0xfd485300 0xc>;
reg-names = "pmu_base", "clk_base", "halt_base";
interrupts = <0 149 1>;
- vdd_pronto_pll-supply = <&pm8026_l8>;
+ vdd_pronto_pll-supply = <&pm8226_l8>;
qcom,firmware-name = "wcnss";
};
@@ -566,5 +566,5 @@
status = "ok";
};
-/include/ "msm8226-regulator.dtsi"
/include/ "msm-pm8226.dtsi"
+/include/ "msm8226-regulator.dtsi"
diff --git a/arch/arm/boot/dts/msm8974-cdp.dtsi b/arch/arm/boot/dts/msm8974-cdp.dtsi
index 12804fb..16883ef 100644
--- a/arch/arm/boot/dts/msm8974-cdp.dtsi
+++ b/arch/arm/boot/dts/msm8974-cdp.dtsi
@@ -534,3 +534,11 @@
mpp@a300 { /* MPP 4 */
};
};
+
+&slim_msm {
+ taiko_codec {
+ qcom,cdc-micbias1-ext-cap;
+ qcom,cdc-micbias3-ext-cap;
+ qcom,cdc-micbias4-ext-cap;
+ };
+};
diff --git a/arch/arm/boot/dts/msm8974-fluid.dtsi b/arch/arm/boot/dts/msm8974-fluid.dtsi
index 7cc10e2..11c835f 100644
--- a/arch/arm/boot/dts/msm8974-fluid.dtsi
+++ b/arch/arm/boot/dts/msm8974-fluid.dtsi
@@ -207,7 +207,10 @@
&slim_msm {
taiko_codec {
+ qcom,cdc-micbias1-ext-cap;
qcom,cdc-micbias2-ext-cap;
+ qcom,cdc-micbias3-ext-cap;
+ qcom,cdc-micbias4-ext-cap;
};
};
diff --git a/arch/arm/boot/dts/msm8974-liquid.dtsi b/arch/arm/boot/dts/msm8974-liquid.dtsi
index 76b23a1..e97678a 100644
--- a/arch/arm/boot/dts/msm8974-liquid.dtsi
+++ b/arch/arm/boot/dts/msm8974-liquid.dtsi
@@ -585,6 +585,7 @@
&slim_msm {
taiko_codec {
qcom,cdc-micbias2-ext-cap;
+ qcom,cdc-micbias3-ext-cap;
};
};
diff --git a/arch/arm/boot/dts/msm8974-mtp.dtsi b/arch/arm/boot/dts/msm8974-mtp.dtsi
index ea57389..e21610b 100644
--- a/arch/arm/boot/dts/msm8974-mtp.dtsi
+++ b/arch/arm/boot/dts/msm8974-mtp.dtsi
@@ -512,7 +512,9 @@
&slim_msm {
taiko_codec {
+ qcom,cdc-micbias1-ext-cap;
qcom,cdc-micbias2-ext-cap;
+ qcom,cdc-micbias4-ext-cap;
};
};
diff --git a/arch/arm/boot/dts/msm8974-v1-pm.dtsi b/arch/arm/boot/dts/msm8974-v1-pm.dtsi
index f9b9e33..2de5fad 100644
--- a/arch/arm/boot/dts/msm8974-v1-pm.dtsi
+++ b/arch/arm/boot/dts/msm8974-v1-pm.dtsi
@@ -419,13 +419,9 @@
<40 95>;
};
- qcom,pc-cntr@fe805664 {
- compatible = "qcom,pc-cntr";
- reg = <0xfe805664 0x40>;
- };
-
- qcom,pm-8x60 {
+ qcom,pm-8x60@fe805664 {
compatible = "qcom,pm-8x60";
+ reg = <0xfe805664 0x40>;
qcom,pc-mode = <0>; /*MSM_PC_TZ_L2_INT */
qcom,use-sync-timer;
};
diff --git a/arch/arm/boot/dts/msm8974-v2-iommu.dtsi b/arch/arm/boot/dts/msm8974-v2-iommu.dtsi
index 584869d..c974884 100644
--- a/arch/arm/boot/dts/msm8974-v2-iommu.dtsi
+++ b/arch/arm/boot/dts/msm8974-v2-iommu.dtsi
@@ -71,6 +71,7 @@
};
venus_sec_bitstream: qcom,iommu-ctx@fdc8d000 {
+ qcom,iommu-ctx-sids = <0x80 0x81 0x82 0x83 0x84>;
label = "venus_sec_bitstream";
};
diff --git a/arch/arm/boot/dts/msm8974.dtsi b/arch/arm/boot/dts/msm8974.dtsi
index 3be174f..78e5957 100644
--- a/arch/arm/boot/dts/msm8974.dtsi
+++ b/arch/arm/boot/dts/msm8974.dtsi
@@ -25,6 +25,11 @@
compatible = "qcom,msm8974";
interrupt-parent = <&intc>;
+ aliases {
+ spi0 = &spi_0;
+ spi7 = &spi_7;
+ };
+
intc: interrupt-controller@F9000000 {
compatible = "qcom,msm-qgic2";
interrupt-controller;
@@ -60,6 +65,11 @@
clock-frequency = <19200000>;
};
+ qcom,mpm-counter@fc4a3000 {
+ compatible = "qcom,mpm-counter";
+ reg = <0xfc4a3000 0x1000>;
+ };
+
qcom,vidc@fdc00000 {
compatible = "qcom,msm-vidc";
reg = <0xfdc00000 0xff000>;
@@ -376,9 +386,8 @@
qcom,bam-dma-res-pipes = <6>;
};
- spi_epm: spi@f9966000 {
+ spi_7: spi_epm: spi@f9966000 {
compatible = "qcom,spi-qup-v2";
- cell-index = <7>;
reg = <0xf9966000 0x1000>;
interrupts = <0 104 0>;
spi-max-frequency = <19200000>;
@@ -567,8 +576,7 @@
qcom,i2c-src-freq = <19200000>;
};
- spi@f9923000 {
- cell-index = <0>;
+ spi_0: spi@f9923000 {
compatible = "qcom,spi-qup-v2";
reg = <0xf9923000 0x1000>;
interrupts = <0 95 0>;
@@ -940,15 +948,9 @@
};
partition@80000 {
- reg = <0x80000 0xA0000>;
+ reg = <0x100000 0x80000>;
qcom,ocmem-part-name = "lp_audio";
- qcom,ocmem-part-min = <0xA0000>;
- };
-
- partition@E0000 {
- reg = <0x120000 0x20000>;
- qcom,ocmem-part-name = "other_os";
- qcom,ocmem-part-min = <0x20000>;
+ qcom,ocmem-part-min = <0x80000>;
};
partition@100000 {
@@ -957,11 +959,6 @@
qcom,ocmem-part-min = <0x55000>;
};
- partition@140000 {
- reg = <0x140000 0x40000>;
- qcom,ocmem-part-name = "sensors";
- qcom,ocmem-part-min = <0x40000>;
- };
};
rpm_bus: qcom,rpm-smd {
diff --git a/arch/arm/boot/dts/msm9625-pm.dtsi b/arch/arm/boot/dts/msm9625-pm.dtsi
index 793d27b..a735609 100644
--- a/arch/arm/boot/dts/msm9625-pm.dtsi
+++ b/arch/arm/boot/dts/msm9625-pm.dtsi
@@ -189,8 +189,38 @@
qcom,gic-parent = <&intc>;
qcom,gic-map = <47 172>, /* usb2_hsic_async_wakeup_irq */
- <62 222>, /* ee0_krait_hlos_spmi_periph_irq */
- <0xff 208>; /* summary_irq_kpss */
+ <41 180>, /* usb_async_wakeup_irq */
+ <62 222>, /* ee0_krait_hlos_spmi_periph_irq */
+ <0xff 57>, /* mss_to_apps_irq(0) */
+ <0xff 58>, /* mss_to_apps_irq(1) */
+ <0xff 59>, /* mss_to_apps_irq(2) */
+ <0xff 60>, /* mss_to_apps_irq(3) */
+ <0xff 173>, /* o_wcss_apss_smd_hi */
+ <0xff 174>, /* o_wcss_apss_smd_med */
+ <0xff 175>, /* o_wcss_apss_smd_lo */
+ <0xff 176>, /* o_wcss_apss_smsm_irq */
+ <0xff 177>, /* o_wcss_apss_wlan_data_xfer_done */
+ <0xff 178>, /* o_wcss_apss_wlan_rx_data_avail */
+ <0xff 179>, /* o_wcss_apss_asic_intr */
+ <0xff 188>, /* q6ss_irq_out(4) */
+ <0xff 189>, /* q6ss_irq_out(5) */
+ <0xff 190>, /* q6ss_irq_out(6) */
+ <0xff 191>, /* q6ss_irq_out(7) */
+ <0xff 192>, /* audio_out0_irq */
+ <0xff 193>, /* midi_arm_irq */
+ <0xff 194>, /* q6ss_wdog_exp_irq */
+ <0xff 195>, /* slimbus_core_ee1_irq */
+ <0xff 196>, /* bam_irq(1) */
+ <0xff 197>, /* qdss_irq_out(7) */
+ <0xff 200>, /* rpm_ipc(4) */
+ <0xff 201>, /* rpm_ipc(5) */
+ <0xff 202>, /* rpm_ipc(6) */
+ <0xff 203>, /* rpm_ipc(7) */
+ <0xff 204>, /* rpm_ipc(24) */
+ <0xff 205>, /* rpm_ipc(25) */
+ <0xff 206>, /* rpm_ipc(26) */
+ <0xff 207>, /* rpm_ipc(27) */
+ <0xff 240>; /* summary_irq_kpss */
qcom,gpio-parent = <&msmgpio>;
qcom,gpio-map = <4 1>,
diff --git a/arch/arm/boot/dts/msm9625-v2-1-cdp.dts b/arch/arm/boot/dts/msm9625-v2-1-cdp.dts
new file mode 100644
index 0000000..8702184
--- /dev/null
+++ b/arch/arm/boot/dts/msm9625-v2-1-cdp.dts
@@ -0,0 +1,99 @@
+/* Copyright (c) 2013, The Linux Foundation. All rights reserved.
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License version 2 and
+ * only version 2 as published by the Free Software Foundation.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ */
+
+/dts-v1/;
+
+/include/ "msm9625-v2-1.dtsi"
+
+/ {
+ model = "Qualcomm MSM 9625V2.1 CDP";
+ compatible = "qcom,msm9625-cdp", "qcom,msm9625";
+ qcom,msm-id = <134 1 0x20001>, <152 1 0x20001>, <149 1 0x20001>,
+ <150 1 0x20001>, <151 1 0x20001>, <148 1 0x20001>,
+ <173 1 0x20001>, <174 1 0x20001>, <175 1 0x20001>;
+
+ i2c@f9925000 {
+ charger@57 {
+ compatible = "summit,smb137c";
+ reg = <0x57>;
+ summit,chg-current-ma = <1500>;
+ summit,term-current-ma = <50>;
+ summit,pre-chg-current-ma = <100>;
+ summit,float-voltage-mv = <4200>;
+ summit,thresh-voltage-mv = <3000>;
+ summit,recharge-thresh-mv = <75>;
+ summit,system-voltage-mv = <4250>;
+ summit,charging-timeout = <382>;
+ summit,pre-charge-timeout = <48>;
+ summit,therm-current-ua = <10>;
+ summit,temperature-min = <4>; /* 0 C */
+ summit,temperature-max = <3>; /* 45 C */
+ };
+ };
+
+ wlan0: qca,wlan {
+ cell-index = <0>;
+ compatible = "qca,ar6004-sdio";
+ qca,chip-pwd-l-gpios = <&msmgpio 62 0>;
+ qca,pm-enable-gpios = <&pm8019_gpios 3 0x0>;
+ qca,ar6004-vdd-io-supply = <&pm8019_l11>;
+ };
+};
+
+/* PM8019 GPIO and MPP configuration */
+&pm8019_gpios {
+ gpio@c000 { /* GPIO 1 */
+ };
+
+ gpio@c100 { /* GPIO 2 */
+ };
+
+ gpio@c200 { /* GPIO 3 */
+ };
+
+ gpio@c300 { /* GPIO 4 */
+ /* ext_2p95v regulator enable config */
+ qcom,mode = <1>; /* Digital output */
+ qcom,output-type = <0>; /* CMOS */
+ qcom,invert = <0>; /* Output low */
+ qcom,out-strength = <1>; /* Low */
+ qcom,vin-sel = <2>; /* PM8019 L11 - 1.8V */
+ qcom,src-sel = <0>; /* Constant */
+ qcom,master-en = <1>; /* Enable GPIO */
+ };
+
+ gpio@c400 { /* GPIO 5 */
+ };
+
+ gpio@c500 { /* GPIO 6 */
+ };
+};
+
+&pm8019_mpps {
+ mpp@a000 { /* MPP 1 */
+ };
+
+ mpp@a100 { /* MPP 2 */
+ };
+
+ mpp@a200 { /* MPP 3 */
+ };
+
+ mpp@a300 { /* MPP 4 */
+ };
+
+ mpp@a400 { /* MPP 5 */
+ };
+
+ mpp@a500 { /* MPP 6 */
+ };
+};
diff --git a/arch/arm/boot/dts/msm9625-v2-1-mtp.dts b/arch/arm/boot/dts/msm9625-v2-1-mtp.dts
new file mode 100644
index 0000000..2dc040c
--- /dev/null
+++ b/arch/arm/boot/dts/msm9625-v2-1-mtp.dts
@@ -0,0 +1,99 @@
+/* Copyright (c) 2013, The Linux Foundation. All rights reserved.
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License version 2 and
+ * only version 2 as published by the Free Software Foundation.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ */
+
+/dts-v1/;
+
+/include/ "msm9625-v2-1.dtsi"
+
+/ {
+ model = "Qualcomm MSM 9625V2.1 MTP";
+ compatible = "qcom,msm9625-mtp", "qcom,msm9625";
+ qcom,msm-id = <134 7 0x20001>, <152 7 0x20001>, <149 7 0x20001>,
+ <150 7 0x20001>, <151 7 0x20001>, <148 7 0x20001>,
+ <173 7 0x20001>, <174 7 0x20001>, <175 7 0x20001>;
+
+ i2c@f9925000 {
+ charger@57 {
+ compatible = "summit,smb137c";
+ reg = <0x57>;
+ summit,chg-current-ma = <1500>;
+ summit,term-current-ma = <50>;
+ summit,pre-chg-current-ma = <100>;
+ summit,float-voltage-mv = <4200>;
+ summit,thresh-voltage-mv = <3000>;
+ summit,recharge-thresh-mv = <75>;
+ summit,system-voltage-mv = <4250>;
+ summit,charging-timeout = <382>;
+ summit,pre-charge-timeout = <48>;
+ summit,therm-current-ua = <10>;
+ summit,temperature-min = <4>; /* 0 C */
+ summit,temperature-max = <3>; /* 45 C */
+ };
+ };
+
+ wlan0: qca,wlan {
+ cell-index = <0>;
+ compatible = "qca,ar6004-sdio";
+ qca,chip-pwd-l-gpios = <&msmgpio 62 0>;
+ qca,pm-enable-gpios = <&pm8019_gpios 3 0x0>;
+ qca,ar6004-vdd-io-supply = <&pm8019_l11>;
+ };
+};
+
+/* PM8019 GPIO and MPP configuration */
+&pm8019_gpios {
+ gpio@c000 { /* GPIO 1 */
+ };
+
+ gpio@c100 { /* GPIO 2 */
+ };
+
+ gpio@c200 { /* GPIO 3 */
+ };
+
+ gpio@c300 { /* GPIO 4 */
+ /* ext_2p95v regulator enable config */
+ qcom,mode = <1>; /* Digital output */
+ qcom,output-type = <0>; /* CMOS */
+ qcom,invert = <0>; /* Output low */
+ qcom,out-strength = <1>; /* Low */
+ qcom,vin-sel = <2>; /* PM8019 L11 - 1.8V */
+ qcom,src-sel = <0>; /* Constant */
+ qcom,master-en = <1>; /* Enable GPIO */
+ };
+
+ gpio@c400 { /* GPIO 5 */
+ };
+
+ gpio@c500 { /* GPIO 6 */
+ };
+};
+
+&pm8019_mpps {
+ mpp@a000 { /* MPP 1 */
+ };
+
+ mpp@a100 { /* MPP 2 */
+ };
+
+ mpp@a200 { /* MPP 3 */
+ };
+
+ mpp@a300 { /* MPP 4 */
+ };
+
+ mpp@a400 { /* MPP 5 */
+ };
+
+ mpp@a500 { /* MPP 6 */
+ };
+};
diff --git a/arch/arm/boot/dts/msm9625-v2-1.dtsi b/arch/arm/boot/dts/msm9625-v2-1.dtsi
new file mode 100644
index 0000000..c3c2c49
--- /dev/null
+++ b/arch/arm/boot/dts/msm9625-v2-1.dtsi
@@ -0,0 +1,36 @@
+/* Copyright (c) 2013, The Linux Foundation. All rights reserved.
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License version 2 and
+ * only version 2 as published by the Free Software Foundation.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ */
+
+/*
+ * As a general rule, only version-specific property overrides should be placed
+ * inside this file. However, device definitions should be placed inside the
+ * msm9625.dtsi file.
+ */
+
+/include/ "msm9625.dtsi"
+
+/ {
+ qcom,msm-imem@fe807800 {
+ compatible = "qcom,msm-imem";
+ reg = <0xfe807800 0x1000>; /* Address and size of IMEM */
+ };
+
+ android_usb@fe8078c8 {
+ compatible = "qcom,android-usb";
+ reg = <0xfe8078c8 0xc8>;
+ qcom,android-usb-swfi-latency = <100>;
+ };
+};
+
+&ipa_hw {
+ qcom,ipa-hw-ver = <2>; /* IPA h-w revision */
+};
diff --git a/arch/arm/boot/dts/msm9625.dtsi b/arch/arm/boot/dts/msm9625.dtsi
index d5a33ee..922616c 100644
--- a/arch/arm/boot/dts/msm9625.dtsi
+++ b/arch/arm/boot/dts/msm9625.dtsi
@@ -21,6 +21,10 @@
compatible = "qcom,msm9625";
interrupt-parent = <&intc>;
+ aliases {
+ spi0 = &spi_0;
+ };
+
intc: interrupt-controller@F9000000 {
compatible = "qcom,msm-qgic2";
interrupt-controller;
@@ -186,8 +190,7 @@
interrupt-names = "bam_irq";
};
- spi@f9924000 {
- cell-index = <0>;
+ spi_0: spi@f9924000 {
compatible = "qcom,spi-qup-v2";
reg = <0xf9924000 0x1000>;
interrupts = <0 96 0>;
diff --git a/arch/arm/configs/msm8610_defconfig b/arch/arm/configs/msm8610_defconfig
index 1623d45..2bf4630 100644
--- a/arch/arm/configs/msm8610_defconfig
+++ b/arch/arm/configs/msm8610_defconfig
@@ -139,6 +139,7 @@
CONFIG_I2C_CHARDEV=y
CONFIG_I2C_QUP=y
CONFIG_WCD9306_CODEC=y
+CONFIG_GPIO_QPNP_PIN=y
# CONFIG_HWMON is not set
CONFIG_REGULATOR=y
CONFIG_REGULATOR_STUB=y
diff --git a/arch/arm/kernel/perf_event.c b/arch/arm/kernel/perf_event.c
index 85b1bb3..8fb93d0 100644
--- a/arch/arm/kernel/perf_event.c
+++ b/arch/arm/kernel/perf_event.c
@@ -790,7 +790,7 @@
*/
if (cpu_pmu &&
cpu_pmu->plat_device->dev.platform_data) {
- irq = platform_get_irq(cpu_pmu->plat_device, 1);
+ irq = platform_get_irq(cpu_pmu->plat_device, 0);
smp_call_function_single((int)hcpu,
disable_irq_callback, &irq, 1);
}
@@ -803,7 +803,7 @@
*/
if (cpu_pmu &&
cpu_pmu->plat_device->dev.platform_data) {
- irq = platform_get_irq(cpu_pmu->plat_device, 1);
+ irq = platform_get_irq(cpu_pmu->plat_device, 0);
smp_call_function_single((int)hcpu,
enable_irq_callback, &irq, 1);
}
diff --git a/arch/arm/mach-msm/Makefile b/arch/arm/mach-msm/Makefile
index ecea32b..cb5e712 100644
--- a/arch/arm/mach-msm/Makefile
+++ b/arch/arm/mach-msm/Makefile
@@ -411,3 +411,5 @@
obj-$(CONFIG_MSM_SMCMOD) += smcmod.o
obj-$(CONFIG_MSM_CPU_PWRCTL) += msm_cpu_pwrctl.o
+
+obj-$(CONFIG_ARCH_MSM8974) += msm_mpmctr.o
diff --git a/arch/arm/mach-msm/Makefile.boot b/arch/arm/mach-msm/Makefile.boot
index b451d08..202b8dd 100644
--- a/arch/arm/mach-msm/Makefile.boot
+++ b/arch/arm/mach-msm/Makefile.boot
@@ -68,6 +68,8 @@
dtb-$(CONFIG_ARCH_MSM9625) += msm9625-v1-rumi.dtb
dtb-$(CONFIG_ARCH_MSM9625) += msm9625-v2-cdp.dtb
dtb-$(CONFIG_ARCH_MSM9625) += msm9625-v2-mtp.dtb
+ dtb-$(CONFIG_ARCH_MSM9625) += msm9625-v2-1-mtp.dtb
+ dtb-$(CONFIG_ARCH_MSM9625) += msm9625-v2-1-cdp.dtb
# MSM8226
zreladdr-$(CONFIG_ARCH_MSM8226) := 0x00008000
diff --git a/arch/arm/mach-msm/bms-batterydata-desay.c b/arch/arm/mach-msm/bms-batterydata-desay.c
index 5b72a3f..dd3f346 100644
--- a/arch/arm/mach-msm/bms-batterydata-desay.c
+++ b/arch/arm/mach-msm/bms-batterydata-desay.c
@@ -1,4 +1,4 @@
-/* Copyright (c) 2011-2012, The Linux Foundation. All rights reserved.
+/* Copyright (c) 2011-2013, The Linux Foundation. All rights reserved.
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License version 2 and
@@ -83,4 +83,5 @@
.pc_temp_ocv_lut = &desay_5200_pc_temp_ocv,
.pc_sf_lut = &desay_5200_pc_sf,
.default_rbatt_mohm = 156,
+ .rbatt_capacitive_mohm = 50,
};
diff --git a/arch/arm/mach-msm/bms-batterydata.c b/arch/arm/mach-msm/bms-batterydata.c
index 824cf6b..0c39df6 100644
--- a/arch/arm/mach-msm/bms-batterydata.c
+++ b/arch/arm/mach-msm/bms-batterydata.c
@@ -1,4 +1,4 @@
-/* Copyright (c) 2011-2012, The Linux Foundation. All rights reserved.
+/* Copyright (c) 2011-2013, The Linux Foundation. All rights reserved.
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License version 2 and
@@ -105,4 +105,5 @@
.pc_temp_ocv_lut = &pc_temp_ocv,
.rbatt_sf_lut = &rbatt_sf,
.default_rbatt_mohm = 236,
+ .rbatt_capacitive_mohm = 50,
};
diff --git a/arch/arm/mach-msm/board-8064.c b/arch/arm/mach-msm/board-8064.c
index a89ea61..beb064b 100644
--- a/arch/arm/mach-msm/board-8064.c
+++ b/arch/arm/mach-msm/board-8064.c
@@ -2723,7 +2723,6 @@
&apq8064_device_uart_gsbi1,
&apq8064_device_uart_gsbi4,
&msm_device_sps_apq8064,
- &msm8064_pc_cntr,
};
static struct platform_device *common_i2s_devices[] __initdata = {
@@ -2888,7 +2887,6 @@
#ifdef CONFIG_MSM_ROTATOR
&msm_rotator_device,
#endif
- &msm8064_pc_cntr,
};
static struct platform_device
@@ -3861,11 +3859,13 @@
if (cpu_is_apq8064ab())
apq8064ab_update_krait_spm();
if (cpu_is_krait_v3()) {
- msm_pm_set_tz_retention_flag(0);
+ struct msm_pm_init_data_type *pdata =
+ msm8064_pm_8x60.dev.platform_data;
+ pdata->retention_calls_tz = false;
apq8064ab_update_retention_spm();
- } else {
- msm_pm_set_tz_retention_flag(1);
}
+ platform_device_register(&msm8064_pm_8x60);
+
msm_spm_init(msm_spm_data, ARRAY_SIZE(msm_spm_data));
msm_spm_l2_init(msm_spm_l2_data);
BUG_ON(msm_pm_boot_init(&msm_pm_boot_pdata));
diff --git a/arch/arm/mach-msm/board-8930-storage.c b/arch/arm/mach-msm/board-8930-storage.c
index d974452..d045040 100644
--- a/arch/arm/mach-msm/board-8930-storage.c
+++ b/arch/arm/mach-msm/board-8930-storage.c
@@ -63,11 +63,9 @@
* hardware revisions - maybe once that is done, this can be
* reverted.
*/
- .always_on = 1,
.lpm_sup = 1,
.hpm_uA = 800000, /* 800mA */
.lpm_uA = 9000,
- .reset_at_init = true,
},
};
@@ -311,13 +309,11 @@
* This change to the boards will be true for newer versions of the SoC
* as well.
*/
- if ((SOCINFO_VERSION_MAJOR(socinfo_get_version()) >= 1 &&
- SOCINFO_VERSION_MINOR(socinfo_get_version()) >= 2) ||
- machine_is_msm8930_cdp()) {
- msm8960_sdc3_data.vreg_data->vdd_data->always_on = false;
- msm8960_sdc3_data.vreg_data->vdd_data->reset_at_init = false;
+ if (SOCINFO_VERSION_MAJOR(socinfo_get_version()) == 1 &&
+ SOCINFO_VERSION_MINOR(socinfo_get_version()) < 2) {
+ msm8960_sdc3_data.vreg_data->vdd_data->always_on = true;
+ msm8960_sdc3_data.vreg_data->vdd_data->reset_at_init = true;
}
-
/* SDC3: External card slot */
if (!machine_is_msm8930_cdp()) {
msm8960_sdc3_data.wpswitch_gpio = 0;
diff --git a/arch/arm/mach-msm/board-8930.c b/arch/arm/mach-msm/board-8930.c
index a8e117f..25ba1aa 100644
--- a/arch/arm/mach-msm/board-8930.c
+++ b/arch/arm/mach-msm/board-8930.c
@@ -2473,7 +2473,6 @@
&msm8930_iommu_domain_device,
&msm_tsens_device,
&msm8930_cache_dump_device,
- &msm8930_pc_cntr,
};
static struct platform_device *cdp_devices[] __initdata = {
@@ -2955,11 +2954,14 @@
msm8930_i2c_init();
msm8930_init_gpu();
if (cpu_is_krait_v3()) {
- msm_pm_set_tz_retention_flag(0);
+ struct msm_pm_init_data_type *pdata =
+ msm8930_pm_8x60.dev.platform_data;
+ pdata->retention_calls_tz = false;
msm8930ab_update_retention_spm();
- } else {
- msm_pm_set_tz_retention_flag(1);
}
+
+ platform_device_register(&msm8930_pm_8x60);
+
msm_spm_init(msm_spm_data, ARRAY_SIZE(msm_spm_data));
msm_spm_l2_init(msm_spm_l2_data);
msm8930_init_buses();
diff --git a/arch/arm/mach-msm/board-8960.c b/arch/arm/mach-msm/board-8960.c
index 6524832..95f618a 100644
--- a/arch/arm/mach-msm/board-8960.c
+++ b/arch/arm/mach-msm/board-8960.c
@@ -2955,7 +2955,6 @@
&msm8960_cache_dump_device,
&msm8960_iommu_domain_device,
&msm_tsens_device,
- &msm8960_pc_cntr,
};
static struct platform_device *cdp_devices[] __initdata = {
@@ -3488,11 +3487,13 @@
if (cpu_is_msm8960ab())
msm8960ab_update_krait_spm();
if (cpu_is_krait_v3()) {
- msm_pm_set_tz_retention_flag(0);
+ struct msm_pm_init_data_type *pdata =
+ msm8960_pm_8x60.dev.platform_data;
+ pdata->retention_calls_tz = false;
msm8960ab_update_retention_spm();
- } else {
- msm_pm_set_tz_retention_flag(1);
}
+ platform_device_register(&msm8960_pm_8x60);
+
msm_spm_init(msm_spm_data, ARRAY_SIZE(msm_spm_data));
msm_spm_l2_init(msm_spm_l2_data);
diff --git a/arch/arm/mach-msm/board-8974-gpiomux.c b/arch/arm/mach-msm/board-8974-gpiomux.c
index eb99073..b3cc9b7 100644
--- a/arch/arm/mach-msm/board-8974-gpiomux.c
+++ b/arch/arm/mach-msm/board-8974-gpiomux.c
@@ -258,12 +258,6 @@
.dir = GPIOMUX_OUT_HIGH,
};
-static struct gpiomux_setting mhl_active_2_cfg = {
- .func = GPIOMUX_FUNC_1,
- .drv = GPIOMUX_DRV_2MA,
- .pull = GPIOMUX_PULL_UP,
-};
-
static struct gpiomux_setting hdmi_suspend_cfg = {
.func = GPIOMUX_FUNC_GPIO,
.drv = GPIOMUX_DRV_2MA,
@@ -299,14 +293,6 @@
[GPIOMUX_ACTIVE] = &mhl_active_1_cfg,
},
},
- {
- /* mhl-sii8334 reset */
- .gpio = 8,
- .settings = {
- [GPIOMUX_SUSPENDED] = &mhl_suspend_config,
- [GPIOMUX_ACTIVE] = &mhl_active_2_cfg,
- },
- },
};
diff --git a/arch/arm/mach-msm/board-msm8x60.c b/arch/arm/mach-msm/board-msm8x60.c
index c45cf11..02a753a 100644
--- a/arch/arm/mach-msm/board-msm8x60.c
+++ b/arch/arm/mach-msm/board-msm8x60.c
@@ -5299,6 +5299,7 @@
&msm_device_tz_log,
&msm_rtb_device,
&msm8660_iommu_domain_device,
+ &msm8660_pm_8x60,
};
#ifdef CONFIG_ION_MSM
diff --git a/arch/arm/mach-msm/clock-8974.c b/arch/arm/mach-msm/clock-8974.c
index c3e1e3e..d26b4b2 100644
--- a/arch/arm/mach-msm/clock-8974.c
+++ b/arch/arm/mach-msm/clock-8974.c
@@ -526,7 +526,6 @@
#define mm_gnd_source_val 6
#define gpll1_hsic_source_val 4
#define cxo_lpass_source_val 0
-#define lpapll0_lpass_source_val 1
#define gpll0_lpass_source_val 5
#define edppll_270_mm_source_val 4
#define edppll_350_mm_source_val 4
@@ -742,21 +741,6 @@
},
};
-static struct pll_vote_clk lpapll0_clk_src = {
- .en_reg = (void __iomem *)LPASS_LPA_PLL_VOTE_APPS_REG,
- .en_mask = BIT(0),
- .status_reg = (void __iomem *)LPAPLL_STATUS_REG,
- .status_mask = BIT(17),
- .base = &virt_bases[LPASS_BASE],
- .c = {
- .parent = &cxo_clk_src.c,
- .rate = 491520000,
- .dbg_name = "lpapll0_clk_src",
- .ops = &clk_ops_pll_vote,
- CLK_INIT(lpapll0_clk_src.c),
- },
-};
-
static struct pll_vote_clk mmpll0_clk_src = {
.en_reg = (void __iomem *)MMSS_PLL_VOTE_APCS_REG,
.en_mask = BIT(0),
@@ -4350,411 +4334,6 @@
},
};
-static struct clk_freq_tbl ftbl_audio_core_slimbus_core_clock[] = {
- F_LPASS(24576000, lpapll0, 4, 1, 5),
- F_END
-};
-
-static struct rcg_clk audio_core_slimbus_core_clk_src = {
- .cmd_rcgr_reg = SLIMBUS_CMD_RCGR,
- .set_rate = set_rate_mnd,
- .freq_tbl = ftbl_audio_core_slimbus_core_clock,
- .current_freq = &rcg_dummy_freq,
- .base = &virt_bases[LPASS_BASE],
- .c = {
- .dbg_name = "audio_core_slimbus_core_clk_src",
- .ops = &clk_ops_rcg_mnd,
- VDD_DIG_FMAX_MAP2(LOW, 70000000, NOMINAL, 140000000),
- CLK_INIT(audio_core_slimbus_core_clk_src.c),
- },
-};
-
-static struct branch_clk audio_core_slimbus_core_clk = {
- .cbcr_reg = AUDIO_CORE_SLIMBUS_CORE_CBCR,
- .base = &virt_bases[LPASS_BASE],
- .c = {
- .parent = &audio_core_slimbus_core_clk_src.c,
- .dbg_name = "audio_core_slimbus_core_clk",
- .ops = &clk_ops_branch,
- CLK_INIT(audio_core_slimbus_core_clk.c),
- },
-};
-
-static struct branch_clk audio_core_slimbus_lfabif_clk = {
- .cbcr_reg = AUDIO_CORE_SLIMBUS_LFABIF_CBCR,
- .has_sibling = 1,
- .base = &virt_bases[LPASS_BASE],
- .c = {
- .dbg_name = "audio_core_slimbus_lfabif_clk",
- .ops = &clk_ops_branch,
- CLK_INIT(audio_core_slimbus_lfabif_clk.c),
- },
-};
-
-static struct clk_freq_tbl ftbl_audio_core_lpaif_clock[] = {
- F_LPASS( 512000, lpapll0, 16, 1, 60),
- F_LPASS( 768000, lpapll0, 16, 1, 40),
- F_LPASS( 1024000, lpapll0, 16, 1, 30),
- F_LPASS( 1536000, lpapll0, 16, 1, 20),
- F_LPASS( 2048000, lpapll0, 16, 1, 15),
- F_LPASS( 3072000, lpapll0, 16, 1, 10),
- F_LPASS( 4096000, lpapll0, 15, 1, 8),
- F_LPASS( 6144000, lpapll0, 10, 1, 8),
- F_LPASS( 8192000, lpapll0, 15, 1, 4),
- F_LPASS(12288000, lpapll0, 10, 1, 4),
- F_END
-};
-
-static struct rcg_clk audio_core_lpaif_codec_spkr_clk_src = {
- .cmd_rcgr_reg = LPAIF_SPKR_CMD_RCGR,
- .set_rate = set_rate_mnd,
- .freq_tbl = ftbl_audio_core_lpaif_clock,
- .current_freq = &rcg_dummy_freq,
- .base = &virt_bases[LPASS_BASE],
- .c = {
- .dbg_name = "audio_core_lpaif_codec_spkr_clk_src",
- .ops = &clk_ops_rcg_mnd,
- VDD_DIG_FMAX_MAP2(LOW, 12000000, NOMINAL, 25000000),
- CLK_INIT(audio_core_lpaif_codec_spkr_clk_src.c),
- },
-};
-
-static struct rcg_clk audio_core_lpaif_pri_clk_src = {
- .cmd_rcgr_reg = LPAIF_PRI_CMD_RCGR,
- .set_rate = set_rate_mnd,
- .freq_tbl = ftbl_audio_core_lpaif_clock,
- .current_freq = &rcg_dummy_freq,
- .base = &virt_bases[LPASS_BASE],
- .c = {
- .dbg_name = "audio_core_lpaif_pri_clk_src",
- .ops = &clk_ops_rcg_mnd,
- VDD_DIG_FMAX_MAP2(LOW, 12000000, NOMINAL, 25000000),
- CLK_INIT(audio_core_lpaif_pri_clk_src.c),
- },
-};
-
-static struct rcg_clk audio_core_lpaif_sec_clk_src = {
- .cmd_rcgr_reg = LPAIF_SEC_CMD_RCGR,
- .set_rate = set_rate_mnd,
- .freq_tbl = ftbl_audio_core_lpaif_clock,
- .current_freq = &rcg_dummy_freq,
- .base = &virt_bases[LPASS_BASE],
- .c = {
- .dbg_name = "audio_core_lpaif_sec_clk_src",
- .ops = &clk_ops_rcg_mnd,
- VDD_DIG_FMAX_MAP2(LOW, 12000000, NOMINAL, 25000000),
- CLK_INIT(audio_core_lpaif_sec_clk_src.c),
- },
-};
-
-static struct rcg_clk audio_core_lpaif_ter_clk_src = {
- .cmd_rcgr_reg = LPAIF_TER_CMD_RCGR,
- .set_rate = set_rate_mnd,
- .freq_tbl = ftbl_audio_core_lpaif_clock,
- .current_freq = &rcg_dummy_freq,
- .base = &virt_bases[LPASS_BASE],
- .c = {
- .dbg_name = "audio_core_lpaif_ter_clk_src",
- .ops = &clk_ops_rcg_mnd,
- VDD_DIG_FMAX_MAP2(LOW, 12000000, NOMINAL, 25000000),
- CLK_INIT(audio_core_lpaif_ter_clk_src.c),
- },
-};
-
-static struct rcg_clk audio_core_lpaif_quad_clk_src = {
- .cmd_rcgr_reg = LPAIF_QUAD_CMD_RCGR,
- .set_rate = set_rate_mnd,
- .freq_tbl = ftbl_audio_core_lpaif_clock,
- .current_freq = &rcg_dummy_freq,
- .base = &virt_bases[LPASS_BASE],
- .c = {
- .dbg_name = "audio_core_lpaif_quad_clk_src",
- .ops = &clk_ops_rcg_mnd,
- VDD_DIG_FMAX_MAP2(LOW, 12000000, NOMINAL, 25000000),
- CLK_INIT(audio_core_lpaif_quad_clk_src.c),
- },
-};
-
-static struct rcg_clk audio_core_lpaif_pcm0_clk_src = {
- .cmd_rcgr_reg = LPAIF_PCM0_CMD_RCGR,
- .set_rate = set_rate_mnd,
- .freq_tbl = ftbl_audio_core_lpaif_clock,
- .current_freq = &rcg_dummy_freq,
- .base = &virt_bases[LPASS_BASE],
- .c = {
- .dbg_name = "audio_core_lpaif_pcm0_clk_src",
- .ops = &clk_ops_rcg_mnd,
- VDD_DIG_FMAX_MAP2(LOW, 12000000, NOMINAL, 25000000),
- CLK_INIT(audio_core_lpaif_pcm0_clk_src.c),
- },
-};
-
-static struct rcg_clk audio_core_lpaif_pcm1_clk_src = {
- .cmd_rcgr_reg = LPAIF_PCM1_CMD_RCGR,
- .set_rate = set_rate_mnd,
- .freq_tbl = ftbl_audio_core_lpaif_clock,
- .current_freq = &rcg_dummy_freq,
- .base = &virt_bases[LPASS_BASE],
- .c = {
- .dbg_name = "audio_core_lpaif_pcm1_clk_src",
- .ops = &clk_ops_rcg_mnd,
- VDD_DIG_FMAX_MAP2(LOW, 12000000, NOMINAL, 25000000),
- CLK_INIT(audio_core_lpaif_pcm1_clk_src.c),
- },
-};
-
-struct rcg_clk audio_core_lpaif_pcmoe_clk_src = {
- .cmd_rcgr_reg = LPAIF_PCMOE_CMD_RCGR,
- .set_rate = set_rate_mnd,
- .freq_tbl = ftbl_audio_core_lpaif_clock,
- .current_freq = &rcg_dummy_freq,
- .base = &virt_bases[LPASS_BASE],
- .c = {
- .dbg_name = "audio_core_lpaif_pcmoe_clk_src",
- .ops = &clk_ops_rcg_mnd,
- VDD_DIG_FMAX_MAP1(LOW, 12290000),
- CLK_INIT(audio_core_lpaif_pcmoe_clk_src.c),
- },
-};
-
-static struct branch_clk audio_core_lpaif_codec_spkr_osr_clk = {
- .cbcr_reg = AUDIO_CORE_LPAIF_CODEC_SPKR_OSR_CBCR,
- .has_sibling = 1,
- .base = &virt_bases[LPASS_BASE],
- .c = {
- .parent = &audio_core_lpaif_codec_spkr_clk_src.c,
- .dbg_name = "audio_core_lpaif_codec_spkr_osr_clk",
- .ops = &clk_ops_branch,
- CLK_INIT(audio_core_lpaif_codec_spkr_osr_clk.c),
- },
-};
-
-static struct branch_clk audio_core_lpaif_codec_spkr_ebit_clk = {
- .cbcr_reg = AUDIO_CORE_LPAIF_CODEC_SPKR_EBIT_CBCR,
- .has_sibling = 1,
- .base = &virt_bases[LPASS_BASE],
- .c = {
- .dbg_name = "audio_core_lpaif_codec_spkr_ebit_clk",
- .ops = &clk_ops_branch,
- CLK_INIT(audio_core_lpaif_codec_spkr_ebit_clk.c),
- },
-};
-
-static struct branch_clk audio_core_lpaif_codec_spkr_ibit_clk = {
- .cbcr_reg = AUDIO_CORE_LPAIF_CODEC_SPKR_IBIT_CBCR,
- .has_sibling = 1,
- .max_div = 15,
- .base = &virt_bases[LPASS_BASE],
- .c = {
- .parent = &audio_core_lpaif_codec_spkr_clk_src.c,
- .dbg_name = "audio_core_lpaif_codec_spkr_ibit_clk",
- .ops = &clk_ops_branch,
- CLK_INIT(audio_core_lpaif_codec_spkr_ibit_clk.c),
- },
-};
-
-static struct branch_clk audio_core_lpaif_pri_osr_clk = {
- .cbcr_reg = AUDIO_CORE_LPAIF_PRI_OSR_CBCR,
- .has_sibling = 1,
- .base = &virt_bases[LPASS_BASE],
- .c = {
- .parent = &audio_core_lpaif_pri_clk_src.c,
- .dbg_name = "audio_core_lpaif_pri_osr_clk",
- .ops = &clk_ops_branch,
- CLK_INIT(audio_core_lpaif_pri_osr_clk.c),
- },
-};
-
-static struct branch_clk audio_core_lpaif_pri_ebit_clk = {
- .cbcr_reg = AUDIO_CORE_LPAIF_PRI_EBIT_CBCR,
- .has_sibling = 1,
- .base = &virt_bases[LPASS_BASE],
- .c = {
- .dbg_name = "audio_core_lpaif_pri_ebit_clk",
- .ops = &clk_ops_branch,
- CLK_INIT(audio_core_lpaif_pri_ebit_clk.c),
- },
-};
-
-static struct branch_clk audio_core_lpaif_pri_ibit_clk = {
- .cbcr_reg = AUDIO_CORE_LPAIF_PRI_IBIT_CBCR,
- .has_sibling = 1,
- .max_div = 15,
- .base = &virt_bases[LPASS_BASE],
- .c = {
- .parent = &audio_core_lpaif_pri_clk_src.c,
- .dbg_name = "audio_core_lpaif_pri_ibit_clk",
- .ops = &clk_ops_branch,
- CLK_INIT(audio_core_lpaif_pri_ibit_clk.c),
- },
-};
-
-static struct branch_clk audio_core_lpaif_sec_osr_clk = {
- .cbcr_reg = AUDIO_CORE_LPAIF_SEC_OSR_CBCR,
- .has_sibling = 1,
- .base = &virt_bases[LPASS_BASE],
- .c = {
- .parent = &audio_core_lpaif_sec_clk_src.c,
- .dbg_name = "audio_core_lpaif_sec_osr_clk",
- .ops = &clk_ops_branch,
- CLK_INIT(audio_core_lpaif_sec_osr_clk.c),
- },
-};
-
-static struct branch_clk audio_core_lpaif_sec_ebit_clk = {
- .cbcr_reg = AUDIO_CORE_LPAIF_SEC_EBIT_CBCR,
- .has_sibling = 1,
- .base = &virt_bases[LPASS_BASE],
- .c = {
- .dbg_name = "audio_core_lpaif_sec_ebit_clk",
- .ops = &clk_ops_branch,
- CLK_INIT(audio_core_lpaif_sec_ebit_clk.c),
- },
-};
-
-static struct branch_clk audio_core_lpaif_sec_ibit_clk = {
- .cbcr_reg = AUDIO_CORE_LPAIF_SEC_IBIT_CBCR,
- .has_sibling = 1,
- .max_div = 15,
- .base = &virt_bases[LPASS_BASE],
- .c = {
- .parent = &audio_core_lpaif_sec_clk_src.c,
- .dbg_name = "audio_core_lpaif_sec_ibit_clk",
- .ops = &clk_ops_branch,
- CLK_INIT(audio_core_lpaif_sec_ibit_clk.c),
- },
-};
-
-static struct branch_clk audio_core_lpaif_ter_osr_clk = {
- .cbcr_reg = AUDIO_CORE_LPAIF_TER_OSR_CBCR,
- .has_sibling = 1,
- .base = &virt_bases[LPASS_BASE],
- .c = {
- .parent = &audio_core_lpaif_ter_clk_src.c,
- .dbg_name = "audio_core_lpaif_ter_osr_clk",
- .ops = &clk_ops_branch,
- CLK_INIT(audio_core_lpaif_ter_osr_clk.c),
- },
-};
-
-static struct branch_clk audio_core_lpaif_ter_ebit_clk = {
- .cbcr_reg = AUDIO_CORE_LPAIF_TER_EBIT_CBCR,
- .has_sibling = 1,
- .base = &virt_bases[LPASS_BASE],
- .c = {
- .dbg_name = "audio_core_lpaif_ter_ebit_clk",
- .ops = &clk_ops_branch,
- CLK_INIT(audio_core_lpaif_ter_ebit_clk.c),
- },
-};
-
-static struct branch_clk audio_core_lpaif_ter_ibit_clk = {
- .cbcr_reg = AUDIO_CORE_LPAIF_TER_IBIT_CBCR,
- .has_sibling = 1,
- .max_div = 15,
- .base = &virt_bases[LPASS_BASE],
- .c = {
- .parent = &audio_core_lpaif_ter_clk_src.c,
- .dbg_name = "audio_core_lpaif_ter_ibit_clk",
- .ops = &clk_ops_branch,
- CLK_INIT(audio_core_lpaif_ter_ibit_clk.c),
- },
-};
-
-static struct branch_clk audio_core_lpaif_quad_osr_clk = {
- .cbcr_reg = AUDIO_CORE_LPAIF_QUAD_OSR_CBCR,
- .has_sibling = 1,
- .base = &virt_bases[LPASS_BASE],
- .c = {
- .parent = &audio_core_lpaif_quad_clk_src.c,
- .dbg_name = "audio_core_lpaif_quad_osr_clk",
- .ops = &clk_ops_branch,
- CLK_INIT(audio_core_lpaif_quad_osr_clk.c),
- },
-};
-
-static struct branch_clk audio_core_lpaif_quad_ebit_clk = {
- .cbcr_reg = AUDIO_CORE_LPAIF_QUAD_EBIT_CBCR,
- .has_sibling = 1,
- .base = &virt_bases[LPASS_BASE],
- .c = {
- .dbg_name = "audio_core_lpaif_quad_ebit_clk",
- .ops = &clk_ops_branch,
- CLK_INIT(audio_core_lpaif_quad_ebit_clk.c),
- },
-};
-
-static struct branch_clk audio_core_lpaif_quad_ibit_clk = {
- .cbcr_reg = AUDIO_CORE_LPAIF_QUAD_IBIT_CBCR,
- .has_sibling = 1,
- .max_div = 15,
- .base = &virt_bases[LPASS_BASE],
- .c = {
- .parent = &audio_core_lpaif_quad_clk_src.c,
- .dbg_name = "audio_core_lpaif_quad_ibit_clk",
- .ops = &clk_ops_branch,
- CLK_INIT(audio_core_lpaif_quad_ibit_clk.c),
- },
-};
-
-static struct branch_clk audio_core_lpaif_pcm0_ebit_clk = {
- .cbcr_reg = AUDIO_CORE_LPAIF_PCM0_EBIT_CBCR,
- .has_sibling = 1,
- .base = &virt_bases[LPASS_BASE],
- .c = {
- .dbg_name = "audio_core_lpaif_pcm0_ebit_clk",
- .ops = &clk_ops_branch,
- CLK_INIT(audio_core_lpaif_pcm0_ebit_clk.c),
- },
-};
-
-static struct branch_clk audio_core_lpaif_pcm0_ibit_clk = {
- .cbcr_reg = AUDIO_CORE_LPAIF_PCM0_IBIT_CBCR,
- .has_sibling = 1,
- .base = &virt_bases[LPASS_BASE],
- .c = {
- .parent = &audio_core_lpaif_pcm0_clk_src.c,
- .dbg_name = "audio_core_lpaif_pcm0_ibit_clk",
- .ops = &clk_ops_branch,
- CLK_INIT(audio_core_lpaif_pcm0_ibit_clk.c),
- },
-};
-
-static struct branch_clk audio_core_lpaif_pcm1_ebit_clk = {
- .cbcr_reg = AUDIO_CORE_LPAIF_PCM1_EBIT_CBCR,
- .has_sibling = 1,
- .base = &virt_bases[LPASS_BASE],
- .c = {
- .parent = &audio_core_lpaif_pcm1_clk_src.c,
- .dbg_name = "audio_core_lpaif_pcm1_ebit_clk",
- .ops = &clk_ops_branch,
- CLK_INIT(audio_core_lpaif_pcm1_ebit_clk.c),
- },
-};
-
-static struct branch_clk audio_core_lpaif_pcm1_ibit_clk = {
- .cbcr_reg = AUDIO_CORE_LPAIF_PCM1_IBIT_CBCR,
- .has_sibling = 1,
- .base = &virt_bases[LPASS_BASE],
- .c = {
- .parent = &audio_core_lpaif_pcm1_clk_src.c,
- .dbg_name = "audio_core_lpaif_pcm1_ibit_clk",
- .ops = &clk_ops_branch,
- CLK_INIT(audio_core_lpaif_pcm1_ibit_clk.c),
- },
-};
-
-struct branch_clk audio_core_lpaif_pcmoe_clk = {
- .cbcr_reg = AUDIO_CORE_LPAIF_PCM_DATA_OE_CBCR,
- .base = &virt_bases[LPASS_BASE],
- .c = {
- .parent = &audio_core_lpaif_pcmoe_clk_src.c,
- .dbg_name = "audio_core_lpaif_pcmoe_clk",
- .ops = &clk_ops_branch,
- CLK_INIT(audio_core_lpaif_pcmoe_clk.c),
- },
-};
-
static struct branch_clk q6ss_ahb_lfabif_clk = {
.cbcr_reg = LPASS_Q6SS_AHB_LFABIF_CBCR,
.has_sibling = 1,
@@ -4766,16 +4345,6 @@
},
};
-static struct branch_clk audio_core_ixfabric_clk = {
- .cbcr_reg = AUDIO_CORE_IXFABRIC_CBCR,
- .has_sibling = 1,
- .base = &virt_bases[LPASS_BASE],
- .c = {
- .dbg_name = "audio_core_ixfabric_clk",
- .ops = &clk_ops_branch,
- CLK_INIT(audio_core_ixfabric_clk.c),
- },
-};
static struct branch_clk gcc_lpass_q6_axi_clk = {
.cbcr_reg = LPASS_Q6_AXI_CBCR,
@@ -4811,17 +4380,6 @@
},
};
-static struct branch_clk audio_wrapper_br_clk = {
- .cbcr_reg = AUDIO_WRAPPER_BR_CBCR,
- .has_sibling = 1,
- .base = &virt_bases[LPASS_BASE],
- .c = {
- .dbg_name = "audio_wrapper_br_clk",
- .ops = &clk_ops_branch,
- CLK_INIT(audio_wrapper_br_clk.c),
- },
-};
-
static DEFINE_CLK_MEASURE(l2_m_clk);
static DEFINE_CLK_MEASURE(krait0_m_clk);
static DEFINE_CLK_MEASURE(krait1_m_clk);
@@ -5004,20 +4562,9 @@
{&mdss_hdmi_ahb_clk.c, MMSS_BASE, 0x0023},
{&mdss_pclk0_clk.c, MMSS_BASE, 0x0016},
{&mdss_pclk1_clk.c, MMSS_BASE, 0x0017},
- {&audio_core_lpaif_pri_clk_src.c, LPASS_BASE, 0x0017},
- {&audio_core_lpaif_sec_clk_src.c, LPASS_BASE, 0x0016},
- {&audio_core_lpaif_ter_clk_src.c, LPASS_BASE, 0x0015},
- {&audio_core_lpaif_quad_clk_src.c, LPASS_BASE, 0x0014},
- {&audio_core_lpaif_pcm0_clk_src.c, LPASS_BASE, 0x0013},
- {&audio_core_lpaif_pcm1_clk_src.c, LPASS_BASE, 0x0012},
- {&audio_core_lpaif_pcmoe_clk_src.c, LPASS_BASE, 0x000f},
- {&audio_core_slimbus_core_clk.c, LPASS_BASE, 0x003d},
- {&audio_core_slimbus_lfabif_clk.c, LPASS_BASE, 0x003e},
{&q6ss_xo_clk.c, LPASS_BASE, 0x002b},
{&q6ss_ahb_lfabif_clk.c, LPASS_BASE, 0x001e},
{&q6ss_ahbm_clk.c, LPASS_BASE, 0x001d},
- {&audio_core_ixfabric_clk.c, LPASS_BASE, 0x0059},
- {&audio_wrapper_br_clk.c, LPASS_BASE, 0x0022},
{&krait0_m_clk, APCS_BASE, M_ACPU0},
{&krait1_m_clk, APCS_BASE, M_ACPU1},
@@ -5639,57 +5186,6 @@
/* LPASS clocks */
- CLK_LOOKUP("bus_clk", audio_core_ixfabric_clk.c, ""),
- CLK_LOOKUP("core_clk", audio_core_slimbus_core_clk.c, "fe12f000.slim"),
- CLK_LOOKUP("iface_clk", audio_core_slimbus_lfabif_clk.c,
- "fe12f000.slim"),
- CLK_LOOKUP("core_clk", audio_core_lpaif_codec_spkr_clk_src.c, ""),
- CLK_LOOKUP("osr_clk", audio_core_lpaif_codec_spkr_osr_clk.c, ""),
- CLK_LOOKUP("ebit_clk", audio_core_lpaif_codec_spkr_ebit_clk.c, ""),
- CLK_LOOKUP("ibit_clk", audio_core_lpaif_codec_spkr_ibit_clk.c, ""),
- CLK_LOOKUP("core_clk", audio_core_lpaif_pri_clk_src.c, ""),
- CLK_LOOKUP("osr_clk", audio_core_lpaif_pri_osr_clk.c, ""),
- CLK_LOOKUP("ebit_clk", audio_core_lpaif_pri_ebit_clk.c, ""),
- CLK_LOOKUP("ibit_clk", audio_core_lpaif_pri_ibit_clk.c, ""),
- CLK_LOOKUP("core_clk", audio_core_lpaif_sec_clk_src.c, ""),
- CLK_LOOKUP("osr_clk", audio_core_lpaif_sec_osr_clk.c, ""),
- CLK_LOOKUP("ebit_clk", audio_core_lpaif_sec_ebit_clk.c, ""),
- CLK_LOOKUP("ibit_clk", audio_core_lpaif_sec_ibit_clk.c, ""),
- CLK_LOOKUP("core_clk", audio_core_lpaif_ter_clk_src.c, ""),
- CLK_LOOKUP("osr_clk", audio_core_lpaif_ter_osr_clk.c, ""),
- CLK_LOOKUP("ebit_clk", audio_core_lpaif_ter_ebit_clk.c, ""),
- CLK_LOOKUP("ibit_clk", audio_core_lpaif_ter_ibit_clk.c, ""),
- CLK_LOOKUP("core_clk", audio_core_lpaif_quad_clk_src.c,
- "msm-dai-q6-mi2s.3"),
- CLK_LOOKUP("osr_clk", audio_core_lpaif_quad_osr_clk.c,
- "msm-dai-q6-mi2s.3"),
- CLK_LOOKUP("ebit_clk", audio_core_lpaif_quad_ebit_clk.c,
- "msm-dai-q6-mi2s.3"),
- CLK_LOOKUP("ibit_clk", audio_core_lpaif_quad_ibit_clk.c,
- "msm-dai-q6-mi2s.3"),
- CLK_LOOKUP("pcm_clk", audio_core_lpaif_pcm0_clk_src.c,
- "msm-dai-q6.4106"),
- CLK_LOOKUP("ebit_clk", audio_core_lpaif_pcm0_ebit_clk.c, ""),
- CLK_LOOKUP("ibit_clk", audio_core_lpaif_pcm0_ibit_clk.c,
- "msm-dai-q6.4106"),
- CLK_LOOKUP("ibit_clk", audio_core_lpaif_pcm0_ibit_clk.c, ""),
- CLK_LOOKUP("core_clk", audio_core_lpaif_pcm1_clk_src.c, ""),
- CLK_LOOKUP("ebit_clk", audio_core_lpaif_pcm1_ebit_clk.c, ""),
- CLK_LOOKUP("ibit_clk", audio_core_lpaif_pcm1_ibit_clk.c, ""),
- CLK_LOOKUP("core_oe_src_clk", audio_core_lpaif_pcmoe_clk_src.c,
- "msm-dai-q6.4106"),
- CLK_LOOKUP("core_oe_clk", audio_core_lpaif_pcmoe_clk.c,
- "msm-dai-q6.4106"),
- CLK_LOOKUP("pcm_clk", audio_core_lpaif_pcm0_clk_src.c,
- "msm-dai-q6.4107"),
- CLK_LOOKUP("ibit_clk", audio_core_lpaif_pcm0_ibit_clk.c,
- "msm-dai-q6.4107"),
- CLK_LOOKUP("core_oe_src_clk", audio_core_lpaif_pcmoe_clk_src.c,
- "msm-dai-q6.4107"),
- CLK_LOOKUP("core_oe_clk", audio_core_lpaif_pcmoe_clk.c,
- "msm-dai-q6.4107"),
- CLK_LOOKUP("br_clk", audio_wrapper_br_clk.c, "fdd00000.qcom,ocmem"),
-
CLK_LOOKUP("bus_clk", gcc_mss_q6_bimc_axi_clk.c, "fc880000.qcom,mss"),
CLK_LOOKUP("iface_clk", gcc_mss_cfg_ahb_clk.c, "fc880000.qcom,mss"),
CLK_LOOKUP("mem_clk", gcc_boot_rom_ahb_clk.c, "fc880000.qcom,mss"),
@@ -5880,32 +5376,6 @@
.main_output_mask = BIT(0),
};
-static struct pll_config_regs lpapll0_regs __initdata = {
- .l_reg = (void __iomem *)LPAPLL_L_REG,
- .m_reg = (void __iomem *)LPAPLL_M_REG,
- .n_reg = (void __iomem *)LPAPLL_N_REG,
- .config_reg = (void __iomem *)LPAPLL_USER_CTL_REG,
- .mode_reg = (void __iomem *)LPAPLL_MODE_REG,
- .base = &virt_bases[LPASS_BASE],
-};
-
-/* LPAPLL0 at 491.52 MHz, main output enabled. */
-static struct pll_config lpapll0_config __initdata = {
- .l = 0x33,
- .m = 0x1,
- .n = 0x5,
- .vco_val = 0x0,
- .vco_mask = BM(21, 20),
- .pre_div_val = BVAL(14, 12, 0x1),
- .pre_div_mask = BM(14, 12),
- .post_div_val = 0x0,
- .post_div_mask = BM(9, 8),
- .mn_ena_val = BIT(24),
- .mn_ena_mask = BIT(24),
- .main_output_val = BIT(0),
- .main_output_mask = BIT(0),
-};
-
#define PWR_ON_MASK BIT(31)
#define EN_REST_WAIT_MASK (0xF << 20)
#define EN_FEW_WAIT_MASK (0xF << 16)
@@ -5922,8 +5392,7 @@
static void __init reg_init(void)
{
- u32 regval, status;
- int ret;
+ u32 regval;
configure_sr_hpm_lp_pll(&mmpll0_config, &mmpll0_regs, 1);
@@ -5934,7 +5403,6 @@
configure_sr_hpm_lp_pll(&mmpll1_config, &mmpll1_regs, 1);
configure_sr_hpm_lp_pll(&mmpll3_config, &mmpll3_regs, 0);
}
- configure_sr_hpm_lp_pll(&lpapll0_config, &lpapll0_regs, 1);
/* Vote for GPLL0 to turn on. Needed by acpuclock. */
regval = readl_relaxed(GCC_REG_BASE(APCS_GPLL_ENA_VOTE_REG));
@@ -5957,31 +5425,6 @@
* register.
*/
writel_relaxed(0x0, GCC_REG_BASE(APCS_CLOCK_SLEEP_ENA_VOTE));
-
- /*
- * TODO: The following sequence enables the LPASS audio core GDSC.
- * Remove when this becomes unnecessary.
- */
-
- /*
- * Disable HW trigger: collapse/restore occur based on registers writes.
- * Disable SW override: Use hardware state-machine for sequencing.
- */
- regval = readl_relaxed(LPASS_REG_BASE(AUDIO_CORE_GDSCR));
- regval &= ~(HW_CONTROL_MASK | SW_OVERRIDE_MASK);
-
- /* Configure wait time between states. */
- regval &= ~(EN_REST_WAIT_MASK | EN_FEW_WAIT_MASK | CLK_DIS_WAIT_MASK);
- regval |= EN_REST_WAIT_VAL | EN_FEW_WAIT_VAL | CLK_DIS_WAIT_VAL;
- writel_relaxed(regval, LPASS_REG_BASE(AUDIO_CORE_GDSCR));
-
- regval = readl_relaxed(LPASS_REG_BASE(AUDIO_CORE_GDSCR));
- regval &= ~BIT(0);
- writel_relaxed(regval, LPASS_REG_BASE(AUDIO_CORE_GDSCR));
-
- ret = readl_poll_timeout(LPASS_REG_BASE(AUDIO_CORE_GDSCR), status,
- status & PWR_ON_MASK, 50, GDSC_TIMEOUT_US);
- WARN(ret, "LPASS Audio Core GDSC did not power on.\n");
}
static void __init mdss_clock_setup(void)
@@ -6021,11 +5464,6 @@
*/
clk_prepare_enable(&cxo_a_clk_src.c);
- /* TODO: Temporarily enable a clock to allow access to LPASS core
- * registers.
- */
- clk_prepare_enable(&audio_core_ixfabric_clk.c);
-
/*
* TODO: Temporarily enable NOC configuration AHB clocks. Remove when
* the bus driver is ready.
@@ -6060,8 +5498,6 @@
clk_set_rate(&esc1_clk_src.c, esc1_clk_src.freq_tbl[0].freq_hz);
clk_set_rate(&hdmi_clk_src.c, hdmi_clk_src.freq_tbl[0].freq_hz);
clk_set_rate(&vsync_clk_src.c, vsync_clk_src.freq_tbl[0].freq_hz);
- clk_set_rate(&audio_core_slimbus_core_clk_src.c,
- audio_core_slimbus_core_clk_src.freq_tbl[0].freq_hz);
}
#define GCC_CC_PHYS 0xFC400000
diff --git a/arch/arm/mach-msm/clock-rpm.c b/arch/arm/mach-msm/clock-rpm.c
index c1cc27b..ee91a34 100644
--- a/arch/arm/mach-msm/clock-rpm.c
+++ b/arch/arm/mach-msm/clock-rpm.c
@@ -245,6 +245,14 @@
return rc;
}
+static int rpm_branch_clk_set_rate(struct clk *clk, unsigned long rate)
+{
+ if (rate == clk->rate)
+ return 0;
+
+ return -EPERM;
+}
+
static unsigned long rpm_clk_get_rate(struct clk *clk)
{
struct rpm_clk *r = to_rpm_clk(clk);
@@ -335,6 +343,7 @@
struct clk_ops clk_ops_rpm_branch = {
.prepare = rpm_clk_prepare,
.unprepare = rpm_clk_unprepare,
+ .set_rate = rpm_branch_clk_set_rate,
.is_local = rpm_clk_is_local,
.handoff = rpm_clk_handoff,
};
diff --git a/arch/arm/mach-msm/cpuidle.c b/arch/arm/mach-msm/cpuidle.c
index 77c91b8..e87c7b5 100644
--- a/arch/arm/mach-msm/cpuidle.c
+++ b/arch/arm/mach-msm/cpuidle.c
@@ -1,4 +1,4 @@
-/* Copyright (c) 2010-2012, Code Aurora Forum. All rights reserved.
+/* Copyright (c) 2010-2013, The Linux Foundation. All rights reserved.
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License version 2 and
@@ -72,18 +72,19 @@
struct cpuidle_device *dev, struct cpuidle_driver *drv, int index)
{
int ret = 0;
- int i = 0;
+ int i;
enum msm_pm_sleep_mode pm_mode;
- struct cpuidle_state_usage *st_usage = NULL;
cpu_pm_enter();
- pm_mode = msm_pm_idle_prepare(dev, drv, index);
- dev->last_residency = msm_pm_idle_enter(pm_mode);
+ pm_mode = msm_pm_idle_enter(dev, drv, index);
+
for (i = 0; i < dev->state_count; i++) {
- st_usage = &dev->states_usage[i];
- if ((enum msm_pm_sleep_mode) cpuidle_get_statedata(st_usage)
- == pm_mode) {
+ struct cpuidle_state_usage *st_usage = &dev->states_usage[i];
+ enum msm_pm_sleep_mode last_mode =
+ (enum msm_pm_sleep_mode)cpuidle_get_statedata(st_usage);
+
+ if (last_mode == pm_mode) {
ret = i;
break;
}
@@ -95,7 +96,7 @@
return ret;
}
-static void __init msm_cpuidle_set_states(void)
+static void __devinit msm_cpuidle_set_states(void)
{
int i = 0;
int state_count = 0;
@@ -151,7 +152,7 @@
dev->state_count = state_count; /* Per cpu state count */
}
-int __init msm_cpuidle_init(void)
+int __devinit msm_cpuidle_init(void)
{
unsigned int cpu = 0;
int ret = 0;
diff --git a/arch/arm/mach-msm/devices-8064.c b/arch/arm/mach-msm/devices-8064.c
index f87c540..10ee1e3 100644
--- a/arch/arm/mach-msm/devices-8064.c
+++ b/arch/arm/mach-msm/devices-8064.c
@@ -49,6 +49,7 @@
#include <mach/mpm.h>
#include <mach/iommu_domains.h>
#include <mach/msm_cache_dump.h>
+#include "pm.h"
/* Address of GSBI blocks */
#define MSM_GSBI1_PHYS 0x12440000
@@ -120,11 +121,24 @@
},
};
-struct platform_device msm8064_pc_cntr = {
- .name = "pc-cntr",
+static uint32_t msm_pm_cp15_regs[] = {0x4501, 0x5501, 0x6501, 0x7501, 0x0500};
+
+static struct msm_pm_init_data_type msm_pm_data = {
+ .retention_calls_tz = true,
+ .cp15_data.save_cp15 = true,
+ .cp15_data.qsb_pc_vdd = 0x98,
+ .cp15_data.reg_data = &msm_pm_cp15_regs[0],
+ .cp15_data.reg_saved_state_size = ARRAY_SIZE(msm_pm_cp15_regs),
+};
+
+struct platform_device msm8064_pm_8x60 = {
+ .name = "pm-8x60",
.id = -1,
.num_resources = ARRAY_SIZE(msm8064_resources_pccntr),
.resource = msm8064_resources_pccntr,
+ .dev = {
+ .platform_data = &msm_pm_data,
+ },
};
static struct msm_watchdog_pdata msm_watchdog_pdata = {
diff --git a/arch/arm/mach-msm/devices-8930.c b/arch/arm/mach-msm/devices-8930.c
index aad512e..6fe8ccb 100644
--- a/arch/arm/mach-msm/devices-8930.c
+++ b/arch/arm/mach-msm/devices-8930.c
@@ -1,4 +1,4 @@
-/* Copyright (c) 2012, The Linux Foundation. All rights reserved.
+/* Copyright (c) 2012-2013, The Linux Foundation. All rights reserved.
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License version 2 and
@@ -32,6 +32,7 @@
#include "rpm_rbcpr_stats.h"
#include "footswitch.h"
#include "acpuclock-krait.h"
+#include "pm.h"
#ifdef CONFIG_MSM_MPM
#include <mach/mpm.h>
@@ -48,11 +49,18 @@
},
};
-struct platform_device msm8930_pc_cntr = {
- .name = "pc-cntr",
+static struct msm_pm_init_data_type msm_pm_data = {
+ .retention_calls_tz = true,
+};
+
+struct platform_device msm8930_pm_8x60 = {
+ .name = "pm-8x60",
.id = -1,
.num_resources = ARRAY_SIZE(msm8930_resources_pccntr),
.resource = msm8930_resources_pccntr,
+ .dev = {
+ .platform_data = &msm_pm_data,
+ },
};
struct msm_rpm_platform_data msm8930_rpm_data __initdata = {
diff --git a/arch/arm/mach-msm/devices-8960.c b/arch/arm/mach-msm/devices-8960.c
index c3748fa..6a344be 100644
--- a/arch/arm/mach-msm/devices-8960.c
+++ b/arch/arm/mach-msm/devices-8960.c
@@ -53,6 +53,7 @@
#include <mach/msm_dcvs.h>
#include <mach/iommu_domains.h>
#include <mach/socinfo.h>
+#include "pm.h"
#ifdef CONFIG_MSM_MPM
#include <mach/mpm.h>
@@ -116,11 +117,18 @@
},
};
-struct platform_device msm8960_pc_cntr = {
- .name = "pc-cntr",
+static struct msm_pm_init_data_type msm_pm_data = {
+ .retention_calls_tz = true,
+};
+
+struct platform_device msm8960_pm_8x60 = {
+ .name = "pm-8x60",
.id = -1,
.num_resources = ARRAY_SIZE(msm8960_resources_pccntr),
.resource = msm8960_resources_pccntr,
+ .dev = {
+ .platform_data = &msm_pm_data,
+ },
};
static struct resource resources_otg[] = {
diff --git a/arch/arm/mach-msm/devices-msm8x60.c b/arch/arm/mach-msm/devices-msm8x60.c
index 58416c7..cfa9281 100644
--- a/arch/arm/mach-msm/devices-msm8x60.c
+++ b/arch/arm/mach-msm/devices-msm8x60.c
@@ -1,4 +1,4 @@
-/* Copyright (c) 2010-2012, The Linux Foundation. All rights reserved.
+/* Copyright (c) 2010-2013, The Linux Foundation. All rights reserved.
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License version 2 and
@@ -3181,3 +3181,9 @@
.platform_data = &msm8660_iommu_domain_pdata,
}
};
+
+struct platform_device msm8660_pm_8x60 = {
+ .name = "pm-8x60",
+ .id = -1,
+};
+
diff --git a/arch/arm/mach-msm/devices.h b/arch/arm/mach-msm/devices.h
index d3810a2..53eca3e 100644
--- a/arch/arm/mach-msm/devices.h
+++ b/arch/arm/mach-msm/devices.h
@@ -1,7 +1,7 @@
/* linux/arch/arm/mach-msm/devices.h
*
* Copyright (C) 2008 Google, Inc.
- * Copyright (c) 2009-2012, The Linux Foundation. All rights reserved.
+ * Copyright (c) 2009-2013, The Linux Foundation. All rights reserved.
*
* This software is licensed under the terms of the GNU General Public
* License version 2, as published by the Free Software Foundation, and
@@ -113,11 +113,11 @@
extern struct platform_device msm_device_sdc3;
extern struct platform_device msm_device_sdc4;
+extern struct platform_device msm8960_pm_8x60;
+extern struct platform_device msm8064_pm_8x60;
+extern struct platform_device msm8930_pm_8x60;
extern struct platform_device msm9615_pm_8x60;
-
-extern struct platform_device msm8960_pc_cntr;
-extern struct platform_device msm8064_pc_cntr;
-extern struct platform_device msm8930_pc_cntr;
+extern struct platform_device msm8660_pm_8x60;
extern struct platform_device msm_device_gadget_peripheral;
extern struct platform_device msm_device_hsusb_host;
diff --git a/arch/arm/mach-msm/include/mach/msm_mpmctr.h b/arch/arm/mach-msm/include/mach/msm_mpmctr.h
new file mode 100644
index 0000000..d3d853f
--- /dev/null
+++ b/arch/arm/mach-msm/include/mach/msm_mpmctr.h
@@ -0,0 +1,21 @@
+/*
+ * Copyright (c) 2013, The Linux Foundation. All rights reserved.
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License version 2 and
+ * only version 2 as published by the Free Software Foundation.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ */
+#ifndef __MSM_MPMCTR_H__
+#define __MSM_MPMCTR_H__
+
+/*
+ * returns the count value of the mpm timetick.
+ */
+uint32_t msm_mpm_get_count(void);
+
+#endif
diff --git a/arch/arm/mach-msm/include/mach/usb_gadget_xport.h b/arch/arm/mach-msm/include/mach/usb_gadget_xport.h
index 9cd4f3f..a183f0e 100644
--- a/arch/arm/mach-msm/include/mach/usb_gadget_xport.h
+++ b/arch/arm/mach-msm/include/mach/usb_gadget_xport.h
@@ -1,4 +1,4 @@
-/* Copyright (c) 2011-2012, The Linux Foundation. All rights reserved.
+/* Copyright (c) 2011-2013, The Linux Foundation. All rights reserved.
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License version 2 and
@@ -19,6 +19,7 @@
USB_GADGET_XPORT_TTY,
USB_GADGET_XPORT_SDIO,
USB_GADGET_XPORT_SMD,
+ USB_GADGET_XPORT_QTI,
USB_GADGET_XPORT_BAM,
USB_GADGET_XPORT_BAM2BAM,
USB_GADGET_XPORT_BAM2BAM_IPA,
@@ -38,6 +39,8 @@
return "SDIO";
case USB_GADGET_XPORT_SMD:
return "SMD";
+ case USB_GADGET_XPORT_QTI:
+ return "QTI";
case USB_GADGET_XPORT_BAM:
return "BAM";
case USB_GADGET_XPORT_BAM2BAM:
@@ -63,6 +66,8 @@
return USB_GADGET_XPORT_SDIO;
if (!strncasecmp("SMD", name, XPORT_STR_LEN))
return USB_GADGET_XPORT_SMD;
+ if (!strncasecmp("QTI", name, XPORT_STR_LEN))
+ return USB_GADGET_XPORT_QTI;
if (!strncasecmp("BAM", name, XPORT_STR_LEN))
return USB_GADGET_XPORT_BAM;
if (!strncasecmp("BAM2BAM", name, XPORT_STR_LEN))
diff --git a/arch/arm/mach-msm/krait-regulator.c b/arch/arm/mach-msm/krait-regulator.c
index 52aa43a..0c1e279 100644
--- a/arch/arm/mach-msm/krait-regulator.c
+++ b/arch/arm/mach-msm/krait-regulator.c
@@ -291,6 +291,11 @@
int krait_power_mdd_enable(int cpu_num, bool on)
{
+ /*
+ * Expected to be called when the cpu goes to retention mode as a part
+ * of idle power collapse. IT is guaranteed that cpu won't be put in
+ * retention while being hotplugged out
+ */
struct krait_power_vreg *kvreg = per_cpu(krait_vregs, cpu_num);
if (!on && kvreg->mode == LDO_MODE) {
@@ -298,7 +303,7 @@
return -EINVAL;
}
- if ((on && kvreg->mode == LDO_MODE) || (!on && kvreg->mode == HS_MODE))
+ if (on && kvreg->mode == LDO_MODE)
return 0;
__krait_power_mdd_enable(kvreg, on);
@@ -801,6 +806,8 @@
int rc;
mutex_lock(&pvreg->krait_power_vregs_lock);
+ if (kvreg->mode == LDO_MODE)
+ __krait_power_mdd_enable(kvreg, true);
kvreg->online = true;
rc = _get_optimum_mode(rdev, kvreg->uV, kvreg->uV, kvreg->load_uA);
if (rc < 0)
@@ -830,6 +837,8 @@
goto dis_err;
rc = _set_voltage(rdev, kvreg->uV, kvreg->uV);
+ if (kvreg->mode == LDO_MODE)
+ __krait_power_mdd_enable(kvreg, false);
dis_err:
mutex_unlock(&pvreg->krait_power_vregs_lock);
return rc;
diff --git a/arch/arm/mach-msm/lpm_levels.c b/arch/arm/mach-msm/lpm_levels.c
index dec62f0..539a4fe 100644
--- a/arch/arm/mach-msm/lpm_levels.c
+++ b/arch/arm/mach-msm/lpm_levels.c
@@ -66,18 +66,12 @@
atomic_notifier_call_chain(&__get_cpu_var(lpm_notify_head),
MSM_LPM_STATE_ENTER, &sleep_data);
- ret = msm_rpm_enter_sleep();
- if (ret) {
- pr_warn("%s(): RPM failed to enter sleep err:%d\n",
- __func__, ret);
- goto bail;
- }
if (from_idle)
debug_mask = msm_lpm_lvl_dbg_msk &
- MSM_LPM_LVL_DBG_IDLE_LIMITS;
+ MSM_LPM_LVL_DBG_IDLE_LIMITS;
else
debug_mask = msm_lpm_lvl_dbg_msk &
- MSM_LPM_LVL_DBG_SUSPEND_LIMITS;
+ MSM_LPM_LVL_DBG_SUSPEND_LIMITS;
if (debug_mask)
pr_info("%s(): pxo:%d l2:%d mem:0x%x(0x%x) dig:0x%x(0x%x)\n",
@@ -88,6 +82,19 @@
l->vdd_dig_upper_bound);
ret = msm_lpmrs_enter_sleep(sclk_count, l, from_idle, notify_rpm);
+ if (ret) {
+ pr_warn("%s() LPM resources failed to enter sleep\n",
+ __func__);
+ goto bail;
+ }
+ if (notify_rpm) {
+ ret = msm_rpm_enter_sleep(debug_mask);
+ if (ret) {
+ pr_warn("%s(): RPM failed to enter sleep err:%d\n",
+ __func__, ret);
+ goto bail;
+ }
+ }
bail:
return ret;
}
@@ -95,9 +102,11 @@
static void msm_lpm_exit_sleep(void *limits, bool from_idle,
bool notify_rpm, bool collapsed)
{
- msm_rpm_exit_sleep();
+
msm_lpmrs_exit_sleep((struct msm_rpmrs_limits *)limits,
from_idle, notify_rpm, collapsed);
+ if (notify_rpm)
+ msm_rpm_exit_sleep();
atomic_notifier_call_chain(&__get_cpu_var(lpm_notify_head),
MSM_LPM_STATE_EXIT, NULL);
}
diff --git a/arch/arm/mach-msm/lpm_resources.c b/arch/arm/mach-msm/lpm_resources.c
index 5d7fc94..a62ee92 100644
--- a/arch/arm/mach-msm/lpm_resources.c
+++ b/arch/arm/mach-msm/lpm_resources.c
@@ -1,4 +1,4 @@
-/* Copyright (c) 2012, The Linux Foundation. All rights reserved.
+/* Copyright (c) 2012-2013, The Linux Foundation. All rights reserved.
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License version 2 and
@@ -668,7 +668,8 @@
}
msm_lpm_get_rpm_notif = true;
- msm_mpm_enter_sleep(sclk_count, from_idle);
+ if (notify_rpm)
+ msm_mpm_enter_sleep(sclk_count, from_idle);
return ret;
}
diff --git a/arch/arm/mach-msm/msm_mpmctr.c b/arch/arm/mach-msm/msm_mpmctr.c
new file mode 100644
index 0000000..4ab82ab
--- /dev/null
+++ b/arch/arm/mach-msm/msm_mpmctr.c
@@ -0,0 +1,99 @@
+/* Copyright (c) 2013, The Linux Foundation. All rights reserved.
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License version 2 and
+ * only version 2 as published by the Free Software Foundation.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ */
+
+#include <linux/kernel.h>
+#include <linux/err.h>
+#include <linux/io.h>
+#include <linux/delay.h>
+#include <linux/module.h>
+#include <linux/platform_device.h>
+#include <linux/smp.h>
+#include <linux/clk.h>
+#include <linux/cpu.h>
+#include <linux/sched.h>
+#include <linux/of.h>
+#include <linux/of_address.h>
+#include <mach/msm_mpmctr.h>
+
+static void __iomem *mpm_timer_base;
+
+uint32_t msm_mpm_get_count(void)
+{
+ uint32_t count;
+ if (!mpm_timer_base)
+ return 0;
+
+ count = __raw_readl_no_log(mpm_timer_base);
+ pr_debug("mpm sclk sync:(%u)", count);
+ return count;
+}
+EXPORT_SYMBOL(msm_mpm_get_count);
+
+static inline void msm_mpmctr_show_count(void)
+{
+ unsigned long long t;
+ unsigned long nsec_rem;
+
+ t = sched_clock();
+
+ nsec_rem = do_div(t, 1000000000)/1000;
+
+ printk(KERN_INFO "mpm_counter: [%5lu.%06lu]:(%u)\n",
+ (unsigned long)t, nsec_rem,
+ msm_mpm_get_count());
+
+}
+
+static struct of_device_id msm_mpmctr_of_match[] = {
+ {.compatible = "qcom,mpm-counter"},
+ {}
+};
+
+static struct platform_driver msm_mpmctr_driver = {
+ .driver = {
+ .name = "msm_mpctr",
+ .owner = THIS_MODULE,
+ .of_match_table = msm_mpmctr_of_match,
+ },
+};
+
+static int __init mpmctr_set_register(struct device_node *np)
+{
+ if (of_get_address(np, 0, NULL, NULL)) {
+ mpm_timer_base = of_iomap(np, 0);
+ if (!mpm_timer_base) {
+ pr_err("%s: cannot map timer base\n", __func__);
+ return -ENOMEM;
+ }
+ }
+ return 0;
+}
+
+static int __init msm_mpmctr_probe(struct platform_device *pdev)
+{
+ if (!pdev->dev.of_node)
+ return -ENODEV;
+
+ if (mpmctr_set_register(pdev->dev.of_node))
+ return -ENODEV;
+
+ msm_mpmctr_show_count();
+
+ return 0;
+}
+
+static int __init mpmctr_init(void)
+{
+ return platform_driver_probe(&msm_mpmctr_driver, msm_mpmctr_probe);
+}
+
+module_init(mpmctr_init)
diff --git a/arch/arm/mach-msm/no-pm.c b/arch/arm/mach-msm/no-pm.c
index 0db6e68..a8d4fdb 100644
--- a/arch/arm/mach-msm/no-pm.c
+++ b/arch/arm/mach-msm/no-pm.c
@@ -37,15 +37,11 @@
void msm_pm_set_irq_extns(struct msm_pm_irq_calls *irq_calls) {}
-int msm_pm_idle_prepare(struct cpuidle_device *dev,
+enum msm_pm_sleep_mode msm_pm_idle_enter(struct cpuidle_device *dev,
struct cpuidle_driver *drv, int index)
{
return -ENOSYS;
}
-int msm_pm_idle_enter(enum msm_pm_sleep_mode sleep_mode)
-{
- return -ENOSYS;
-}
-
void msm_pm_enable_retention(bool enable) {}
+
diff --git a/arch/arm/mach-msm/perf_debug.c b/arch/arm/mach-msm/perf_debug.c
index 8c942ad..bbd0852 100644
--- a/arch/arm/mach-msm/perf_debug.c
+++ b/arch/arm/mach-msm/perf_debug.c
@@ -25,6 +25,7 @@
"0 msm: perf: add debug patch logging framework\n"
"1 Perf: Restore counter after powercollapse for generic ARM PMU's\n"
"2 Perf: Toggle PMU IRQ when CPU's are hotplugged\n"
+ "3 Perf: Correct irq for CPU hotplug detection\n"
;
static ssize_t desc_read(struct file *fp, char __user *buf,
diff --git a/arch/arm/mach-msm/pil-q6v5.c b/arch/arm/mach-msm/pil-q6v5.c
index 7f8d3b9..0263faf 100644
--- a/arch/arm/mach-msm/pil-q6v5.c
+++ b/arch/arm/mach-msm/pil-q6v5.c
@@ -167,7 +167,7 @@
/* Assert Q6 resets */
val = readl_relaxed(drv->reg_base + QDSP6SS_RESET);
- val = (Q6SS_CORE_ARES | Q6SS_BUS_ARES_ENA);
+ val |= (Q6SS_CORE_ARES | Q6SS_BUS_ARES_ENA);
writel_relaxed(val, drv->reg_base + QDSP6SS_RESET);
/* Kill power at block headswitch */
diff --git a/arch/arm/mach-msm/pm-8x60.c b/arch/arm/mach-msm/pm-8x60.c
index 0b08238..b52d284 100644
--- a/arch/arm/mach-msm/pm-8x60.c
+++ b/arch/arm/mach-msm/pm-8x60.c
@@ -11,6 +11,7 @@
*
*/
+#include <linux/debugfs.h>
#include <linux/module.h>
#include <linux/kernel.h>
#include <linux/init.h>
@@ -40,7 +41,6 @@
#ifdef CONFIG_VFP
#include <asm/vfp.h>
#endif
-
#include "acpuclock.h"
#include "clock.h"
#include "avs.h"
@@ -54,9 +54,27 @@
#include <mach/event_timer.h>
#define CREATE_TRACE_POINTS
#include "trace_msm_low_power.h"
-/******************************************************************************
- * Debug Definitions
- *****************************************************************************/
+
+#define SCM_L2_RETENTION (0x2)
+#define SCM_CMD_TERMINATE_PC (0x2)
+
+#define GET_CPU_OF_ATTR(attr) \
+ (container_of(attr, struct msm_pm_kobj_attribute, ka)->cpu)
+
+#define SCLK_HZ (32768)
+#define MSM_PM_SLEEP_TICK_LIMIT (0x6DDD000)
+
+#define NUM_OF_COUNTERS 3
+#define MAX_BUF_SIZE 512
+
+static int msm_pm_debug_mask = 1;
+module_param_named(
+ debug_mask, msm_pm_debug_mask, int, S_IRUGO | S_IWUSR | S_IWGRP
+);
+
+static int msm_pm_sleep_time_override;
+module_param_named(sleep_time_override,
+ msm_pm_sleep_time_override, int, S_IRUGO | S_IWUSR | S_IWGRP);
enum {
MSM_PM_DEBUG_SUSPEND = BIT(0),
@@ -70,24 +88,12 @@
MSM_PM_DEBUG_HOTPLUG = BIT(8),
};
-static int msm_pm_debug_mask = 1;
-module_param_named(
- debug_mask, msm_pm_debug_mask, int, S_IRUGO | S_IWUSR | S_IWGRP
-);
-static int msm_pm_retention_tz_call;
-
-/******************************************************************************
- * Sleep Modes and Parameters
- *****************************************************************************/
enum {
MSM_PM_MODE_ATTR_SUSPEND,
MSM_PM_MODE_ATTR_IDLE,
MSM_PM_MODE_ATTR_NR,
};
-#define SCM_L2_RETENTION (0x2)
-#define SCM_CMD_TERMINATE_PC (0x2)
-
static char *msm_pm_mode_attr_labels[MSM_PM_MODE_ATTR_NR] = {
[MSM_PM_MODE_ATTR_SUSPEND] = "suspend_enabled",
[MSM_PM_MODE_ATTR_IDLE] = "idle_enabled",
@@ -98,9 +104,6 @@
struct kobj_attribute ka;
};
-#define GET_CPU_OF_ATTR(attr) \
- (container_of(attr, struct msm_pm_kobj_attribute, ka)->cpu)
-
struct msm_pm_sysfs_sleep_mode {
struct kobject *kobj;
struct attribute_group attr_group;
@@ -116,10 +119,15 @@
"standalone_power_collapse",
};
-static struct msm_pm_init_data_type msm_pm_init_data;
static struct hrtimer pm_hrtimer;
static struct msm_pm_sleep_ops pm_sleep_ops;
static bool msm_pm_ldo_retention_enabled = true;
+static bool msm_pm_use_sync_timer;
+static struct msm_pm_cp15_save_data cp15_data;
+static bool msm_pm_retention_calls_tz;
+static uint32_t msm_pm_max_sleep_time;
+static bool msm_no_ramp_down_pc;
+
/*
* Write out the attribute.
*/
@@ -166,9 +174,6 @@
return ret;
}
-/*
- * Read in the new attribute value.
- */
static ssize_t msm_pm_mode_attr_store(struct kobject *kobj,
struct kobj_attribute *attr, const char *buf, size_t count)
{
@@ -205,10 +210,7 @@
return ret ? ret : count;
}
-/*
- * Add sysfs entries for one cpu.
- */
-static int __init msm_pm_mode_sysfs_add_cpu(
+static int __devinit msm_pm_mode_sysfs_add_cpu(
unsigned int cpu, struct kobject *modes_kobj)
{
char cpu_name[8];
@@ -291,10 +293,7 @@
return ret;
}
-/*
- * Add sysfs entries for the sleep modes.
- */
-static int __init msm_pm_mode_sysfs_add(void)
+int __devinit msm_pm_mode_sysfs_add(void)
{
struct kobject *module_kobj;
struct kobject *modes_kobj;
@@ -328,10 +327,6 @@
return ret;
}
-/******************************************************************************
- * Configure Hardware before/after Low Power Mode
- *****************************************************************************/
-
/*
* Configure hardware registers in preparation for Apps power down.
*/
@@ -374,22 +369,6 @@
return;
}
-
-/******************************************************************************
- * Suspend Max Sleep Time
- *****************************************************************************/
-
-#ifdef CONFIG_MSM_SLEEP_TIME_OVERRIDE
-static int msm_pm_sleep_time_override;
-module_param_named(sleep_time_override,
- msm_pm_sleep_time_override, int, S_IRUGO | S_IWUSR | S_IWGRP);
-#endif
-
-#define SCLK_HZ (32768)
-#define MSM_PM_SLEEP_TICK_LIMIT (0x6DDD000)
-
-static uint32_t msm_pm_max_sleep_time;
-
/*
* Convert time from nanoseconds to slow clock ticks, then cap it to the
* specified limit
@@ -408,36 +387,21 @@
if (max_sleep_time_ns == 0) {
msm_pm_max_sleep_time = 0;
} else {
- msm_pm_max_sleep_time = (uint32_t)msm_pm_convert_and_cap_time(
+ msm_pm_max_sleep_time =
+ (uint32_t)msm_pm_convert_and_cap_time(
max_sleep_time_ns, MSM_PM_SLEEP_TICK_LIMIT);
if (msm_pm_max_sleep_time == 0)
msm_pm_max_sleep_time = 1;
}
- if (msm_pm_debug_mask & MSM_PM_DEBUG_SUSPEND)
+ if (MSM_PM_DEBUG_SUSPEND & msm_pm_debug_mask)
pr_info("%s: Requested %lld ns Giving %u sclk ticks\n",
- __func__, max_sleep_time_ns, msm_pm_max_sleep_time);
+ __func__, max_sleep_time_ns,
+ msm_pm_max_sleep_time);
}
EXPORT_SYMBOL(msm_pm_set_max_sleep_time);
-struct reg_data {
- uint32_t reg;
- uint32_t val;
-};
-
-static struct reg_data reg_saved_state[] = {
- { .reg = 0x4501, },
- { .reg = 0x5501, },
- { .reg = 0x6501, },
- { .reg = 0x7501, },
- { .reg = 0x0500, },
-};
-
-static unsigned int active_vdd;
-static bool msm_pm_save_cp15;
-static const unsigned int pc_vdd = 0x98;
-
static void msm_pm_save_cpu_reg(void)
{
int i;
@@ -455,11 +419,12 @@
* rate. Then restore the active vdd before switching the acpuclk rate.
*/
if (msm_pm_get_l2_flush_flag() == 1) {
- active_vdd = msm_spm_get_vdd(0);
- for (i = 0; i < ARRAY_SIZE(reg_saved_state); i++)
- reg_saved_state[i].val =
- get_l2_indirect_reg(reg_saved_state[i].reg);
- msm_spm_set_vdd(0, pc_vdd);
+ cp15_data.active_vdd = msm_spm_get_vdd(0);
+ for (i = 0; i < cp15_data.reg_saved_state_size; i++)
+ cp15_data.reg_val[i] =
+ get_l2_indirect_reg(
+ cp15_data.reg_data[i]);
+ msm_spm_set_vdd(0, cp15_data.qsb_pc_vdd);
}
}
@@ -472,22 +437,20 @@
return;
if (msm_pm_get_l2_flush_flag() == 1) {
- for (i = 0; i < ARRAY_SIZE(reg_saved_state); i++)
- set_l2_indirect_reg(reg_saved_state[i].reg,
- reg_saved_state[i].val);
- msm_spm_set_vdd(0, active_vdd);
+ for (i = 0; i < cp15_data.reg_saved_state_size; i++)
+ set_l2_indirect_reg(
+ cp15_data.reg_data[i],
+ cp15_data.reg_val[i]);
+ msm_spm_set_vdd(0, cp15_data.active_vdd);
}
}
-static void *msm_pm_idle_rs_limits;
-
static void msm_pm_swfi(void)
{
msm_pm_config_hw_before_swfi();
msm_arch_idle();
}
-
static void msm_pm_retention(void)
{
int ret = 0;
@@ -496,7 +459,7 @@
ret = msm_spm_set_low_power_mode(MSM_SPM_MODE_POWER_RETENTION, false);
WARN_ON(ret);
- if (msm_pm_retention_tz_call)
+ if (msm_pm_retention_calls_tz)
scm_call_atomic1(SCM_SVC_BOOT, SCM_CMD_TERMINATE_PC,
SCM_L2_RETENTION);
else
@@ -567,7 +530,7 @@
static bool msm_pm_power_collapse(bool from_idle)
{
unsigned int cpu = smp_processor_id();
- unsigned long saved_acpuclk_rate;
+ unsigned long saved_acpuclk_rate = 0;
unsigned int avsdscr;
unsigned int avscsr;
bool collapsed;
@@ -584,28 +547,28 @@
avscsr = avs_get_avscsr();
avs_set_avscsr(0); /* Disable AVS */
- if (cpu_online(cpu))
+ if (cpu_online(cpu) && !msm_no_ramp_down_pc)
saved_acpuclk_rate = acpuclk_power_collapse();
- else
- saved_acpuclk_rate = 0;
if (MSM_PM_DEBUG_CLOCK & msm_pm_debug_mask)
pr_info("CPU%u: %s: change clock rate (old rate = %lu)\n",
cpu, __func__, saved_acpuclk_rate);
- if (msm_pm_save_cp15)
+ if (cp15_data.save_cp15)
msm_pm_save_cpu_reg();
collapsed = msm_pm_spm_power_collapse(cpu, from_idle, true);
- if (msm_pm_save_cp15)
+ if (cp15_data.save_cp15)
msm_pm_restore_cpu_reg();
if (cpu_online(cpu)) {
if (MSM_PM_DEBUG_CLOCK & msm_pm_debug_mask)
pr_info("CPU%u: %s: restore clock rate to %lu\n",
cpu, __func__, saved_acpuclk_rate);
- if (acpuclk_set_rate(cpu, saved_acpuclk_rate, SETRATE_PC) < 0)
+ if (!msm_no_ramp_down_pc &&
+ acpuclk_set_rate(cpu, saved_acpuclk_rate, SETRATE_PC)
+ < 0)
pr_err("CPU%u: %s: failed to restore clock rate(%lu)\n",
cpu, __func__, saved_acpuclk_rate);
} else {
@@ -635,15 +598,9 @@
return collapsed;
}
-static void msm_pm_target_init(void)
-{
- if (cpu_is_apq8064())
- msm_pm_save_cp15 = true;
-}
-
static int64_t msm_pm_timer_enter_idle(void)
{
- if (msm_pm_init_data.use_sync_timer)
+ if (msm_pm_use_sync_timer)
return ktime_to_ns(tick_nohz_get_sleep_length());
return msm_timer_enter_idle();
@@ -651,7 +608,7 @@
static void msm_pm_timer_exit_idle(bool timer_halted)
{
- if (msm_pm_init_data.use_sync_timer)
+ if (msm_pm_use_sync_timer)
return;
msm_timer_exit_idle((int) timer_halted);
@@ -661,7 +618,7 @@
{
int64_t time = 0;
- if (msm_pm_init_data.use_sync_timer)
+ if (msm_pm_use_sync_timer)
return ktime_to_ns(ktime_get());
time = msm_timer_get_sclk_time(period);
@@ -673,7 +630,7 @@
static int64_t msm_pm_timer_exit_suspend(int64_t time, int64_t period)
{
- if (msm_pm_init_data.use_sync_timer)
+ if (msm_pm_use_sync_timer)
return ktime_to_ns(ktime_get()) - time;
if (time != 0) {
@@ -765,8 +722,9 @@
}
}
-int msm_pm_idle_prepare(struct cpuidle_device *dev,
- struct cpuidle_driver *drv, int index)
+static int msm_pm_idle_prepare(struct cpuidle_device *dev,
+ struct cpuidle_driver *drv, int index,
+ void **msm_pm_idle_rs_limits)
{
int i;
unsigned int power_usage = -1;
@@ -793,9 +751,9 @@
struct cpuidle_state_usage *st_usage = &dev->states_usage[i];
enum msm_pm_sleep_mode mode;
bool allow;
- void *rs_limits = NULL;
uint32_t power;
int idx;
+ void *rs_limits = NULL;
mode = (enum msm_pm_sleep_mode) cpuidle_get_statedata(st_usage);
idx = MSM_PM_MODE(dev->cpu, mode);
@@ -805,11 +763,9 @@
switch (mode) {
case MSM_PM_SLEEP_MODE_POWER_COLLAPSE:
- if (num_online_cpus() > 1) {
+ if (num_online_cpus() > 1)
allow = false;
- break;
- }
- /* fall through */
+ break;
case MSM_PM_SLEEP_MODE_RETENTION:
/*
* The Krait BHS regulator doesn't have enough head
@@ -817,62 +773,41 @@
* has disabled retention
*/
if (!msm_pm_ldo_retention_enabled)
- break;
-
- if (!allow)
- break;
-
- if (msm_pm_retention_tz_call &&
- num_online_cpus() > 1) {
allow = false;
- break;
- }
- /* fall through */
- case MSM_PM_SLEEP_MODE_POWER_COLLAPSE_STANDALONE:
- if (!allow)
- break;
- /* fall through */
-
- case MSM_PM_SLEEP_MODE_WAIT_FOR_INTERRUPT:
- if (!allow)
- break;
- /* fall through */
-
- if (pm_sleep_ops.lowest_limits)
- rs_limits = pm_sleep_ops.lowest_limits(true,
- mode, &time_param, &power);
-
- if (MSM_PM_DEBUG_IDLE & msm_pm_debug_mask)
- pr_info("CPU%u: %s: %s, latency %uus, "
- "sleep %uus, limit %p\n",
- dev->cpu, __func__, state->desc,
- time_param.latency_us,
- time_param.sleep_us, rs_limits);
-
- if (!rs_limits)
+ if (msm_pm_retention_calls_tz && num_online_cpus() > 1)
allow = false;
break;
-
+ case MSM_PM_SLEEP_MODE_POWER_COLLAPSE_STANDALONE:
+ case MSM_PM_SLEEP_MODE_WAIT_FOR_INTERRUPT:
+ break;
default:
allow = false;
break;
}
+ if (!allow)
+ continue;
+
+ if (pm_sleep_ops.lowest_limits)
+ rs_limits = pm_sleep_ops.lowest_limits(true,
+ mode, &time_param, &power);
+
if (MSM_PM_DEBUG_IDLE & msm_pm_debug_mask)
- pr_info("CPU%u: %s: allow %s: %d\n",
- dev->cpu, __func__, state->desc, (int)allow);
+ pr_info("CPU%u:%s:%s, latency %uus, slp %uus, lim %p\n",
+ dev->cpu, __func__, state->desc,
+ time_param.latency_us,
+ time_param.sleep_us, rs_limits);
+ if (!rs_limits)
+ continue;
- if (allow) {
- if (power < power_usage) {
- power_usage = power;
- modified_time_us = time_param.modified_time_us;
- ret = mode;
- }
-
- if (MSM_PM_SLEEP_MODE_POWER_COLLAPSE == mode)
- msm_pm_idle_rs_limits = rs_limits;
+ if (power < power_usage) {
+ power_usage = power;
+ modified_time_us = time_param.modified_time_us;
+ ret = mode;
+ *msm_pm_idle_rs_limits = rs_limits;
}
+
}
if (modified_time_us && !dev->cpu)
@@ -885,11 +820,27 @@
return ret;
}
-int msm_pm_idle_enter(enum msm_pm_sleep_mode sleep_mode)
+enum msm_pm_sleep_mode msm_pm_idle_enter(struct cpuidle_device *dev,
+ struct cpuidle_driver *drv, int index)
{
int64_t time;
- int exit_stat;
bool collapsed = 1;
+ int exit_stat = -1;
+ enum msm_pm_sleep_mode sleep_mode;
+ void *msm_pm_idle_rs_limits = NULL;
+ int sleep_delay = 1;
+ int ret = -ENODEV;
+ int64_t timer_expiration = 0;
+ int notify_rpm = false;
+ bool timer_halted = false;
+
+ sleep_mode = msm_pm_idle_prepare(dev, drv, index,
+ &msm_pm_idle_rs_limits);
+
+ if (!msm_pm_idle_rs_limits) {
+ sleep_mode = MSM_PM_SLEEP_MODE_NOT_SELECTED;
+ goto cpuidle_enter_bail;
+ }
if (MSM_PM_DEBUG_IDLE & msm_pm_debug_mask)
pr_info("CPU%u: %s: mode %d\n",
@@ -897,6 +848,22 @@
time = ktime_to_ns(ktime_get());
+ if (sleep_mode == MSM_PM_SLEEP_MODE_POWER_COLLAPSE) {
+ notify_rpm = true;
+ timer_expiration = msm_pm_timer_enter_idle();
+
+ sleep_delay = (uint32_t) msm_pm_convert_and_cap_time(
+ timer_expiration, MSM_PM_SLEEP_TICK_LIMIT);
+ if (sleep_delay == 0) /* 0 would mean infinite time */
+ sleep_delay = 1;
+ }
+
+ if (pm_sleep_ops.enter_sleep)
+ ret = pm_sleep_ops.enter_sleep(sleep_delay,
+ msm_pm_idle_rs_limits, true, notify_rpm);
+ if (ret)
+ goto cpuidle_enter_bail;
+
switch (sleep_mode) {
case MSM_PM_SLEEP_MODE_WAIT_FOR_INTERRUPT:
msm_pm_swfi();
@@ -913,39 +880,16 @@
exit_stat = MSM_PM_STAT_IDLE_STANDALONE_POWER_COLLAPSE;
break;
- case MSM_PM_SLEEP_MODE_POWER_COLLAPSE: {
- int64_t timer_expiration = 0;
- bool timer_halted = false;
- uint32_t sleep_delay;
- int ret = -ENODEV;
- int notify_rpm =
- (sleep_mode == MSM_PM_SLEEP_MODE_POWER_COLLAPSE);
- timer_expiration = msm_pm_timer_enter_idle();
-
- sleep_delay = (uint32_t) msm_pm_convert_and_cap_time(
- timer_expiration, MSM_PM_SLEEP_TICK_LIMIT);
- if (sleep_delay == 0) /* 0 would mean infinite time */
- sleep_delay = 1;
-
+ case MSM_PM_SLEEP_MODE_POWER_COLLAPSE:
if (MSM_PM_DEBUG_IDLE_CLK & msm_pm_debug_mask)
clock_debug_print_enabled();
- if (pm_sleep_ops.enter_sleep)
- ret = pm_sleep_ops.enter_sleep(sleep_delay,
- msm_pm_idle_rs_limits,
- true, notify_rpm);
- if (!ret) {
- collapsed = msm_pm_power_collapse(true);
- timer_halted = true;
+ collapsed = msm_pm_power_collapse(true);
+ timer_halted = true;
- if (pm_sleep_ops.exit_sleep)
- pm_sleep_ops.exit_sleep(msm_pm_idle_rs_limits,
- true, notify_rpm, collapsed);
- }
- msm_pm_timer_exit_idle(timer_halted);
exit_stat = MSM_PM_STAT_IDLE_POWER_COLLAPSE;
+ msm_pm_timer_exit_idle(timer_halted);
break;
- }
case MSM_PM_SLEEP_MODE_NOT_SELECTED:
goto cpuidle_enter_bail;
@@ -957,16 +901,24 @@
break;
}
- time = ktime_to_ns(ktime_get()) - time;
- msm_pm_add_stat(exit_stat, time);
- msm_pm_ftrace_lpm_exit(smp_processor_id(), sleep_mode,
- collapsed);
+ if (pm_sleep_ops.exit_sleep)
+ pm_sleep_ops.exit_sleep(msm_pm_idle_rs_limits, true,
+ notify_rpm, collapsed);
+ time = ktime_to_ns(ktime_get()) - time;
+ msm_pm_ftrace_lpm_exit(smp_processor_id(), sleep_mode, collapsed);
+ if (exit_stat >= 0)
+ msm_pm_add_stat(exit_stat, time);
do_div(time, 1000);
- return (int) time;
+ dev->last_residency = (int) time;
+ return sleep_mode;
cpuidle_enter_bail:
- return 0;
+ dev->last_residency = 0;
+ if (sleep_mode == MSM_PM_SLEEP_MODE_POWER_COLLAPSE)
+ msm_pm_timer_exit_idle(timer_halted);
+ sleep_mode = MSM_PM_SLEEP_MODE_NOT_SELECTED;
+ return sleep_mode;
}
void msm_pm_cpu_enter_lowpower(unsigned int cpu)
@@ -1060,17 +1012,16 @@
clock_debug_print_enabled();
-#ifdef CONFIG_MSM_SLEEP_TIME_OVERRIDE
if (msm_pm_sleep_time_override > 0) {
int64_t ns = NSEC_PER_SEC *
(int64_t) msm_pm_sleep_time_override;
msm_pm_set_max_sleep_time(ns);
msm_pm_sleep_time_override = 0;
}
-#endif /* CONFIG_MSM_SLEEP_TIME_OVERRIDE */
+
if (pm_sleep_ops.lowest_limits)
rs_limits = pm_sleep_ops.lowest_limits(false,
- MSM_PM_SLEEP_MODE_POWER_COLLAPSE, &time_param, &power);
+ MSM_PM_SLEEP_MODE_POWER_COLLAPSE, &time_param, &power);
if (rs_limits) {
if (pm_sleep_ops.enter_sleep)
@@ -1104,7 +1055,6 @@
msm_pm_swfi();
}
-
enter_exit:
if (MSM_PM_DEBUG_SUSPEND & msm_pm_debug_mask)
pr_info("%s: return\n", __func__);
@@ -1112,66 +1062,18 @@
return 0;
}
-static struct platform_suspend_ops msm_pm_ops = {
- .enter = msm_pm_enter,
- .valid = suspend_valid_only_mem,
-};
-
-/******************************************************************************
- * Initialization routine
- *****************************************************************************/
void msm_pm_set_sleep_ops(struct msm_pm_sleep_ops *ops)
{
if (ops)
pm_sleep_ops = *ops;
}
-void __init msm_pm_set_tz_retention_flag(unsigned int flag)
-{
- msm_pm_retention_tz_call = flag;
-}
-
-static int __devinit msm_pc_debug_probe(struct platform_device *pdev)
-{
- struct resource *res = NULL;
- int i ;
-
- res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
- if (!res)
- goto fail;
-
- msm_pc_debug_counters_phys = res->start;
- WARN_ON(resource_size(res) < SZ_64);
- msm_pc_debug_counters = devm_ioremap_nocache(&pdev->dev, res->start,
- resource_size(res));
-
- if (!msm_pc_debug_counters)
- goto fail;
-
- for (i = 0; i < resource_size(res)/4; i++)
- __raw_writel(0, msm_pc_debug_counters + i * 4);
- return 0;
-fail:
- msm_pc_debug_counters = 0;
- msm_pc_debug_counters_phys = 0;
- return -EFAULT;
-}
-
-static struct of_device_id msm_pc_debug_table[] = {
- {.compatible = "qcom,pc-cntr"},
- {},
+static const struct platform_suspend_ops msm_pm_ops = {
+ .enter = msm_pm_enter,
+ .valid = suspend_valid_only_mem,
};
-static struct platform_driver msm_pc_counter_driver = {
- .probe = msm_pc_debug_probe,
- .driver = {
- .name = "pc-cntr",
- .owner = THIS_MODULE,
- .of_match_table = msm_pc_debug_table,
- },
-};
-
-static int __init msm_pm_init(void)
+static int __devinit msm_pm_init(void)
{
pgd_t *pc_pgd;
pmd_t *pmd;
@@ -1186,7 +1088,6 @@
unsigned long exit_phys;
/* Page table for cores to come back up safely. */
-
pc_pgd = pgd_alloc(&init_mm);
if (!pc_pgd)
return -ENOMEM;
@@ -1225,18 +1126,13 @@
msm_pm_mode_sysfs_add();
msm_pm_add_stats(enable_stats, ARRAY_SIZE(enable_stats));
-
suspend_set_ops(&msm_pm_ops);
- msm_pm_target_init();
hrtimer_init(&pm_hrtimer, CLOCK_MONOTONIC, HRTIMER_MODE_ABS);
msm_cpuidle_init();
- platform_driver_register(&msm_pc_counter_driver);
return 0;
}
-late_initcall(msm_pm_init);
-
static void __devinit msm_pm_set_flush_fn(uint32_t pc_mode)
{
msm_pm_disable_l2_fn = NULL;
@@ -1249,41 +1145,203 @@
}
}
+struct msm_pc_debug_counters_buffer {
+ void __iomem *reg;
+ u32 len;
+ char buf[MAX_BUF_SIZE];
+};
+
+static inline u32 msm_pc_debug_counters_read_register(
+ void __iomem *reg, int index , int offset)
+{
+ return readl_relaxed(reg + (index * 4 + offset) * 4);
+}
+
+static char *counter_name[] = {
+ "PC Entry Counter",
+ "Warmboot Entry Counter",
+ "PC Bailout Counter"
+};
+
+static int msm_pc_debug_counters_copy(
+ struct msm_pc_debug_counters_buffer *data)
+{
+ int j;
+ u32 stat;
+ unsigned int cpu;
+
+ for_each_possible_cpu(cpu) {
+ data->len += scnprintf(data->buf + data->len,
+ sizeof(data->buf)-data->len,
+ "CPU%d\n", cpu);
+
+ for (j = 0; j < NUM_OF_COUNTERS; j++) {
+ stat = msm_pc_debug_counters_read_register(
+ data->reg, cpu, j);
+ data->len += scnprintf(data->buf + data->len,
+ sizeof(data->buf)-data->len,
+ "\t%s : %d\n", counter_name[j],
+ stat);
+ }
+
+ }
+
+ return data->len;
+}
+
+static int msm_pc_debug_counters_file_read(struct file *file,
+ char __user *bufu, size_t count, loff_t *ppos)
+{
+ struct msm_pc_debug_counters_buffer *data;
+
+ data = file->private_data;
+
+ if (!data)
+ return -EINVAL;
+
+ if (!bufu || count < 0)
+ return -EINVAL;
+
+ if (!access_ok(VERIFY_WRITE, bufu, count))
+ return -EFAULT;
+
+ if (*ppos >= data->len && data->len == 0)
+ data->len = msm_pc_debug_counters_copy(data);
+
+ return simple_read_from_buffer(bufu, count, ppos,
+ data->buf, data->len);
+}
+
+static int msm_pc_debug_counters_file_open(struct inode *inode,
+ struct file *file)
+{
+ struct msm_pc_debug_counters_buffer *buf;
+ void __iomem *msm_pc_debug_counters_reg;
+
+ msm_pc_debug_counters_reg = inode->i_private;
+
+ if (!msm_pc_debug_counters_reg)
+ return -EINVAL;
+
+ file->private_data = kzalloc(
+ sizeof(struct msm_pc_debug_counters_buffer), GFP_KERNEL);
+
+ if (!file->private_data) {
+ pr_err("%s: ERROR kmalloc failed to allocate %d bytes\n",
+ __func__, sizeof(struct msm_pc_debug_counters_buffer));
+
+ return -ENOMEM;
+ }
+
+ buf = file->private_data;
+ buf->reg = msm_pc_debug_counters_reg;
+
+ return 0;
+}
+
+static int msm_pc_debug_counters_file_close(struct inode *inode,
+ struct file *file)
+{
+ kfree(file->private_data);
+ return 0;
+}
+
+static const struct file_operations msm_pc_debug_counters_fops = {
+ .open = msm_pc_debug_counters_file_open,
+ .read = msm_pc_debug_counters_file_read,
+ .release = msm_pc_debug_counters_file_close,
+ .llseek = no_llseek,
+};
+
static int __devinit msm_pm_8x60_probe(struct platform_device *pdev)
{
char *key = NULL;
+ struct dentry *dent = NULL;
uint32_t val = 0;
+ struct resource *res = NULL;
+ int i ;
+ struct msm_pm_init_data_type pdata_local;
int ret = 0;
+ memset(&pdata_local, 0, sizeof(struct msm_pm_init_data_type));
+
+ res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
+ if (res) {
+ msm_pc_debug_counters_phys = res->start;
+ WARN_ON(resource_size(res) < SZ_64);
+ msm_pc_debug_counters = devm_ioremap(&pdev->dev, res->start,
+ resource_size(res));
+ if (msm_pc_debug_counters)
+ for (i = 0; i < resource_size(res)/4; i++)
+ __raw_writel(0, msm_pc_debug_counters + i * 4);
+
+ }
+
+ if (!msm_pc_debug_counters) {
+ msm_pc_debug_counters = 0;
+ msm_pc_debug_counters_phys = 0;
+ } else {
+ dent = debugfs_create_file("pc_debug_counter", S_IRUGO, NULL,
+ msm_pc_debug_counters,
+ &msm_pc_debug_counters_fops);
+ if (!dent)
+ pr_err("%s: ERROR debugfs_create_file failed\n",
+ __func__);
+ }
+
if (!pdev->dev.of_node) {
struct msm_pm_init_data_type *d = pdev->dev.platform_data;
if (!d)
goto pm_8x60_probe_done;
- msm_pm_init_data.pc_mode = d->pc_mode;
- msm_pm_set_flush_fn(msm_pm_init_data.pc_mode);
- msm_pm_init_data.use_sync_timer = d->use_sync_timer;
+ memcpy(&pdata_local, d, sizeof(struct msm_pm_init_data_type));
+
} else {
key = "qcom,pc-mode";
ret = of_property_read_u32(pdev->dev.of_node, key, &val);
-
if (ret) {
pr_debug("%s: Cannot read %s,defaulting to 0",
__func__, key);
val = MSM_PM_PC_TZ_L2_INT;
ret = 0;
}
-
- msm_pm_init_data.pc_mode = val;
- msm_pm_set_flush_fn(msm_pm_init_data.pc_mode);
+ pdata_local.pc_mode = val;
key = "qcom,use-sync-timer";
- msm_pm_init_data.use_sync_timer =
+ pdata_local.use_sync_timer =
of_property_read_bool(pdev->dev.of_node, key);
+
+ key = "qcom,saw-turns-off-pll";
+ msm_no_ramp_down_pc = of_property_read_bool(pdev->dev.of_node,
+ key);
}
+ if (pdata_local.cp15_data.reg_data &&
+ pdata_local.cp15_data.reg_saved_state_size > 0) {
+ cp15_data.reg_data = kzalloc(sizeof(uint32_t) *
+ pdata_local.cp15_data.reg_saved_state_size,
+ GFP_KERNEL);
+ if (!cp15_data.reg_data)
+ return -ENOMEM;
+
+ cp15_data.reg_val = kzalloc(sizeof(uint32_t) *
+ pdata_local.cp15_data.reg_saved_state_size,
+ GFP_KERNEL);
+ if (cp15_data.reg_val)
+ return -ENOMEM;
+
+ memcpy(cp15_data.reg_data, pdata_local.cp15_data.reg_data,
+ pdata_local.cp15_data.reg_saved_state_size *
+ sizeof(uint32_t));
+ }
+
+ msm_pm_set_flush_fn(pdata_local.pc_mode);
+ msm_pm_use_sync_timer = pdata_local.use_sync_timer;
+ msm_pm_retention_calls_tz = pdata_local.retention_calls_tz;
+
pm_8x60_probe_done:
+ msm_pm_init();
return ret;
}
@@ -1305,4 +1363,4 @@
{
return platform_driver_register(&msm_pm_8x60_driver);
}
-module_init(msm_pm_8x60_init);
+device_initcall(msm_pm_8x60_init);
diff --git a/arch/arm/mach-msm/pm.h b/arch/arm/mach-msm/pm.h
index 399194a..af0744c 100644
--- a/arch/arm/mach-msm/pm.h
+++ b/arch/arm/mach-msm/pm.h
@@ -97,8 +97,19 @@
external L2 cache controller */
};
+struct msm_pm_cp15_save_data {
+ bool save_cp15;
+ uint32_t active_vdd;
+ uint32_t qsb_pc_vdd;
+ uint32_t reg_saved_state_size;
+ uint32_t *reg_data;
+ uint32_t *reg_val;
+};
+
struct msm_pm_init_data_type {
enum msm_pm_pc_mode_type pc_mode;
+ bool retention_calls_tz;
+ struct msm_pm_cp15_save_data cp15_data;
bool use_sync_timer;
};
@@ -108,10 +119,9 @@
};
void msm_pm_set_platform_data(struct msm_pm_platform_data *data, int count);
-int msm_pm_idle_prepare(struct cpuidle_device *dev,
+enum msm_pm_sleep_mode msm_pm_idle_enter(struct cpuidle_device *dev,
struct cpuidle_driver *drv, int index);
void msm_pm_set_irq_extns(struct msm_pm_irq_calls *irq_calls);
-int msm_pm_idle_enter(enum msm_pm_sleep_mode sleep_mode);
void msm_pm_cpu_enter_lowpower(unsigned int cpu);
void __init msm_pm_set_tz_retention_flag(unsigned int flag);
void msm_pm_enable_retention(bool enable);
diff --git a/arch/arm/mach-msm/qdsp6v2/audio_utils_aio.c b/arch/arm/mach-msm/qdsp6v2/audio_utils_aio.c
index 654f547..e6b9549 100644
--- a/arch/arm/mach-msm/qdsp6v2/audio_utils_aio.c
+++ b/arch/arm/mach-msm/qdsp6v2/audio_utils_aio.c
@@ -897,6 +897,11 @@
struct audio_client *ac;
struct audio_aio_write_param param;
+ if (!audio || !buf_node) {
+ pr_err("%s NULL pointer audio=[0x%p], buf_node=[0x%p]\n",
+ __func__, audio, buf_node);
+ return;
+ }
pr_debug("%s[%p]: Send write buff %p phy %lx len %d meta_enable = %d\n",
__func__, audio, buf_node, buf_node->paddr,
buf_node->buf.data_len,
@@ -922,8 +927,7 @@
if (!audio->buf_cfg.meta_info_enable)
param.flags = 0xFF00;
- if ((buf_node != NULL) &&
- (buf_node->meta_info.meta_in.nflags & AUDIO_DEC_EOF_SET))
+ if (buf_node->meta_info.meta_in.nflags & AUDIO_DEC_EOF_SET)
param.flags |= AUDIO_DEC_EOF_SET;
param.uid = param.paddr;
diff --git a/arch/arm/mach-msm/rpm-notifier.h b/arch/arm/mach-msm/rpm-notifier.h
index b9815a5..16de77e 100644
--- a/arch/arm/mach-msm/rpm-notifier.h
+++ b/arch/arm/mach-msm/rpm-notifier.h
@@ -1,4 +1,4 @@
-/* Copyright (c) 2012, The Linux Foundation. All rights reserved.
+/* Copyright (c) 2012-2013, The Linux Foundation. All rights reserved.
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License version 2 and
@@ -40,8 +40,12 @@
/**
* msm_rpm_enter_sleep - Notify RPM driver to prepare for entering sleep
+ *
+ * @bool - flag to enable print contents of sleep buffer.
+ *
+ * return 0 on success errno on failure.
*/
-int msm_rpm_enter_sleep(void);
+int msm_rpm_enter_sleep(bool print);
/**
* msm_rpm_exit_sleep - Notify RPM driver about resuming from power collapse
diff --git a/arch/arm/mach-msm/rpm-smd.c b/arch/arm/mach-msm/rpm-smd.c
index 4295fd4..b84ade9 100644
--- a/arch/arm/mach-msm/rpm-smd.c
+++ b/arch/arm/mach-msm/rpm-smd.c
@@ -32,6 +32,7 @@
#include <linux/platform_device.h>
#include <linux/of.h>
#include <linux/of_platform.h>
+#include <linux/rbtree.h>
#include <mach/socinfo.h>
#include <mach/msm_smd.h>
#include <mach/rpm-smd.h>
@@ -62,6 +63,9 @@
};
#define DEFAULT_BUFFER_SIZE 256
+#define DEBUG_PRINT_BUFFER_SIZE 512
+#define MAX_SLEEP_BUFFER 128
+
#define GFP_FLAG(noirq) (noirq ? GFP_ATOMIC : GFP_KERNEL)
#define INV_RSC "resource does not exist"
#define ERR "err\0"
@@ -106,6 +110,11 @@
uint32_t data_len;
};
+struct kvp {
+ unsigned int k;
+ unsigned int s;
+};
+
struct msm_rpm_kvp_data {
uint32_t key;
uint32_t nbytes; /* number of bytes */
@@ -113,6 +122,301 @@
bool valid;
};
+struct slp_buf {
+ struct rb_node node;
+ char ubuf[MAX_SLEEP_BUFFER];
+ char *buf;
+ bool valid;
+};
+static struct rb_root tr_root = RB_ROOT;
+
+static int msm_rpm_send_smd_buffer(char *buf, int size, bool noirq);
+static uint32_t msm_rpm_get_next_msg_id(void);
+
+static inline unsigned int get_rsc_type(char *buf)
+{
+ struct rpm_message_header *h;
+ h = (struct rpm_message_header *)
+ (buf + sizeof(struct rpm_request_header));
+ return h->resource_type;
+}
+
+static inline unsigned int get_rsc_id(char *buf)
+{
+ struct rpm_message_header *h;
+ h = (struct rpm_message_header *)
+ (buf + sizeof(struct rpm_request_header));
+ return h->resource_id;
+}
+
+#define get_data_len(buf) \
+ (((struct rpm_message_header *) \
+ (buf + sizeof(struct rpm_request_header)))->data_len)
+
+#define get_req_len(buf) \
+ (((struct rpm_request_header *)(buf))->request_len)
+
+#define get_msg_id(buf) \
+ (((struct rpm_message_header *) \
+ (buf + sizeof(struct rpm_request_header)))->msg_id)
+
+
+static inline int get_buf_len(char *buf)
+{
+ return get_req_len(buf) + sizeof(struct rpm_request_header);
+}
+
+static inline struct kvp *get_first_kvp(char *buf)
+{
+ return (struct kvp *)(buf + sizeof(struct rpm_request_header)
+ + sizeof(struct rpm_message_header));
+}
+
+static inline struct kvp *get_next_kvp(struct kvp *k)
+{
+ return (struct kvp *)((void *)k + sizeof(*k) + k->s);
+}
+
+static inline void *get_data(struct kvp *k)
+{
+ return (void *)k + sizeof(*k);
+}
+
+
+static void delete_kvp(char *msg, struct kvp *d)
+{
+ struct kvp *n;
+ int dec, size;
+
+ n = get_next_kvp(d);
+ dec = (void *)n - (void *)d;
+ size = get_data_len(msg) - ((void *)n - (void *)get_first_kvp(msg));
+
+ memcpy((void *)d, (void *)n, size);
+
+ get_data_len(msg) -= dec;
+ get_req_len(msg) -= dec;
+}
+
+static inline void update_kvp_data(struct kvp *dest, struct kvp *src)
+{
+ memcpy(get_data(dest), get_data(src), src->s);
+}
+
+static void add_kvp(char *buf, struct kvp *n)
+{
+ int inc = sizeof(*n) + n->s;
+ BUG_ON((get_req_len(buf) + inc) > MAX_SLEEP_BUFFER);
+
+ memcpy(buf + get_buf_len(buf), n, inc);
+
+ get_data_len(buf) += inc;
+ get_req_len(buf) += inc;
+}
+
+static struct slp_buf *tr_search(struct rb_root *root, char *slp)
+{
+ unsigned int type = get_rsc_type(slp);
+ unsigned int id = get_rsc_id(slp);
+
+ struct rb_node *node = root->rb_node;
+
+ while (node) {
+ struct slp_buf *cur = rb_entry(node, struct slp_buf, node);
+ unsigned int ctype = get_rsc_type(cur->buf);
+ unsigned int cid = get_rsc_id(cur->buf);
+
+ if (type < ctype)
+ node = node->rb_left;
+ else if (type > ctype)
+ node = node->rb_right;
+ else if (id < cid)
+ node = node->rb_left;
+ else if (id > cid)
+ node = node->rb_right;
+ else
+ return cur;
+ }
+ return NULL;
+}
+
+static int tr_insert(struct rb_root *root, struct slp_buf *slp)
+{
+ unsigned int type = get_rsc_type(slp->buf);
+ unsigned int id = get_rsc_id(slp->buf);
+
+ struct rb_node **node = &(root->rb_node), *parent = NULL;
+
+ while (*node) {
+ struct slp_buf *curr = rb_entry(*node, struct slp_buf, node);
+ unsigned int ctype = get_rsc_type(curr->buf);
+ unsigned int cid = get_rsc_id(curr->buf);
+
+ parent = *node;
+
+ if (type < ctype)
+ node = &((*node)->rb_left);
+ else if (type > ctype)
+ node = &((*node)->rb_right);
+ else if (id < cid)
+ node = &((*node)->rb_left);
+ else if (id > cid)
+ node = &((*node)->rb_right);
+ else
+ return -EINVAL;
+ }
+
+ rb_link_node(&slp->node, parent, node);
+ rb_insert_color(&slp->node, root);
+ slp->valid = true;
+ return 0;
+}
+
+#define for_each_kvp(buf, k) \
+ for (k = (struct kvp *)get_first_kvp(buf); \
+ ((void *)k - (void *)get_first_kvp(buf)) < get_data_len(buf);\
+ k = get_next_kvp(k))
+
+
+static void tr_update(struct slp_buf *s, char *buf)
+{
+ struct kvp *e, *n;
+
+ for_each_kvp(buf, n) {
+ for_each_kvp(s->buf, e) {
+ if (n->k == e->k) {
+ if (n->s == e->s) {
+ void *e_data = get_data(e);
+ void *n_data = get_data(n);
+ if (memcmp(e_data, n_data, n->s)) {
+ update_kvp_data(e, n);
+ s->valid = true;
+ }
+ } else {
+ delete_kvp(s->buf, e);
+ add_kvp(s->buf, n);
+ s->valid = true;
+ }
+ break;
+ }
+ }
+ }
+}
+
+int msm_rpm_smd_buffer_request(char *buf, int size, gfp_t flag)
+{
+ struct slp_buf *slp;
+ static DEFINE_SPINLOCK(slp_buffer_lock);
+ unsigned long flags;
+
+ if (size > MAX_SLEEP_BUFFER)
+ return -ENOMEM;
+
+ spin_lock_irqsave(&slp_buffer_lock, flags);
+ slp = tr_search(&tr_root, buf);
+
+ if (!slp) {
+ slp = kzalloc(sizeof(struct slp_buf), GFP_ATOMIC);
+ if (!slp) {
+ spin_unlock_irqrestore(&slp_buffer_lock, flags);
+ return -ENOMEM;
+ }
+ slp->buf = PTR_ALIGN(&slp->ubuf[0], sizeof(u32));
+ memcpy(slp->buf, buf, size);
+ if (tr_insert(&tr_root, slp))
+ pr_err("%s(): Error updating sleep request\n",
+ __func__);
+ } else {
+ /* handle unsent requests */
+ tr_update(slp, buf);
+ }
+
+ spin_unlock_irqrestore(&slp_buffer_lock, flags);
+
+ return 0;
+}
+static void msm_rpm_print_sleep_buffer(struct slp_buf *s)
+{
+ char buf[DEBUG_PRINT_BUFFER_SIZE] = {0};
+ int pos;
+ int buflen = DEBUG_PRINT_BUFFER_SIZE;
+ char ch[5] = {0};
+ u32 type;
+ struct kvp *e;
+
+ if (!s)
+ return;
+
+ if (!s->valid)
+ return;
+
+ type = get_rsc_type(s->buf);
+ memcpy(ch, &type, sizeof(u32));
+
+ pos = scnprintf(buf, buflen,
+ "Sleep request type = 0x%08x(%s)",
+ get_rsc_type(s->buf), ch);
+ pos += scnprintf(buf + pos, buflen - pos, " id = 0%x",
+ get_rsc_id(s->buf));
+ for_each_kvp(s->buf, e) {
+ int i;
+ char *data = get_data(e);
+
+ memcpy(ch, &e->k, sizeof(u32));
+
+ pos += scnprintf(buf + pos, buflen - pos,
+ "\n\t\tkey = 0x%08x(%s)",
+ e->k, ch);
+ pos += scnprintf(buf + pos, buflen - pos,
+ " sz= %d data =", e->s);
+
+ for (i = 0; i < e->s; i++)
+ pos += scnprintf(buf + pos, buflen - pos,
+ " 0x%02X", data[i]);
+ }
+ pos += scnprintf(buf + pos, buflen - pos, "\n");
+ printk(buf);
+}
+
+static int msm_rpm_flush_requests(bool print)
+{
+ struct rb_node *t;
+ int ret;
+
+ for (t = rb_first(&tr_root); t; t = rb_next(t)) {
+
+ struct slp_buf *s = rb_entry(t, struct slp_buf, node);
+
+ if (!s->valid)
+ continue;
+
+ if (print)
+ msm_rpm_print_sleep_buffer(s);
+
+ get_msg_id(s->buf) = msm_rpm_get_next_msg_id();
+ ret = msm_rpm_send_smd_buffer(s->buf,
+ get_buf_len(s->buf), true);
+ /* By not adding the message to a wait list we can reduce
+ * latency involved in waiting for a ACK from RPM. The ACK
+ * messages will be processed when we wakeup from sleep but
+ * processing should be minimal
+ * msm_rpm_wait_for_ack_noirq(get_msg_id(s->buf));
+ */
+
+ WARN_ON(ret != get_buf_len(s->buf));
+
+ trace_rpm_send_message(true, MSM_RPM_CTX_SLEEP_SET,
+ get_rsc_type(s->buf),
+ get_rsc_id(s->buf),
+ get_msg_id(s->buf));
+
+ s->valid = false;
+ }
+ return 0;
+
+}
+
+
static atomic_t msm_rpm_msg_id = ATOMIC_INIT(0);
static struct msm_rpm_driver_data msm_rpm_data;
@@ -450,7 +754,12 @@
}
elem = NULL;
}
- WARN_ON(!elem);
+ /* Special case where the sleep driver doesn't
+ * wait for ACKs. This would decrease the latency involved with
+ * entering RPM assisted power collapse.
+ */
+ if (!elem)
+ trace_rpm_ack_recd(0, msg_id);
spin_unlock_irqrestore(&msm_rpm_list_lock, flags);
}
@@ -544,8 +853,6 @@
}
}
-#define DEBUG_PRINT_BUFFER_SIZE 512
-
static void msm_rpm_log_request(struct msm_rpm_request *cdata)
{
char buf[DEBUG_PRINT_BUFFER_SIZE];
@@ -677,13 +984,42 @@
pos += scnprintf(buf + pos, buflen - pos, "\n");
printk(buf);
}
+static int msm_rpm_send_smd_buffer(char *buf, int size, bool noirq)
+{
+ unsigned long flags;
+ int ret;
+ spin_lock_irqsave(&msm_rpm_data.smd_lock_write, flags);
+ ret = smd_write_avail(msm_rpm_data.ch_info);
+
+ while ((ret = smd_write_avail(msm_rpm_data.ch_info)) < size) {
+ if (ret < 0)
+ break;
+ if (!noirq) {
+ spin_unlock_irqrestore(&msm_rpm_data.smd_lock_write,
+ flags);
+ cpu_relax();
+ spin_lock_irqsave(&msm_rpm_data.smd_lock_write, flags);
+ } else
+ udelay(5);
+ }
+
+ if (ret < 0) {
+ pr_err("%s(): SMD not initialized\n", __func__);
+ spin_unlock_irqrestore(&msm_rpm_data.smd_lock_write, flags);
+ return ret;
+ }
+
+ ret = smd_write(msm_rpm_data.ch_info, buf, size);
+ spin_unlock_irqrestore(&msm_rpm_data.smd_lock_write, flags);
+ return ret;
+
+}
static int msm_rpm_send_data(struct msm_rpm_request *cdata,
int msg_type, bool noirq)
{
uint8_t *tmpbuff;
int i, ret, msg_size;
- unsigned long flags;
int req_hdr_sz, msg_hdr_sz;
@@ -695,8 +1031,6 @@
cdata->req_hdr.service_type = msm_rpm_request_service[msg_type];
- cdata->msg_hdr.msg_id = msm_rpm_get_next_msg_id();
-
cdata->req_hdr.request_len = cdata->msg_hdr.data_len + msg_hdr_sz;
msg_size = cdata->req_hdr.request_len + req_hdr_sz;
@@ -714,8 +1048,6 @@
tmpbuff = cdata->buf;
- memcpy(tmpbuff, &cdata->req_hdr, req_hdr_sz + msg_hdr_sz);
-
tmpbuff += req_hdr_sz + msg_hdr_sz;
for (i = 0; (i < cdata->write_idx); i++) {
@@ -740,6 +1072,17 @@
}
+ memcpy(cdata->buf, &cdata->req_hdr, req_hdr_sz + msg_hdr_sz);
+
+ if ((cdata->msg_hdr.set == MSM_RPM_CTX_SLEEP_SET) &&
+ !msm_rpm_smd_buffer_request(cdata->buf, msg_size,
+ GFP_FLAG(noirq)))
+ return 1;
+
+ cdata->msg_hdr.msg_id = msm_rpm_get_next_msg_id();
+
+ memcpy(cdata->buf + req_hdr_sz, &cdata->msg_hdr, msg_hdr_sz);
+
if (msm_rpm_debug_mask
& (MSM_RPM_LOG_REQUEST_PRETTY | MSM_RPM_LOG_REQUEST_RAW))
msm_rpm_log_request(cdata);
@@ -755,29 +1098,7 @@
msm_rpm_add_wait_list(cdata->msg_hdr.msg_id);
- spin_lock_irqsave(&msm_rpm_data.smd_lock_write, flags);
-
- ret = smd_write_avail(msm_rpm_data.ch_info);
-
- if (ret < 0) {
- pr_err("%s(): SMD not initialized\n", __func__);
- spin_unlock_irqrestore(&msm_rpm_data.smd_lock_write, flags);
- return 0;
- }
-
- while ((ret < msg_size)) {
- if (!noirq) {
- spin_unlock_irqrestore(&msm_rpm_data.smd_lock_write,
- flags);
- cpu_relax();
- spin_lock_irqsave(&msm_rpm_data.smd_lock_write, flags);
- } else
- udelay(5);
- ret = smd_write_avail(msm_rpm_data.ch_info);
- }
-
- ret = smd_write(msm_rpm_data.ch_info, &cdata->buf[0], msg_size);
- spin_unlock_irqrestore(&msm_rpm_data.smd_lock_write, flags);
+ ret = msm_rpm_send_smd_buffer(&cdata->buf[0], msg_size, noirq);
if (ret == msg_size) {
trace_rpm_send_message(noirq, cdata->msg_hdr.set,
@@ -958,11 +1279,13 @@
* During power collapse, the rpm driver disables the SMD interrupts to make
* sure that the interrupt doesn't wakes us from sleep.
*/
-int msm_rpm_enter_sleep(void)
+int msm_rpm_enter_sleep(bool print)
{
if (standalone)
return 0;
+ msm_rpm_flush_requests(print);
+
return smd_mask_receive_interrupt(msm_rpm_data.ch_info, true);
}
EXPORT_SYMBOL(msm_rpm_enter_sleep);
diff --git a/arch/arm/mach-msm/socinfo.c b/arch/arm/mach-msm/socinfo.c
index 19e48759..56623c9 100644
--- a/arch/arm/mach-msm/socinfo.c
+++ b/arch/arm/mach-msm/socinfo.c
@@ -134,6 +134,16 @@
uint32_t pmic_die_revision;
};
+struct socinfo_v8 {
+ struct socinfo_v7 v7;
+
+ /* only valid when format==8*/
+ uint32_t pmic_model_1;
+ uint32_t pmic_die_revision_1;
+ uint32_t pmic_model_2;
+ uint32_t pmic_die_revision_2;
+};
+
static union {
struct socinfo_v1 v1;
struct socinfo_v2 v2;
@@ -142,6 +152,7 @@
struct socinfo_v5 v5;
struct socinfo_v6 v6;
struct socinfo_v7 v7;
+ struct socinfo_v8 v8;
} *socinfo;
static enum msm_cpu cpu_of_id[] = {
@@ -865,6 +876,7 @@
device_create_file(msm_soc_device, &msm_soc_attr_vendor);
switch (legacy_format) {
+ case 8:
case 7:
device_create_file(msm_soc_device,
&msm_soc_attr_pmic_model);
@@ -1054,6 +1066,7 @@
socinfo->v5.accessory_chip,
socinfo->v6.hw_platform_subtype);
break;
+ case 8:
case 7:
pr_info("%s: v%u, id=%u, ver=%u.%u, raw_id=%u, raw_ver=%u, hw_plat=%u, hw_plat_ver=%u\n accessory_chip=%u, hw_plat_subtype=%u, pmic_model=%u, pmic_die_revision=%u\n",
__func__,
@@ -1076,7 +1089,11 @@
int __init socinfo_init(void)
{
- socinfo = smem_alloc(SMEM_HW_SW_BUILD_ID, sizeof(struct socinfo_v7));
+ socinfo = smem_alloc(SMEM_HW_SW_BUILD_ID, sizeof(struct socinfo_v8));
+
+ if (!socinfo)
+ socinfo = smem_alloc(SMEM_HW_SW_BUILD_ID,
+ sizeof(struct socinfo_v7));
if (!socinfo)
socinfo = smem_alloc(SMEM_HW_SW_BUILD_ID,
diff --git a/drivers/base/sync.c b/drivers/base/sync.c
index 809d02b..a97a503 100644
--- a/drivers/base/sync.c
+++ b/drivers/base/sync.c
@@ -324,7 +324,6 @@
new_pt->fence = dst;
list_add(&new_pt->pt_list, &dst->pt_list_head);
- sync_pt_activate(new_pt);
}
return 0;
@@ -356,7 +355,6 @@
new_pt->fence = dst;
list_replace(&dst_pt->pt_list,
&new_pt->pt_list);
- sync_pt_activate(new_pt);
sync_pt_free(dst_pt);
}
collapsed = true;
@@ -372,7 +370,6 @@
new_pt->fence = dst;
list_add(&new_pt->pt_list, &dst->pt_list_head);
- sync_pt_activate(new_pt);
}
}
@@ -453,6 +450,7 @@
struct sync_fence *a, struct sync_fence *b)
{
struct sync_fence *fence;
+ struct list_head *pos;
int err;
fence = sync_fence_alloc(name);
@@ -467,6 +465,12 @@
if (err < 0)
goto err;
+ list_for_each(pos, &fence->pt_list_head) {
+ struct sync_pt *pt =
+ container_of(pos, struct sync_pt, pt_list);
+ sync_pt_activate(pt);
+ }
+
/*
* signal the fence in case one of it's pts were activated before
* they were activated
diff --git a/drivers/char/adsprpc.c b/drivers/char/adsprpc.c
index 822da91..73fe5d6 100644
--- a/drivers/char/adsprpc.c
+++ b/drivers/char/adsprpc.c
@@ -1,5 +1,5 @@
/*
- * Copyright (c) 2012, The Linux Foundation. All rights reserved.
+ * Copyright (c) 2012-2013, The Linux Foundation. All rights reserved.
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License version 2 and
@@ -11,8 +11,106 @@
* GNU General Public License for more details.
*
*/
+#include "adsprpc_shared.h"
+
+#include <linux/slab.h>
+#include <linux/completion.h>
+#include <linux/pagemap.h>
+#include <linux/mm.h>
+#include <linux/fs.h>
+#include <linux/sched.h>
+#include <linux/module.h>
+#include <linux/cdev.h>
+#include <linux/list.h>
+#include <linux/hash.h>
+#include <linux/msm_ion.h>
+#include <mach/msm_smd.h>
+#include <mach/ion.h>
#include <linux/scatterlist.h>
-#include "adsprpc.h"
+#include <linux/fs.h>
+#include <linux/uaccess.h>
+#include <linux/device.h>
+
+#ifndef ION_ADSPRPC_HEAP_ID
+#define ION_ADSPRPC_HEAP_ID ION_AUDIO_HEAP_ID
+#endif /*ION_ADSPRPC_HEAP_ID*/
+
+#define RPC_TIMEOUT (5 * HZ)
+#define RPC_HASH_BITS 5
+#define RPC_HASH_SZ (1 << RPC_HASH_BITS)
+#define BALIGN 32
+
+#define LOCK_MMAP(kernel)\
+ do {\
+ if (!kernel)\
+ down_read(¤t->mm->mmap_sem);\
+ } while (0)
+
+#define UNLOCK_MMAP(kernel)\
+ do {\
+ if (!kernel)\
+ up_read(¤t->mm->mmap_sem);\
+ } while (0)
+
+
+static inline uint32_t buf_page_start(void *buf)
+{
+ uint32_t start = (uint32_t) buf & PAGE_MASK;
+ return start;
+}
+
+static inline uint32_t buf_page_offset(void *buf)
+{
+ uint32_t offset = (uint32_t) buf & (PAGE_SIZE - 1);
+ return offset;
+}
+
+static inline int buf_num_pages(void *buf, int len)
+{
+ uint32_t start = buf_page_start(buf) >> PAGE_SHIFT;
+ uint32_t end = (((uint32_t) buf + len - 1) & PAGE_MASK) >> PAGE_SHIFT;
+ int nPages = end - start + 1;
+ return nPages;
+}
+
+static inline uint32_t buf_page_size(uint32_t size)
+{
+ uint32_t sz = (size + (PAGE_SIZE - 1)) & PAGE_MASK;
+ return sz > PAGE_SIZE ? sz : PAGE_SIZE;
+}
+
+static inline int buf_get_pages(void *addr, int sz, int nr_pages, int access,
+ struct smq_phy_page *pages, int nr_elems)
+{
+ struct vm_area_struct *vma;
+ uint32_t start = buf_page_start(addr);
+ uint32_t len = nr_pages << PAGE_SHIFT;
+ unsigned long pfn;
+ int n = -1, err = 0;
+
+ VERIFY(err, 0 != access_ok(access ? VERIFY_WRITE : VERIFY_READ,
+ (void __user *)start, len));
+ if (err)
+ goto bail;
+ VERIFY(err, 0 != (vma = find_vma(current->mm, start)));
+ if (err)
+ goto bail;
+ VERIFY(err, ((uint32_t)addr + sz) <= vma->vm_end);
+ if (err)
+ goto bail;
+ n = 0;
+ VERIFY(err, 0 == follow_pfn(vma, start, &pfn));
+ if (err)
+ goto bail;
+ VERIFY(err, nr_elems > 0);
+ if (err)
+ goto bail;
+ pages->addr = __pfn_to_phys(pfn);
+ pages->size = len;
+ n++;
+ bail:
+ return n;
+}
struct smq_invoke_ctx {
struct completion work;
@@ -32,6 +130,8 @@
struct completion work;
struct ion_client *iclient;
struct cdev cdev;
+ struct class *class;
+ struct device *dev;
dev_t dev_no;
spinlock_t wrlock;
spinlock_t hlock;
@@ -249,7 +349,6 @@
args = (void *)((char *)pbuf->virt + used);
rlen = pbuf->size - used;
for (i = 0; i < inbufs + outbufs; ++i) {
- int num;
rpra[i].buf.len = pra[i].buf.len;
if (!rpra[i].buf.len)
@@ -276,18 +375,12 @@
args = pbuf->virt;
rlen = pbuf->size;
}
- num = buf_num_pages(args, pra[i].buf.len);
- if (pbuf == ibuf) {
- list[i].num = num;
- list[i].pgidx = 0;
- } else {
- list[i].num = 1;
- pages[list[i].pgidx].addr =
- buf_page_start((void *)(pbuf->phys +
- (pbuf->size - rlen)));
- pages[list[i].pgidx].size =
- buf_page_size(pra[i].buf.len);
- }
+ list[i].num = 1;
+ pages[list[i].pgidx].addr =
+ buf_page_start((void *)(pbuf->phys +
+ (pbuf->size - rlen)));
+ pages[list[i].pgidx].size =
+ buf_page_size(pra[i].buf.len);
if (i < inbufs) {
if (!kernel) {
VERIFY(err, 0 == copy_from_user(args,
@@ -485,9 +578,9 @@
static void free_dev(struct fastrpc_device *dev)
{
if (dev) {
- module_put(THIS_MODULE);
free_mem(&dev->buf);
kfree(dev);
+ module_put(THIS_MODULE);
}
}
@@ -609,8 +702,10 @@
wait_for_completion(&ctx->work);
}
context_free(ctx);
+
for (i = 0, b = abufs; i < nbufs; ++i, ++b)
free_mem(b);
+
kfree(abufs);
if (dev) {
add_dev(me, dev);
@@ -768,11 +863,24 @@
VERIFY(err, 0 == cdev_add(&me->cdev, MKDEV(MAJOR(me->dev_no), 0), 1));
if (err)
goto bail;
- pr_info("'mknod /dev/%s c %d 0'\n", DEVICE_NAME, MAJOR(me->dev_no));
+ me->class = class_create(THIS_MODULE, "chardrv");
+ VERIFY(err, !IS_ERR(me->class));
+ if (err)
+ goto bail;
+ me->dev = device_create(me->class, NULL, MKDEV(MAJOR(me->dev_no), 0),
+ NULL, DEVICE_NAME);
+ VERIFY(err, !IS_ERR(me->dev));
+ if (err)
+ goto bail;
+ pr_info("'created /dev/%s c %d 0'\n", DEVICE_NAME, MAJOR(me->dev_no));
bail:
if (err) {
if (me->dev_no)
unregister_chrdev_region(me->dev_no, 1);
+ if (me->class)
+ class_destroy(me->class);
+ if (me->cdev.owner)
+ cdev_del(&me->cdev);
fastrpc_deinit();
}
return err;
@@ -783,6 +891,8 @@
struct fastrpc_apps *me = &gfa;
fastrpc_deinit();
+ device_destroy(me->class, MKDEV(MAJOR(me->dev_no), 0));
+ class_destroy(me->class);
cdev_del(&me->cdev);
unregister_chrdev_region(me->dev_no, 1);
}
diff --git a/drivers/char/adsprpc.h b/drivers/char/adsprpc.h
deleted file mode 100644
index 3f1b4a7..0000000
--- a/drivers/char/adsprpc.h
+++ /dev/null
@@ -1,113 +0,0 @@
-/*
- * Copyright (c) 2012, The Linux Foundation. All rights reserved.
- *
- * This program is free software; you can redistribute it and/or modify
- * it under the terms of the GNU General Public License version 2 and
- * only version 2 as published by the Free Software Foundation.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
- * GNU General Public License for more details.
- *
- */
-#ifndef ADSPRPC_H
-#define ADSPRPC_H
-
-#include <linux/slab.h>
-#include <linux/completion.h>
-#include <linux/pagemap.h>
-#include <linux/mm.h>
-#include <linux/fs.h>
-#include <linux/sched.h>
-#include <linux/module.h>
-#include <linux/cdev.h>
-#include <linux/list.h>
-#include <linux/hash.h>
-#include <linux/msm_ion.h>
-#include <mach/msm_smd.h>
-#include <mach/ion.h>
-#include "adsprpc_shared.h"
-
-#ifndef ION_ADSPRPC_HEAP_ID
-#define ION_ADSPRPC_HEAP_ID ION_AUDIO_HEAP_ID
-#endif
-
-#define RPC_TIMEOUT (5 * HZ)
-#define RPC_HASH_BITS 5
-#define RPC_HASH_SZ (1 << RPC_HASH_BITS)
-#define BALIGN 32
-
-#define LOCK_MMAP(kernel)\
- do {\
- if (!kernel)\
- down_read(¤t->mm->mmap_sem);\
- } while (0)
-
-#define UNLOCK_MMAP(kernel)\
- do {\
- if (!kernel)\
- up_read(¤t->mm->mmap_sem);\
- } while (0)
-
-
-static inline uint32_t buf_page_start(void *buf)
-{
- uint32_t start = (uint32_t) buf & PAGE_MASK;
- return start;
-}
-
-static inline uint32_t buf_page_offset(void *buf)
-{
- uint32_t offset = (uint32_t) buf & (PAGE_SIZE - 1);
- return offset;
-}
-
-static inline int buf_num_pages(void *buf, int len)
-{
- uint32_t start = buf_page_start(buf) >> PAGE_SHIFT;
- uint32_t end = (((uint32_t) buf + len - 1) & PAGE_MASK) >> PAGE_SHIFT;
- int nPages = end - start + 1;
- return nPages;
-}
-
-static inline uint32_t buf_page_size(uint32_t size)
-{
- uint32_t sz = (size + (PAGE_SIZE - 1)) & PAGE_MASK;
- return sz > PAGE_SIZE ? sz : PAGE_SIZE;
-}
-
-static inline int buf_get_pages(void *addr, int sz, int nr_pages, int access,
- struct smq_phy_page *pages, int nr_elems)
-{
- struct vm_area_struct *vma;
- uint32_t start = buf_page_start(addr);
- uint32_t len = nr_pages << PAGE_SHIFT;
- unsigned long pfn;
- int n = -1, err = 0;
-
- VERIFY(err, 0 != access_ok(access ? VERIFY_WRITE : VERIFY_READ,
- (void __user *)start, len));
- if (err)
- goto bail;
- VERIFY(err, 0 != (vma = find_vma(current->mm, start)));
- if (err)
- goto bail;
- VERIFY(err, ((uint32_t)addr + sz) <= vma->vm_end);
- if (err)
- goto bail;
- n = 0;
- VERIFY(err, 0 == follow_pfn(vma, start, &pfn));
- if (err)
- goto bail;
- VERIFY(err, nr_elems > 0);
- if (err)
- goto bail;
- pages->addr = __pfn_to_phys(pfn);
- pages->size = len;
- n++;
- bail:
- return n;
-}
-
-#endif
diff --git a/drivers/char/adsprpc_shared.h b/drivers/char/adsprpc_shared.h
index dc6ab6f..8932d3c 100644
--- a/drivers/char/adsprpc_shared.h
+++ b/drivers/char/adsprpc_shared.h
@@ -1,5 +1,5 @@
/*
- * Copyright (c) 2012, The Linux Foundation. All rights reserved.
+ * Copyright (c) 2012-2013, The Linux Foundation. All rights reserved.
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License version 2 and
@@ -14,6 +14,8 @@
#ifndef ADSPRPC_SHARED_H
#define ADSPRPC_SHARED_H
+#include <linux/types.h>
+
#define FASTRPC_IOCTL_INVOKE _IOWR('R', 1, struct fastrpc_ioctl_invoke)
#define FASTRPC_SMD_GUID "fastrpcsmd-apps-dsp"
#define DEVICE_NAME "adsprpc-smd"
diff --git a/drivers/gpu/msm/adreno_ringbuffer.c b/drivers/gpu/msm/adreno_ringbuffer.c
index d4cccbd..c43ac51 100644
--- a/drivers/gpu/msm/adreno_ringbuffer.c
+++ b/drivers/gpu/msm/adreno_ringbuffer.c
@@ -435,6 +435,8 @@
/* CP ROQ queue sizes (bytes) - RB:16, ST:16, IB1:32, IB2:64 */
if (adreno_is_a305(adreno_dev) || adreno_is_a320(adreno_dev))
adreno_regwrite(device, REG_CP_QUEUE_THRESHOLDS, 0x000E0602);
+ else if (adreno_is_a330(adreno_dev) || adreno_is_a305b(adreno_dev))
+ adreno_regwrite(device, REG_CP_QUEUE_THRESHOLDS, 0x003E2008);
rb->rptr = 0;
rb->wptr = 0;
diff --git a/drivers/gpu/msm/kgsl_drm.c b/drivers/gpu/msm/kgsl_drm.c
index 764b044..ba88a42 100644
--- a/drivers/gpu/msm/kgsl_drm.c
+++ b/drivers/gpu/msm/kgsl_drm.c
@@ -465,8 +465,11 @@
}
ret = kgsl_gem_init_obj(dev, file_priv, obj, &handle);
- if (ret)
+ if (ret) {
+ drm_gem_object_release(obj);
+ DRM_ERROR("Unable to initialize GEM object ret = %d\n", ret);
return ret;
+ }
create->handle = handle;
return 0;
@@ -539,6 +542,106 @@
}
int
+kgsl_gem_create_from_ion_ioctl(struct drm_device *dev, void *data,
+ struct drm_file *file_priv)
+{
+ struct drm_kgsl_gem_create_from_ion *args = data;
+ struct drm_gem_object *obj;
+ struct ion_handle *ion_handle;
+ struct drm_kgsl_gem_object *priv;
+ struct sg_table *sg_table;
+ struct scatterlist *s;
+ int ret, handle;
+ unsigned long size;
+
+ ion_handle = ion_import_dma_buf(kgsl_drm_ion_client, args->ion_fd);
+ if (IS_ERR_OR_NULL(ion_handle)) {
+ DRM_ERROR("Unable to import dmabuf. Error number = %d\n",
+ (int)PTR_ERR(ion_handle));
+ return -EINVAL;
+ }
+
+ ion_handle_get_size(kgsl_drm_ion_client, ion_handle, &size);
+
+ if (size == 0) {
+ ion_free(kgsl_drm_ion_client, ion_handle);
+ DRM_ERROR(
+ "cannot create GEM object from zero size ION buffer\n");
+ return -EINVAL;
+ }
+
+ obj = drm_gem_object_alloc(dev, size);
+
+ if (obj == NULL) {
+ ion_free(kgsl_drm_ion_client, ion_handle);
+ DRM_ERROR("Unable to allocate the GEM object\n");
+ return -ENOMEM;
+ }
+
+ ret = kgsl_gem_init_obj(dev, file_priv, obj, &handle);
+ if (ret) {
+ ion_free(kgsl_drm_ion_client, ion_handle);
+ drm_gem_object_release(obj);
+ DRM_ERROR("Unable to initialize GEM object ret = %d\n", ret);
+ return ret;
+ }
+
+ priv = obj->driver_private;
+ priv->ion_handle = ion_handle;
+
+ priv->type = DRM_KGSL_GEM_TYPE_KMEM;
+ list_add(&priv->list, &kgsl_mem_list);
+
+ priv->pagetable = kgsl_mmu_getpagetable(KGSL_MMU_GLOBAL_PT);
+
+ priv->memdesc.pagetable = priv->pagetable;
+
+ sg_table = ion_sg_table(kgsl_drm_ion_client,
+ priv->ion_handle);
+ if (IS_ERR_OR_NULL(priv->ion_handle)) {
+ DRM_ERROR("Unable to get ION sg table\n");
+ ion_free(kgsl_drm_ion_client,
+ priv->ion_handle);
+ priv->ion_handle = NULL;
+ kgsl_mmu_putpagetable(priv->pagetable);
+ drm_gem_object_release(obj);
+ kfree(priv);
+ return -ENOMEM;
+ }
+
+ priv->memdesc.sg = sg_table->sgl;
+
+ /* Calculate the size of the memdesc from the sglist */
+
+ priv->memdesc.sglen = 0;
+
+ for (s = priv->memdesc.sg; s != NULL; s = sg_next(s)) {
+ priv->memdesc.size += s->length;
+ priv->memdesc.sglen++;
+ }
+
+ ret = kgsl_mmu_map(priv->pagetable, &priv->memdesc,
+ GSL_PT_PAGE_RV | GSL_PT_PAGE_WV);
+ if (ret) {
+ DRM_ERROR("kgsl_mmu_map failed. ret = %d\n", ret);
+ ion_free(kgsl_drm_ion_client,
+ priv->ion_handle);
+ priv->ion_handle = NULL;
+ kgsl_mmu_putpagetable(priv->pagetable);
+ drm_gem_object_release(obj);
+ kfree(priv);
+ return -ENOMEM;
+ }
+
+ priv->bufs[0].offset = 0;
+ priv->bufs[0].gpuaddr = priv->memdesc.gpuaddr;
+ priv->flags |= DRM_KGSL_GEM_FLAG_MAPPED;
+
+ args->handle = handle;
+ return 0;
+}
+
+int
kgsl_gem_get_ion_fd_ioctl(struct drm_device *dev, void *data,
struct drm_file *file_priv)
{
@@ -563,6 +666,12 @@
if (priv->ion_handle) {
args->ion_fd = ion_share_dma_buf(
kgsl_drm_ion_client, priv->ion_handle);
+ if (args->ion_fd < 0) {
+ DRM_ERROR(
+ "Could not share ion buffer. Error = %d\n",
+ args->ion_fd);
+ ret = -EINVAL;
+ }
} else {
DRM_ERROR("GEM object has no ion memory allocated.\n");
ret = -EINVAL;
@@ -1266,6 +1375,8 @@
DRM_IOCTL_DEF_DRV(KGSL_GEM_MMAP, kgsl_gem_mmap_ioctl, 0),
DRM_IOCTL_DEF_DRV(KGSL_GEM_GET_BUFINFO, kgsl_gem_get_bufinfo_ioctl, 0),
DRM_IOCTL_DEF_DRV(KGSL_GEM_GET_ION_FD, kgsl_gem_get_ion_fd_ioctl, 0),
+ DRM_IOCTL_DEF_DRV(KGSL_GEM_CREATE_FROM_ION,
+ kgsl_gem_create_from_ion_ioctl, 0),
DRM_IOCTL_DEF_DRV(KGSL_GEM_SET_BUFCOUNT,
kgsl_gem_set_bufcount_ioctl, 0),
DRM_IOCTL_DEF_DRV(KGSL_GEM_SET_ACTIVE, kgsl_gem_set_active_ioctl, 0),
diff --git a/drivers/gpu/msm/kgsl_pwrctrl.c b/drivers/gpu/msm/kgsl_pwrctrl.c
index 2945b7b..89335f3 100644
--- a/drivers/gpu/msm/kgsl_pwrctrl.c
+++ b/drivers/gpu/msm/kgsl_pwrctrl.c
@@ -1001,7 +1001,7 @@
}
/* Set the CPU latency to 501usec to allow low latency PC modes */
- pwr->pm_qos_latency = 3;
+ pwr->pm_qos_latency = 501;
pm_runtime_enable(device->parentdev);
register_early_suspend(&device->display_off);
diff --git a/drivers/i2c/busses/i2c-qup.c b/drivers/i2c/busses/i2c-qup.c
index 717f763..da43a08 100644
--- a/drivers/i2c/busses/i2c-qup.c
+++ b/drivers/i2c/busses/i2c-qup.c
@@ -128,6 +128,7 @@
};
#define QUP_MAX_CLK_STATE_RETRIES 300
+#define DEFAULT_CLK_RATE (19200000)
static char const * const i2c_rsrcs[] = {"i2c_clk", "i2c_sda"};
@@ -191,14 +192,18 @@
qup_i2c_interrupt(int irq, void *devid)
{
struct qup_i2c_dev *dev = devid;
- uint32_t status = readl_relaxed(dev->base + QUP_I2C_STATUS);
- uint32_t status1 = readl_relaxed(dev->base + QUP_ERROR_FLAGS);
- uint32_t op_flgs = readl_relaxed(dev->base + QUP_OPERATIONAL);
+ uint32_t status = 0;
+ uint32_t status1 = 0;
+ uint32_t op_flgs = 0;
int err = 0;
if (pm_runtime_suspended(dev->dev))
return IRQ_NONE;
+ status = readl_relaxed(dev->base + QUP_I2C_STATUS);
+ status1 = readl_relaxed(dev->base + QUP_ERROR_FLAGS);
+ op_flgs = readl_relaxed(dev->base + QUP_OPERATIONAL);
+
if (!dev->msg || !dev->complete) {
/* Clear Error interrupt if it's a level triggered interrupt*/
if (dev->num_irqs == 1) {
@@ -1235,18 +1240,26 @@
dev->clk_ctl = 0;
dev->pos = 0;
+ if (dev->pdata->src_clk_rate <= 0) {
+ dev_info(&pdev->dev,
+ "No src_clk_rate specified in platfrom data or "
+ "qcom,i2c-src-freq in DT\n");
+ dev_info(&pdev->dev, "Using default clock rate %dHz\n",
+ DEFAULT_CLK_RATE);
+ dev->pdata->src_clk_rate = DEFAULT_CLK_RATE;
+ }
+
+ ret = clk_set_rate(dev->clk, dev->pdata->src_clk_rate);
+ if (ret)
+ dev_info(&pdev->dev, "clk_set_rate(core_clk, %dHz):%d\n",
+ dev->pdata->src_clk_rate, ret);
+
+ clk_prepare_enable(dev->clk);
+ clk_prepare_enable(dev->pclk);
/*
* If bootloaders leave a pending interrupt on certain GSBI's,
* then we reset the core before registering for interrupts.
*/
-
- if (dev->pdata->src_clk_rate > 0)
- clk_set_rate(dev->clk, dev->pdata->src_clk_rate);
- else
- dev->pdata->src_clk_rate = 19200000;
-
- clk_prepare_enable(dev->clk);
- clk_prepare_enable(dev->pclk);
writel_relaxed(1, dev->base + QUP_SW_RESET);
if (qup_i2c_poll_state(dev, 0, true) != 0)
goto err_reset_failed;
diff --git a/drivers/input/touchscreen/Kconfig b/drivers/input/touchscreen/Kconfig
index c78eec3..b43c13e 100644
--- a/drivers/input/touchscreen/Kconfig
+++ b/drivers/input/touchscreen/Kconfig
@@ -999,4 +999,13 @@
To compile this driver as a module, choose M here: the
module will be called synaptics_dsx_fw_update.
+config SECURE_TOUCH
+ bool "Secure Touch"
+ depends on TOUCHSCREEN_ATMEL_MXT
+ help
+ Say Y here to enable Secure Touch support in the Atmel MXT
+ driver.
+
+ If unsure, say N.
+
endif
diff --git a/drivers/input/touchscreen/atmel_mxt_ts.c b/drivers/input/touchscreen/atmel_mxt_ts.c
index 1d56a0a..0c20815 100644
--- a/drivers/input/touchscreen/atmel_mxt_ts.c
+++ b/drivers/input/touchscreen/atmel_mxt_ts.c
@@ -38,6 +38,14 @@
#define MXT_SUSPEND_LEVEL 1
#endif
+#if defined(CONFIG_SECURE_TOUCH)
+#include <linux/completion.h>
+#include <linux/pm_runtime.h>
+#include <linux/errno.h>
+#include <asm/system.h>
+#include <linux/atomic.h>
+#endif
+
/* Family ID */
#define MXT224_ID 0x80
#define MXT224E_ID 0x81
@@ -383,6 +391,11 @@
bool update_cfg;
const char *fw_name;
bool no_force_update;
+#if defined(CONFIG_SECURE_TOUCH)
+ atomic_t st_enabled;
+ atomic_t st_pending_irqs;
+ struct completion st_completion;
+#endif
};
static struct dentry *debug_base;
@@ -979,6 +992,23 @@
mxt_release_all(data);
}
+#if defined(CONFIG_SECURE_TOUCH)
+static irqreturn_t mxt_filter_interrupt(struct mxt_data *data)
+{
+ if (atomic_read(&data->st_enabled)) {
+ atomic_cmpxchg(&data->st_pending_irqs, 0, 1);
+ complete(&data->st_completion);
+ return IRQ_HANDLED;
+ }
+ return IRQ_NONE;
+}
+#else
+static irqreturn_t mxt_filter_interrupt(struct mxt_data *data)
+{
+ return IRQ_NONE;
+}
+#endif
+
static irqreturn_t mxt_interrupt(int irq, void *dev_id)
{
struct mxt_data *data = dev_id;
@@ -992,6 +1022,9 @@
return IRQ_HANDLED;
}
+ if (IRQ_HANDLED == mxt_filter_interrupt(data))
+ goto end;
+
do {
if (mxt_read_message(data, &message)) {
dev_err(dev, "Failed to read message\n");
@@ -1910,6 +1943,100 @@
return count;
}
+#if defined(CONFIG_SECURE_TOUCH)
+
+static ssize_t mxt_secure_touch_enable_show(struct device *dev,
+ struct device_attribute *attr, char *buf)
+{
+ struct mxt_data *data = dev_get_drvdata(dev);
+ return scnprintf(buf, PAGE_SIZE, "%d", atomic_read(&data->st_enabled));
+}
+/*
+ * Accept only "0" and "1" valid values.
+ * "0" will reset the st_enabled flag, then wake up the reading process.
+ * The bus driver is notified via pm_runtime that it is not required to stay
+ * awake anymore.
+ * It will also make sure the queue of events is emptied in the controller,
+ * in case a touch happened in between the secure touch being disabled and
+ * the local ISR being ungated.
+ * "1" will set the st_enabled flag and clear the st_pending_irqs flag.
+ * The bus driver is requested via pm_runtime to stay awake.
+ */
+static ssize_t mxt_secure_touch_enable_store(struct device *dev,
+ struct device_attribute *attr,
+ const char *buf, size_t count)
+{
+ struct mxt_data *data = dev_get_drvdata(dev);
+ unsigned long value;
+ int err = 0;
+
+ if (count > 2)
+ return -EINVAL;
+
+ err = kstrtoul(buf, 10, &value);
+ if (err != 0)
+ return err;
+
+ err = count;
+
+ switch (value) {
+ case 0:
+ if (atomic_read(&data->st_enabled) == 0)
+ break;
+
+ pm_runtime_put(&data->client->adapter->dev);
+ atomic_set(&data->st_enabled, 0);
+ complete(&data->st_completion);
+ mxt_interrupt(data->client->irq, data);
+ break;
+ case 1:
+ if (atomic_read(&data->st_enabled)) {
+ err = -EBUSY;
+ break;
+ }
+
+ if (pm_runtime_get(data->client->adapter->dev.parent) < 0) {
+ dev_err(&data->client->dev, "pm_runtime_get failed\n");
+ err = -EIO;
+ break;
+ }
+ atomic_set(&data->st_pending_irqs, 0);
+ atomic_set(&data->st_enabled, 1);
+ break;
+ default:
+ dev_err(&data->client->dev, "unsupported value: %lu\n", value);
+ err = -EINVAL;
+ break;
+ }
+
+ return err;
+}
+
+static ssize_t mxt_secure_touch_show(struct device *dev,
+ struct device_attribute *attr, char *buf)
+{
+ struct mxt_data *data = dev_get_drvdata(dev);
+ int err;
+
+ if (atomic_read(&data->st_enabled) == 0)
+ return -EBADF;
+
+ err = wait_for_completion_interruptible(&data->st_completion);
+
+ if (err)
+ return err;
+
+ if (atomic_cmpxchg(&data->st_pending_irqs, 1, 0) != 1)
+ return -EBADF;
+
+ return scnprintf(buf, PAGE_SIZE, "%u", 1);
+}
+
+static DEVICE_ATTR(secure_touch_enable, 0666, mxt_secure_touch_enable_show,
+ mxt_secure_touch_enable_store);
+static DEVICE_ATTR(secure_touch, 0444, mxt_secure_touch_show, NULL);
+#endif
+
static DEVICE_ATTR(object, 0444, mxt_object_show, NULL);
static DEVICE_ATTR(update_fw, 0664, NULL, mxt_update_fw_store);
static DEVICE_ATTR(force_cfg_update, 0664, NULL, mxt_force_cfg_update_store);
@@ -1918,6 +2045,10 @@
&dev_attr_object.attr,
&dev_attr_update_fw.attr,
&dev_attr_force_cfg_update.attr,
+#if defined(CONFIG_SECURE_TOUCH)
+ &dev_attr_secure_touch_enable.attr,
+ &dev_attr_secure_touch.attr,
+#endif
NULL
};
@@ -2655,6 +2786,17 @@
#endif
+#if defined(CONFIG_SECURE_TOUCH)
+static void __devinit secure_touch_init(struct mxt_data *data)
+{
+ init_completion(&data->st_completion);
+}
+#else
+static void __devinit secure_touch_init(struct mxt_data *data)
+{
+}
+#endif
+
static int __devinit mxt_probe(struct i2c_client *client,
const struct i2c_device_id *id)
{
@@ -2840,6 +2982,8 @@
mxt_debugfs_init(data);
+ secure_touch_init(data);
+
return 0;
err_unregister_device:
diff --git a/drivers/input/touchscreen/synaptics_fw_update.c b/drivers/input/touchscreen/synaptics_fw_update.c
index c447231..abb5bbc 100644
--- a/drivers/input/touchscreen/synaptics_fw_update.c
+++ b/drivers/input/touchscreen/synaptics_fw_update.c
@@ -1529,7 +1529,7 @@
static ssize_t fwu_sysfs_config_id_show(struct device *dev,
struct device_attribute *attr, char *buf)
{
- unsigned char config_id[8];
+ unsigned char config_id[4];
/* device config id */
fwu->fn_ptr->read(fwu->rmi4_data,
fwu->f34_fd.ctrl_base_addr,
diff --git a/drivers/leds/leds-qpnp.c b/drivers/leds/leds-qpnp.c
index bea6842..fb1882c 100644
--- a/drivers/leds/leds-qpnp.c
+++ b/drivers/leds/leds-qpnp.c
@@ -27,6 +27,7 @@
#define WLED_MOD_EN_REG(base, n) (base + 0x60 + n*0x10)
#define WLED_IDAC_DLY_REG(base, n) (WLED_MOD_EN_REG(base, n) + 0x01)
#define WLED_FULL_SCALE_REG(base, n) (WLED_IDAC_DLY_REG(base, n) + 0x01)
+#define WLED_MOD_SRC_SEL_REG(base, n) (WLED_FULL_SCALE_REG(base, n) + 0x01)
/* wled control registers */
#define WLED_BRIGHTNESS_CNTL_LSB(base, n) (base + 0x40 + 2*n)
@@ -83,7 +84,7 @@
#define FLASH_LED_1_CURR(base) (base + 0x43)
#define FLASH_CLAMP_CURR(base) (base + 0x44)
#define FLASH_LED_TMR_CTRL(base) (base + 0x48)
-#define FLASH_HEADROOM(base) (base + 0x49)
+#define FLASH_HEADROOM(base) (base + 0x4A)
#define FLASH_STARTUP_DELAY(base) (base + 0x4B)
#define FLASH_MASK_ENABLE(base) (base + 0x4C)
#define FLASH_VREG_OK_FORCE(base) (base + 0x4F)
@@ -111,7 +112,7 @@
#define FLASH_ENABLE_MODULE 0x80
#define FLASH_ENABLE_MODULE_MASK 0x80
#define FLASH_DISABLE_ALL 0x00
-#define FLASH_ENABLE_MASK 0x60
+#define FLASH_ENABLE_MASK 0xE0
#define FLASH_ENABLE_LED_0 0x40
#define FLASH_ENABLE_LED_1 0x20
#define FLASH_INIT_MASK 0xE0
@@ -454,6 +455,14 @@
/* Set led current */
if (val > 0) {
+ rc = qpnp_led_masked_write(led, FLASH_ENABLE_CONTROL(led->base),
+ FLASH_ENABLE_MODULE_MASK, FLASH_ENABLE_MODULE);
+ if (rc) {
+ dev_err(&led->spmi_dev->dev,
+ "Enable reg write failed(%d)\n", rc);
+ return rc;
+ }
+
rc = qpnp_led_masked_write(led, led->flash_cfg->current_addr,
FLASH_CURRENT_MASK, led->flash_cfg->current_prgm);
if (rc) {
@@ -487,6 +496,13 @@
"LED %d flash write failed(%d)\n", led->id, rc);
return rc;
}
+ rc = qpnp_led_masked_write(led, FLASH_VREG_OK_FORCE(led->base),
+ FLASH_VREG_MASK, FLASH_HW_VREG_OK);
+ if (rc) {
+ dev_err(&led->spmi_dev->dev,
+ "Vreg OK reg write failed(%d)\n", rc);
+ return rc;
+ }
} else {
rc = qpnp_led_masked_write(led, FLASH_ENABLE_CONTROL(led->base),
FLASH_ENABLE_MASK,
@@ -755,7 +771,7 @@
if (led->wled_cfg->dig_mod_gen_en) {
rc = qpnp_led_masked_write(led,
- WLED_MOD_EN_REG(led->base, i),
+ WLED_MOD_SRC_SEL_REG(led->base, i),
WLED_NO_MASK, WLED_USE_EXT_GEN_MOD_SRC);
if (rc) {
dev_err(&led->spmi_dev->dev,
@@ -883,7 +899,7 @@
}
rc = qpnp_led_masked_write(led, FLASH_ENABLE_CONTROL(led->base),
- FLASH_ENABLE_MODULE_MASK, FLASH_ENABLE_MODULE);
+ FLASH_ENABLE_MODULE_MASK, FLASH_DISABLE_ALL);
if (rc) {
dev_err(&led->spmi_dev->dev,
"Enable reg write failed(%d)\n", rc);
diff --git a/drivers/media/platform/msm/camera_v2/isp/msm_isp.h b/drivers/media/platform/msm/camera_v2/isp/msm_isp.h
index d412435..d714ffb 100644
--- a/drivers/media/platform/msm/camera_v2/isp/msm_isp.h
+++ b/drivers/media/platform/msm/camera_v2/isp/msm_isp.h
@@ -54,27 +54,34 @@
DISABLE_CAMIF_IMMEDIATELY
};
+struct msm_isp_timestamp {
+ /*Monotonic clock for v4l2 buffer*/
+ struct timeval buf_time;
+ /*Wall clock for userspace event*/
+ struct timeval event_time;
+};
+
struct msm_vfe_irq_ops {
void (*read_irq_status) (struct vfe_device *vfe_dev,
uint32_t *irq_status0, uint32_t *irq_status1);
void (*process_reg_update) (struct vfe_device *vfe_dev,
uint32_t irq_status0, uint32_t irq_status1,
- struct timeval *tv);
+ struct msm_isp_timestamp *ts);
void (*process_reset_irq) (struct vfe_device *vfe_dev,
uint32_t irq_status0, uint32_t irq_status1);
void (*process_halt_irq) (struct vfe_device *vfe_dev,
uint32_t irq_status0, uint32_t irq_status1);
void (*process_camif_irq) (struct vfe_device *vfe_dev,
uint32_t irq_status0, uint32_t irq_status1,
- struct timeval *tv);
+ struct msm_isp_timestamp *ts);
void (*process_axi_irq) (struct vfe_device *vfe_dev,
uint32_t irq_status0, uint32_t irq_status1,
- struct timeval *tv);
+ struct msm_isp_timestamp *ts);
void (*process_error_irq) (struct vfe_device *vfe_dev,
uint32_t irq_status0, uint32_t irq_status1);
void (*process_stats_irq) (struct vfe_device *vfe_dev,
uint32_t irq_status0, uint32_t irq_status1,
- struct timeval *tv);
+ struct msm_isp_timestamp *ts);
};
struct msm_vfe_axi_ops {
@@ -109,10 +116,6 @@
void (*clear_wm_xbar_reg) (struct vfe_device *vfe_dev,
struct msm_vfe_axi_stream *stream_info, uint8_t plane_idx);
- void (*cfg_rdi_reg) (struct vfe_device *vfe_dev,
- struct msm_vfe_axi_stream_request_cmd *stream_cfg_cmd,
- uint8_t plane_idx);
-
void (*cfg_ub) (struct vfe_device *vfe_dev);
void (*update_ping_pong_addr) (struct vfe_device *vfe_dev,
@@ -125,7 +128,7 @@
};
struct msm_vfe_core_ops {
- void (*reg_update) (struct vfe_device *vfe_dev, uint32_t update_mask);
+ void (*reg_update) (struct vfe_device *vfe_dev);
long (*reset_hw) (struct vfe_device *vfe_dev);
int (*init_hw) (struct vfe_device *vfe_dev);
void (*init_hw_reg) (struct vfe_device *vfe_dev);
@@ -134,6 +137,9 @@
struct msm_vfe_pix_cfg *pix_cfg);
void (*update_camif_state) (struct vfe_device *vfe_dev,
enum msm_isp_camif_update_state update_state);
+ void (*cfg_rdi_reg) (struct vfe_device *vfe_dev,
+ struct msm_vfe_rdi_cfg *rdi_cfg,
+ enum msm_vfe_input_src input_src);
int (*get_platform_data) (struct vfe_device *vfe_dev);
void (*get_error_mask) (uint32_t *error_mask0, uint32_t *error_mask1);
void (*process_error_status) (struct vfe_device *vfe_dev);
@@ -224,8 +230,6 @@
enum msm_vfe_axi_stream_src stream_src;
uint8_t num_planes;
uint8_t wm[MAX_PLANES_PER_STREAM];
- uint8_t rdi[MAX_PLANES_PER_STREAM];
- uint8_t rdi_master[MAX_PLANES_PER_STREAM];
uint8_t comp_mask_index;
struct msm_isp_buffer *buf[2];
uint32_t session_id;
@@ -235,13 +239,18 @@
uint8_t buf_divert;
enum msm_vfe_axi_stream_type stream_type;
+ uint32_t frame_based;
uint32_t framedrop_period;
uint32_t framedrop_pattern;
+ uint32_t num_burst_capture;/*number of frame to capture*/
uint32_t init_frame_drop;
uint32_t burst_frame_count;/*number of sof before burst stop*/
- uint32_t num_burst_capture;/*number of frame to capture*/
- uint8_t auto_trigger_stop;
uint8_t framedrop_update;
+
+ /*Run time update variables*/
+ uint32_t runtime_init_frame_drop;
+ uint32_t runtime_burst_frame_count;/*number of sof before burst stop*/
+ uint8_t runtime_framedrop_update;
};
struct msm_vfe_axi_composite_info {
@@ -270,9 +279,6 @@
uint32_t wm_image_size[MAX_NUM_WM];
enum msm_wm_ub_cfg_type wm_ub_cfg_policy;
uint8_t num_used_wm;
- uint8_t free_rdi[MAX_NUM_RDI];
- uint8_t free_rdi_master[MAX_NUM_RDI][MAX_NUM_RDI_MASTER];
- uint8_t num_used_rdi;
uint8_t num_active_stream;
struct msm_vfe_axi_composite_info
composite_info[MAX_NUM_COMPOSITE_MASK];
@@ -325,7 +331,7 @@
struct list_head list;
uint32_t vfeInterruptStatus0;
uint32_t vfeInterruptStatus1;
- struct timeval tv;
+ struct msm_isp_timestamp ts;
uint8_t cmd_used;
};
diff --git a/drivers/media/platform/msm/camera_v2/isp/msm_isp32.c b/drivers/media/platform/msm/camera_v2/isp/msm_isp32.c
index 750963c..8f00e80 100644
--- a/drivers/media/platform/msm/camera_v2/isp/msm_isp32.c
+++ b/drivers/media/platform/msm/camera_v2/isp/msm_isp32.c
@@ -24,10 +24,7 @@
#define VFE32_BURST_LEN 4
#define VFE32_EQUAL_SLICE_UB 117
#define VFE32_WM_BASE(idx) (0x4C + 0x18 * idx)
-#define VFE32_RDI_BASE(idx) (0x734 + 0x4 * idx)
-#define VFE32_RDI_MN_BASE(m) (0x734 + 0x4 * m/3)
-#define VFE32_RDI_MN_SEL_SHIFT(m) (4*(m%3) + 4)
-#define VFE32_RDI_MN_FB_SHIFT(m) ((m%3) + 16)
+#define VFE32_RDI_BASE(idx) (idx ? 0x734 + 0x4 * (idx - 1) : 0x06FC)
#define VFE32_XBAR_BASE(idx) (0x40 + 0x4 * (idx / 4))
#define VFE32_XBAR_SHIFT(idx) ((idx % 4) * 8)
#define VFE32_PING_PONG_BASE(wm, ping_pong) \
@@ -170,7 +167,8 @@
}
static void msm_vfe32_process_camif_irq(struct vfe_device *vfe_dev,
- uint32_t irq_status0, uint32_t irq_status1, struct timeval *tv)
+ uint32_t irq_status0, uint32_t irq_status1,
+ struct msm_isp_timestamp *ts)
{
if (!(irq_status0 & 0x1F))
return;
@@ -178,12 +176,13 @@
if (irq_status0 & BIT(0)) {
ISP_DBG("%s: PIX0 frame id: %lu\n", __func__,
vfe_dev->axi_data.src_info[VFE_PIX_0].frame_id);
- msm_isp_sof_notify(vfe_dev, VFE_PIX_0, tv);
+ msm_isp_sof_notify(vfe_dev, VFE_PIX_0, ts);
}
}
static void msm_vfe32_process_stats_irq(struct vfe_device *vfe_dev,
- uint32_t irq_status0, uint32_t irq_status1, struct timeval *tv)
+ uint32_t irq_status0, uint32_t irq_status1,
+ struct msm_isp_timestamp *ts)
{
/* todo: add stats specific code */
return;
@@ -321,7 +320,8 @@
}
static void msm_vfe32_process_reg_update(struct vfe_device *vfe_dev,
- uint32_t irq_status0, uint32_t irq_status1, struct timeval *tv)
+ uint32_t irq_status0, uint32_t irq_status1,
+ struct msm_isp_timestamp *ts)
{
if (!(irq_status0 & 0x20) && !(irq_status1 & 0x1C000000))
return;
@@ -336,9 +336,9 @@
}
static void msm_vfe32_reg_update(
- struct vfe_device *vfe_dev, uint32_t update_mask)
+ struct vfe_device *vfe_dev)
{
- msm_camera_io_w_mb(update_mask, vfe_dev->vfe_base + 0x260);
+ msm_camera_io_w_mb(0xF, vfe_dev->vfe_base + 0x260);
}
static long msm_vfe32_reset_hardware(struct vfe_device *vfe_dev)
@@ -358,12 +358,14 @@
static void msm_vfe32_axi_enable_wm(struct vfe_device *vfe_dev,
uint8_t wm_idx, uint8_t enable)
{
+ uint32_t val = msm_camera_io_r(
+ vfe_dev->vfe_base + VFE32_WM_BASE(wm_idx));
if (enable)
- msm_camera_io_w_mb(0x1,
- vfe_dev->vfe_base + VFE32_WM_BASE(wm_idx));
+ val |= 0x1;
else
- msm_camera_io_w_mb(0x0,
- vfe_dev->vfe_base + VFE32_WM_BASE(wm_idx));
+ val &= ~0x1;
+ msm_camera_io_w_mb(val,
+ vfe_dev->vfe_base + VFE32_WM_BASE(wm_idx));
}
static void msm_vfe32_axi_cfg_comp_mask(struct vfe_device *vfe_dev,
@@ -423,13 +425,13 @@
{
uint32_t framedrop_pattern = 0, framedrop_period = 0;
- if (stream_info->init_frame_drop == 0) {
+ if (stream_info->runtime_init_frame_drop == 0) {
framedrop_pattern = stream_info->framedrop_pattern;
framedrop_period = stream_info->framedrop_period;
}
if (stream_info->stream_type == BURST_STREAM &&
- stream_info->burst_frame_count == 0) {
+ stream_info->runtime_burst_frame_count == 0) {
framedrop_pattern = 0;
framedrop_period = 0;
}
@@ -519,6 +521,27 @@
}
}
+static void msm_vfe32_cfg_rdi_reg(struct vfe_device *vfe_dev,
+ struct msm_vfe_rdi_cfg *rdi_cfg, enum msm_vfe_input_src input_src)
+{
+ uint8_t rdi = input_src - VFE_RAW_0;
+ uint32_t rdi_reg_cfg;
+ rdi_reg_cfg = msm_camera_io_r(
+ vfe_dev->vfe_base + VFE32_RDI_BASE(0));
+ rdi_reg_cfg &= ~(BIT(16 + rdi));
+ rdi_reg_cfg |= rdi_cfg->frame_based << (16 + rdi);
+ msm_camera_io_w(rdi_reg_cfg,
+ vfe_dev->vfe_base + VFE32_RDI_BASE(0));
+
+ rdi_reg_cfg = msm_camera_io_r(
+ vfe_dev->vfe_base + VFE32_RDI_BASE(rdi));
+ rdi_reg_cfg &= 0x70003;
+ rdi_reg_cfg |= (rdi * 3) << 28 | rdi_cfg->cid << 4 | 0x4;
+ msm_camera_io_w(
+ rdi_reg_cfg, vfe_dev->vfe_base + VFE32_RDI_BASE(rdi));
+
+}
+
static void msm_vfe32_axi_cfg_wm_reg(
struct vfe_device *vfe_dev,
struct msm_vfe_axi_stream_request_cmd *stream_cfg_cmd,
@@ -531,22 +554,37 @@
(stream_cfg_cmd->axi_stream_handle & 0xFF)];
uint32_t wm_base = VFE32_WM_BASE(stream_info->wm[plane_idx]);
- /*WR_IMAGE_SIZE*/
- val =
- ((msm_isp_cal_word_per_line(stream_cfg_cmd->output_format,
- stream_cfg_cmd->plane_cfg[
- plane_idx].output_width)+1)/2 - 1) << 16 |
- (stream_cfg_cmd->plane_cfg[plane_idx].output_height - 1);
- msm_camera_io_w(val, vfe_dev->vfe_base + wm_base + 0x10);
+ if (!stream_info->frame_based) {
+ /*WR_IMAGE_SIZE*/
+ val =
+ ((msm_isp_cal_word_per_line(
+ stream_cfg_cmd->output_format,
+ stream_cfg_cmd->plane_cfg[plane_idx].
+ output_width)+1)/2 - 1) << 16 |
+ (stream_cfg_cmd->plane_cfg[plane_idx].
+ output_height - 1);
+ msm_camera_io_w(val, vfe_dev->vfe_base + wm_base + 0x10);
- /*WR_BUFFER_CFG*/
- val =
- msm_isp_cal_word_per_line(stream_cfg_cmd->output_format,
- stream_cfg_cmd->plane_cfg[plane_idx].output_stride) << 16 |
- (stream_cfg_cmd->plane_cfg[
- plane_idx].output_scan_lines - 1) << 4 |
- VFE32_BURST_LEN >> 2;
- msm_camera_io_w(val, vfe_dev->vfe_base + wm_base + 0x14);
+ /*WR_BUFFER_CFG*/
+ val =
+ msm_isp_cal_word_per_line(
+ stream_cfg_cmd->output_format,
+ stream_cfg_cmd->plane_cfg[plane_idx].
+ output_stride) << 16 |
+ (stream_cfg_cmd->plane_cfg[plane_idx].
+ output_height - 1) << 4 | VFE32_BURST_LEN >> 2;
+ msm_camera_io_w(val, vfe_dev->vfe_base + wm_base + 0x14);
+ } else {
+ msm_camera_io_w(0x2, vfe_dev->vfe_base + wm_base);
+ val =
+ msm_isp_cal_word_per_line(
+ stream_cfg_cmd->output_format,
+ stream_cfg_cmd->plane_cfg[plane_idx].
+ output_width) << 16 |
+ (stream_cfg_cmd->plane_cfg[plane_idx].
+ output_height - 1) << 4 | VFE32_BURST_LEN >> 2;
+ msm_camera_io_w(val, vfe_dev->vfe_base + wm_base + 0x14);
+ }
return;
}
@@ -563,36 +601,6 @@
return;
}
-static void msm_vfe32_axi_cfg_rdi_reg(
- struct vfe_device *vfe_dev,
- struct msm_vfe_axi_stream_request_cmd *stream_cfg_cmd,
- uint8_t plane_idx)
-{
- struct msm_vfe_axi_shared_data *axi_data = &vfe_dev->axi_data;
- struct msm_vfe_axi_stream *stream_info =
- &axi_data->stream_info[(stream_cfg_cmd->axi_stream_handle & 0xFF)];
- struct msm_vfe_axi_plane_cfg *plane_cfg =
- &stream_cfg_cmd->plane_cfg[plane_idx];
- uint8_t rdi = stream_info->rdi[plane_idx];
- uint8_t rdi_master = stream_info->rdi_master[plane_idx];
- uint32_t rdi_reg_cfg;
-
- rdi_reg_cfg = msm_camera_io_r(vfe_dev->vfe_base + VFE32_RDI_BASE(rdi));
- rdi_reg_cfg = (rdi_reg_cfg & 0xFFFFFFF) | rdi_master << 28;
- msm_camera_io_w(rdi_reg_cfg, vfe_dev->vfe_base + VFE32_RDI_BASE(rdi));
-
- rdi_reg_cfg = msm_camera_io_r(
- vfe_dev->vfe_base + VFE32_RDI_MN_BASE(rdi_master));
- rdi_reg_cfg &= ~((0xF << VFE32_RDI_MN_SEL_SHIFT(rdi_master)) |
- BIT(VFE32_RDI_MN_FB_SHIFT(rdi_master)));
- rdi_reg_cfg |= (plane_cfg->rdi_cid <<
- VFE32_RDI_MN_SEL_SHIFT(rdi_master) |
- (stream_cfg_cmd->frame_base <<
- VFE32_RDI_MN_FB_SHIFT(rdi_master)));
- msm_camera_io_w(rdi_reg_cfg, vfe_dev->vfe_base +
- VFE32_RDI_MN_BASE(rdi_master));
-}
-
static void msm_vfe32_axi_cfg_wm_xbar_reg(
struct vfe_device *vfe_dev,
struct msm_vfe_axi_stream_request_cmd *stream_cfg_cmd,
@@ -633,13 +641,14 @@
case IDEAL_RAW:
xbar_cfg = 0x80;
break;
- case RDI:
- if (stream_info->rdi[plane_idx] == 0)
- xbar_cfg = 0xA0;
- else if (stream_info->rdi[plane_idx] == 1)
- xbar_cfg = 0xC0;
- else if (stream_info->rdi[plane_idx] == 2)
- xbar_cfg = 0xE0;
+ case RDI_INTF_0:
+ xbar_cfg = 0xA0;
+ break;
+ case RDI_INTF_1:
+ xbar_cfg = 0xC0;
+ break;
+ case RDI_INTF_2:
+ xbar_cfg = 0xE0;
break;
default:
pr_err("%s: Invalid stream src\n", __func__);
@@ -881,7 +890,6 @@
.clear_wm_reg = msm_vfe32_axi_clear_wm_reg,
.cfg_wm_xbar_reg = msm_vfe32_axi_cfg_wm_xbar_reg,
.clear_wm_xbar_reg = msm_vfe32_axi_clear_wm_xbar_reg,
- .cfg_rdi_reg = msm_vfe32_axi_cfg_rdi_reg,
.cfg_ub = msm_vfe32_cfg_axi_ub,
.update_ping_pong_addr =
msm_vfe32_update_ping_pong_addr,
@@ -894,6 +902,7 @@
.reg_update = msm_vfe32_reg_update,
.cfg_camif = msm_vfe32_cfg_camif,
.update_camif_state = msm_vfe32_update_camif_state,
+ .cfg_rdi_reg = msm_vfe32_cfg_rdi_reg,
.reset_hw = msm_vfe32_reset_hardware,
.init_hw = msm_vfe32_init_hardware,
.init_hw_reg = msm_vfe32_init_hardware_reg,
diff --git a/drivers/media/platform/msm/camera_v2/isp/msm_isp40.c b/drivers/media/platform/msm/camera_v2/isp/msm_isp40.c
index ed4aa7f..1d931df 100644
--- a/drivers/media/platform/msm/camera_v2/isp/msm_isp40.c
+++ b/drivers/media/platform/msm/camera_v2/isp/msm_isp40.c
@@ -30,13 +30,11 @@
#endif
#define VFE40_BURST_LEN 3
+#define VFE40_STATS_BURST_LEN 2
#define VFE40_UB_SIZE 1536
-#define VFE40_EQUAL_SLICE_UB 304
+#define VFE40_EQUAL_SLICE_UB 286
#define VFE40_WM_BASE(idx) (0x6C + 0x24 * idx)
#define VFE40_RDI_BASE(idx) (0x2E8 + 0x4 * idx)
-#define VFE40_RDI_MN_BASE(m) (0x2E8 + 0x4 * m/3)
-#define VFE40_RDI_MN_SEL_SHIFT(m) (4*(m%3) + 4)
-#define VFE40_RDI_MN_FB_SHIFT(m) ((m%3) + 16)
#define VFE40_XBAR_BASE(idx) (0x58 + 0x4 * (idx / 2))
#define VFE40_XBAR_SHIFT(idx) ((idx%2) ? 16 : 0)
#define VFE40_PING_PONG_BASE(wm, ping_pong) \
@@ -284,7 +282,8 @@
}
static void msm_vfe40_process_camif_irq(struct vfe_device *vfe_dev,
- uint32_t irq_status0, uint32_t irq_status1, struct timeval *tv)
+ uint32_t irq_status0, uint32_t irq_status1,
+ struct msm_isp_timestamp *ts)
{
if (!(irq_status0 & 0xF))
return;
@@ -294,7 +293,7 @@
if (vfe_dev->axi_data.src_info[VFE_PIX_0].raw_stream_count > 0
&& vfe_dev->axi_data.src_info[VFE_PIX_0].
pix_stream_count == 0) {
- msm_isp_sof_notify(vfe_dev, VFE_PIX_0, tv);
+ msm_isp_sof_notify(vfe_dev, VFE_PIX_0, ts);
msm_isp_update_framedrop_reg(vfe_dev);
}
}
@@ -445,35 +444,33 @@
}
static void msm_vfe40_process_reg_update(struct vfe_device *vfe_dev,
- uint32_t irq_status0, uint32_t irq_status1, struct timeval *tv)
+ uint32_t irq_status0, uint32_t irq_status1,
+ struct msm_isp_timestamp *ts)
{
- uint32_t update_mask = 0xF;
if (!(irq_status0 & 0xF0))
return;
if (irq_status0 & BIT(4))
- msm_isp_sof_notify(vfe_dev, VFE_PIX_0, tv);
+ msm_isp_sof_notify(vfe_dev, VFE_PIX_0, ts);
if (irq_status0 & BIT(5))
- msm_isp_sof_notify(vfe_dev, VFE_RAW_0, tv);
+ msm_isp_sof_notify(vfe_dev, VFE_RAW_0, ts);
if (irq_status0 & BIT(6))
- msm_isp_sof_notify(vfe_dev, VFE_RAW_1, tv);
+ msm_isp_sof_notify(vfe_dev, VFE_RAW_1, ts);
if (irq_status0 & BIT(7))
- msm_isp_sof_notify(vfe_dev, VFE_RAW_2, tv);
+ msm_isp_sof_notify(vfe_dev, VFE_RAW_2, ts);
if (vfe_dev->axi_data.stream_update)
msm_isp_axi_stream_update(vfe_dev);
msm_isp_update_framedrop_reg(vfe_dev);
msm_isp_update_error_frame_count(vfe_dev);
- vfe_dev->hw_info->vfe_ops.core_ops.
- reg_update(vfe_dev, update_mask);
+ vfe_dev->hw_info->vfe_ops.core_ops.reg_update(vfe_dev);
return;
}
-static void msm_vfe40_reg_update(
- struct vfe_device *vfe_dev, uint32_t update_mask)
+static void msm_vfe40_reg_update(struct vfe_device *vfe_dev)
{
- msm_camera_io_w_mb(update_mask, vfe_dev->vfe_base + 0x378);
+ msm_camera_io_w_mb(0xF, vfe_dev->vfe_base + 0x378);
}
static long msm_vfe40_reset_hardware(struct vfe_device *vfe_dev)
@@ -493,12 +490,14 @@
static void msm_vfe40_axi_enable_wm(struct vfe_device *vfe_dev,
uint8_t wm_idx, uint8_t enable)
{
+ uint32_t val;
+ val = msm_camera_io_r(vfe_dev->vfe_base + VFE40_WM_BASE(wm_idx));
if (enable)
- msm_camera_io_w_mb(0x1,
- vfe_dev->vfe_base + VFE40_WM_BASE(wm_idx));
+ val |= 0x1;
else
- msm_camera_io_w_mb(0x0,
- vfe_dev->vfe_base + VFE40_WM_BASE(wm_idx));
+ val &= ~0x1;
+ msm_camera_io_w_mb(val,
+ vfe_dev->vfe_base + VFE40_WM_BASE(wm_idx));
}
static void msm_vfe40_axi_cfg_comp_mask(struct vfe_device *vfe_dev,
@@ -559,13 +558,13 @@
uint32_t i, temp;
uint32_t framedrop_pattern = 0, framedrop_period = 0;
- if (stream_info->init_frame_drop == 0) {
+ if (stream_info->runtime_init_frame_drop == 0) {
framedrop_pattern = stream_info->framedrop_pattern;
framedrop_period = stream_info->framedrop_period;
}
if (stream_info->stream_type == BURST_STREAM &&
- stream_info->burst_frame_count == 0) {
+ stream_info->runtime_burst_frame_count == 0) {
framedrop_pattern = 0;
framedrop_period = 0;
}
@@ -622,7 +621,9 @@
break;
case PIX_ENCODER:
case PIX_VIEWFINDER:
- case RDI:
+ case RDI_INTF_0:
+ case RDI_INTF_1:
+ case RDI_INTF_2:
default:
pr_err("%s: Invalid stream source\n", __func__);
return;
@@ -707,6 +708,27 @@
}
}
+static void msm_vfe40_cfg_rdi_reg(
+ struct vfe_device *vfe_dev, struct msm_vfe_rdi_cfg *rdi_cfg,
+ enum msm_vfe_input_src input_src)
+{
+ uint8_t rdi = input_src - VFE_RAW_0;
+ uint32_t rdi_reg_cfg;
+ rdi_reg_cfg = msm_camera_io_r(
+ vfe_dev->vfe_base + VFE40_RDI_BASE(0));
+ rdi_reg_cfg &= ~(BIT(16 + rdi));
+ rdi_reg_cfg |= rdi_cfg->frame_based << (16 + rdi);
+ msm_camera_io_w(rdi_reg_cfg,
+ vfe_dev->vfe_base + VFE40_RDI_BASE(0));
+
+ rdi_reg_cfg = msm_camera_io_r(
+ vfe_dev->vfe_base + VFE40_RDI_BASE(rdi));
+ rdi_reg_cfg &= 0x70003;
+ rdi_reg_cfg |= (rdi * 3) << 28 | rdi_cfg->cid << 4 | 0x4;
+ msm_camera_io_w(
+ rdi_reg_cfg, vfe_dev->vfe_base + VFE40_RDI_BASE(rdi));
+}
+
static void msm_vfe40_axi_cfg_wm_reg(
struct vfe_device *vfe_dev,
struct msm_vfe_axi_stream_request_cmd *stream_cfg_cmd,
@@ -719,24 +741,37 @@
(stream_cfg_cmd->axi_stream_handle & 0xFF)];
uint32_t wm_base = VFE40_WM_BASE(stream_info->wm[plane_idx]);
- /*WR_IMAGE_SIZE*/
- val =
- ((msm_isp_cal_word_per_line(stream_cfg_cmd->output_format,
- stream_cfg_cmd->plane_cfg[plane_idx].
- output_width)+1)/2 - 1) << 16 |
- (stream_cfg_cmd->plane_cfg[plane_idx].
- output_height - 1);
- msm_camera_io_w(val, vfe_dev->vfe_base + wm_base + 0x14);
+ if (!stream_info->frame_based) {
+ /*WR_IMAGE_SIZE*/
+ val =
+ ((msm_isp_cal_word_per_line(
+ stream_cfg_cmd->output_format,
+ stream_cfg_cmd->plane_cfg[plane_idx].
+ output_width)+1)/2 - 1) << 16 |
+ (stream_cfg_cmd->plane_cfg[plane_idx].
+ output_height - 1);
+ msm_camera_io_w(val, vfe_dev->vfe_base + wm_base + 0x14);
- /*WR_BUFFER_CFG*/
- val =
- msm_isp_cal_word_per_line(stream_cfg_cmd->output_format,
- stream_cfg_cmd->plane_cfg[
- plane_idx].output_stride) << 16 |
- (stream_cfg_cmd->plane_cfg[
- plane_idx].output_height - 1) << 4 |
- VFE40_BURST_LEN;
- msm_camera_io_w(val, vfe_dev->vfe_base + wm_base + 0x18);
+ /*WR_BUFFER_CFG*/
+ val =
+ msm_isp_cal_word_per_line(stream_cfg_cmd->output_format,
+ stream_cfg_cmd->plane_cfg[
+ plane_idx].output_stride) << 16 |
+ (stream_cfg_cmd->plane_cfg[
+ plane_idx].output_height - 1) << 4 |
+ VFE40_BURST_LEN;
+ msm_camera_io_w(val, vfe_dev->vfe_base + wm_base + 0x18);
+ } else {
+ msm_camera_io_w(0x2, vfe_dev->vfe_base + wm_base);
+ val =
+ msm_isp_cal_word_per_line(stream_cfg_cmd->output_format,
+ stream_cfg_cmd->plane_cfg[
+ plane_idx].output_width) << 16 |
+ (stream_cfg_cmd->plane_cfg[
+ plane_idx].output_height - 1) << 4 |
+ VFE40_BURST_LEN;
+ msm_camera_io_w(val, vfe_dev->vfe_base + wm_base + 0x18);
+ }
/*WR_IRQ_SUBSAMPLE_PATTERN*/
msm_camera_io_w(0xFFFFFFFF,
@@ -762,40 +797,6 @@
return;
}
-static void msm_vfe40_axi_cfg_rdi_reg(
- struct vfe_device *vfe_dev,
- struct msm_vfe_axi_stream_request_cmd *stream_cfg_cmd,
- uint8_t plane_idx)
-{
- struct msm_vfe_axi_shared_data *axi_data =
- &vfe_dev->axi_data;
- struct msm_vfe_axi_stream *stream_info =
- &axi_data->stream_info[
- (stream_cfg_cmd->axi_stream_handle & 0xFF)];
- struct msm_vfe_axi_plane_cfg *plane_cfg =
- &stream_cfg_cmd->plane_cfg[plane_idx];
- uint8_t rdi = stream_info->rdi[plane_idx];
- uint8_t rdi_master = stream_info->rdi_master[plane_idx];
- uint32_t rdi_reg_cfg;
-
- rdi_reg_cfg = msm_camera_io_r(
- vfe_dev->vfe_base + VFE40_RDI_BASE(rdi));
- rdi_reg_cfg = (rdi_reg_cfg & 0xFFFFFFF) | rdi_master << 28;
- msm_camera_io_w(
- rdi_reg_cfg, vfe_dev->vfe_base + VFE40_RDI_BASE(rdi));
-
- rdi_reg_cfg = msm_camera_io_r(
- vfe_dev->vfe_base + VFE40_RDI_MN_BASE(rdi_master));
- rdi_reg_cfg &= ~((0xF << VFE40_RDI_MN_SEL_SHIFT(rdi_master)) |
- (0x1 << VFE40_RDI_MN_FB_SHIFT(rdi_master)));
- rdi_reg_cfg |=
- (plane_cfg->rdi_cid << VFE40_RDI_MN_SEL_SHIFT(rdi_master) |
- (stream_cfg_cmd->frame_base <<
- VFE40_RDI_MN_FB_SHIFT(rdi_master)));
- msm_camera_io_w(rdi_reg_cfg,
- vfe_dev->vfe_base + VFE40_RDI_MN_BASE(rdi_master));
-}
-
static void msm_vfe40_axi_cfg_wm_xbar_reg(
struct vfe_device *vfe_dev,
struct msm_vfe_axi_stream_request_cmd *stream_cfg_cmd,
@@ -837,13 +838,14 @@
case IDEAL_RAW:
xbar_cfg = 0x400;
break;
- case RDI:
- if (stream_info->rdi[plane_idx] == 0)
- xbar_cfg = 0x500;
- else if (stream_info->rdi[plane_idx] == 1)
- xbar_cfg = 0x600;
- else if (stream_info->rdi[plane_idx] == 2)
- xbar_cfg = 0x700;
+ case RDI_INTF_0:
+ xbar_cfg = 0x500;
+ break;
+ case RDI_INTF_1:
+ xbar_cfg = 0x600;
+ break;
+ case RDI_INTF_2:
+ xbar_cfg = 0x700;
break;
default:
pr_err("%s: Invalid stream src\n", __func__);
@@ -1063,8 +1065,8 @@
uint32_t ub_offset = VFE40_UB_SIZE;
uint32_t ub_size[VFE40_NUM_STATS_TYPE] = {
64, /*MSM_ISP_STATS_BE*/
- 64, /*MSM_ISP_STATS_BG*/
- 64, /*MSM_ISP_STATS_BF*/
+ 128, /*MSM_ISP_STATS_BG*/
+ 128, /*MSM_ISP_STATS_BF*/
16, /*MSM_ISP_STATS_AWB*/
8, /*MSM_ISP_STATS_RS*/
16, /*MSM_ISP_STATS_CS*/
@@ -1074,7 +1076,7 @@
for (i = 0; i < VFE40_NUM_STATS_TYPE; i++) {
ub_offset -= ub_size[i];
- msm_camera_io_w(VFE40_BURST_LEN << 30 |
+ msm_camera_io_w(VFE40_STATS_BURST_LEN << 30 |
ub_offset << 16 | (ub_size[i] - 1),
vfe_dev->vfe_base + VFE40_STATS_BASE(i) + 0xC);
}
@@ -1264,7 +1266,6 @@
.clear_wm_reg = msm_vfe40_axi_clear_wm_reg,
.cfg_wm_xbar_reg = msm_vfe40_axi_cfg_wm_xbar_reg,
.clear_wm_xbar_reg = msm_vfe40_axi_clear_wm_xbar_reg,
- .cfg_rdi_reg = msm_vfe40_axi_cfg_rdi_reg,
.cfg_ub = msm_vfe40_cfg_axi_ub,
.update_ping_pong_addr =
msm_vfe40_update_ping_pong_addr,
@@ -1277,6 +1278,7 @@
.reg_update = msm_vfe40_reg_update,
.cfg_camif = msm_vfe40_cfg_camif,
.update_camif_state = msm_vfe40_update_camif_state,
+ .cfg_rdi_reg = msm_vfe40_cfg_rdi_reg,
.reset_hw = msm_vfe40_reset_hardware,
.init_hw = msm_vfe40_init_hardware,
.init_hw_reg = msm_vfe40_init_hardware_reg,
diff --git a/drivers/media/platform/msm/camera_v2/isp/msm_isp_axi_util.c b/drivers/media/platform/msm/camera_v2/isp/msm_isp_axi_util.c
index ac3ce0a..66fe857 100644
--- a/drivers/media/platform/msm/camera_v2/isp/msm_isp_axi_util.c
+++ b/drivers/media/platform/msm/camera_v2/isp/msm_isp_axi_util.c
@@ -14,6 +14,10 @@
#include "msm_isp_util.h"
#include "msm_isp_axi_util.h"
+#define SRC_TO_INTF(src) \
+ ((src < RDI_INTF_0) ? VFE_PIX_0 : \
+ (VFE_RAW_0 + src - RDI_INTF_0))
+
int msm_isp_axi_create_stream(
struct msm_vfe_axi_shared_data *axi_data,
struct msm_vfe_axi_stream_request_cmd *stream_cfg_cmd)
@@ -78,6 +82,18 @@
case V4L2_PIX_FMT_SGBRG12:
case V4L2_PIX_FMT_SGRBG12:
case V4L2_PIX_FMT_SRGGB12:
+ case V4L2_PIX_FMT_QBGGR8:
+ case V4L2_PIX_FMT_QGBRG8:
+ case V4L2_PIX_FMT_QGRBG8:
+ case V4L2_PIX_FMT_QRGGB8:
+ case V4L2_PIX_FMT_QBGGR10:
+ case V4L2_PIX_FMT_QGBRG10:
+ case V4L2_PIX_FMT_QGRBG10:
+ case V4L2_PIX_FMT_QRGGB10:
+ case V4L2_PIX_FMT_QBGGR12:
+ case V4L2_PIX_FMT_QGBRG12:
+ case V4L2_PIX_FMT_QGRBG12:
+ case V4L2_PIX_FMT_QRGGB12:
stream_info->num_planes = 1;
break;
case V4L2_PIX_FMT_NV12:
@@ -103,14 +119,6 @@
return rc;
}
- if (stream_cfg_cmd->stream_src == RDI) {
- if (axi_data->hw_info->num_rdi -
- axi_data->num_used_rdi < stream_info->num_planes) {
- pr_err("%s: No free RDI\n", __func__);
- return rc;
- }
- }
-
if (stream_cfg_cmd->init_frame_drop >= MAX_INIT_FRAME_DROP) {
pr_err("%s: Invalid skip pattern\n", __func__);
return rc;
@@ -122,6 +130,7 @@
}
stream_info->stream_src = stream_cfg_cmd->stream_src;
+ stream_info->frame_based = stream_cfg_cmd->frame_base;
return 0;
}
@@ -135,6 +144,10 @@
case V4L2_PIX_FMT_SGBRG8:
case V4L2_PIX_FMT_SGRBG8:
case V4L2_PIX_FMT_SRGGB8:
+ case V4L2_PIX_FMT_QBGGR8:
+ case V4L2_PIX_FMT_QGBRG8:
+ case V4L2_PIX_FMT_QGRBG8:
+ case V4L2_PIX_FMT_QRGGB8:
size = plane_cfg[plane_idx].output_height *
plane_cfg[plane_idx].output_width;
break;
@@ -142,6 +155,10 @@
case V4L2_PIX_FMT_SGBRG10:
case V4L2_PIX_FMT_SGRBG10:
case V4L2_PIX_FMT_SRGGB10:
+ case V4L2_PIX_FMT_QBGGR10:
+ case V4L2_PIX_FMT_QGBRG10:
+ case V4L2_PIX_FMT_QGRBG10:
+ case V4L2_PIX_FMT_QRGGB10:
/* TODO: fix me */
size = plane_cfg[plane_idx].output_height *
plane_cfg[plane_idx].output_width;
@@ -150,6 +167,10 @@
case V4L2_PIX_FMT_SGBRG12:
case V4L2_PIX_FMT_SGRBG12:
case V4L2_PIX_FMT_SRGGB12:
+ case V4L2_PIX_FMT_QBGGR12:
+ case V4L2_PIX_FMT_QGBRG12:
+ case V4L2_PIX_FMT_QGRBG12:
+ case V4L2_PIX_FMT_QRGGB12:
/* TODO: fix me */
size = plane_cfg[plane_idx].output_height *
plane_cfg[plane_idx].output_width;
@@ -205,38 +226,6 @@
}
}
-void msm_isp_axi_reserve_rdi(struct msm_vfe_axi_shared_data *axi_data,
- struct msm_vfe_axi_stream_request_cmd *stream_cfg_cmd)
-{
- int i, j;
- struct msm_vfe_axi_stream *stream_info =
- &axi_data->stream_info[(stream_cfg_cmd->axi_stream_handle & 0xFF)];
-
- for (i = 0; i < stream_info->num_planes; i++) {
- uint8_t csid = stream_cfg_cmd->plane_cfg[i].csid_src;
-
- for (j = 0; j < axi_data->hw_info->num_rdi; j++) {
- if (!axi_data->free_rdi[j]) {
- axi_data->free_rdi[j] = 1;
- axi_data->num_used_rdi++;
- break;
- }
- }
- stream_info->rdi[i] = j;
-
- for (j = 0; j < axi_data->hw_info->num_rdi; j++) {
- if (!axi_data->free_rdi_master[csid][j]) {
- axi_data->free_rdi_master[csid][j] = 1;
- axi_data->num_used_rdi++;
- break;
- }
- }
- stream_info->rdi_master[i] =
- csid * axi_data->hw_info->num_rdi_master + j;
- }
- return;
-}
-
void msm_isp_axi_reserve_comp_mask(
struct msm_vfe_axi_shared_data *axi_data,
struct msm_vfe_axi_stream_request_cmd *stream_cfg_cmd)
@@ -277,8 +266,7 @@
struct vfe_device *vfe_dev,
struct msm_vfe_axi_stream_cfg_cmd *stream_cfg_cmd)
{
- int rc = 0, i, j;
- uint8_t src_state;
+ int rc = 0, i;
struct msm_vfe_axi_shared_data *axi_data = &vfe_dev->axi_data;
struct msm_vfe_axi_stream *stream_info;
enum msm_vfe_axi_state valid_state =
@@ -292,24 +280,6 @@
rc = -EINVAL;
break;
}
- /*
- * For RDI stream, if multiple RDIs are used
- * check if all the RDI srcs are in the same state, on/off
- */
- if (stream_info->stream_src == RDI) {
- src_state = axi_data->src_info[
- stream_info->rdi[0]+1].active;
- for (j = 0; j < stream_info->num_planes; j++) {
- if (src_state !=
- axi_data->src_info[
- stream_info->rdi[j]+1].active) {
- pr_err("%s: RDI stream has inconsistent state\n",
- __func__);
- rc = -EINVAL;
- break;
- }
- }
- }
if (stream_cfg_cmd->cmd == START_STREAM) {
stream_info->bufq_handle =
@@ -334,74 +304,46 @@
struct msm_vfe_axi_stream *stream_info;
for (i = 0; i < MAX_NUM_STREAM; i++) {
stream_info = &axi_data->stream_info[i];
- if (stream_info->framedrop_update) {
- if (stream_info->init_frame_drop == 0) {
- stream_info->framedrop_update = 0;
+ if (stream_info->state != ACTIVE)
+ continue;
+
+ if (stream_info->runtime_framedrop_update) {
+ stream_info->runtime_init_frame_drop--;
+ if (stream_info->runtime_init_frame_drop == 0) {
+ stream_info->runtime_framedrop_update = 0;
vfe_dev->hw_info->vfe_ops.axi_ops.
cfg_framedrop(vfe_dev, stream_info);
}
}
if (stream_info->stream_type == BURST_STREAM) {
- if (stream_info->burst_frame_count == 0 &&
- stream_info->state == ACTIVE) {
+ stream_info->runtime_burst_frame_count--;
+ if (stream_info->runtime_burst_frame_count == 0) {
vfe_dev->hw_info->vfe_ops.axi_ops.
cfg_framedrop(vfe_dev, stream_info);
- if (stream_info->stream_src == RDI) {
- uint32_t wm_reload_mask = 0,
- reg_update_mask = 0;
- stream_info->state = STOP_PENDING;
- msm_isp_axi_stream_enable_cfg(
- vfe_dev, stream_info,
- &wm_reload_mask,
- ®_update_mask);
- }
+ vfe_dev->hw_info->vfe_ops.core_ops.
+ reg_update(vfe_dev);
}
}
}
}
-void msm_isp_update_framedrop_count(
- struct vfe_device *vfe_dev)
+static void msm_isp_reset_framedrop(struct vfe_device *vfe_dev,
+ struct msm_vfe_axi_stream *stream_info)
{
- int i;
- struct msm_vfe_axi_shared_data *axi_data = &vfe_dev->axi_data;
- struct msm_vfe_axi_stream *stream_info;
- for (i = 0; i < MAX_NUM_STREAM; i++) {
- stream_info = &axi_data->stream_info[i];
- if (stream_info->framedrop_update) {
- stream_info->init_frame_drop--;
- if (stream_info->init_frame_drop == 1) {
- vfe_dev->hw_info->vfe_ops.core_ops.
- reg_update(vfe_dev, 0xF);
- }
- }
- if (stream_info->stream_type == BURST_STREAM) {
- stream_info->burst_frame_count--;
- if (stream_info->burst_frame_count == 1) {
- vfe_dev->hw_info->vfe_ops.core_ops.
- reg_update(vfe_dev, 0xF);
- } else if (stream_info->burst_frame_count == 0) {
- if (stream_info->stream_src != RDI) {
- vfe_dev->hw_info->vfe_ops.core_ops.
- update_camif_state(vfe_dev,
- DISABLE_CAMIF);
- pr_err("%s: pending burst_cnt = %d, disable camif\n",
- __func__,
- stream_info->burst_frame_count);
- }
- }
- }
- }
+ stream_info->runtime_init_frame_drop = stream_info->init_frame_drop;
+ stream_info->runtime_burst_frame_count =
+ stream_info->burst_frame_count;
+ stream_info->runtime_framedrop_update = stream_info->framedrop_update;
+ vfe_dev->hw_info->vfe_ops.axi_ops.cfg_framedrop(vfe_dev, stream_info);
}
void msm_isp_sof_notify(struct vfe_device *vfe_dev,
- enum msm_vfe_input_src frame_src, struct timeval *tv) {
+ enum msm_vfe_input_src frame_src, struct msm_isp_timestamp *ts) {
struct msm_isp_event_data sof_event;
switch (frame_src) {
case VFE_PIX_0:
ISP_DBG("%s: PIX0 frame id: %lu\n", __func__,
vfe_dev->axi_data.src_info[VFE_PIX_0].frame_id);
- msm_isp_update_framedrop_count(vfe_dev);
vfe_dev->axi_data.src_info[VFE_PIX_0].frame_id++;
if (vfe_dev->axi_data.src_info[VFE_PIX_0].frame_id == 0)
vfe_dev->axi_data.src_info[VFE_PIX_0].frame_id = 1;
@@ -409,6 +351,12 @@
case VFE_RAW_0:
case VFE_RAW_1:
case VFE_RAW_2:
+ ISP_DBG("%s: RDI%d frame id: %lu\n",
+ __func__, frame_src - VFE_RAW_0,
+ vfe_dev->axi_data.src_info[frame_src].frame_id);
+ vfe_dev->axi_data.src_info[frame_src].frame_id++;
+ if (vfe_dev->axi_data.src_info[frame_src].frame_id == 0)
+ vfe_dev->axi_data.src_info[frame_src].frame_id = 1;
break;
default:
pr_err("%s: invalid frame src %d received\n",
@@ -417,7 +365,7 @@
}
sof_event.frame_id = vfe_dev->axi_data.src_info[VFE_PIX_0].frame_id;
- sof_event.timestamp = *tv;
+ sof_event.timestamp = ts->event_time;
msm_isp_send_event(vfe_dev, ISP_EVENT_SOF, &sof_event);
}
@@ -501,13 +449,10 @@
return rc;
}
- msm_isp_axi_reserve_wm(&vfe_dev->axi_data, stream_cfg_cmd);
- if (stream_cfg_cmd->stream_src == RDI)
- msm_isp_axi_reserve_rdi(&vfe_dev->axi_data, stream_cfg_cmd);
-
stream_info =
&vfe_dev->axi_data.
stream_info[(stream_cfg_cmd->axi_stream_handle & 0xFF)];
+ msm_isp_axi_reserve_wm(&vfe_dev->axi_data, stream_cfg_cmd);
if (stream_cfg_cmd->stream_src == CAMIF_RAW ||
stream_cfg_cmd->stream_src == IDEAL_RAW)
@@ -515,7 +460,6 @@
cfg_io_format(vfe_dev, stream_cfg_cmd);
msm_isp_calculate_framedrop(&vfe_dev->axi_data, stream_cfg_cmd);
- vfe_dev->hw_info->vfe_ops.axi_ops.cfg_framedrop(vfe_dev, stream_info);
if (stream_info->num_planes > 1) {
msm_isp_axi_reserve_comp_mask(
@@ -531,12 +475,8 @@
vfe_dev->hw_info->vfe_ops.axi_ops.
cfg_wm_reg(vfe_dev, stream_cfg_cmd, i);
- vfe_dev->hw_info->vfe_ops.axi_ops.
- cfg_wm_xbar_reg(vfe_dev, stream_cfg_cmd, i);
-
- if (stream_cfg_cmd->stream_src == RDI)
vfe_dev->hw_info->vfe_ops.axi_ops.
- cfg_rdi_reg(vfe_dev, stream_cfg_cmd, i);
+ cfg_wm_xbar_reg(vfe_dev, stream_cfg_cmd, i);
}
return rc;
}
@@ -590,7 +530,7 @@
void msm_isp_axi_stream_enable_cfg(
struct vfe_device *vfe_dev,
struct msm_vfe_axi_stream *stream_info,
- uint32_t *wm_reload_mask, uint32_t *reg_update_mask)
+ uint32_t *wm_reload_mask)
{
int i;
struct msm_vfe_axi_shared_data *axi_data = &vfe_dev->axi_data;
@@ -605,10 +545,9 @@
vfe_dev->hw_info->vfe_ops.axi_ops.
enable_wm(vfe_dev, stream_info->wm[i], 0);
- *wm_reload_mask |= (1 << stream_info->wm[i]);
- if (stream_info->stream_src == RDI)
- *reg_update_mask |= (1 << stream_info->rdi[i]);
+ *wm_reload_mask |= (1 << stream_info->wm[i]);
}
+
if (stream_info->state == START_PENDING) {
axi_data->num_active_stream++;
stream_info->state = ACTIVE;
@@ -622,14 +561,14 @@
{
int i;
struct msm_vfe_axi_shared_data *axi_data = &vfe_dev->axi_data;
- uint32_t wm_reload_mask = 0x0, reg_update_mask = 0x1;
+ uint32_t wm_reload_mask = 0x0;
for (i = 0; i < MAX_NUM_STREAM; i++) {
if (axi_data->stream_info[i].state == START_PENDING ||
axi_data->stream_info[i].state ==
STOP_PENDING) {
msm_isp_axi_stream_enable_cfg(
vfe_dev, &axi_data->stream_info[i],
- &wm_reload_mask, ®_update_mask);
+ &wm_reload_mask);
if (axi_data->stream_info[i].state == STOP_PENDING)
axi_data->stream_info[i].state = STOPPING;
}
@@ -637,10 +576,8 @@
/*Reload AXI*/
vfe_dev->hw_info->vfe_ops.axi_ops.
reload_wm(vfe_dev, wm_reload_mask);
- /*Reg update per src*/
- vfe_dev->hw_info->vfe_ops.core_ops.
- reg_update(vfe_dev, reg_update_mask);
if (vfe_dev->axi_data.stream_update) {
+ vfe_dev->hw_info->vfe_ops.core_ops.reg_update(vfe_dev);
ISP_DBG("%s: send update complete\n", __func__);
vfe_dev->axi_data.stream_update = 0;
complete(&vfe_dev->stream_config_complete);
@@ -714,17 +651,20 @@
static void msm_isp_process_done_buf(struct vfe_device *vfe_dev,
struct msm_vfe_axi_stream *stream_info, struct msm_isp_buffer *buf,
- struct timeval *tv)
+ struct msm_isp_timestamp *ts)
{
struct msm_isp_event_data buf_event;
+ uint32_t stream_idx = stream_info->stream_handle & 0xFF;
uint32_t frame_id = vfe_dev->axi_data.
- src_info[stream_info->stream_src].frame_id;
- if (buf && tv) {
+ src_info[SRC_TO_INTF(stream_info->stream_src)].frame_id;
+
+ if (buf && ts) {
if (stream_info->buf_divert) {
vfe_dev->buf_mgr->ops->buf_divert(vfe_dev->buf_mgr,
- buf->bufq_handle, buf->buf_idx, tv, frame_id);
+ buf->bufq_handle, buf->buf_idx,
+ &ts->buf_time, frame_id);
buf_event.frame_id = frame_id;
- buf_event.timestamp = *tv;
+ buf_event.timestamp = ts->event_time;
buf_event.u.buf_done.session_id =
stream_info->session_id;
buf_event.u.buf_done.stream_id =
@@ -732,11 +672,12 @@
buf_event.u.buf_done.handle =
stream_info->bufq_handle;
buf_event.u.buf_done.buf_idx = buf->buf_idx;
- msm_isp_send_event(
- vfe_dev, ISP_EVENT_BUF_DIVERT, &buf_event);
+ msm_isp_send_event(vfe_dev, ISP_EVENT_BUF_DIVERT +
+ stream_idx, &buf_event);
} else {
vfe_dev->buf_mgr->ops->buf_done(vfe_dev->buf_mgr,
- buf->bufq_handle, buf->buf_idx, tv, frame_id);
+ buf->bufq_handle, buf->buf_idx,
+ &ts->buf_time, frame_id);
}
}
}
@@ -758,7 +699,7 @@
stream_info =
&axi_data->stream_info[
(stream_cfg_cmd->stream_handle[i] & 0xFF)];
- if (stream_info->stream_src != RDI)
+ if (stream_info->stream_src < RDI_INTF_0)
pix_stream_cnt++;
if (stream_info->stream_src == PIX_ENCODER ||
stream_info->stream_src == PIX_VIEWFINDER) {
@@ -830,7 +771,7 @@
{
int rc = 0, i;
struct msm_vfe_axi_stream_cfg_cmd *stream_cfg_cmd = arg;
- uint32_t wm_reload_mask = 0x0, reg_update_mask = 0x1;
+ uint32_t wm_reload_mask = 0x0;
struct msm_vfe_axi_stream *stream_info;
struct msm_vfe_axi_shared_data *axi_data = &vfe_dev->axi_data;
uint8_t src_state;
@@ -866,17 +807,19 @@
&axi_data->stream_info[
(stream_cfg_cmd->stream_handle[i] & 0xFF)];
- if (stream_info->stream_src == RDI)
- src_state =
- axi_data->src_info[
- stream_info->rdi[0]+1].active;
- else
+ if (stream_info->stream_src < RDI_INTF_0)
src_state = axi_data->src_info[0].active;
+ else
+ src_state = axi_data->src_info[
+ (stream_info->stream_src - RDI_INTF_0)].active;
stream_info->state = (stream_cfg_cmd->cmd == START_STREAM) ?
START_PENDING : STOP_PENDING;
if (stream_cfg_cmd->cmd == START_STREAM) {
+ /*Configure framedrop*/
+ msm_isp_reset_framedrop(vfe_dev, stream_info);
+
/*Set address for both PING & PONG register */
rc = msm_isp_cfg_ping_pong_address(vfe_dev,
stream_info, VFE_PONG_FLAG);
@@ -900,14 +843,13 @@
if (src_state && camif_update != DISABLE_CAMIF) {
/*On the fly stream start/stop */
wait_for_complete = 1;
- reg_update_mask = 0xF; /*TD: Maybe set this per src*/
} else {
- if (vfe_dev->dump_reg)
+ if (vfe_dev->dump_reg &&
+ stream_cfg_cmd->cmd == START_STREAM)
msm_camera_io_dump_2(vfe_dev->vfe_base, 0x900);
/*Configure AXI start bits to start immediately*/
msm_isp_axi_stream_enable_cfg(
- vfe_dev, stream_info,
- &wm_reload_mask, ®_update_mask);
+ vfe_dev, stream_info, &wm_reload_mask);
}
}
if (!wait_for_complete) {
@@ -915,9 +857,9 @@
if (stream_cfg_cmd->cmd == START_STREAM)
vfe_dev->hw_info->vfe_ops.axi_ops.
reload_wm(vfe_dev, wm_reload_mask);
- /*Reg update per src*/
+
vfe_dev->hw_info->vfe_ops.core_ops.
- reg_update(vfe_dev, reg_update_mask);
+ reg_update(vfe_dev);
if (camif_update == ENABLE_CAMIF)
vfe_dev->hw_info->vfe_ops.core_ops.
@@ -932,9 +874,7 @@
if (stream_cfg_cmd->cmd == START_STREAM)
vfe_dev->hw_info->vfe_ops.axi_ops.
reload_wm(vfe_dev, wm_reload_mask);
- /*Reg update per src*/
- vfe_dev->hw_info->vfe_ops.core_ops.
- reg_update(vfe_dev, reg_update_mask);
+ vfe_dev->hw_info->vfe_ops.core_ops.reg_update(vfe_dev);
rc = wait_for_completion_interruptible_timeout(
&vfe_dev->stream_config_complete,
msecs_to_jiffies(500));
@@ -980,7 +920,7 @@
void msm_isp_process_axi_irq(struct vfe_device *vfe_dev,
uint32_t irq_status0, uint32_t irq_status1,
- struct timeval *tv)
+ struct msm_isp_timestamp *ts)
{
int i, rc = 0;
struct msm_isp_buffer *done_buf = NULL;
@@ -1026,7 +966,7 @@
}
if (done_buf && !rc)
msm_isp_process_done_buf(vfe_dev,
- stream_info, done_buf, tv);
+ stream_info, done_buf, ts);
}
}
wm_mask &= ~(comp_info->stream_composite_mask);
@@ -1041,6 +981,9 @@
}
stream_idx = axi_data->free_wm[i] & 0xFF;
stream_info = &axi_data->stream_info[stream_idx];
+ ISP_DBG("%s: stream%d frame id: 0x%x\n",
+ __func__,
+ stream_idx, stream_info->frame_id);
stream_info->frame_id++;
msm_isp_get_done_buf(vfe_dev, stream_info,
pingpong_status, &done_buf);
@@ -1051,7 +994,7 @@
}
if (done_buf && !rc)
msm_isp_process_done_buf(vfe_dev,
- stream_info, done_buf, tv);
+ stream_info, done_buf, ts);
}
}
return;
diff --git a/drivers/media/platform/msm/camera_v2/isp/msm_isp_axi_util.h b/drivers/media/platform/msm/camera_v2/isp/msm_isp_axi_util.h
index 9765ae2..ba845bc 100644
--- a/drivers/media/platform/msm/camera_v2/isp/msm_isp_axi_util.h
+++ b/drivers/media/platform/msm/camera_v2/isp/msm_isp_axi_util.h
@@ -48,15 +48,14 @@
void msm_isp_axi_stream_enable_cfg(struct vfe_device *vfe_dev,
struct msm_vfe_axi_stream *stream_info,
- uint32_t *wm_reload_mask, uint32_t *reg_update_mask);
+ uint32_t *wm_reload_mask);
void msm_isp_axi_stream_update(struct vfe_device *vfe_dev);
void msm_isp_update_framedrop_reg(struct vfe_device *vfe_dev);
-void msm_isp_update_framedrop_count(struct vfe_device *vfe_dev);
void msm_isp_sof_notify(struct vfe_device *vfe_dev,
- enum msm_vfe_input_src frame_src, struct timeval *tv);
+ enum msm_vfe_input_src frame_src, struct msm_isp_timestamp *ts);
void msm_isp_process_axi_irq(struct vfe_device *vfe_dev,
uint32_t irq_status0, uint32_t irq_status1,
- struct timeval *tv);
+ struct msm_isp_timestamp *ts);
#endif /* __MSM_ISP_AXI_UTIL_H__ */
diff --git a/drivers/media/platform/msm/camera_v2/isp/msm_isp_stats_util.c b/drivers/media/platform/msm/camera_v2/isp/msm_isp_stats_util.c
index bf348d0..a29fe9c 100644
--- a/drivers/media/platform/msm/camera_v2/isp/msm_isp_stats_util.c
+++ b/drivers/media/platform/msm/camera_v2/isp/msm_isp_stats_util.c
@@ -58,7 +58,7 @@
void msm_isp_process_stats_irq(struct vfe_device *vfe_dev,
uint32_t irq_status0, uint32_t irq_status1,
- struct timeval *tv)
+ struct msm_isp_timestamp *ts)
{
int i;
struct msm_isp_event_data buf_event;
@@ -98,13 +98,17 @@
done_buf->buf_idx;
vfe_dev->buf_mgr->ops->buf_divert(vfe_dev->buf_mgr,
done_buf->bufq_handle, done_buf->buf_idx,
- tv, 0);
+ &ts->buf_time, vfe_dev->axi_data.
+ src_info[VFE_PIX_0].frame_id);
}
}
if (stats_event->stats_mask) {
- buf_event.timestamp = *tv;
- msm_isp_send_event(vfe_dev, ISP_EVENT_STATS_NOTIFY, &buf_event);
+ buf_event.timestamp = ts->event_time;
+ buf_event.frame_id =
+ vfe_dev->axi_data.src_info[VFE_PIX_0].frame_id;
+ msm_isp_send_event(vfe_dev, ISP_EVENT_STATS_NOTIFY +
+ stream_info->stats_type, &buf_event);
}
}
diff --git a/drivers/media/platform/msm/camera_v2/isp/msm_isp_stats_util.h b/drivers/media/platform/msm/camera_v2/isp/msm_isp_stats_util.h
index 2f51b7b..13e1fd6 100644
--- a/drivers/media/platform/msm/camera_v2/isp/msm_isp_stats_util.h
+++ b/drivers/media/platform/msm/camera_v2/isp/msm_isp_stats_util.h
@@ -17,7 +17,7 @@
void msm_isp_process_stats_irq(struct vfe_device *vfe_dev,
uint32_t irq_status0, uint32_t irq_status1,
- struct timeval *tv);
+ struct msm_isp_timestamp *ts);
int msm_isp_cfg_stats_stream(struct vfe_device *vfe_dev, void *arg);
int msm_isp_release_stats_stream(struct vfe_device *vfe_dev, void *arg);
int msm_isp_request_stats_stream(struct vfe_device *vfe_dev, void *arg);
diff --git a/drivers/media/platform/msm/camera_v2/isp/msm_isp_util.c b/drivers/media/platform/msm/camera_v2/isp/msm_isp_util.c
index e181b53..bbdfaa6 100644
--- a/drivers/media/platform/msm/camera_v2/isp/msm_isp_util.c
+++ b/drivers/media/platform/msm/camera_v2/isp/msm_isp_util.c
@@ -20,13 +20,13 @@
#define MAX_ISP_V4l2_EVENTS 100
-void msm_isp_gettimeofday(struct timeval *tv)
+static inline void msm_isp_get_timestamp(struct msm_isp_timestamp *time_stamp)
{
struct timespec ts;
-
ktime_get_ts(&ts);
- tv->tv_sec = ts.tv_sec;
- tv->tv_usec = ts.tv_nsec/1000;
+ time_stamp->buf_time.tv_sec = ts.tv_sec;
+ time_stamp->buf_time.tv_usec = ts.tv_nsec/1000;
+ do_gettimeofday(&(time_stamp->event_time));
}
int msm_isp_subscribe_event(struct v4l2_subdev *sd, struct v4l2_fh *fh,
@@ -81,6 +81,18 @@
return rc;
}
+int msm_isp_cfg_rdi(struct vfe_device *vfe_dev,
+ struct msm_vfe_rdi_cfg *rdi_cfg, enum msm_vfe_input_src input_src)
+{
+ int rc = 0;
+ /*TD Validate config info
+ * should check if all streams are off */
+
+ vfe_dev->hw_info->vfe_ops.core_ops.
+ cfg_rdi_reg(vfe_dev, rdi_cfg, input_src);
+ return rc;
+}
+
int msm_isp_cfg_input(struct vfe_device *vfe_dev, void *arg)
{
int rc = 0;
@@ -93,6 +105,9 @@
case VFE_RAW_0:
case VFE_RAW_1:
case VFE_RAW_2:
+ msm_isp_cfg_rdi(vfe_dev, &input_cfg->d.rdi_cfg,
+ input_cfg->input_src);
+ break;
case VFE_SRC_MAX:
break;
}
@@ -102,56 +117,59 @@
long msm_isp_ioctl(struct v4l2_subdev *sd,
unsigned int cmd, void *arg)
{
+ long rc = 0;
struct vfe_device *vfe_dev = v4l2_get_subdevdata(sd);
mutex_lock(&vfe_dev->mutex);
ISP_DBG("%s cmd: %d\n", __func__, cmd);
-
switch (cmd) {
case VIDIOC_MSM_VFE_REG_CFG: {
- msm_isp_proc_cmd(vfe_dev, arg);
+ rc = msm_isp_proc_cmd(vfe_dev, arg);
break;
}
case VIDIOC_MSM_ISP_REQUEST_BUF:
case VIDIOC_MSM_ISP_ENQUEUE_BUF:
case VIDIOC_MSM_ISP_RELEASE_BUF: {
- msm_isp_proc_buf_cmd(vfe_dev->buf_mgr, cmd, arg);
+ rc = msm_isp_proc_buf_cmd(vfe_dev->buf_mgr, cmd, arg);
break;
}
case VIDIOC_MSM_ISP_REQUEST_STREAM:
- msm_isp_request_axi_stream(vfe_dev, arg);
+ rc = msm_isp_request_axi_stream(vfe_dev, arg);
break;
case VIDIOC_MSM_ISP_RELEASE_STREAM:
- msm_isp_release_axi_stream(vfe_dev, arg);
+ rc = msm_isp_release_axi_stream(vfe_dev, arg);
break;
case VIDIOC_MSM_ISP_CFG_STREAM:
- msm_isp_cfg_axi_stream(vfe_dev, arg);
+ rc = msm_isp_cfg_axi_stream(vfe_dev, arg);
break;
case VIDIOC_MSM_ISP_INPUT_CFG:
- msm_isp_cfg_input(vfe_dev, arg);
+ rc = msm_isp_cfg_input(vfe_dev, arg);
break;
case VIDIOC_MSM_ISP_SET_SRC_STATE:
msm_isp_set_src_state(vfe_dev, arg);
break;
case VIDIOC_MSM_ISP_REQUEST_STATS_STREAM:
- msm_isp_request_stats_stream(vfe_dev, arg);
+ rc = msm_isp_request_stats_stream(vfe_dev, arg);
break;
case VIDIOC_MSM_ISP_RELEASE_STATS_STREAM:
- msm_isp_release_stats_stream(vfe_dev, arg);
+ rc = msm_isp_release_stats_stream(vfe_dev, arg);
break;
case VIDIOC_MSM_ISP_CFG_STATS_STREAM:
- msm_isp_cfg_stats_stream(vfe_dev, arg);
+ rc = msm_isp_cfg_stats_stream(vfe_dev, arg);
break;
case VIDIOC_MSM_ISP_CFG_STATS_COMP_POLICY:
- msm_isp_cfg_stats_comp_policy(vfe_dev, arg);
+ rc = msm_isp_cfg_stats_comp_policy(vfe_dev, arg);
break;
case VIDIOC_MSM_ISP_UPDATE_STREAM:
- msm_isp_update_axi_stream(vfe_dev, arg);
+ rc = msm_isp_update_axi_stream(vfe_dev, arg);
break;
+ default:
+ pr_err("%s: Invalid ISP command\n", __func__);
+ rc = -EINVAL;
}
mutex_unlock(&vfe_dev->mutex);
- return 0;
+ return rc;
}
static int msm_isp_send_hw_cmd(struct vfe_device *vfe_dev,
@@ -366,18 +384,34 @@
case V4L2_PIX_FMT_SGBRG8:
case V4L2_PIX_FMT_SGRBG8:
case V4L2_PIX_FMT_SRGGB8:
+ case V4L2_PIX_FMT_QBGGR8:
+ case V4L2_PIX_FMT_QGBRG8:
+ case V4L2_PIX_FMT_QGRBG8:
+ case V4L2_PIX_FMT_QRGGB8:
val = CAL_WORD(pixel_per_line, 1, 8);
break;
case V4L2_PIX_FMT_SBGGR10:
case V4L2_PIX_FMT_SGBRG10:
case V4L2_PIX_FMT_SGRBG10:
case V4L2_PIX_FMT_SRGGB10:
- val = CAL_WORD(pixel_per_line, 1, 6);
+ val = CAL_WORD(pixel_per_line, 5, 32);
break;
case V4L2_PIX_FMT_SBGGR12:
case V4L2_PIX_FMT_SGBRG12:
case V4L2_PIX_FMT_SGRBG12:
case V4L2_PIX_FMT_SRGGB12:
+ val = CAL_WORD(pixel_per_line, 3, 16);
+ break;
+ case V4L2_PIX_FMT_QBGGR10:
+ case V4L2_PIX_FMT_QGBRG10:
+ case V4L2_PIX_FMT_QGRBG10:
+ case V4L2_PIX_FMT_QRGGB10:
+ val = CAL_WORD(pixel_per_line, 1, 6);
+ break;
+ case V4L2_PIX_FMT_QBGGR12:
+ case V4L2_PIX_FMT_QGBRG12:
+ case V4L2_PIX_FMT_QGRBG12:
+ case V4L2_PIX_FMT_QRGGB12:
val = CAL_WORD(pixel_per_line, 1, 5);
break;
case V4L2_PIX_FMT_NV12:
@@ -399,16 +433,28 @@
case V4L2_PIX_FMT_SGBRG8:
case V4L2_PIX_FMT_SGRBG8:
case V4L2_PIX_FMT_SRGGB8:
+ case V4L2_PIX_FMT_QBGGR8:
+ case V4L2_PIX_FMT_QGBRG8:
+ case V4L2_PIX_FMT_QGRBG8:
+ case V4L2_PIX_FMT_QRGGB8:
return 8;
case V4L2_PIX_FMT_SBGGR10:
case V4L2_PIX_FMT_SGBRG10:
case V4L2_PIX_FMT_SGRBG10:
case V4L2_PIX_FMT_SRGGB10:
+ case V4L2_PIX_FMT_QBGGR10:
+ case V4L2_PIX_FMT_QGBRG10:
+ case V4L2_PIX_FMT_QGRBG10:
+ case V4L2_PIX_FMT_QRGGB10:
return 10;
case V4L2_PIX_FMT_SBGGR12:
case V4L2_PIX_FMT_SGBRG12:
case V4L2_PIX_FMT_SGRBG12:
case V4L2_PIX_FMT_SRGGB12:
+ case V4L2_PIX_FMT_QBGGR12:
+ case V4L2_PIX_FMT_QGBRG12:
+ case V4L2_PIX_FMT_QGRBG12:
+ case V4L2_PIX_FMT_QRGGB12:
return 12;
case V4L2_PIX_FMT_NV12:
case V4L2_PIX_FMT_NV21:
@@ -504,7 +550,7 @@
}
queue_cmd->vfeInterruptStatus0 = irq_status0;
queue_cmd->vfeInterruptStatus1 = irq_status1;
- msm_isp_gettimeofday(&queue_cmd->tv);
+ msm_isp_get_timestamp(&queue_cmd->ts);
queue_cmd->cmd_used = 1;
vfe_dev->taskletq_idx =
(vfe_dev->taskletq_idx + 1) % MSM_VFE_TASKLETQ_SIZE;
@@ -520,7 +566,7 @@
struct vfe_device *vfe_dev = (struct vfe_device *) data;
struct msm_vfe_irq_ops *irq_ops = &vfe_dev->hw_info->vfe_ops.irq_ops;
struct msm_vfe_tasklet_queue_cmd *queue_cmd;
- struct timeval tv;
+ struct msm_isp_timestamp ts;
uint32_t irq_status0, irq_status1;
while (atomic_read(&vfe_dev->irq_cnt)) {
spin_lock_irqsave(&vfe_dev->tasklet_lock, flags);
@@ -536,7 +582,7 @@
queue_cmd->cmd_used = 0;
irq_status0 = queue_cmd->vfeInterruptStatus0;
irq_status1 = queue_cmd->vfeInterruptStatus1;
- tv = queue_cmd->tv;
+ ts = queue_cmd->ts;
spin_unlock_irqrestore(&vfe_dev->tasklet_lock, flags);
ISP_DBG("%s: status0: 0x%x status1: 0x%x\n",
__func__, irq_status0, irq_status1);
@@ -545,13 +591,13 @@
irq_ops->process_halt_irq(vfe_dev,
irq_status0, irq_status1);
irq_ops->process_camif_irq(vfe_dev,
- irq_status0, irq_status1, &tv);
+ irq_status0, irq_status1, &ts);
irq_ops->process_axi_irq(vfe_dev,
- irq_status0, irq_status1, &tv);
+ irq_status0, irq_status1, &ts);
irq_ops->process_stats_irq(vfe_dev,
- irq_status0, irq_status1, &tv);
+ irq_status0, irq_status1, &ts);
irq_ops->process_reg_update(vfe_dev,
- irq_status0, irq_status1, &tv);
+ irq_status0, irq_status1, &ts);
msm_isp_process_error_info(vfe_dev);
}
}
diff --git a/drivers/media/platform/msm/camera_v2/isp/msm_isp_util.h b/drivers/media/platform/msm/camera_v2/isp/msm_isp_util.h
index 6c2a88c..3dac7e0 100644
--- a/drivers/media/platform/msm/camera_v2/isp/msm_isp_util.h
+++ b/drivers/media/platform/msm/camera_v2/isp/msm_isp_util.h
@@ -22,8 +22,6 @@
#define ISP_DBG(fmt, args...) pr_debug(fmt, ##args)
#endif
-void msm_isp_gettimeofday(struct timeval *tv);
-
int msm_isp_subscribe_event(struct v4l2_subdev *sd, struct v4l2_fh *fh,
struct v4l2_event_subscription *sub);
diff --git a/drivers/media/platform/msm/camera_v2/ispif/msm_ispif.c b/drivers/media/platform/msm/camera_v2/ispif/msm_ispif.c
index 50e685a..7d0f9cb 100644
--- a/drivers/media/platform/msm/camera_v2/ispif/msm_ispif.c
+++ b/drivers/media/platform/msm/camera_v2/ispif/msm_ispif.c
@@ -405,10 +405,10 @@
} else {
/* zero 2 bits */
ispif->applied_intf_cmd[vfe_intf].intf_cmd &=
- ~(0x3 << (vc * 2 + vfe_intf * 8));
+ ~(0x3 << (vc * 2 + intf_type * 8));
/* set cmd bits */
ispif->applied_intf_cmd[vfe_intf].intf_cmd |=
- (cmd_bits << (vc * 2 + vfe_intf * 8));
+ (cmd_bits << (vc * 2 + intf_type * 8));
}
}
}
diff --git a/drivers/media/platform/msm/camera_v2/pproc/cpp/msm_cpp.c b/drivers/media/platform/msm/camera_v2/pproc/cpp/msm_cpp.c
index 4b1b1c7..9f0ad19 100644
--- a/drivers/media/platform/msm/camera_v2/pproc/cpp/msm_cpp.c
+++ b/drivers/media/platform/msm/camera_v2/pproc/cpp/msm_cpp.c
@@ -122,6 +122,7 @@
CPP_DBG("Read failed\n");
tmp = 0xDEADBEEF;
}
+
return tmp;
}
@@ -207,6 +208,48 @@
return IRQ_HANDLED;
}
+static void msm_cpp_boot_hw(struct cpp_device *cpp_dev)
+{
+ disable_irq(cpp_dev->irq->start);
+
+ msm_camera_io_w(0x1, cpp_dev->base + MSM_CPP_MICRO_CLKEN_CTL);
+ msm_camera_io_w(0x1, cpp_dev->base +
+ MSM_CPP_MICRO_BOOT_START);
+ msm_cpp_poll(cpp_dev->base, MSM_CPP_MSG_ID_CMD);
+
+ /*Trigger MC to jump to start address*/
+ msm_cpp_write(MSM_CPP_CMD_EXEC_JUMP, cpp_dev->base);
+ msm_cpp_write(MSM_CPP_JUMP_ADDRESS, cpp_dev->base);
+
+ msm_cpp_poll(cpp_dev->base, MSM_CPP_MSG_ID_CMD);
+ msm_cpp_poll(cpp_dev->base, 0x1);
+ msm_cpp_poll(cpp_dev->base, MSM_CPP_MSG_ID_JUMP_ACK);
+ msm_cpp_poll(cpp_dev->base, MSM_CPP_MSG_ID_TRAILER);
+
+ /*Get Bootloader Version*/
+ msm_cpp_write(MSM_CPP_CMD_GET_BOOTLOADER_VER, cpp_dev->base);
+ pr_info("MC Bootloader Version: 0x%x\n",
+ msm_cpp_read(cpp_dev->base));
+
+ /*Get Firmware Version*/
+ msm_cpp_write(MSM_CPP_CMD_GET_FW_VER, cpp_dev->base);
+ msm_cpp_write(MSM_CPP_MSG_ID_CMD, cpp_dev->base);
+ msm_cpp_write(0x1, cpp_dev->base);
+ msm_cpp_write(MSM_CPP_CMD_GET_FW_VER, cpp_dev->base);
+ msm_cpp_write(MSM_CPP_MSG_ID_TRAILER, cpp_dev->base);
+
+ msm_cpp_poll(cpp_dev->base, MSM_CPP_MSG_ID_CMD);
+ msm_cpp_poll(cpp_dev->base, 0x2);
+ msm_cpp_poll(cpp_dev->base, MSM_CPP_MSG_ID_FW_VER);
+ pr_info("CPP FW Version: 0x%x\n", msm_cpp_read(cpp_dev->base));
+ msm_cpp_poll(cpp_dev->base, MSM_CPP_MSG_ID_TRAILER);
+ enable_irq(cpp_dev->irq->start);
+ msm_camera_io_w_mb(0x8, cpp_dev->base +
+ MSM_CPP_MICRO_IRQGEN_MASK);
+ msm_camera_io_w_mb(0xFFFF, cpp_dev->base +
+ MSM_CPP_MICRO_IRQGEN_CLR);
+}
+
static int cpp_init_hardware(struct cpp_device *cpp_dev)
{
int rc = 0;
@@ -261,7 +304,8 @@
}
msm_camera_io_w(0x1, cpp_dev->vbif_base + 0x4);
-
+ if (cpp_dev->is_firmware_loaded == 1)
+ msm_cpp_boot_hw(cpp_dev);
return rc;
req_irq_fail:
iounmap(cpp_dev->vbif_base);
@@ -365,6 +409,9 @@
pr_info("CPP FW Version: 0x%x\n", msm_cpp_read(cpp_dev->base));
msm_cpp_poll(cpp_dev->base, MSM_CPP_MSG_ID_TRAILER);
+ /*Disable MC clock*/
+ /*msm_camera_io_w(0x0, cpp_dev->base +
+ MSM_CPP_MICRO_CLKEN_CTL);*/
}
static int cpp_open_node(struct v4l2_subdev *sd, struct v4l2_subdev_fh *fh)
@@ -398,16 +445,6 @@
if (cpp_dev->cpp_open_cnt == 1) {
cpp_init_hardware(cpp_dev);
cpp_init_mem(cpp_dev);
- disable_irq(cpp_dev->irq->start);
-
- cpp_load_fw(cpp_dev);
-
- enable_irq(cpp_dev->irq->start);
-
- msm_camera_io_w_mb(0x8, cpp_dev->base +
- MSM_CPP_MICRO_IRQGEN_MASK);
- msm_camera_io_w_mb(0xFFFF, cpp_dev->base +
- MSM_CPP_MICRO_IRQGEN_CLR);
cpp_dev->state = CPP_STATE_IDLE;
}
mutex_unlock(&cpp_dev->mutex);
@@ -657,6 +694,15 @@
mutex_lock(&cpp_dev->mutex);
CPP_DBG("E cmd: %d\n", cmd);
switch (cmd) {
+ case VIDIOC_MSM_CPP_LOAD_FIRMWARE: {
+ if (cpp_dev->is_firmware_loaded == 0) {
+ disable_irq(cpp_dev->irq->start);
+ cpp_load_fw(cpp_dev);
+ enable_irq(cpp_dev->irq->start);
+ cpp_dev->is_firmware_loaded = 1;
+ }
+ break;
+ }
case VIDIOC_MSM_CPP_CFG:
rc = msm_cpp_cfg(cpp_dev, ioctl_ptr);
break;
@@ -899,6 +945,7 @@
msm_queue_init(&cpp_dev->realtime_q, "frame");
msm_queue_init(&cpp_dev->processing_q, "frame");
cpp_dev->cpp_open_cnt = 0;
+ cpp_dev->is_firmware_loaded = 0;
return rc;
diff --git a/drivers/media/platform/msm/camera_v2/pproc/cpp/msm_cpp.h b/drivers/media/platform/msm/camera_v2/pproc/cpp/msm_cpp.h
index 8deff72..e8e37ed 100644
--- a/drivers/media/platform/msm/camera_v2/pproc/cpp/msm_cpp.h
+++ b/drivers/media/platform/msm/camera_v2/pproc/cpp/msm_cpp.h
@@ -131,6 +131,7 @@
struct regulator *fs_cpp;
struct mutex mutex;
enum cpp_state state;
+ uint8_t is_firmware_loaded;
int domain_num;
struct iommu_domain *domain;
diff --git a/drivers/media/platform/msm/vidc/msm_smem.c b/drivers/media/platform/msm/vidc/msm_smem.c
index 8e2aa30..125c699 100644
--- a/drivers/media/platform/msm/vidc/msm_smem.c
+++ b/drivers/media/platform/msm/vidc/msm_smem.c
@@ -1,4 +1,4 @@
-/* Copyright (c) 2012, The Linux Foundation. All rights reserved.
+/* Copyright (c) 2012-2013, The Linux Foundation. All rights reserved.
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License version 2 and
@@ -26,7 +26,7 @@
unsigned long align, unsigned long *iova,
unsigned long *buffer_size, int flags)
{
- int rc;
+ int rc = 0;
if (!iova || !buffer_size || !hndl || !clnt) {
dprintk(VIDC_ERR, "Invalid params: %p, %p, %p, %p\n",
clnt, hndl, iova, buffer_size);
@@ -71,6 +71,7 @@
struct ion_handle *hndl;
unsigned long iova = 0;
unsigned long buffer_size = 0;
+ unsigned long ionflags = 0;
int rc = 0;
int align = SZ_4K;
hndl = ion_import_dma_buf(client->clnt, fd);
@@ -84,7 +85,20 @@
mem->domain = domain;
mem->partition_num = partition;
mem->flags = flags;
-
+ rc = ion_handle_get_flags(client->clnt, hndl, &ionflags);
+ if (rc) {
+ dprintk(VIDC_ERR, "Failed to get ion flags: %d\n", rc);
+ goto fail_map;
+ }
+ if (ION_IS_CACHED(ionflags)) {
+ mem->kvaddr = ion_map_kernel(client->clnt, hndl);
+ if (!mem->kvaddr) {
+ dprintk(VIDC_ERR,
+ "Failed to map shared mem in kernel\n");
+ rc = -EIO;
+ goto fail_map;
+ }
+ }
if (flags & SMEM_SECURE)
align = ALIGN(align, SZ_1M);
@@ -103,7 +117,9 @@
mem->device_addr, mem->size);
return rc;
fail_device_address:
- ion_unmap_kernel(client->clnt, hndl);
+ if (mem->kvaddr)
+ ion_unmap_kernel(client->clnt, hndl);
+fail_map:
ion_free(client->clnt, hndl);
fail_import_fd:
return rc;
@@ -243,31 +259,79 @@
return mem;
}
-static int ion_mem_clean_invalidate(struct smem_client *clt,
- struct msm_smem *mem)
+static int ion_cache_operations(struct smem_client *client,
+ struct msm_smem *mem, enum smem_cache_ops cache_op)
{
- /*
- * Note: We're always mapping into iommu as uncached
- * as a result we don't need to flush/clean anything
- */
- return 0;
+ unsigned long ionflag = 0;
+ int rc = 0;
+ int msm_cache_ops = 0;
+ if (!mem || !client) {
+ dprintk(VIDC_ERR, "Invalid params: %p, %p\n",
+ mem, client);
+ return -EINVAL;
+ }
+ rc = ion_handle_get_flags(client->clnt, mem->smem_priv,
+ &ionflag);
+ if (rc) {
+ dprintk(VIDC_ERR,
+ "ion_handle_get_flags failed: %d\n", rc);
+ goto cache_op_failed;
+ }
+ if (ION_IS_CACHED(ionflag)) {
+ switch (cache_op) {
+ case SMEM_CACHE_CLEAN:
+ msm_cache_ops = ION_IOC_CLEAN_CACHES;
+ break;
+ case SMEM_CACHE_INVALIDATE:
+ msm_cache_ops = ION_IOC_INV_CACHES;
+ break;
+ case SMEM_CACHE_CLEAN_INVALIDATE:
+ msm_cache_ops = ION_IOC_CLEAN_INV_CACHES;
+ break;
+ default:
+ dprintk(VIDC_ERR, "cache operation not supported\n");
+ rc = -EINVAL;
+ goto cache_op_failed;
+ }
+ if (mem->kvaddr) {
+ rc = msm_ion_do_cache_op(client->clnt,
+ (struct ion_handle *)mem->smem_priv,
+ (unsigned long *) mem->kvaddr,
+ (unsigned long)mem->size,
+ msm_cache_ops);
+ if (rc) {
+ dprintk(VIDC_ERR,
+ "cache operation failed %d\n", rc);
+ goto cache_op_failed;
+ }
+ } else {
+ dprintk(VIDC_WARN,
+ "cache operation failed as no kernel mapping\n");
+ }
+ }
+cache_op_failed:
+ return rc;
}
-int msm_smem_clean_invalidate(void *clt, struct msm_smem *mem)
+int msm_smem_cache_operations(void *clt, struct msm_smem *mem,
+ enum smem_cache_ops cache_op)
{
struct smem_client *client = clt;
- int rc;
- if (!client || !mem) {
- dprintk(VIDC_ERR, "Invalid client/handle passed\n");
+ int rc = 0;
+ if (!client) {
+ dprintk(VIDC_ERR, "Invalid params: %p\n",
+ client);
return -EINVAL;
}
switch (client->mem_type) {
case SMEM_ION:
- rc = ion_mem_clean_invalidate(client, mem);
+ rc = ion_cache_operations(client, mem, cache_op);
+ if (rc)
+ dprintk(VIDC_ERR,
+ "Failed cache operations: %d\n", rc);
break;
default:
dprintk(VIDC_ERR, "Mem type not supported\n");
- rc = -EINVAL;
break;
}
return rc;
diff --git a/drivers/media/platform/msm/vidc/msm_smem.h b/drivers/media/platform/msm/vidc/msm_smem.h
index 6e40bef..d1c8293 100644
--- a/drivers/media/platform/msm/vidc/msm_smem.h
+++ b/drivers/media/platform/msm/vidc/msm_smem.h
@@ -1,4 +1,4 @@
-/* Copyright (c) 2012, The Linux Foundation. All rights reserved.
+/* Copyright (c) 2012-2013, The Linux Foundation. All rights reserved.
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License version 2 and
@@ -37,6 +37,13 @@
void *smem_priv;
};
+enum smem_cache_ops {
+ SMEM_CACHE_CLEAN,
+ SMEM_CACHE_INVALIDATE,
+ SMEM_CACHE_CLEAN_INVALIDATE,
+};
+
+
void *msm_smem_new_client(enum smem_type mtype);
struct msm_smem *msm_smem_alloc(void *clt, size_t size, u32 align, u32 flags,
int domain, int partition, int map_kernel);
@@ -44,5 +51,6 @@
void msm_smem_delete_client(void *clt);
struct msm_smem *msm_smem_user_to_kernel(void *clt, int fd, u32 offset, int
domain, int partition, int flags);
-int msm_smem_clean_invalidate(void *clt, struct msm_smem *mem);
+int msm_smem_cache_operations(void *clt, struct msm_smem *mem,
+ enum smem_cache_ops);
#endif
diff --git a/drivers/media/platform/msm/vidc/msm_v4l2_vidc.c b/drivers/media/platform/msm/vidc/msm_v4l2_vidc.c
index 6480bf5..54047eb 100644
--- a/drivers/media/platform/msm/vidc/msm_v4l2_vidc.c
+++ b/drivers/media/platform/msm/vidc/msm_v4l2_vidc.c
@@ -181,10 +181,12 @@
err_invalid_input:
return ret;
}
-static u32 device_to_uvaddr(struct list_head *list, u32 device_addr)
+
+static struct buffer_info *device_to_uvaddr(
+ struct list_head *list, u32 device_addr)
{
- struct buffer_info *temp;
- u32 uvaddr = 0;
+ struct buffer_info *temp = NULL;
+ int found = 0;
int i;
if (!list || !device_addr) {
dprintk(VIDC_ERR, "Invalid input\n");
@@ -198,16 +200,16 @@
== device_addr) {
dprintk(VIDC_INFO,
"Found same fd buffer\n");
- uvaddr = temp->uvaddr[i];
+ found = 1;
break;
}
}
- if (uvaddr)
+ if (found)
break;
}
}
err_invalid_input:
- return uvaddr;
+ return temp;
}
static int msm_v4l2_open(struct file *filp)
@@ -544,9 +546,10 @@
b->m.planes[i].m.userptr = binfo->device_addr[i];
dprintk(VIDC_DBG, "Queueing device address = 0x%x\n",
binfo->device_addr[i]);
- if (binfo->handle[i]) {
- rc = msm_smem_clean_invalidate(v4l2_inst->mem_client,
- binfo->handle[i]);
+ if (binfo->handle[i] &&
+ (b->type == V4L2_BUF_TYPE_VIDEO_OUTPUT_MPLANE)) {
+ rc = msm_smem_cache_operations(v4l2_inst->mem_client,
+ binfo->handle[i], SMEM_CACHE_CLEAN);
if (rc) {
dprintk(VIDC_ERR,
"Failed to clean caches: %d\n", rc);
@@ -566,6 +569,7 @@
int i;
struct msm_v4l2_vid_inst *v4l2_inst;
struct msm_vidc_inst *vidc_inst = get_vidc_inst(file, fh);
+ struct buffer_info *buffer_info;
if (b->length > VIDEO_MAX_PLANES) {
dprintk(VIDC_ERR, "num planes exceed maximum: %d\n",
b->length);
@@ -585,9 +589,10 @@
!b->m.planes[i].m.userptr) {
continue;
}
- b->m.planes[i].m.userptr = device_to_uvaddr(
+ buffer_info = device_to_uvaddr(
&v4l2_inst->registered_bufs,
b->m.planes[i].m.userptr);
+ b->m.planes[i].m.userptr = buffer_info->uvaddr[i];
if (!b->m.planes[i].m.userptr) {
dprintk(VIDC_ERR,
"Failed to find user virtual address, 0x%lx, %d, %d\n",
@@ -595,6 +600,16 @@
rc = -EINVAL;
goto fail_dq_buf;
}
+ if (buffer_info->handle[i] &&
+ (b->type == V4L2_BUF_TYPE_VIDEO_CAPTURE_MPLANE)) {
+ rc = msm_smem_cache_operations(v4l2_inst->mem_client,
+ buffer_info->handle[i], SMEM_CACHE_INVALIDATE);
+ if (rc) {
+ dprintk(VIDC_ERR,
+ "Failed to clean caches: %d\n", rc);
+ goto fail_dq_buf;
+ }
+ }
}
fail_dq_buf:
return rc;
diff --git a/drivers/media/platform/msm/vidc/msm_venc.c b/drivers/media/platform/msm/vidc/msm_venc.c
index 12469a5..6402437 100644
--- a/drivers/media/platform/msm/vidc/msm_venc.c
+++ b/drivers/media/platform/msm/vidc/msm_venc.c
@@ -198,13 +198,13 @@
.type = V4L2_CTRL_TYPE_MENU,
.minimum = V4L2_MPEG_VIDEO_BITRATE_MODE_VBR,
.maximum = V4L2_MPEG_VIDEO_BITRATE_MODE_CBR,
- .default_value = V4L2_MPEG_VIDEO_BITRATE_MODE_CBR,
+ .default_value = V4L2_MPEG_VIDEO_BITRATE_MODE_VBR,
.step = 0,
.menu_skip_mask = ~(
(1 << V4L2_MPEG_VIDEO_BITRATE_MODE_VBR) |
(1 << V4L2_MPEG_VIDEO_BITRATE_MODE_CBR)
),
- .qmenu = mpeg_video_rate_control,
+ .qmenu = NULL,
.cluster = MSM_VENC_CTRL_CLUSTER_BITRATE,
},
{
@@ -913,7 +913,7 @@
case V4L2_MPEG_VIDEO_H264_LEVEL_4_2:
return HAL_H264_LEVEL_42;
case V4L2_MPEG_VIDEO_H264_LEVEL_5_0:
- return HAL_H264_LEVEL_3;
+ return HAL_H264_LEVEL_5;
case V4L2_MPEG_VIDEO_H264_LEVEL_5_1:
return HAL_H264_LEVEL_51;
default:
diff --git a/drivers/media/platform/msm/vidc/msm_vidc_common.c b/drivers/media/platform/msm/vidc/msm_vidc_common.c
index 9f5f5af..6a83334 100644
--- a/drivers/media/platform/msm/vidc/msm_vidc_common.c
+++ b/drivers/media/platform/msm/vidc/msm_vidc_common.c
@@ -362,9 +362,7 @@
struct msm_vidc_cb_cmd_done *response = data;
struct msm_vidc_inst *inst;
struct v4l2_event dqevent;
- struct v4l2_control control = {0};
struct msm_vidc_cb_event *event_notify;
- int rc = 0;
if (response) {
inst = (struct msm_vidc_inst *)response->session_id;
dqevent.id = 0;
@@ -372,16 +370,7 @@
switch (event_notify->hal_event_type) {
case HAL_EVENT_SEQ_CHANGED_SUFFICIENT_RESOURCES:
dqevent.type =
- V4L2_EVENT_SEQ_CHANGED_INSUFFICIENT;
- control.id =
- V4L2_CID_MPEG_VIDC_VIDEO_CONTINUE_DATA_TRANSFER;
- rc = v4l2_g_ctrl(&inst->ctrl_handler, &control);
- if (rc)
- dprintk(VIDC_WARN,
- "Failed to get Smooth streamng flag\n");
- if (!rc && control.value == true)
- dqevent.type =
- V4L2_EVENT_SEQ_CHANGED_SUFFICIENT;
+ V4L2_EVENT_SEQ_CHANGED_SUFFICIENT;
break;
case HAL_EVENT_SEQ_CHANGED_INSUFFICIENT_RESOURCES:
dqevent.type =
@@ -1929,6 +1918,12 @@
rc = -ENOMEM;
goto err_no_mem;
}
+ rc = msm_smem_cache_operations(inst->mem_client,
+ handle, SMEM_CACHE_CLEAN);
+ if (rc) {
+ dprintk(VIDC_WARN,
+ "Failed to clean cache may cause undefined behavior\n");
+ }
binfo = kzalloc(sizeof(*binfo), GFP_KERNEL);
if (!binfo) {
dprintk(VIDC_ERR, "Out of memory\n");
@@ -2014,6 +2009,12 @@
rc = -ENOMEM;
goto err_no_mem;
}
+ rc = msm_smem_cache_operations(inst->mem_client,
+ handle, SMEM_CACHE_CLEAN);
+ if (rc) {
+ dprintk(VIDC_WARN,
+ "Failed to clean cache may cause undefined behavior\n");
+ }
binfo = kzalloc(sizeof(*binfo), GFP_KERNEL);
if (!binfo) {
dprintk(VIDC_ERR, "Out of memory\n");
diff --git a/drivers/media/platform/msm/vidc/venus_hfi.c b/drivers/media/platform/msm/vidc/venus_hfi.c
index 80fc832..52150e9 100644
--- a/drivers/media/platform/msm/vidc/venus_hfi.c
+++ b/drivers/media/platform/msm/vidc/venus_hfi.c
@@ -353,20 +353,19 @@
rc = -ENOMEM;
goto fail_smem_alloc;
}
- rc = msm_smem_clean_invalidate(clnt, alloc);
- if (rc) {
- dprintk(VIDC_ERR, "NOTE: Failed to clean caches\n");
- goto fail_clean_cache;
- }
dprintk(VIDC_DBG, "venus_hfi_alloc:ptr=%p,size=%d",
alloc->kvaddr, size);
+ rc = msm_smem_cache_operations(clnt, alloc,
+ SMEM_CACHE_CLEAN);
+ if (rc) {
+ dprintk(VIDC_WARN, "Failed to clean cache\n");
+ dprintk(VIDC_WARN, "This may result in undefined behavior\n");
+ }
vmem->mem_size = alloc->size;
vmem->mem_data = alloc;
vmem->align_virtual_addr = (u8 *) alloc->kvaddr;
vmem->align_device_addr = (u8 *)alloc->device_addr;
return rc;
-fail_clean_cache:
- msm_smem_free(clnt, alloc);
fail_smem_alloc:
return rc;
}
@@ -2601,6 +2600,12 @@
return -EINVAL;
}
+ rc = venus_hfi_iommu_attach(device);
+ if (rc) {
+ dprintk(VIDC_ERR, "Failed to attach iommu");
+ goto fail_iommu_attach;
+ }
+
if (!device->resources.fw.cookie)
device->resources.fw.cookie = subsystem_get("venus");
@@ -2620,21 +2625,18 @@
rc = protect_cp_mem(device);
if (rc) {
dprintk(VIDC_ERR, "Failed to protect memory\n");
- goto fail_iommu_attach;
+ goto fail_protect_mem;
}
- rc = venus_hfi_iommu_attach(device);
- if (rc) {
- dprintk(VIDC_ERR, "Failed to attach iommu");
- goto fail_iommu_attach;
- }
return rc;
-fail_iommu_attach:
+fail_protect_mem:
venus_hfi_disable_clks(device);
fail_enable_clks:
subsystem_put(device->resources.fw.cookie);
device->resources.fw.cookie = NULL;
fail_load_fw:
+ venus_hfi_iommu_detach(device);
+fail_iommu_attach:
return rc;
}
@@ -2647,9 +2649,9 @@
return;
}
if (device->resources.fw.cookie) {
- venus_hfi_iommu_detach(device);
venus_hfi_disable_clks(device);
subsystem_put(device->resources.fw.cookie);
+ venus_hfi_iommu_detach(device);
device->resources.fw.cookie = NULL;
}
}
diff --git a/drivers/mfd/wcd9xxx-core.c b/drivers/mfd/wcd9xxx-core.c
index 4ea7013..6c60e04 100644
--- a/drivers/mfd/wcd9xxx-core.c
+++ b/drivers/mfd/wcd9xxx-core.c
@@ -59,12 +59,12 @@
};
static char *taiko_supplies[] = {
- "cdc-vdd-buck", "cdc-vdd-tx-h", "cdc-vdd-rx-h", "cdc-vddpx-1",
+ WCD9XXX_SUPPLY_BUCK_NAME, "cdc-vdd-tx-h", "cdc-vdd-rx-h", "cdc-vddpx-1",
"cdc-vdd-a-1p2v", "cdc-vddcx-1", "cdc-vddcx-2",
};
static char *tapan_supplies[] = {
- "cdc-vdd-buck", "cdc-vdd-h", "cdc-vdd-px",
+ WCD9XXX_SUPPLY_BUCK_NAME, "cdc-vdd-h", "cdc-vdd-px",
"cdc-vdd-a-1p2v", "cdc-vdd-cx"
};
diff --git a/drivers/power/pm8921-bms.c b/drivers/power/pm8921-bms.c
index 82d58ef..13e23e8 100644
--- a/drivers/power/pm8921-bms.c
+++ b/drivers/power/pm8921-bms.c
@@ -136,6 +136,7 @@
int amux_2_trim_delta;
uint16_t prev_last_good_ocv_raw;
int rconn_mohm;
+ int rbatt_capacitive_mohm;
struct mutex last_ocv_uv_mutex;
int last_ocv_uv;
int last_ocv_temp_decidegc;
@@ -847,8 +848,8 @@
{
int ibat_ua, vbat_uv, ocv_est_uv;
int rc;
-
- int rbatt_mohm = chip->default_rbatt_mohm + chip->rconn_mohm;
+ int rbatt_mohm = chip->default_rbatt_mohm + chip->rconn_mohm
+ + chip->rbatt_capacitive_mohm;
rc = pm8921_bms_get_simultaneous_battery_voltage_and_current(
&ibat_ua,
@@ -917,7 +918,10 @@
rc = pm8921_bms_get_simultaneous_battery_voltage_and_current(
&ibat_ua,
&vbat_uv);
-
+ /*
+ * don't include rbatt and rbatt_capacitve since we expect this to
+ * be used with a fake battery which does not have internal resistnaces
+ */
ocv_est_uv = vbat_uv + (ibat_ua * the_chip->rconn_mohm) / 1000;
pr_debug("forcing ocv to be %d due to bms reset mode\n", ocv_est_uv);
the_chip->last_ocv_uv = ocv_est_uv;
@@ -1072,6 +1076,10 @@
pr_debug("adding rconn_mohm = %d rbatt = %d\n",
the_chip->rconn_mohm, rbatt);
+ rbatt += the_chip->rbatt_capacitive_mohm;
+ pr_debug("adding rbatt_capacitive_mohm = %d rbatt = %d\n",
+ the_chip->rbatt_capacitive_mohm, rbatt);
+
if (is_between(20, 10, soc_rbatt))
rbatt = rbatt
+ ((20 - soc_rbatt) * chip->delta_rbatt_mohm) / 10;
@@ -1583,6 +1591,8 @@
}
EXPORT_SYMBOL(pm8921_bms_get_simultaneous_battery_voltage_and_current);
+#define SIGN(x) ((x) < 0 ? -1 : 1)
+
static void find_ocv_for_soc(struct pm8921_bms_chip *chip,
int batt_temp,
int chargecycles,
@@ -1597,7 +1607,6 @@
int pc, new_pc;
int batt_temp_degc = batt_temp / 10;
int ocv;
- int count = 0;
rc = (s64)shutdown_soc * (fcc_uah - uuc_uah);
rc = div_s64(rc, 100) + cc_uah + uuc_uah;
@@ -1611,17 +1620,55 @@
new_pc = interpolate_pc(chip->pc_temp_ocv_lut, batt_temp_degc, ocv);
pr_debug("test revlookup pc = %d for ocv = %d\n", new_pc, ocv);
- /* try 10 times to get a close enough pc */
- while (abs(new_pc - pc) > 1 && count++ < 10) {
+ if (abs(new_pc - pc) > 0) {
+ /* Maximum spins to make in while-loop when searching in
+ * full resolution.
+ */
+ const unsigned int max_spin_count =
+ chip->max_voltage_uv / 1000 - chip->v_cutoff + 1;
+ unsigned int count = 0;
int delta_mv = 5;
+ int diff = abs(new_pc - pc);
+ char sign = SIGN(new_pc - pc);
+ char old_sign;
+ int old_diff;
+ int old_ocv;
- if (new_pc > pc)
- delta_mv = -1 * delta_mv;
+ do {
+ count++;
+ old_ocv = ocv;
+ old_diff = diff;
+ old_sign = sign;
- ocv = ocv + delta_mv;
- new_pc = interpolate_pc(chip->pc_temp_ocv_lut,
- batt_temp_degc, ocv);
- pr_debug("test revlookup pc = %d for ocv = %d\n", new_pc, ocv);
+ if (new_pc > pc)
+ ocv -= delta_mv;
+ else
+ ocv += delta_mv;
+
+ new_pc = interpolate_pc(chip->pc_temp_ocv_lut,
+ batt_temp_degc, ocv);
+ pr_debug("test revlookup pc = %d for ocv = %d\n",
+ new_pc, ocv);
+ diff = abs(new_pc - pc);
+ sign = SIGN(new_pc - pc);
+
+ if (sign != old_sign) {
+ if (delta_mv == 5) {
+ /*
+ * we crossed our desired PC probably
+ * becuase we were overcorrecting
+ */
+ delta_mv = 1;
+ } else {
+ /* we crossed our desired PC even with
+ * 1mV steps, choose the best of two */
+ if (diff > old_diff)
+ ocv = old_ocv;
+
+ break;
+ }
+ }
+ } while (count <= max_spin_count && diff > 0);
}
*ocv_uv = ocv * 1000;
@@ -2869,6 +2916,8 @@
chip->default_rbatt_mohm
= palladium_1500_data.default_rbatt_mohm;
chip->delta_rbatt_mohm = palladium_1500_data.delta_rbatt_mohm;
+ chip->rbatt_capacitive_mohm
+ = palladium_1500_data.rbatt_capacitive_mohm;
return 0;
desay:
chip->fcc = desay_5200_data.fcc;
@@ -2878,6 +2927,8 @@
chip->rbatt_sf_lut = desay_5200_data.rbatt_sf_lut;
chip->default_rbatt_mohm = desay_5200_data.default_rbatt_mohm;
chip->delta_rbatt_mohm = desay_5200_data.delta_rbatt_mohm;
+ chip->rbatt_capacitive_mohm
+ = desay_5200_data.rbatt_capacitive_mohm;
return 0;
}
@@ -3008,9 +3059,9 @@
int ret = 0;
struct pm8921_soc_params raw;
- mutex_lock(&the_chip->bms_output_lock);
+ mutex_lock(&the_chip->last_ocv_uv_mutex);
read_soc_params_raw(the_chip, &raw, 300);
- mutex_unlock(&the_chip->bms_output_lock);
+ mutex_lock(&the_chip->last_ocv_uv_mutex);
*val = 0;
diff --git a/drivers/power/pm8921-charger.c b/drivers/power/pm8921-charger.c
index b3fd5bc..f87a443 100644
--- a/drivers/power/pm8921-charger.c
+++ b/drivers/power/pm8921-charger.c
@@ -295,6 +295,7 @@
bool btc_panic_if_cant_stop_chg;
int stop_chg_upon_expiry;
bool disable_aicl;
+ int usb_type;
};
/* user space parameter to limit usb current */
@@ -1561,7 +1562,7 @@
return 0;
}
- type = the_chip->usb_psy.type;
+ type = the_chip->usb_type;
if (type == POWER_SUPPLY_TYPE_USB_DCP ||
type == POWER_SUPPLY_TYPE_USB_ACA ||
type == POWER_SUPPLY_TYPE_USB_CDP)
@@ -1694,7 +1695,7 @@
case POWER_SUPPLY_PROP_ONLINE:
val->intval = 0;
- if (the_chip->usb_psy.type == POWER_SUPPLY_TYPE_USB)
+ if (the_chip->usb_type == POWER_SUPPLY_TYPE_USB)
val->intval = is_usb_chg_plugged_in(the_chip);
break;
@@ -2360,7 +2361,7 @@
if (type < POWER_SUPPLY_TYPE_USB && type > POWER_SUPPLY_TYPE_BATTERY)
return -EINVAL;
- the_chip->usb_psy.type = type;
+ the_chip->usb_type = type;
power_supply_changed(&the_chip->usb_psy);
power_supply_changed(&the_chip->dc_psy);
return 0;
@@ -4902,6 +4903,7 @@
pm8921_chg_btc_override_init(chip);
chip->stop_chg_upon_expiry = pdata->stop_chg_upon_expiry;
+ chip->usb_type = POWER_SUPPLY_TYPE_UNKNOWN;
chip->usb_psy.name = "usb";
chip->usb_psy.type = POWER_SUPPLY_TYPE_USB;
@@ -4948,9 +4950,6 @@
platform_set_drvdata(pdev, chip);
the_chip = chip;
- /* set initial state of the USB charger type to UNKNOWN */
- power_supply_set_supply_type(&chip->usb_psy, POWER_SUPPLY_TYPE_UNKNOWN);
-
wake_lock_init(&chip->eoc_wake_lock, WAKE_LOCK_SUSPEND, "pm8921_eoc");
INIT_DELAYED_WORK(&chip->eoc_work, eoc_worker);
INIT_DELAYED_WORK(&chip->vin_collapse_check_work,
diff --git a/drivers/spi/spi_qsd.c b/drivers/spi/spi_qsd.c
index 6135e71..7f60128 100644
--- a/drivers/spi/spi_qsd.c
+++ b/drivers/spi/spi_qsd.c
@@ -2375,7 +2375,7 @@
of_property_read_u32(node, "spi-max-frequency",
&pdata->max_clock_speed);
- of_property_read_u32(node, "infinite_mode",
+ of_property_read_u32(node, "qcom,infinite-mode",
&pdata->infinite_mode);
pdata->ver_reg_exists = of_property_read_bool(node
@@ -2485,13 +2485,12 @@
goto err_probe_exit;
}
- rc = of_property_read_u32(pdev->dev.of_node,
- "cell-index", &pdev->id);
- if (rc)
+ rc = of_alias_get_id(pdev->dev.of_node, "spi");
+ if (rc < 0)
dev_warn(&pdev->dev,
"using default bus_num %d\n", pdev->id);
else
- master->bus_num = pdev->id;
+ master->bus_num = pdev->id = rc;
for (i = 0; i < ARRAY_SIZE(spi_rsrcs); ++i) {
dd->spi_gpios[i] = of_get_gpio_flags(pdev->dev.of_node,
diff --git a/drivers/usb/gadget/android.c b/drivers/usb/gadget/android.c
index 6df0c96..76d75ea 100644
--- a/drivers/usb/gadget/android.c
+++ b/drivers/usb/gadget/android.c
@@ -60,6 +60,7 @@
#include "u_smd.c"
#include "u_bam.c"
#include "u_rmnet_ctrl_smd.c"
+#include "u_rmnet_ctrl_qti.c"
#include "u_ctrl_hsic.c"
#include "u_data_hsic.c"
#include "u_ctrl_hsuart.c"
diff --git a/drivers/usb/gadget/f_mbim.c b/drivers/usb/gadget/f_mbim.c
index 935a540..d69e850 100644
--- a/drivers/usb/gadget/f_mbim.c
+++ b/drivers/usb/gadget/f_mbim.c
@@ -224,6 +224,16 @@
.bmNetworkCapabilities = 0x20,
};
+static struct usb_cdc_ext_mbb_desc ext_mbb_desc = {
+ .bLength = sizeof ext_mbb_desc,
+ .bDescriptorType = USB_DT_CS_INTERFACE,
+ .bDescriptorSubType = USB_CDC_EXT_MBB_TYPE,
+
+ .bcdMbbExtendedVersion = cpu_to_le16(0x0100),
+ .bMaxOutstandingCmdMsges = 64,
+ .wMTU = 1500,
+};
+
/* the default data interface has no endpoints ... */
static struct usb_interface_descriptor mbim_data_nop_intf = {
.bLength = sizeof mbim_data_nop_intf,
@@ -286,6 +296,7 @@
(struct usb_descriptor_header *) &mbim_control_intf,
(struct usb_descriptor_header *) &mbim_header_desc,
(struct usb_descriptor_header *) &mbb_desc,
+ (struct usb_descriptor_header *) &ext_mbb_desc,
(struct usb_descriptor_header *) &fs_mbim_notify_desc,
/* data interface, altsettings 0 and 1 */
(struct usb_descriptor_header *) &mbim_data_nop_intf,
@@ -330,6 +341,7 @@
(struct usb_descriptor_header *) &mbim_control_intf,
(struct usb_descriptor_header *) &mbim_header_desc,
(struct usb_descriptor_header *) &mbb_desc,
+ (struct usb_descriptor_header *) &ext_mbb_desc,
(struct usb_descriptor_header *) &hs_mbim_notify_desc,
/* data interface, altsettings 0 and 1 */
(struct usb_descriptor_header *) &mbim_data_nop_intf,
diff --git a/drivers/usb/gadget/f_rmnet.c b/drivers/usb/gadget/f_rmnet.c
index e6613e8..0d8fa0f 100644
--- a/drivers/usb/gadget/f_rmnet.c
+++ b/drivers/usb/gadget/f_rmnet.c
@@ -55,6 +55,7 @@
#define NR_RMNET_PORTS 3
static unsigned int nr_rmnet_ports;
static unsigned int no_ctrl_smd_ports;
+static unsigned int no_ctrl_qti_ports;
static unsigned int no_ctrl_hsic_ports;
static unsigned int no_ctrl_hsuart_ports;
static unsigned int no_data_bam_ports;
@@ -402,6 +403,14 @@
return ret;
}
break;
+ case USB_GADGET_XPORT_QTI:
+ ret = gqti_ctrl_connect(&dev->port);
+ if (ret) {
+ pr_err("%s: gqti_ctrl_connect failed: err:%d\n",
+ __func__, ret);
+ return ret;
+ }
+ break;
case USB_GADGET_XPORT_HSIC:
ret = ghsic_ctrl_connect(&dev->port, port_num);
if (ret) {
@@ -436,7 +445,10 @@
if (ret) {
pr_err("%s: gbam_connect failed: err:%d\n",
__func__, ret);
- gsmd_ctrl_disconnect(&dev->port, port_num);
+ if (cxport == USB_GADGET_XPORT_QTI)
+ gqti_ctrl_disconnect(&dev->port);
+ else
+ gsmd_ctrl_disconnect(&dev->port, port_num);
return ret;
}
break;
@@ -484,6 +496,9 @@
case USB_GADGET_XPORT_SMD:
gsmd_ctrl_disconnect(&dev->port, port_num);
break;
+ case USB_GADGET_XPORT_QTI:
+ gqti_ctrl_disconnect(&dev->port);
+ break;
case USB_GADGET_XPORT_HSIC:
ghsic_ctrl_disconnect(&dev->port, port_num);
break;
@@ -1170,6 +1185,7 @@
nr_rmnet_ports = 0;
no_ctrl_smd_ports = 0;
+ no_ctrl_qti_ports = 0;
no_data_bam_ports = 0;
no_data_bam2bam_ports = 0;
no_ctrl_hsic_ports = 0;
@@ -1215,6 +1231,10 @@
rmnet_port->ctrl_xport_num = no_ctrl_smd_ports;
no_ctrl_smd_ports++;
break;
+ case USB_GADGET_XPORT_QTI:
+ rmnet_port->ctrl_xport_num = no_ctrl_qti_ports;
+ no_ctrl_qti_ports++;
+ break;
case USB_GADGET_XPORT_HSIC:
rmnet_port->ctrl_xport_num = no_ctrl_hsic_ports;
no_ctrl_hsic_ports++;
@@ -1268,6 +1288,7 @@
nr_rmnet_ports = 0;
no_ctrl_smd_ports = 0;
+ no_ctrl_qti_ports = 0;
no_data_bam_ports = 0;
no_ctrl_hsic_ports = 0;
no_data_hsic_ports = 0;
diff --git a/drivers/usb/gadget/u_rmnet.h b/drivers/usb/gadget/u_rmnet.h
index 81ba223..cea9369 100644
--- a/drivers/usb/gadget/u_rmnet.h
+++ b/drivers/usb/gadget/u_rmnet.h
@@ -1,4 +1,4 @@
-/* Copyright (c) 2011-2012, The Linux Foundation. All rights reserved.
+/* Copyright (c) 2011-2013, The Linux Foundation. All rights reserved.
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License version 2 and
@@ -55,5 +55,7 @@
int gsmd_ctrl_connect(struct grmnet *gr, int port_num);
void gsmd_ctrl_disconnect(struct grmnet *gr, u8 port_num);
int gsmd_ctrl_setup(unsigned int count);
+int gqti_ctrl_connect(struct grmnet *gr);
+void gqti_ctrl_disconnect(struct grmnet *gr);
#endif /* __U_RMNET_H*/
diff --git a/drivers/usb/gadget/u_rmnet_ctrl_qti.c b/drivers/usb/gadget/u_rmnet_ctrl_qti.c
new file mode 100644
index 0000000..e92978f
--- /dev/null
+++ b/drivers/usb/gadget/u_rmnet_ctrl_qti.c
@@ -0,0 +1,519 @@
+/*
+ * Copyright (c) 2013, The Linux Foundation. All rights reserved.
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License version 2 and
+ * only version 2 as published by the Free Software Foundation.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ */
+
+#include <linux/wait.h>
+#include <linux/poll.h>
+#include <linux/usb/rmnet_ctrl_qti.h>
+
+#include "u_rmnet.h"
+
+struct rmnet_ctrl_qti_port {
+ struct grmnet *port_usb;
+
+ bool is_open;
+
+ atomic_t connected;
+ atomic_t line_state;
+
+ atomic_t open_excl;
+ atomic_t read_excl;
+ atomic_t write_excl;
+ atomic_t ioctl_excl;
+
+ wait_queue_head_t read_wq;
+
+ struct list_head cpkt_req_q;
+
+ spinlock_t lock;
+};
+static struct rmnet_ctrl_qti_port *ctrl_port;
+
+static inline int rmnet_ctrl_lock(atomic_t *excl)
+{
+ if (atomic_inc_return(excl) == 1) {
+ return 0;
+ } else {
+ atomic_dec(excl);
+ return -EBUSY;
+ }
+}
+
+static inline void rmnet_ctrl_unlock(atomic_t *excl)
+{
+ atomic_dec(excl);
+}
+
+static void rmnet_ctrl_queue_notify(struct rmnet_ctrl_qti_port *port)
+{
+ unsigned long flags;
+ struct rmnet_ctrl_pkt *cpkt = NULL;
+
+ pr_debug("%s: Queue empty packet for QTI", __func__);
+
+ spin_lock_irqsave(&port->lock, flags);
+ if (!port->is_open) {
+ pr_err("%s: rmnet ctrl file handler %p is not open",
+ __func__, port);
+ spin_unlock_irqrestore(&port->lock, flags);
+ return;
+ }
+
+ cpkt = alloc_rmnet_ctrl_pkt(0, GFP_ATOMIC);
+ if (!cpkt) {
+ pr_err("%s: Unable to allocate reset function pkt\n", __func__);
+ spin_unlock_irqrestore(&port->lock, flags);
+ return;
+ }
+
+ list_add_tail(&cpkt->list, &port->cpkt_req_q);
+ spin_unlock_irqrestore(&port->lock, flags);
+
+ pr_debug("%s: Wake up read queue", __func__);
+ wake_up(&port->read_wq);
+}
+
+static int grmnet_ctrl_qti_send_cpkt_tomodem(u8 portno,
+ void *buf, size_t len)
+{
+ unsigned long flags;
+ struct rmnet_ctrl_qti_port *port = ctrl_port;
+ struct rmnet_ctrl_pkt *cpkt;
+
+ if (len > MAX_QTI_PKT_SIZE) {
+ pr_err("given pkt size too big:%d > max_pkt_size:%d\n",
+ len, MAX_QTI_PKT_SIZE);
+ return -EINVAL;
+ }
+
+ cpkt = alloc_rmnet_ctrl_pkt(len, GFP_ATOMIC);
+ if (IS_ERR(cpkt)) {
+ pr_err("%s: Unable to allocate ctrl pkt\n", __func__);
+ return -ENOMEM;
+ }
+
+ memcpy(cpkt->buf, buf, len);
+ cpkt->len = len;
+
+ pr_debug("%s: Add to cpkt_req_q packet with len = %d\n", __func__, len);
+ spin_lock_irqsave(&port->lock, flags);
+
+ /* drop cpkt if port is not open */
+ if (!port->is_open) {
+ pr_err("rmnet file handler %p is not open", port);
+ spin_unlock_irqrestore(&port->lock, flags);
+ free_rmnet_ctrl_pkt(cpkt);
+ return 0;
+ }
+
+ list_add_tail(&cpkt->list, &port->cpkt_req_q);
+ spin_unlock_irqrestore(&port->lock, flags);
+
+ /* wakeup read thread */
+ pr_debug("%s: Wake up read queue", __func__);
+ wake_up(&port->read_wq);
+
+ return 0;
+}
+
+static void
+gqti_ctrl_notify_modem(void *gptr, u8 portno, int val)
+{
+ struct rmnet_ctrl_qti_port *port = ctrl_port;
+
+ atomic_set(&port->line_state, val);
+
+ /* send 0 len pkt to qti to notify state change */
+ rmnet_ctrl_queue_notify(port);
+}
+
+int gqti_ctrl_connect(struct grmnet *gr)
+{
+ struct rmnet_ctrl_qti_port *port;
+ unsigned long flags;
+
+ pr_debug("%s: grmnet:%p\n", __func__, gr);
+
+ if (!gr) {
+ pr_err("%s: grmnet port is null\n", __func__);
+ return -ENODEV;
+ }
+
+ port = ctrl_port;
+
+ spin_lock_irqsave(&port->lock, flags);
+ port->port_usb = gr;
+ gr->send_encap_cmd = grmnet_ctrl_qti_send_cpkt_tomodem;
+ gr->notify_modem = gqti_ctrl_notify_modem;
+ spin_unlock_irqrestore(&port->lock, flags);
+
+ atomic_set(&port->connected, 1);
+ wake_up(&port->read_wq);
+
+ if (port && port->port_usb && port->port_usb->connect)
+ port->port_usb->connect(port->port_usb);
+
+ return 0;
+}
+
+void gqti_ctrl_disconnect(struct grmnet *gr)
+{
+ struct rmnet_ctrl_qti_port *port = ctrl_port;
+ unsigned long flags;
+ struct rmnet_ctrl_pkt *cpkt;
+
+ pr_debug("%s: grmnet:%p\n", __func__, gr);
+
+ if (!gr) {
+ pr_err("%s: grmnet port is null\n", __func__);
+ return;
+ }
+
+ if (port && port->port_usb && port->port_usb->disconnect)
+ port->port_usb->disconnect(port->port_usb);
+
+ atomic_set(&port->connected, 0);
+ atomic_set(&port->line_state, 0);
+ spin_lock_irqsave(&port->lock, flags);
+ port->port_usb = 0;
+ gr->send_encap_cmd = 0;
+ gr->notify_modem = 0;
+
+ while (!list_empty(&port->cpkt_req_q)) {
+ cpkt = list_first_entry(&port->cpkt_req_q,
+ struct rmnet_ctrl_pkt, list);
+
+ list_del(&cpkt->list);
+ free_rmnet_ctrl_pkt(cpkt);
+ }
+
+ spin_unlock_irqrestore(&port->lock, flags);
+
+ /* send 0 len pkt to qti to notify state change */
+ rmnet_ctrl_queue_notify(port);
+}
+
+static int rmnet_ctrl_open(struct inode *ip, struct file *fp)
+{
+ unsigned long flags;
+
+ pr_debug("Open rmnet_ctrl_qti device file\n");
+
+ if (rmnet_ctrl_lock(&ctrl_port->open_excl)) {
+ pr_debug("Already opened\n");
+ return -EBUSY;
+ }
+
+ fp->private_data = ctrl_port;
+
+ spin_lock_irqsave(&ctrl_port->lock, flags);
+ ctrl_port->is_open = true;
+ spin_unlock_irqrestore(&ctrl_port->lock, flags);
+
+ return 0;
+}
+
+static int rmnet_ctrl_release(struct inode *ip, struct file *fp)
+{
+ unsigned long flags;
+ struct rmnet_ctrl_qti_port *port = fp->private_data;
+
+ pr_debug("Close rmnet control file");
+
+ spin_lock_irqsave(&port->lock, flags);
+ port->is_open = false;
+ spin_unlock_irqrestore(&port->lock, flags);
+
+ rmnet_ctrl_unlock(&port->open_excl);
+
+ return 0;
+}
+
+static ssize_t
+rmnet_ctrl_read(struct file *fp, char __user *buf, size_t count, loff_t *pos)
+{
+ struct rmnet_ctrl_qti_port *port = fp->private_data;
+ struct rmnet_ctrl_pkt *cpkt = NULL;
+ unsigned long flags;
+ int ret = 0;
+
+ pr_debug("%s: Enter(%d)\n", __func__, count);
+
+ if (count > MAX_QTI_PKT_SIZE) {
+ pr_err("Buffer size is too big %d, should be at most %d\n",
+ count, MAX_QTI_PKT_SIZE);
+ return -EINVAL;
+ }
+
+ if (rmnet_ctrl_lock(&port->read_excl)) {
+ pr_err("Previous reading is not finished yet\n");
+ return -EBUSY;
+ }
+
+ /* block until online */
+ while (!(atomic_read(&port->connected))) {
+ pr_debug("Not connected. Wait.\n");
+ ret = wait_event_interruptible(port->read_wq,
+ atomic_read(&port->connected));
+ if (ret < 0) {
+ rmnet_ctrl_unlock(&port->read_excl);
+ if (ret == -ERESTARTSYS)
+ return -ERESTARTSYS;
+ else
+ return -EINTR;
+ }
+ }
+
+ /* block until a new packet is available */
+ do {
+ spin_lock_irqsave(&port->lock, flags);
+ if (!list_empty(&port->cpkt_req_q))
+ break;
+ spin_unlock_irqrestore(&port->lock, flags);
+
+ pr_debug("%s: Requests list is empty. Wait.\n", __func__);
+ ret = wait_event_interruptible(port->read_wq,
+ !list_empty(&port->cpkt_req_q));
+ if (ret < 0) {
+ pr_debug("Waiting failed\n");
+ rmnet_ctrl_unlock(&port->read_excl);
+ return -ERESTARTSYS;
+ }
+ } while (1);
+
+ cpkt = list_first_entry(&port->cpkt_req_q, struct rmnet_ctrl_pkt,
+ list);
+ list_del(&cpkt->list);
+ spin_unlock_irqrestore(&port->lock, flags);
+
+ if (cpkt->len > count) {
+ pr_err("cpkt size too big:%d > buf size:%d\n",
+ cpkt->len, count);
+ rmnet_ctrl_unlock(&port->read_excl);
+ free_rmnet_ctrl_pkt(cpkt);
+ return -ENOMEM;
+ }
+
+ pr_debug("%s: cpkt size:%d\n", __func__, cpkt->len);
+
+
+ rmnet_ctrl_unlock(&port->read_excl);
+
+ ret = copy_to_user(buf, cpkt->buf, cpkt->len);
+ if (ret) {
+ pr_err("copy_to_user failed: err %d\n", ret);
+ ret = -EFAULT;
+ } else {
+ pr_debug("%s: copied %d bytes to user\n", __func__, cpkt->len);
+ ret = cpkt->len;
+ }
+
+ free_rmnet_ctrl_pkt(cpkt);
+
+ return ret;
+}
+
+static ssize_t
+rmnet_ctrl_write(struct file *fp, const char __user *buf, size_t count,
+ loff_t *pos)
+{
+ struct rmnet_ctrl_qti_port *port = fp->private_data;
+ void *kbuf;
+ unsigned long flags;
+ int ret = 0;
+
+ pr_debug("%s: Enter(%d)", __func__, count);
+
+ if (!count) {
+ pr_debug("zero length ctrl pkt\n");
+ return -EINVAL;
+ }
+
+ if (count > MAX_QTI_PKT_SIZE) {
+ pr_debug("given pkt size too big:%d > max_pkt_size:%d\n",
+ count, MAX_QTI_PKT_SIZE);
+ return -EINVAL;
+ }
+
+ if (rmnet_ctrl_lock(&port->write_excl)) {
+ pr_err("Previous writing not finished yet\n");
+ return -EBUSY;
+ }
+
+ if (!atomic_read(&port->connected)) {
+ pr_debug("USB cable not connected\n");
+ rmnet_ctrl_unlock(&port->write_excl);
+ return -EPIPE;
+ }
+
+ kbuf = kmalloc(count, GFP_KERNEL);
+ if (!kbuf) {
+ pr_err("failed to allocate ctrl pkt\n");
+ rmnet_ctrl_unlock(&port->write_excl);
+ return -ENOMEM;
+ }
+ ret = copy_from_user(kbuf, buf, count);
+ if (ret) {
+ pr_err("copy_from_user failed err:%d\n", ret);
+ kfree(kbuf);
+ rmnet_ctrl_unlock(&port->write_excl);
+ return -EFAULT;
+ }
+
+ spin_lock_irqsave(&port->lock, flags);
+ if (port->port_usb && port->port_usb->send_cpkt_response) {
+ ret = port->port_usb->send_cpkt_response(port->port_usb,
+ kbuf, count);
+ if (ret) {
+ pr_err("failed to send ctrl packet. error=%d\n", ret);
+ spin_unlock_irqrestore(&port->lock, flags);
+ kfree(kbuf);
+ rmnet_ctrl_unlock(&port->write_excl);
+ return ret;
+ }
+ } else {
+ pr_err("send_cpkt_response callback is NULL\n");
+ spin_unlock_irqrestore(&port->lock, flags);
+ kfree(kbuf);
+ rmnet_ctrl_unlock(&port->write_excl);
+ return -EINVAL;
+ }
+ spin_unlock_irqrestore(&port->lock, flags);
+
+ kfree(kbuf);
+ rmnet_ctrl_unlock(&port->write_excl);
+
+ pr_debug("%s: Exit(%d)", __func__, count);
+
+ return count;
+
+}
+
+static long rmnet_ctrl_ioctl(struct file *fp, unsigned cmd, unsigned long arg)
+{
+ struct rmnet_ctrl_qti_port *port = fp->private_data;
+ int val, ret = 0;
+
+ pr_debug("%s: Received command %d", __func__, cmd);
+
+ if (rmnet_ctrl_lock(&port->ioctl_excl))
+ return -EBUSY;
+
+ switch (cmd) {
+ case FRMNET_CTRL_GET_LINE_STATE:
+ val = atomic_read(&port->line_state);
+ ret = copy_to_user((void __user *)arg, &val, sizeof(val));
+ if (ret) {
+ pr_err("copying to user space failed");
+ ret = -EFAULT;
+ }
+ pr_debug("%s: Sent line_state: %d", __func__,
+ atomic_read(&port->line_state));
+ break;
+ default:
+ pr_err("wrong parameter");
+ ret = -EINVAL;
+ }
+
+ rmnet_ctrl_unlock(&port->ioctl_excl);
+
+ return ret;
+}
+
+static unsigned int rmnet_ctrl_poll(struct file *file, poll_table *wait)
+{
+ struct rmnet_ctrl_qti_port *port = file->private_data;
+ unsigned long flags;
+ unsigned int mask = 0;
+
+ if (!port) {
+ pr_err("%s on a NULL device\n", __func__);
+ return POLLERR;
+ }
+
+ poll_wait(file, &port->read_wq, wait);
+
+ spin_lock_irqsave(&port->lock, flags);
+ if (!list_empty(&port->cpkt_req_q)) {
+ mask |= POLLIN | POLLRDNORM;
+ pr_debug("%s sets POLLIN for rmnet_ctrl_qti_port\n", __func__);
+ }
+ spin_unlock_irqrestore(&port->lock, flags);
+
+ return mask;
+}
+
+/* file operations for rmnet device /dev/rmnet_ctrl */
+static const struct file_operations rmnet_ctrl_fops = {
+ .owner = THIS_MODULE,
+ .open = rmnet_ctrl_open,
+ .release = rmnet_ctrl_release,
+ .read = rmnet_ctrl_read,
+ .write = rmnet_ctrl_write,
+ .unlocked_ioctl = rmnet_ctrl_ioctl,
+ .poll = rmnet_ctrl_poll,
+};
+
+static struct miscdevice rmnet_device = {
+ .minor = MISC_DYNAMIC_MINOR,
+ .name = "rmnet_ctrl",
+ .fops = &rmnet_ctrl_fops,
+};
+
+static int __init gqti_ctrl_init(void)
+{
+ int ret;
+ struct rmnet_ctrl_qti_port *port = NULL;
+
+ port = kzalloc(sizeof(struct rmnet_ctrl_qti_port), GFP_KERNEL);
+ if (!port) {
+ pr_err("Failed to allocate rmnet control device\n");
+ return -ENOMEM;
+ }
+
+ INIT_LIST_HEAD(&port->cpkt_req_q);
+ spin_lock_init(&port->lock);
+
+ atomic_set(&port->open_excl, 0);
+ atomic_set(&port->read_excl, 0);
+ atomic_set(&port->write_excl, 0);
+ atomic_set(&port->ioctl_excl, 0);
+ atomic_set(&port->connected, 0);
+ atomic_set(&port->line_state, 0);
+
+ init_waitqueue_head(&port->read_wq);
+
+ ctrl_port = port;
+
+ ret = misc_register(&rmnet_device);
+ if (ret) {
+ pr_err("rmnet control driver failed to register");
+ goto fail_init;
+ }
+
+ return ret;
+
+fail_init:
+ kfree(port);
+ ctrl_port = NULL;
+ return ret;
+}
+module_init(gqti_ctrl_init);
+
+static void __exit gqti_ctrl_cleanup(void)
+{
+ misc_deregister(&rmnet_device);
+
+ kfree(ctrl_port);
+ ctrl_port = NULL;
+}
+module_exit(gqti_ctrl_cleanup);
diff --git a/drivers/usb/host/ehci-hub.c b/drivers/usb/host/ehci-hub.c
index 24f3cb1..a09b1ab 100644
--- a/drivers/usb/host/ehci-hub.c
+++ b/drivers/usb/host/ehci-hub.c
@@ -842,7 +842,7 @@
u32 __iomem *status_reg = &ehci->regs->port_status[
(wIndex & 0xff) - 1];
u32 __iomem *hostpc_reg = NULL;
- u32 temp, temp1, status, cmd = 0;
+ u32 temp, temp1, status;
unsigned long flags;
int retval = 0;
unsigned selector;
@@ -1221,31 +1221,13 @@
ehci->reset_done [wIndex] = jiffies
+ msecs_to_jiffies (50);
}
-
- if (ehci->reset_sof_bug && (temp & PORT_RESET)) {
- cmd = ehci_readl(ehci, &ehci->regs->command);
- cmd &= ~CMD_RUN;
- ehci_writel(ehci, cmd, &ehci->regs->command);
- if (handshake(ehci, &ehci->regs->status,
- STS_HALT, STS_HALT, 16 * 125))
- ehci_info(ehci,
- "controller halt failed\n");
- }
- ehci_writel(ehci, temp, status_reg);
- if (ehci->reset_sof_bug && (temp & PORT_RESET)
- && hcd->driver->enable_ulpi_control) {
- hcd->driver->enable_ulpi_control(hcd,
- PORT_RESET);
+ if (ehci->reset_sof_bug && (temp & PORT_RESET) &&
+ hcd->driver->reset_sof_bug_handler) {
spin_unlock_irqrestore(&ehci->lock, flags);
- usleep_range(50000, 55000);
- if (handshake(ehci, status_reg,
- PORT_RESET, 0, 10 * 1000))
- ehci_info(ehci,
- "failed to clear reset\n");
+ hcd->driver->reset_sof_bug_handler(hcd, temp);
spin_lock_irqsave(&ehci->lock, flags);
- hcd->driver->disable_ulpi_control(hcd);
- cmd |= CMD_RUN;
- ehci_writel(ehci, cmd, &ehci->regs->command);
+ } else {
+ ehci_writel(ehci, temp, status_reg);
}
break;
diff --git a/drivers/usb/host/ehci-msm-hsic.c b/drivers/usb/host/ehci-msm-hsic.c
index 3ec158b..8e32aa9 100644
--- a/drivers/usb/host/ehci-msm-hsic.c
+++ b/drivers/usb/host/ehci-msm-hsic.c
@@ -101,6 +101,8 @@
struct completion rt_completion;
int resume_status;
int resume_again;
+ int bus_reset;
+ int reset_again;
struct pm_qos_request pm_qos_req_dma;
};
@@ -430,7 +432,7 @@
}
-static int ulpi_read(struct msm_hsic_hcd *mehci, u32 reg)
+static int __maybe_unused ulpi_read(struct msm_hsic_hcd *mehci, u32 reg)
{
struct usb_hcd *hcd = hsic_to_hcd(mehci);
int cnt = 0;
@@ -501,37 +503,6 @@
return 0;
}
-#define HSIC_DBG1 0X38
-#define ULPI_MANUAL_ENABLE BIT(4)
-#define ULPI_LINESTATE_DATA BIT(5)
-#define ULPI_LINESTATE_STROBE BIT(6)
-static void ehci_msm_enable_ulpi_control(struct usb_hcd *hcd, u32 linestate)
-{
- struct msm_hsic_hcd *mehci = hcd_to_hsic(hcd);
- int val;
-
- switch (linestate) {
- case PORT_RESET:
- val = ulpi_read(mehci, HSIC_DBG1);
- val |= ULPI_MANUAL_ENABLE;
- val &= ~(ULPI_LINESTATE_DATA | ULPI_LINESTATE_STROBE);
- ulpi_write(mehci, val, HSIC_DBG1);
- break;
- default:
- pr_info("%s: Unknown linestate:%0x\n", __func__, linestate);
- }
-}
-
-static void ehci_msm_disable_ulpi_control(struct usb_hcd *hcd)
-{
- struct msm_hsic_hcd *mehci = hcd_to_hsic(hcd);
- int val;
-
- val = ulpi_read(mehci, HSIC_DBG1);
- val &= ~ULPI_MANUAL_ENABLE;
- ulpi_write(mehci, val, HSIC_DBG1);
-}
-
static int msm_hsic_config_gpios(struct msm_hsic_hcd *mehci, int gpio_en)
{
int rc = 0;
@@ -834,7 +805,7 @@
wake_unlock(&mehci->wlock);
- dev_info(mehci->dev, "HSIC-USB in low power mode\n");
+ dev_dbg(mehci->dev, "HSIC-USB in low power mode\n");
return 0;
}
@@ -936,7 +907,7 @@
}
enable_irq(hcd->irq);
- dev_info(mehci->dev, "HSIC-USB exited from low power mode\n");
+ dev_dbg(mehci->dev, "HSIC-USB exited from low power mode\n");
return 0;
}
@@ -955,6 +926,26 @@
__func__, ret);
}
+static int msm_hsic_reset_done(struct usb_hcd *hcd)
+{
+ struct ehci_hcd *ehci = hcd_to_ehci(hcd);
+ u32 __iomem *status_reg = &ehci->regs->port_status[0];
+ int ret;
+
+ ehci_writel(ehci, ehci_readl(ehci, status_reg) & ~(PORT_RWC_BITS |
+ PORT_RESET), status_reg);
+
+ ret = handshake(ehci, status_reg, PORT_RESET, 0, 1 * 1000);
+
+ if (ret)
+ pr_err("reset handshake failed in %s\n", __func__);
+ else
+ ehci_writel(ehci, ehci_readl(ehci, &ehci->regs->command) |
+ CMD_RUN, &ehci->regs->command);
+
+ return ret;
+}
+
#define STS_GPTIMER0_INTERRUPT BIT(24)
static irqreturn_t msm_hsic_irq(struct usb_hcd *hcd)
{
@@ -982,16 +973,28 @@
if (status & STS_GPTIMER0_INTERRUPT) {
int timeleft;
- dbg_log_event(NULL, "FPR: gpt0_isr", 0);
+ dbg_log_event(NULL, "FPR: gpt0_isr", mehci->bus_reset);
timeleft = GPT_CNT(ehci_readl(ehci,
&mehci->timer->gptimer1_ctrl));
if (timeleft) {
- ehci_writel(ehci, ehci_readl(ehci,
- &ehci->regs->command) | CMD_RUN,
- &ehci->regs->command);
- } else
- mehci->resume_again = 1;
+ if (mehci->bus_reset) {
+ ret = msm_hsic_reset_done(hcd);
+ if (ret) {
+ mehci->reset_again = 1;
+ dbg_log_event(NULL, "RESET: fail", 0);
+ }
+ } else {
+ ehci_writel(ehci, ehci_readl(ehci,
+ &ehci->regs->command) | CMD_RUN,
+ &ehci->regs->command);
+ }
+ } else {
+ if (mehci->bus_reset)
+ mehci->reset_again = 1;
+ else
+ mehci->resume_again = 1;
+ }
dbg_log_event(NULL, "FPR: timeleft", timeleft);
@@ -1047,6 +1050,83 @@
#ifdef CONFIG_PM
+#define RESET_RETRY_LIMIT 3
+#define RESET_SIGNAL_TIME_SOF_USEC (50 * 1000)
+#define RESET_SIGNAL_TIME_USEC (20 * 1000)
+static void ehci_hsic_reset_sof_bug_handler(struct usb_hcd *hcd, u32 val)
+{
+ struct ehci_hcd *ehci = hcd_to_ehci(hcd);
+ struct msm_hsic_hcd *mehci = hcd_to_hsic(hcd);
+ struct msm_hsic_host_platform_data *pdata = mehci->dev->platform_data;
+ u32 __iomem *status_reg = &ehci->regs->port_status[0];
+ unsigned long flags;
+ int retries = 0, ret, cnt = RESET_SIGNAL_TIME_USEC;
+
+ if (pdata && pdata->swfi_latency)
+ pm_qos_update_request(&mehci->pm_qos_req_dma,
+ pdata->swfi_latency + 1);
+
+ mehci->bus_reset = 1;
+retry:
+ retries++;
+ dbg_log_event(NULL, "RESET: start", retries);
+ pr_debug("reset begin %d\n", retries);
+ mehci->reset_again = 0;
+ spin_lock_irqsave(&ehci->lock, flags);
+ ehci_writel(ehci, val, status_reg);
+ ehci_writel(ehci, GPT_LD(RESET_SIGNAL_TIME_USEC - 1),
+ &mehci->timer->gptimer0_ld);
+ ehci_writel(ehci, GPT_RESET | GPT_RUN,
+ &mehci->timer->gptimer0_ctrl);
+ ehci_writel(ehci, INTR_MASK | STS_GPTIMER0_INTERRUPT,
+ &ehci->regs->intr_enable);
+
+ ehci_writel(ehci, GPT_LD(RESET_SIGNAL_TIME_SOF_USEC - 1),
+ &mehci->timer->gptimer1_ld);
+ ehci_writel(ehci, GPT_RESET | GPT_RUN,
+ &mehci->timer->gptimer1_ctrl);
+
+ spin_unlock_irqrestore(&ehci->lock, flags);
+ wait_for_completion(&mehci->gpt0_completion);
+
+ if (!mehci->reset_again)
+ goto done;
+
+ if (handshake(ehci, status_reg, PORT_RESET, 0, 10 * 1000)) {
+ pr_err("reset handshake fatal error\n");
+ dbg_log_event(NULL, "RESET: fatal", retries);
+ goto fail;
+ }
+
+ if (retries < RESET_RETRY_LIMIT)
+ goto retry;
+
+ /* complete reset in tight loop */
+ pr_info("RESET in tight loop\n");
+ dbg_log_event(NULL, "RESET: tight", 0);
+
+ spin_lock_irqsave(&ehci->lock, flags);
+ ehci_writel(ehci, val, status_reg);
+ while (cnt--)
+ udelay(1);
+ ret = msm_hsic_reset_done(hcd);
+ spin_unlock_irqrestore(&ehci->lock, flags);
+ if (ret) {
+ pr_err("RESET in tight loop failed\n");
+ dbg_log_event(NULL, "RESET: tight failed", 0);
+ goto fail;
+ }
+
+done:
+ dbg_log_event(NULL, "RESET: done", retries);
+ pr_debug("reset completed\n");
+fail:
+ mehci->bus_reset = 0;
+ if (pdata && pdata->swfi_latency)
+ pm_qos_update_request(&mehci->pm_qos_req_dma,
+ PM_QOS_DEFAULT_VALUE);
+}
+
static int ehci_hsic_bus_suspend(struct usb_hcd *hcd)
{
struct msm_hsic_hcd *mehci = hcd_to_hsic(hcd);
@@ -1321,10 +1401,8 @@
.log_urb = dbg_log_event,
.dump_regs = dump_hsic_regs,
- .enable_ulpi_control = ehci_msm_enable_ulpi_control,
- .disable_ulpi_control = ehci_msm_disable_ulpi_control,
-
.set_autosuspend_delay = ehci_msm_set_autosuspend_delay,
+ .reset_sof_bug_handler = ehci_hsic_reset_sof_bug_handler,
};
static int msm_hsic_init_clocks(struct msm_hsic_hcd *mehci, u32 init)
diff --git a/drivers/usb/otg/msm_otg.c b/drivers/usb/otg/msm_otg.c
index 4d5bbf84..c69071d 100644
--- a/drivers/usb/otg/msm_otg.c
+++ b/drivers/usb/otg/msm_otg.c
@@ -1008,9 +1008,11 @@
}
if (device_may_wakeup(phy->dev)) {
- enable_irq_wake(motg->irq);
if (motg->async_irq)
enable_irq_wake(motg->async_irq);
+ else
+ enable_irq_wake(motg->irq);
+
if (motg->pdata->pmic_id_irq)
enable_irq_wake(motg->pdata->pmic_id_irq);
if (pdata->otg_control == OTG_PHY_CONTROL &&
@@ -1117,9 +1119,11 @@
skip_phy_resume:
if (device_may_wakeup(phy->dev)) {
- disable_irq_wake(motg->irq);
if (motg->async_irq)
disable_irq_wake(motg->async_irq);
+ else
+ disable_irq_wake(motg->irq);
+
if (motg->pdata->pmic_id_irq)
disable_irq_wake(motg->pdata->pmic_id_irq);
if (pdata->otg_control == OTG_PHY_CONTROL &&
diff --git a/drivers/video/msm/mdp4_overlay.c b/drivers/video/msm/mdp4_overlay.c
index 0922f44..fbae011 100644
--- a/drivers/video/msm/mdp4_overlay.c
+++ b/drivers/video/msm/mdp4_overlay.c
@@ -1,4 +1,4 @@
-/* Copyright (c) 2009-2012, The Linux Foundation. All rights reserved.
+/* Copyright (c) 2009-2013, The Linux Foundation. All rights reserved.
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License version 2 and
@@ -780,6 +780,7 @@
case MDP_ARGB_8888:
case MDP_RGBA_8888:
case MDP_BGRA_8888:
+ case MDP_BGRX_8888:
case MDP_RGBX_8888:
case MDP_RGB_565:
case MDP_BGR_565:
@@ -967,6 +968,7 @@
case MDP_ARGB_8888:
case MDP_RGBA_8888:
case MDP_BGRA_8888:
+ case MDP_BGRX_8888:
case MDP_RGBX_8888:
return OVERLAY_TYPE_RGB;
case MDP_YCRYCB_H2V1:
@@ -1137,6 +1139,23 @@
pipe->element0 = C1_B_Cb; /* B */
pipe->bpp = 4; /* 4 bpp */
break;
+ case MDP_BGRX_8888:
+ pipe->frame_format = MDP4_FRAME_FORMAT_LINEAR;
+ pipe->fetch_plane = OVERLAY_PLANE_INTERLEAVED;
+ pipe->a_bit = 3; /* alpha, 4 bits */
+ pipe->r_bit = 3; /* R, 8 bits */
+ pipe->b_bit = 3; /* B, 8 bits */
+ pipe->g_bit = 3; /* G, 8 bits */
+ pipe->alpha_enable = 0;
+ pipe->unpack_tight = 1;
+ pipe->unpack_align_msb = 0;
+ pipe->unpack_count = 3;
+ pipe->element3 = C3_ALPHA; /* alpha */
+ pipe->element2 = C2_R_Cr; /* R */
+ pipe->element1 = C0_G_Y; /* G */
+ pipe->element0 = C1_B_Cb; /* B */
+ pipe->bpp = 4; /* 4 bpp */
+ break;
case MDP_YCRYCB_H2V1:
pipe->frame_format = MDP4_FRAME_FORMAT_LINEAR;
pipe->fetch_plane = OVERLAY_PLANE_INTERLEAVED;
@@ -1324,6 +1343,7 @@
case MDP_XRGB_8888:
case MDP_ARGB_8888:
case MDP_BGRA_8888:
+ case MDP_BGRX_8888:
b_start = 0;
g_start = 8;
r_start = 16;
diff --git a/drivers/video/msm/mdss/mdss_fb.c b/drivers/video/msm/mdss/mdss_fb.c
index e1e82fd..5c89938 100644
--- a/drivers/video/msm/mdss/mdss_fb.c
+++ b/drivers/video/msm/mdss/mdss_fb.c
@@ -417,9 +417,6 @@
mfd->op_enable);
if (ret)
pr_warn("can't turn on display!\n");
-
- if (mfd->vsync_pending)
- mdss_mdp_overlay_vsync_ctrl(mfd, mfd->vsync_pending);
}
mfd->is_power_setting = false;
complete_all(&mfd->power_set_comp);
@@ -1043,16 +1040,23 @@
void mdss_fb_wait_for_fence(struct msm_fb_data_type *mfd)
{
- int i, ret;
+ int i, ret = 0;
/* buf sync */
for (i = 0; i < mfd->acq_fen_cnt; i++) {
ret = sync_fence_wait(mfd->acq_fen[i], WAIT_FENCE_TIMEOUT);
- sync_fence_put(mfd->acq_fen[i]);
if (ret < 0) {
pr_err("%s: sync_fence_wait failed! ret = %x\n",
__func__, ret);
break;
}
+ sync_fence_put(mfd->acq_fen[i]);
+ }
+
+ if (ret < 0) {
+ while (i < mfd->acq_fen_cnt) {
+ sync_fence_put(mfd->acq_fen[i]);
+ i++;
+ }
}
mfd->acq_fen_cnt = 0;
}
diff --git a/drivers/video/msm/mdss/mdss_mdp.h b/drivers/video/msm/mdss/mdss_mdp.h
index 455f725..5158974 100644
--- a/drivers/video/msm/mdss/mdss_mdp.h
+++ b/drivers/video/msm/mdss/mdss_mdp.h
@@ -32,8 +32,6 @@
#define MAX_MIXER_HEIGHT 2400
#define MAX_IMG_WIDTH 0x3FFF
#define MAX_IMG_HEIGHT 0x3FFF
-#define MIN_DST_W 10
-#define MIN_DST_H 10
#define MAX_DST_W MAX_MIXER_WIDTH
#define MAX_DST_H MAX_MIXER_HEIGHT
#define MAX_PLANES 4
diff --git a/drivers/video/msm/mdss/mdss_mdp_overlay.c b/drivers/video/msm/mdss/mdss_mdp_overlay.c
index 62b4275..2ae4830 100644
--- a/drivers/video/msm/mdss/mdss_mdp_overlay.c
+++ b/drivers/video/msm/mdss/mdss_mdp_overlay.c
@@ -57,10 +57,19 @@
struct mdss_mdp_format_params *fmt)
{
u32 xres, yres;
+ u32 min_src_size, min_dst_size;
xres = mfd->fbi->var.xres;
yres = mfd->fbi->var.yres;
+ if (mfd->mdata->mdp_rev >= MDSS_MDP_HW_REV_102) {
+ min_src_size = fmt->is_yuv ? 2 : 1;
+ min_dst_size = 1;
+ } else {
+ min_src_size = fmt->is_yuv ? 10 : 5;
+ min_dst_size = 2;
+ }
+
if (req->z_order >= MDSS_MDP_MAX_STAGE) {
pr_err("zorder %d out of range\n", req->z_order);
return -ERANGE;
@@ -68,7 +77,7 @@
if (req->src.width > MAX_IMG_WIDTH ||
req->src.height > MAX_IMG_HEIGHT ||
- req->src_rect.w == 0 || req->src_rect.h == 0 ||
+ req->src_rect.w < min_src_size || req->src_rect.h < min_src_size ||
CHECK_BOUNDS(req->src_rect.x, req->src_rect.w, req->src.width) ||
CHECK_BOUNDS(req->src_rect.y, req->src_rect.h, req->src.height)) {
pr_err("invalid source image img wh=%dx%d rect=%d,%d,%d,%d\n",
@@ -78,7 +87,7 @@
return -EOVERFLOW;
}
- if (req->dst_rect.w < MIN_DST_W || req->dst_rect.h < MIN_DST_H ||
+ if (req->dst_rect.w < min_dst_size || req->dst_rect.h < min_dst_size ||
req->dst_rect.w > MAX_DST_W || req->dst_rect.h > MAX_DST_H) {
pr_err("invalid destination resolution (%dx%d)",
req->dst_rect.w, req->dst_rect.h);
@@ -151,10 +160,6 @@
pr_err("invalid odd src resolution or coordinates\n");
return -EINVAL;
}
- if ((req->dst_rect.w & 0x1) || (req->dst_rect.h & 0x1)) {
- pr_err("invalid odd dst resolution\n");
- return -EINVAL;
- }
}
return 0;
@@ -265,14 +270,16 @@
pipe->params_changed = true;
}
- if (req->id == MSMFB_NEW_REQUEST) {
- mixer = mdss_mdp_mixer_get(mfd->ctl, mixer_mux);
- if (!mixer) {
- pr_err("unable to get mixer\n");
- return -ENODEV;
- }
+ mixer = mdss_mdp_mixer_get(mfd->ctl, mixer_mux);
+ if (!mixer) {
+ pr_err("unable to get mixer\n");
+ return -ENODEV;
+ }
- if (fmt->is_yuv || (req->flags & MDP_OV_PIPE_SHARE))
+ if (req->id == MSMFB_NEW_REQUEST) {
+ if (req->flags & MDP_OV_PIPE_FORCE_DMA)
+ pipe_type = MDSS_MDP_PIPE_TYPE_DMA;
+ else if (fmt->is_yuv || (req->flags & MDP_OV_PIPE_SHARE))
pipe_type = MDSS_MDP_PIPE_TYPE_VIG;
else
pipe_type = MDSS_MDP_PIPE_TYPE_RGB;
@@ -308,6 +315,21 @@
pr_err("invalid pipe ndx=%x\n", req->id);
return pipe ? PTR_ERR(pipe) : -ENODEV;
}
+
+ if (pipe->mixer != mixer) {
+ if (!mixer->ctl || (mixer->ctl->mfd != mfd)) {
+ pr_err("Can't switch mixer %d->%d pnum %d!\n",
+ pipe->mixer->num, mixer->num,
+ pipe->num);
+ mdss_mdp_pipe_unmap(pipe);
+ return -EINVAL;
+ }
+ pr_debug("switching pipe mixer %d->%d pnum %d\n",
+ pipe->mixer->num, mixer->num,
+ pipe->num);
+ mdss_mdp_mixer_pipe_unstage(pipe);
+ pipe->mixer = mixer;
+ }
}
pipe->flags = req->flags;
@@ -415,25 +437,28 @@
int num_planes,
u32 flags)
{
- int i;
+ int i, rc = 0;
+
+ if ((num_planes <= 0) || (num_planes > MAX_PLANES))
+ return -EINVAL;
memset(data, 0, sizeof(*data));
for (i = 0; i < num_planes; i++) {
data->p[i].flags = flags;
- mdss_mdp_get_img(&planes[i], &data->p[i]);
- if (data->p[0].len == 0)
+ rc = mdss_mdp_get_img(&planes[i], &data->p[i]);
+ if (rc) {
+ pr_err("failed to map buf p=%d flags=%x\n", i, flags);
+ while (i > 0) {
+ i--;
+ mdss_mdp_put_img(&data->p[i]);
+ }
break;
+ }
}
- if (i != num_planes) {
- for (; i >= 0; i--)
- mdss_mdp_put_img(&data->p[i]);
- return -ENOMEM;
- }
+ data->num_planes = i;
- data->num_planes = num_planes;
-
- return 0;
+ return rc;
}
static inline int mdss_mdp_overlay_free_buf(struct mdss_mdp_data *data)
@@ -645,26 +670,24 @@
ret = mdss_mdp_overlay_get_buf(mfd, &src_data, &req->data, 1, flgs);
if (ret) {
pr_err("src_data pmem error\n");
- goto rotate_done;
+ return ret;
}
ret = mdss_mdp_overlay_get_buf(mfd, &dst_data, &req->dst_data, 1, flgs);
if (ret) {
pr_err("dst_data pmem error\n");
- goto rotate_done;
+ goto dst_buf_fail;
}
ret = mdss_mdp_rotator_queue(rot, &src_data, &dst_data);
- if (ret) {
+ if (ret)
pr_err("rotator queue error session id=%x\n", req->id);
- goto rotate_done;
- }
-rotate_done:
mdss_mdp_overlay_free_buf(&dst_data);
+dst_buf_fail:
mdss_mdp_overlay_free_buf(&src_data);
- return 0;
+ return ret;
}
static int mdss_mdp_overlay_queue(struct msm_fb_data_type *mfd,
@@ -1301,6 +1324,11 @@
rc = mdss_mdp_ctl_start(mfd->ctl);
if (rc == 0) {
atomic_inc(&ov_active_panels);
+
+ if (mfd->vsync_pending) {
+ mfd->vsync_pending = 0;
+ mdss_mdp_overlay_vsync_ctrl(mfd, mfd->vsync_pending);
+ }
} else {
mdss_mdp_ctl_destroy(mfd->ctl);
mfd->ctl = NULL;
diff --git a/include/drm/kgsl_drm.h b/include/drm/kgsl_drm.h
index 7ffae9d..41f7c29 100644
--- a/include/drm/kgsl_drm.h
+++ b/include/drm/kgsl_drm.h
@@ -20,6 +20,7 @@
#define DRM_KGSL_GEM_UNLOCK_ON_TS 0x0D
#define DRM_KGSL_GEM_CREATE_FD 0x0E
#define DRM_KGSL_GEM_GET_ION_FD 0x0F
+#define DRM_KGSL_GEM_CREATE_FROM_ION 0x10
#define DRM_IOCTL_KGSL_GEM_CREATE \
DRM_IOWR(DRM_COMMAND_BASE + DRM_KGSL_GEM_CREATE, struct drm_kgsl_gem_create)
@@ -80,6 +81,10 @@
DRM_IOWR(DRM_COMMAND_BASE + DRM_KGSL_GEM_GET_ION_FD, \
struct drm_kgsl_gem_get_ion_fd)
+#define DRM_IOCTL_KGSL_GEM_CREATE_FROM_ION \
+DRM_IOWR(DRM_COMMAND_BASE + DRM_KGSL_GEM_CREATE_FROM_ION, \
+struct drm_kgsl_gem_create_from_ion)
+
/* Maximum number of sub buffers per GEM object */
#define DRM_KGSL_GEM_MAX_BUFFERS 2
@@ -199,4 +204,9 @@
uint32_t handle;
};
+struct drm_kgsl_gem_create_from_ion {
+ uint32_t ion_fd;
+ uint32_t handle;
+};
+
#endif
diff --git a/include/linux/mfd/pm8xxx/batterydata-lib.h b/include/linux/mfd/pm8xxx/batterydata-lib.h
index 5ff1cfb..f27ceca 100644
--- a/include/linux/mfd/pm8xxx/batterydata-lib.h
+++ b/include/linux/mfd/pm8xxx/batterydata-lib.h
@@ -89,6 +89,8 @@
* readings from bms are not available.
* @delta_rbatt_mohm: the resistance to be added towards lower soc to
* compensate for battery capacitance.
+ * @rbatt_capacitve_mohm: the resistance to be added to compensate for
+ * battery capacitance
*/
struct bms_battery_data {
@@ -100,6 +102,7 @@
struct sf_lut *rbatt_sf_lut;
int default_rbatt_mohm;
int delta_rbatt_mohm;
+ int rbatt_capacitive_mohm;
};
#if defined(CONFIG_PM8921_BMS) || \
diff --git a/include/linux/mfd/wcd9xxx/core.h b/include/linux/mfd/wcd9xxx/core.h
index 3ebf091..aed549e 100644
--- a/include/linux/mfd/wcd9xxx/core.h
+++ b/include/linux/mfd/wcd9xxx/core.h
@@ -29,6 +29,8 @@
(((ver == TABLA_VERSION_1_0) || (ver == TABLA_VERSION_1_1)) ? 1 : 0)
#define TABLA_IS_2_0(ver) ((ver == TABLA_VERSION_2_0) ? 1 : 0)
+#define WCD9XXX_SUPPLY_BUCK_NAME "cdc-vdd-buck"
+
#define SITAR_VERSION_1P0 0
#define SITAR_VERSION_1P1 1
#define SITAR_IS_1P0(ver) \
diff --git a/include/linux/mfd/wcd9xxx/wcd9xxx_registers.h b/include/linux/mfd/wcd9xxx/wcd9xxx_registers.h
index 9c44e8b..412341a 100644
--- a/include/linux/mfd/wcd9xxx/wcd9xxx_registers.h
+++ b/include/linux/mfd/wcd9xxx/wcd9xxx_registers.h
@@ -196,4 +196,85 @@
#define WCD9XXX_A_MAD_ANA_CTRL (0x150)
#define WCD9XXX_A_MAD_ANA_CTRL__POR (0xF1)
+
+#define WCD9XXX_A_CDC_CLK_OTHR_CTL (0x30C)
+#define WCD9XXX_A_CDC_CLK_OTHR_CTL__POR (0x00)
+
+/* Class H related common registers */
+#define WCD9XXX_A_BUCK_MODE_1 (0x181)
+#define WCD9XXX_A_BUCK_MODE_1__POR (0x21)
+#define WCD9XXX_A_BUCK_MODE_2 (0x182)
+#define WCD9XXX_A_BUCK_MODE_2__POR (0xFF)
+#define WCD9XXX_A_BUCK_MODE_3 (0x183)
+#define WCD9XXX_A_BUCK_MODE_3__POR (0xCC)
+#define WCD9XXX_A_BUCK_MODE_4 (0x184)
+#define WCD9XXX_A_BUCK_MODE_4__POR (0x3A)
+#define WCD9XXX_A_BUCK_MODE_5 (0x185)
+#define WCD9XXX_A_BUCK_MODE_5__POR (0x00)
+#define WCD9XXX_A_BUCK_CTRL_VCL_1 (0x186)
+#define WCD9XXX_A_BUCK_CTRL_VCL_1__POR (0x48)
+#define WCD9XXX_A_BUCK_CTRL_VCL_2 (0x187)
+#define WCD9XXX_A_BUCK_CTRL_VCL_2__POR (0xA3)
+#define WCD9XXX_A_BUCK_CTRL_VCL_3 (0x188)
+#define WCD9XXX_A_BUCK_CTRL_VCL_3__POR (0x82)
+#define WCD9XXX_A_BUCK_CTRL_CCL_1 (0x189)
+#define WCD9XXX_A_BUCK_CTRL_CCL_1__POR (0xAB)
+#define WCD9XXX_A_BUCK_CTRL_CCL_2 (0x18A)
+#define WCD9XXX_A_BUCK_CTRL_CCL_2__POR (0xDC)
+#define WCD9XXX_A_BUCK_CTRL_CCL_3 (0x18B)
+#define WCD9XXX_A_BUCK_CTRL_CCL_3__POR (0x6A)
+#define WCD9XXX_A_BUCK_CTRL_CCL_4 (0x18C)
+#define WCD9XXX_A_BUCK_CTRL_CCL_4__POR (0x58)
+#define WCD9XXX_A_BUCK_CTRL_PWM_DRVR_1 (0x18D)
+#define WCD9XXX_A_BUCK_CTRL_PWM_DRVR_1__POR (0x50)
+#define WCD9XXX_A_BUCK_CTRL_PWM_DRVR_2 (0x18E)
+#define WCD9XXX_A_BUCK_CTRL_PWM_DRVR_2__POR (0x64)
+#define WCD9XXX_A_BUCK_CTRL_PWM_DRVR_3 (0x18F)
+#define WCD9XXX_A_BUCK_CTRL_PWM_DRVR_3__POR (0x77)
+#define WCD9XXX_A_BUCK_TMUX_A_D (0x190)
+#define WCD9XXX_A_BUCK_TMUX_A_D__POR (0x00)
+#define WCD9XXX_A_NCP_EN (0x192)
+#define WCD9XXX_A_NCP_EN__POR (0xFE)
+#define WCD9XXX_A_NCP_STATIC (0x194)
+#define WCD9XXX_A_NCP_STATIC__POR (0x28)
+#define WCD9XXX_A_NCP_BUCKREF (0x191)
+#define WCD9XXX_A_NCP_BUCKREF__POR (0x00)
+#define WCD9XXX_A_CDC_CLSH_B1_CTL (0x320)
+#define WCD9XXX_A_CDC_CLSH_B1_CTL__POR (0xE4)
+#define WCD9XXX_A_CDC_CLSH_B2_CTL (0x321)
+#define WCD9XXX_A_CDC_CLSH_B2_CTL__POR (0x00)
+#define WCD9XXX_A_CDC_CLSH_B3_CTL (0x322)
+#define WCD9XXX_A_CDC_CLSH_B3_CTL__POR (0x00)
+#define WCD9XXX_A_CDC_CLSH_BUCK_NCP_VARS (0x323)
+#define WCD9XXX_A_CDC_CLSH_BUCK_NCP_VARS__POR (0x00)
+#define WCD9XXX_A_CDC_CLSH_IDLE_HPH_THSD (0x324)
+#define WCD9XXX_A_CDC_CLSH_IDLE_HPH_THSD__POR (0x12)
+#define WCD9XXX_A_CDC_CLSH_IDLE_EAR_THSD (0x325)
+#define WCD9XXX_A_CDC_CLSH_IDLE_EAR_THSD__POR (0x0C)
+#define WCD9XXX_A_CDC_CLSH_FCLKONLY_HPH_THSD (0x326)
+#define WCD9XXX_A_CDC_CLSH_FCLKONLY_HPH_THSD__POR (0x18)
+#define WCD9XXX_A_CDC_CLSH_FCLKONLY_EAR_THSD (0x327)
+#define WCD9XXX_A_CDC_CLSH_FCLKONLY_EAR_THSD__POR (0x23)
+#define WCD9XXX_A_CDC_CLSH_K_ADDR (0x328)
+#define WCD9XXX_A_CDC_CLSH_K_ADDR__POR (0x00)
+#define WCD9XXX_A_CDC_CLSH_K_DATA (0x329)
+#define WCD9XXX_A_CDC_CLSH_K_DATA__POR (0xA4)
+#define WCD9XXX_A_CDC_CLSH_I_PA_FACT_HPH_L (0x32A)
+#define WCD9XXX_A_CDC_CLSH_I_PA_FACT_HPH_L__POR (0xD7)
+#define WCD9XXX_A_CDC_CLSH_I_PA_FACT_HPH_U (0x32B)
+#define WCD9XXX_A_CDC_CLSH_I_PA_FACT_HPH_U__POR (0x05)
+#define WCD9XXX_A_CDC_CLSH_I_PA_FACT_EAR_L (0x32C)
+#define WCD9XXX_A_CDC_CLSH_I_PA_FACT_EAR_L__POR (0x60)
+#define WCD9XXX_A_CDC_CLSH_I_PA_FACT_EAR_U (0x32D)
+#define WCD9XXX_A_CDC_CLSH_I_PA_FACT_EAR_U__POR (0x09)
+#define WCD9XXX_A_CDC_CLSH_V_PA_HD_EAR (0x32E)
+#define WCD9XXX_A_CDC_CLSH_V_PA_HD_EAR__POR (0x00)
+#define WCD9XXX_A_CDC_CLSH_V_PA_HD_HPH (0x32F)
+#define WCD9XXX_A_CDC_CLSH_V_PA_HD_HPH__POR (0x00)
+#define WCD9XXX_A_CDC_CLSH_V_PA_MIN_EAR (0x330)
+#define WCD9XXX_A_CDC_CLSH_V_PA_MIN_EAR__POR (0x00)
+#define WCD9XXX_A_CDC_CLSH_V_PA_MIN_HPH (0x331)
+#define WCD9XXX_A_CDC_CLSH_V_PA_MIN_HPH__POR (0x00)
+
+
#endif
diff --git a/include/linux/msm_audio_acdb.h b/include/linux/msm_audio_acdb.h
index 471f10a..f0c4915 100644
--- a/include/linux/msm_audio_acdb.h
+++ b/include/linux/msm_audio_acdb.h
@@ -49,6 +49,10 @@
(AUDIO_MAX_COMMON_IOCTL_NUM+21), unsigned)
#define AUDIO_SET_LSM_CAL _IOW(AUDIO_IOCTL_MAGIC, \
(AUDIO_MAX_COMMON_IOCTL_NUM+22), unsigned)
+#define AUDIO_SET_ADM_CUSTOM_TOPOLOGY _IOW(AUDIO_IOCTL_MAGIC, \
+ (AUDIO_MAX_COMMON_IOCTL_NUM+23), unsigned)
+#define AUDIO_SET_ASM_CUSTOM_TOPOLOGY _IOW(AUDIO_IOCTL_MAGIC, \
+ (AUDIO_MAX_COMMON_IOCTL_NUM+24), unsigned)
#define AUDIO_MAX_ACDB_IOCTL (AUDIO_MAX_COMMON_IOCTL_NUM+30)
diff --git a/include/linux/msm_mdp.h b/include/linux/msm_mdp.h
index 3ec966b..bc35d14 100644
--- a/include/linux/msm_mdp.h
+++ b/include/linux/msm_mdp.h
@@ -114,6 +114,7 @@
MDP_BGR_565, /* BGR 565 planer */
MDP_BGR_888, /* BGR 888 */
MDP_Y_CBCR_H2V2_VENUS,
+ MDP_BGRX_8888, /* BGRX 8888 */
MDP_IMGTYPE_LIMIT,
MDP_RGB_BORDERFILL, /* border fill pipe */
MDP_FB_FORMAT = MDP_IMGTYPE2_START, /* framebuffer format */
@@ -166,6 +167,7 @@
#define MDP_BACKEND_COMPOSITION 0x00040000
#define MDP_BORDERFILL_SUPPORTED 0x00010000
#define MDP_SECURE_OVERLAY_SESSION 0x00008000
+#define MDP_OV_PIPE_FORCE_DMA 0x00004000
#define MDP_MEMORY_ID_TYPE_FB 0x00001000
#define MDP_TRANSP_NOP 0xffffffff
diff --git a/include/linux/usb/cdc.h b/include/linux/usb/cdc.h
index 2b39f69..478734f 100644
--- a/include/linux/usb/cdc.h
+++ b/include/linux/usb/cdc.h
@@ -54,6 +54,7 @@
#define USB_CDC_OBEX_TYPE 0x15
#define USB_CDC_NCM_TYPE 0x1a
#define USB_CDC_MBB_TYPE 0x1b /* mbb_desc */
+#define USB_CDC_EXT_MBB_TYPE 0x1c
/* "Header Functional Descriptor" from CDC spec 5.2.3.1 */
struct usb_cdc_header_desc {
@@ -203,6 +204,17 @@
__u8 bmNetworkCapabilities;
} __packed;
+/* "Extended MBIM Functional Descriptor" */
+struct usb_cdc_ext_mbb_desc {
+ __u8 bLength;
+ __u8 bDescriptorType;
+ __u8 bDescriptorSubType;
+
+ __le16 bcdMbbExtendedVersion;
+ __u8 bMaxOutstandingCmdMsges;
+ __le16 wMTU;
+} __packed;
+
/*-------------------------------------------------------------------------*/
/*
diff --git a/include/linux/usb/hcd.h b/include/linux/usb/hcd.h
index 268aa48..4fb20f6 100644
--- a/include/linux/usb/hcd.h
+++ b/include/linux/usb/hcd.h
@@ -349,9 +349,8 @@
/* to log submission/completion events*/
void (*log_urb)(struct urb *urb, char *event, unsigned extra);
void (*dump_regs)(struct usb_hcd *);
- void (*enable_ulpi_control)(struct usb_hcd *hcd, u32 linestate);
- void (*disable_ulpi_control)(struct usb_hcd *hcd);
void (*set_autosuspend_delay)(struct usb_device *);
+ void (*reset_sof_bug_handler)(struct usb_hcd *hcd, u32 val);
};
extern int usb_hcd_link_urb_to_ep(struct usb_hcd *hcd, struct urb *urb);
diff --git a/include/linux/usb/rmnet_ctrl_qti.h b/include/linux/usb/rmnet_ctrl_qti.h
new file mode 100644
index 0000000..5038396
--- /dev/null
+++ b/include/linux/usb/rmnet_ctrl_qti.h
@@ -0,0 +1,12 @@
+#ifndef __LINUX_USB_U_RMNET_CTRL_QTI_H
+#define __LINUX_USB_U_RMNET_CTRL_QTI_H
+
+#include <linux/ioctl.h>
+
+#define MAX_QTI_PKT_SIZE 2048
+
+#define FRMNET_CTRL_IOCTL_MAGIC 'r'
+#define FRMNET_CTRL_GET_LINE_STATE _IOR(FRMNET_CTRL_IOCTL_MAGIC, 2, int)
+
+
+#endif /* __LINUX_USB_U_RMNET_CTRL_QTI_H */
diff --git a/include/media/msmb_isp.h b/include/media/msmb_isp.h
index c9d3f15..f1d789a 100644
--- a/include/media/msmb_isp.h
+++ b/include/media/msmb_isp.h
@@ -45,7 +45,9 @@
PIX_VIEWFINDER,
CAMIF_RAW,
IDEAL_RAW,
- RDI,
+ RDI_INTF_0,
+ RDI_INTF_1,
+ RDI_INTF_2,
VFE_AXI_SRC_MAX
};
@@ -94,12 +96,17 @@
enum ISP_START_PIXEL_PATTERN pixel_pattern;
};
+struct msm_vfe_rdi_cfg {
+ uint8_t cid;
+ uint8_t frame_based;
+};
+
struct msm_vfe_input_cfg {
union {
struct msm_vfe_pix_cfg pix_cfg;
+ struct msm_vfe_rdi_cfg rdi_cfg;
} d;
enum msm_vfe_input_src input_src;
-
};
struct msm_vfe_axi_plane_cfg {
@@ -281,14 +288,15 @@
ISP_WM_BUS_OVERFLOW = 4,
ISP_STATS_OVERFLOW = 5,
ISP_CAMIF_ERROR = 6,
- ISP_STATS_NOTIFY = 7,
- ISP_SOF = 8,
- ISP_EOF = 9,
- ISP_BUF_DIVERT = 10,
- ISP_EVENT_MAX = 11
+ ISP_SOF = 7,
+ ISP_EOF = 8,
+ ISP_EVENT_MAX = 9
};
-#define ISP_EVENT_BASE (V4L2_EVENT_PRIVATE_START + 1)
+#define ISP_EVENT_OFFSET 8
+#define ISP_EVENT_BASE (V4L2_EVENT_PRIVATE_START)
+#define ISP_BUF_EVENT_BASE (ISP_EVENT_BASE + (1 << ISP_EVENT_OFFSET))
+#define ISP_STATS_EVENT_BASE (ISP_EVENT_BASE + (2 << ISP_EVENT_OFFSET))
#define ISP_EVENT_REG_UPDATE (ISP_EVENT_BASE + ISP_REG_UPDATE)
#define ISP_EVENT_START_ACK (ISP_EVENT_BASE + ISP_START_ACK)
#define ISP_EVENT_STOP_ACK (ISP_EVENT_BASE + ISP_STOP_ACK)
@@ -296,11 +304,10 @@
#define ISP_EVENT_WM_BUS_OVERFLOW (ISP_EVENT_BASE + ISP_WM_BUS_OVERFLOW)
#define ISP_EVENT_STATS_OVERFLOW (ISP_EVENT_BASE + ISP_STATS_OVERFLOW)
#define ISP_EVENT_CAMIF_ERROR (ISP_EVENT_BASE + ISP_CAMIF_ERROR)
-#define ISP_EVENT_STATS_NOTIFY (ISP_EVENT_BASE + ISP_STATS_NOTIFY)
#define ISP_EVENT_SOF (ISP_EVENT_BASE + ISP_SOF)
#define ISP_EVENT_EOF (ISP_EVENT_BASE + ISP_EOF)
-#define ISP_EVENT_BUF_DIVERT (ISP_EVENT_BASE + ISP_BUF_DIVERT)
-
+#define ISP_EVENT_BUF_DIVERT (ISP_BUF_EVENT_BASE)
+#define ISP_EVENT_STATS_NOTIFY (ISP_STATS_EVENT_BASE)
/* The msm_v4l2_event_data structure should match the
* v4l2_event.u.data field.
@@ -324,7 +331,7 @@
};
struct msm_isp_event_data {
- struct timeval timestamp;
+ struct timeval timestamp; /*Wall clock*/
/* if pix is a src frame_id is from camif */
uint32_t frame_id;
union {
@@ -340,6 +347,19 @@
} u; /* union can have max 52 bytes */
};
+#define V4L2_PIX_FMT_QBGGR8 v4l2_fourcc('Q', 'B', 'G', '8')
+#define V4L2_PIX_FMT_QGBRG8 v4l2_fourcc('Q', 'G', 'B', '8')
+#define V4L2_PIX_FMT_QGRBG8 v4l2_fourcc('Q', 'G', 'R', '8')
+#define V4L2_PIX_FMT_QRGGB8 v4l2_fourcc('Q', 'R', 'G', '8')
+#define V4L2_PIX_FMT_QBGGR10 v4l2_fourcc('Q', 'B', 'G', '0')
+#define V4L2_PIX_FMT_QGBRG10 v4l2_fourcc('Q', 'G', 'B', '0')
+#define V4L2_PIX_FMT_QGRBG10 v4l2_fourcc('Q', 'G', 'R', '0')
+#define V4L2_PIX_FMT_QRGGB10 v4l2_fourcc('Q', 'R', 'G', '0')
+#define V4L2_PIX_FMT_QBGGR12 v4l2_fourcc('Q', 'B', 'G', '2')
+#define V4L2_PIX_FMT_QGBRG12 v4l2_fourcc('Q', 'G', 'B', '2')
+#define V4L2_PIX_FMT_QGRBG12 v4l2_fourcc('Q', 'G', 'R', '2')
+#define V4L2_PIX_FMT_QRGGB12 v4l2_fourcc('Q', 'R', 'G', '2')
+
#define VIDIOC_MSM_VFE_REG_CFG \
_IOWR('V', BASE_VIDIOC_PRIVATE, struct msm_vfe_cfg_cmd2)
diff --git a/include/media/msmb_pproc.h b/include/media/msmb_pproc.h
index 939c4e3..b003f99 100644
--- a/include/media/msmb_pproc.h
+++ b/include/media/msmb_pproc.h
@@ -102,6 +102,9 @@
#define VIDIOC_MSM_CPP_GET_INST_INFO \
_IOWR('V', BASE_VIDIOC_PRIVATE + 2, struct msm_camera_v4l2_ioctl_t)
+#define VIDIOC_MSM_CPP_LOAD_FIRMWARE \
+ _IOWR('V', BASE_VIDIOC_PRIVATE + 3, struct msm_camera_v4l2_ioctl_t)
+
#define V4L2_EVENT_CPP_FRAME_DONE (V4L2_EVENT_PRIVATE_START + 0)
struct msm_camera_v4l2_ioctl_t {
diff --git a/include/net/bluetooth/bluetooth.h b/include/net/bluetooth/bluetooth.h
index badbd8e..e909195 100644
--- a/include/net/bluetooth/bluetooth.h
+++ b/include/net/bluetooth/bluetooth.h
@@ -1,6 +1,6 @@
/*
BlueZ - Bluetooth protocol stack for Linux
- Copyright (c) 2000-2001, 2010-2012 The Linux Foundation. All rights reserved.
+ Copyright (c) 2000-2001, 2010-2013 The Linux Foundation. All rights reserved.
Written 2000,2001 by Maxim Krasnyansky <maxk@qualcomm.com>
@@ -63,6 +63,7 @@
#define BT_SECURITY_LOW 1
#define BT_SECURITY_MEDIUM 2
#define BT_SECURITY_HIGH 3
+#define BT_SECURITY_VERY_HIGH 4
#define BT_DEFER_SETUP 7
#define BT_FLUSHABLE 8
diff --git a/include/sound/apr_audio-v2.h b/include/sound/apr_audio-v2.h
index 4555b08..cad737a 100644
--- a/include/sound/apr_audio-v2.h
+++ b/include/sound/apr_audio-v2.h
@@ -6215,6 +6215,22 @@
#define VOICE_CMD_GET_PARAM 0x0001133E
#define VOICE_EVT_GET_PARAM_ACK 0x00011008
+/* Set Q6 topologies */
+#define ASM_CMD_ADD_TOPOLOGIES 0x00010DBE
+#define ADM_CMD_ADD_TOPOLOGIES 0x00010335
+
+/* structure used for both ioctls */
+struct cmd_set_topologies {
+ struct apr_hdr hdr;
+ u32 payload_addr_lsw;
+ /* LSW of parameter data payload address.*/
+ u32 payload_addr_msw;
+ /* MSW of parameter data payload address.*/
+ u32 mem_map_handle;
+ /* Memory map handle returned by mem map command */
+ u32 payload_size;
+ /* Size in bytes of the variable payload in shared memory */
+} __packed;
/* SRS TRUMEDIA start */
/* topology */
diff --git a/include/sound/q6asm-v2.h b/include/sound/q6asm-v2.h
index 984571b..6891b14 100644
--- a/include/sound/q6asm-v2.h
+++ b/include/sound/q6asm-v2.h
@@ -139,7 +139,7 @@
app_cb cb;
atomic_t cmd_state;
/* Relative or absolute TS */
- uint32_t time_flag;
+ atomic_t time_flag;
atomic_t nowait_cmd_cnt;
void *priv;
uint32_t io_mode;
@@ -150,6 +150,7 @@
/* idx:1 out port, 0: in port*/
struct audio_port_data port[2];
wait_queue_head_t cmd_wait;
+ wait_queue_head_t time_wait;
};
void q6asm_audio_client_free(struct audio_client *ac);
diff --git a/net/bluetooth/hci_event.c b/net/bluetooth/hci_event.c
index 15d3585..198773c 100644
--- a/net/bluetooth/hci_event.c
+++ b/net/bluetooth/hci_event.c
@@ -1,6 +1,6 @@
/*
BlueZ - Bluetooth protocol stack for Linux
- Copyright (c) 2000-2001, 2010-2012 The Linux Foundation. All rights reserved.
+ Copyright (c) 2000-2001, 2010-2013 The Linux Foundation. All rights reserved.
Written 2000,2001 by Maxim Krasnyansky <maxk@qualcomm.com>
@@ -2046,7 +2046,7 @@
sizeof(cp), &cp);
goto unlock;
} else if (!(lmp_ssp_capable(conn)) && conn->auth_initiator &&
- (conn->pending_sec_level == BT_SECURITY_HIGH)) {
+ (conn->pending_sec_level == BT_SECURITY_VERY_HIGH)) {
conn->pending_sec_level = BT_SECURITY_MEDIUM;
}
@@ -2669,6 +2669,12 @@
BT_DBG("Conn pending sec level is %d, ssp is %d, key len is %d",
conn->pending_sec_level, conn->ssp_mode, key->pin_len);
}
+ if (conn && (conn->ssp_mode == 0) &&
+ (conn->pending_sec_level == BT_SECURITY_VERY_HIGH) &&
+ (key->pin_len != 16)) {
+ BT_DBG("Security is high ignoring this key");
+ goto not_found;
+ }
if (key->key_type == 0x04 && conn && conn->auth_type != 0xff &&
(conn->auth_type & 0x01)) {
@@ -2853,14 +2859,14 @@
conn->ssp_mode = (ev->features[0] & 0x01);
/*In case if remote device ssp supported/2.0 device
- reduce the security level to MEDIUM if it is HIGH*/
+ reduce the security level to MEDIUM if it is VERY HIGH*/
if (!conn->ssp_mode && conn->auth_initiator &&
- (conn->pending_sec_level == BT_SECURITY_HIGH))
+ (conn->pending_sec_level == BT_SECURITY_VERY_HIGH))
conn->pending_sec_level = BT_SECURITY_MEDIUM;
if (conn->ssp_mode && conn->auth_initiator &&
conn->io_capability != 0x03) {
- conn->pending_sec_level = BT_SECURITY_HIGH;
+ conn->pending_sec_level = BT_SECURITY_VERY_HIGH;
conn->auth_type = HCI_AT_DEDICATED_BONDING_MITM;
}
}
diff --git a/net/bluetooth/l2cap_core.c b/net/bluetooth/l2cap_core.c
index 6eab6d0..fd9088a 100644
--- a/net/bluetooth/l2cap_core.c
+++ b/net/bluetooth/l2cap_core.c
@@ -1,6 +1,6 @@
/*
BlueZ - Bluetooth protocol stack for Linux
- Copyright (c) 2000-2001, 2010-2012 The Linux Foundation. All rights reserved.
+ Copyright (c) 2000-2001, 2010-2013 The Linux Foundation. All rights reserved.
Copyright (C) 2009-2010 Gustavo F. Padovan <gustavo@padovan.org>
Copyright (C) 2010 Google Inc.
@@ -610,6 +610,7 @@
{
if (sk->sk_type == SOCK_RAW) {
switch (l2cap_pi(sk)->sec_level) {
+ case BT_SECURITY_VERY_HIGH:
case BT_SECURITY_HIGH:
return HCI_AT_DEDICATED_BONDING_MITM;
case BT_SECURITY_MEDIUM:
@@ -621,12 +622,14 @@
if (l2cap_pi(sk)->sec_level == BT_SECURITY_LOW)
l2cap_pi(sk)->sec_level = BT_SECURITY_SDP;
- if (l2cap_pi(sk)->sec_level == BT_SECURITY_HIGH)
+ if (l2cap_pi(sk)->sec_level == BT_SECURITY_HIGH ||
+ l2cap_pi(sk)->sec_level == BT_SECURITY_VERY_HIGH)
return HCI_AT_NO_BONDING_MITM;
else
return HCI_AT_NO_BONDING;
} else {
switch (l2cap_pi(sk)->sec_level) {
+ case BT_SECURITY_VERY_HIGH:
case BT_SECURITY_HIGH:
return HCI_AT_GENERAL_BONDING_MITM;
case BT_SECURITY_MEDIUM:
@@ -7533,7 +7536,8 @@
if (l2cap_pi(sk)->sec_level == BT_SECURITY_MEDIUM) {
l2cap_sock_clear_timer(sk);
l2cap_sock_set_timer(sk, HZ * 5);
- } else if (l2cap_pi(sk)->sec_level == BT_SECURITY_HIGH)
+ } else if (l2cap_pi(sk)->sec_level == BT_SECURITY_HIGH ||
+ l2cap_pi(sk)->sec_level == BT_SECURITY_VERY_HIGH)
__l2cap_sock_close(sk, ECONNREFUSED);
} else {
if (l2cap_pi(sk)->sec_level == BT_SECURITY_MEDIUM)
diff --git a/net/bluetooth/rfcomm/core.c b/net/bluetooth/rfcomm/core.c
index dc4bf2f..d1914ea 100644
--- a/net/bluetooth/rfcomm/core.c
+++ b/net/bluetooth/rfcomm/core.c
@@ -262,6 +262,7 @@
__u8 auth_type;
switch (d->sec_level) {
+ case BT_SECURITY_VERY_HIGH:
case BT_SECURITY_HIGH:
auth_type = HCI_AT_GENERAL_BONDING_MITM;
break;
@@ -2163,7 +2164,8 @@
set_bit(RFCOMM_SEC_PENDING, &d->flags);
rfcomm_dlc_set_timer(d, RFCOMM_AUTH_TIMEOUT);
continue;
- } else if (d->sec_level == BT_SECURITY_HIGH) {
+ } else if (d->sec_level == BT_SECURITY_HIGH ||
+ d->sec_level == BT_SECURITY_VERY_HIGH) {
__rfcomm_dlc_close(d, ECONNREFUSED);
continue;
}
diff --git a/net/bluetooth/rfcomm/sock.c b/net/bluetooth/rfcomm/sock.c
index 66cc1f0..216068f 100644
--- a/net/bluetooth/rfcomm/sock.c
+++ b/net/bluetooth/rfcomm/sock.c
@@ -707,12 +707,13 @@
break;
}
- if (sec.level > BT_SECURITY_HIGH) {
+ if (sec.level > BT_SECURITY_VERY_HIGH) {
err = -EINVAL;
break;
}
rfcomm_pi(sk)->sec_level = sec.level;
+ BT_DBG("set to %d", sec.level);
break;
case BT_DEFER_SETUP:
@@ -763,6 +764,7 @@
opt = RFCOMM_LM_AUTH | RFCOMM_LM_ENCRYPT;
break;
case BT_SECURITY_HIGH:
+ case BT_SECURITY_VERY_HIGH:
opt = RFCOMM_LM_AUTH | RFCOMM_LM_ENCRYPT |
RFCOMM_LM_SECURE;
break;
diff --git a/net/bluetooth/smp.c b/net/bluetooth/smp.c
index 517779f..4a83020 100644
--- a/net/bluetooth/smp.c
+++ b/net/bluetooth/smp.c
@@ -213,6 +213,7 @@
static __u8 seclevel_to_authreq(__u8 level)
{
switch (level) {
+ case BT_SECURITY_VERY_HIGH:
case BT_SECURITY_HIGH:
return SMP_AUTH_MITM | SMP_AUTH_BONDING;
diff --git a/sound/soc/codecs/Makefile b/sound/soc/codecs/Makefile
index 0f14dc3..a09dab3 100644
--- a/sound/soc/codecs/Makefile
+++ b/sound/soc/codecs/Makefile
@@ -51,7 +51,7 @@
snd-soc-wcd9304-objs := wcd9304.o wcd9304-tables.o
snd-soc-wcd9310-objs := wcd9310.o wcd9310-tables.o
snd-soc-cs8427-objs := cs8427.o
-snd-soc-wcd9320-objs := wcd9xxx-resmgr.o wcd9320.o wcd9320-tables.o wcd9xxx-mbhc.o
+snd-soc-wcd9320-objs := wcd9xxx-resmgr.o wcd9320.o wcd9320-tables.o wcd9xxx-mbhc.o wcd9xxx-common.o
snd-soc-wcd9306-objs := wcd9306.o wcd9306-tables.o
snd-soc-msm8x10-wcd-objs := msm8x10-wcd.o msm8x10-wcd-tables.o
snd-soc-wl1273-objs := wl1273.o
diff --git a/sound/soc/codecs/wcd9320.c b/sound/soc/codecs/wcd9320.c
index 28be822..6f601c1 100644
--- a/sound/soc/codecs/wcd9320.c
+++ b/sound/soc/codecs/wcd9320.c
@@ -36,6 +36,7 @@
#include <linux/gpio.h>
#include "wcd9320.h"
#include "wcd9xxx-resmgr.h"
+#include "wcd9xxx-common.h"
static atomic_t kp_taiko_priv;
static int spkr_drv_wrnd_param_set(const char *val,
@@ -69,6 +70,7 @@
#define TAIKO_SLIM_IRQ_PORT_CLOSED (1 << 2)
#define TAIKO_MCLK_CLK_12P288MHZ 12288000
#define TAIKO_MCLK_CLK_9P6HZ 9600000
+
enum {
AIF1_PB = 0,
AIF1_CAP,
@@ -233,6 +235,10 @@
struct wcd9xxx_resmgr resmgr;
/* mbhc module */
struct wcd9xxx_mbhc mbhc;
+
+ /* class h specific data */
+ struct wcd9xxx_clsh_cdc_data clsh_d;
+
};
static const u32 comp_shift[] = {
@@ -354,73 +360,6 @@
return 0;
}
-static int taiko_codec_enable_class_h_clk(struct snd_soc_dapm_widget *w,
- struct snd_kcontrol *kcontrol, int event)
-{
- struct snd_soc_codec *codec = w->codec;
-
- pr_debug("%s %s %d\n", __func__, w->name, event);
-
- switch (event) {
- case SND_SOC_DAPM_PRE_PMU:
- snd_soc_update_bits(codec, TAIKO_A_CDC_CLSH_B1_CTL, 0x01, 0x01);
- break;
- case SND_SOC_DAPM_PRE_PMD:
- snd_soc_update_bits(codec, TAIKO_A_BUCK_MODE_1, 0x80, 0x00);
- snd_soc_update_bits(codec, TAIKO_A_CDC_CLSH_B1_CTL, 0x01, 0x00);
- break;
- }
- return 0;
-}
-
-static int taiko_codec_enable_class_h(struct snd_soc_dapm_widget *w,
- struct snd_kcontrol *kcontrol, int event)
-{
- struct snd_soc_codec *codec = w->codec;
-
- pr_debug("%s %s %d\n", __func__, w->name, event);
-
- switch (event) {
- case SND_SOC_DAPM_POST_PMU:
- snd_soc_update_bits(codec, TAIKO_A_BUCK_MODE_5, 0x02, 0x02);
- snd_soc_update_bits(codec, TAIKO_A_BUCK_MODE_4, 0xFF, 0xFF);
- snd_soc_update_bits(codec, TAIKO_A_BUCK_MODE_1, 0x04, 0x04);
- snd_soc_update_bits(codec, TAIKO_A_BUCK_MODE_1, 0x04, 0x00);
- snd_soc_update_bits(codec, TAIKO_A_BUCK_MODE_3, 0x04, 0x00);
- snd_soc_update_bits(codec, TAIKO_A_BUCK_MODE_3, 0x08, 0x00);
- snd_soc_update_bits(codec, TAIKO_A_BUCK_MODE_1, 0x80, 0x80);
- usleep_range(1000, 1000);
- break;
- }
- return 0;
-}
-
-static int taiko_codec_enable_charge_pump(struct snd_soc_dapm_widget *w,
- struct snd_kcontrol *kcontrol, int event)
-{
- struct snd_soc_codec *codec = w->codec;
-
- pr_debug("%s %s %d\n", __func__, w->name, event);
-
- switch (event) {
- case SND_SOC_DAPM_PRE_PMU:
- snd_soc_update_bits(codec, w->reg, 0x01, 0x01);
- snd_soc_update_bits(codec, w->reg, 0x40, 0x00);
- break;
-
- case SND_SOC_DAPM_POST_PMU:
- usleep_range(1000, 1000);
- break;
-
- case SND_SOC_DAPM_PRE_PMD:
- snd_soc_update_bits(codec, w->reg, 0x01, 0x00);
- snd_soc_update_bits(codec, w->reg, 0x40, 0x40);
- break;
- }
- return 0;
-}
-
-
static int taiko_get_anc_slot(struct snd_kcontrol *kcontrol,
struct snd_ctl_elem_value *ucontrol)
{
@@ -905,6 +844,17 @@
static const struct soc_enum cf_rxmix7_enum =
SOC_ENUM_SINGLE(TAIKO_A_CDC_RX7_B4_CTL, 1, 3, cf_text);
+static const char * const class_h_dsm_text[] = {
+ "ZERO", "DSM_HPHL_RX1", "DSM_SPKR_RX7"
+};
+
+static const struct soc_enum class_h_dsm_enum =
+ SOC_ENUM_SINGLE(TAIKO_A_CDC_CONN_CLSH_CTL, 4, 3, class_h_dsm_text);
+
+static const struct snd_kcontrol_new class_h_dsm_mux =
+ SOC_DAPM_ENUM("CLASS_H_DSM MUX Mux", class_h_dsm_enum);
+
+
static const struct snd_kcontrol_new taiko_snd_controls[] = {
SOC_ENUM_EXT("EAR PA Gain", taiko_ear_pa_gain_enum[0],
@@ -1842,11 +1792,12 @@
if (enable) {
taiko->adc_count++;
- snd_soc_update_bits(codec, TAIKO_A_CDC_CLK_OTHR_CTL, 0x2, 0x2);
+ snd_soc_update_bits(codec, WCD9XXX_A_CDC_CLK_OTHR_CTL,
+ 0x2, 0x2);
} else {
taiko->adc_count--;
if (!taiko->adc_count)
- snd_soc_update_bits(codec, TAIKO_A_CDC_CLK_OTHR_CTL,
+ snd_soc_update_bits(codec, WCD9XXX_A_CDC_CLK_OTHR_CTL,
0x2, 0x0);
}
}
@@ -1934,6 +1885,7 @@
struct snd_kcontrol *kcontrol, int event)
{
struct snd_soc_codec *codec = w->codec;
+ struct taiko_priv *taiko = snd_soc_codec_get_drvdata(codec);
u16 lineout_gain_reg;
pr_debug("%s %d %s\n", __func__, event, w->name);
@@ -1962,11 +1914,19 @@
snd_soc_update_bits(codec, lineout_gain_reg, 0x40, 0x40);
break;
case SND_SOC_DAPM_POST_PMU:
- pr_debug("%s: sleeping 16 ms after %s PA turn on\n",
+ wcd9xxx_clsh_fsm(codec, &taiko->clsh_d,
+ WCD9XXX_CLSH_STATE_LO,
+ WCD9XXX_CLSH_REQ_ENABLE,
+ WCD9XXX_CLSH_EVENT_POST_PA);
+ pr_debug("%s: sleeping 3 ms after %s PA turn on\n",
__func__, w->name);
- usleep_range(16000, 16000);
+ usleep_range(3000, 3000);
break;
case SND_SOC_DAPM_POST_PMD:
+ wcd9xxx_clsh_fsm(codec, &taiko->clsh_d,
+ WCD9XXX_CLSH_STATE_LO,
+ WCD9XXX_CLSH_REQ_DISABLE,
+ WCD9XXX_CLSH_EVENT_POST_PA);
snd_soc_update_bits(codec, lineout_gain_reg, 0x40, 0x00);
break;
}
@@ -2169,45 +2129,44 @@
{
struct snd_soc_codec *codec = w->codec;
struct taiko_priv *taiko = snd_soc_codec_get_drvdata(codec);
- u16 micb_int_reg;
+ u16 micb_int_reg = 0, micb_ctl_reg = 0;
u8 cfilt_sel_val = 0;
char *internal1_text = "Internal1";
char *internal2_text = "Internal2";
char *internal3_text = "Internal3";
enum wcd9xxx_notify_event e_post_off, e_pre_on, e_post_on;
- pr_debug("%s %d\n", __func__, event);
- switch (w->reg) {
- case TAIKO_A_MICB_1_CTL:
+ pr_debug("%s: w->name %s event %d\n", __func__, w->name, event);
+ if (strnstr(w->name, "MIC BIAS1", sizeof("MIC BIAS1"))) {
+ micb_ctl_reg = TAIKO_A_MICB_1_CTL;
micb_int_reg = TAIKO_A_MICB_1_INT_RBIAS;
cfilt_sel_val = taiko->resmgr.pdata->micbias.bias1_cfilt_sel;
e_pre_on = WCD9XXX_EVENT_PRE_MICBIAS_1_ON;
e_post_on = WCD9XXX_EVENT_POST_MICBIAS_1_ON;
e_post_off = WCD9XXX_EVENT_POST_MICBIAS_1_OFF;
- break;
- case TAIKO_A_MICB_2_CTL:
+ } else if (strnstr(w->name, "MIC BIAS2", sizeof("MIC BIAS2"))) {
+ micb_ctl_reg = TAIKO_A_MICB_2_CTL;
micb_int_reg = TAIKO_A_MICB_2_INT_RBIAS;
cfilt_sel_val = taiko->resmgr.pdata->micbias.bias2_cfilt_sel;
e_pre_on = WCD9XXX_EVENT_PRE_MICBIAS_2_ON;
e_post_on = WCD9XXX_EVENT_POST_MICBIAS_2_ON;
e_post_off = WCD9XXX_EVENT_POST_MICBIAS_2_OFF;
- break;
- case TAIKO_A_MICB_3_CTL:
+ } else if (strnstr(w->name, "MIC BIAS3", sizeof("MIC BIAS3"))) {
+ micb_ctl_reg = TAIKO_A_MICB_2_CTL;
micb_int_reg = TAIKO_A_MICB_3_INT_RBIAS;
cfilt_sel_val = taiko->resmgr.pdata->micbias.bias3_cfilt_sel;
e_pre_on = WCD9XXX_EVENT_PRE_MICBIAS_3_ON;
e_post_on = WCD9XXX_EVENT_POST_MICBIAS_3_ON;
e_post_off = WCD9XXX_EVENT_POST_MICBIAS_3_OFF;
- break;
- case TAIKO_A_MICB_4_CTL:
+ } else if (strnstr(w->name, "MIC BIAS4", sizeof("MIC BIAS4"))) {
+ micb_ctl_reg = TAIKO_A_MICB_2_CTL;
micb_int_reg = taiko->resmgr.reg_addr->micb_4_int_rbias;
cfilt_sel_val = taiko->resmgr.pdata->micbias.bias4_cfilt_sel;
e_pre_on = WCD9XXX_EVENT_PRE_MICBIAS_4_ON;
e_post_on = WCD9XXX_EVENT_POST_MICBIAS_4_ON;
e_post_off = WCD9XXX_EVENT_POST_MICBIAS_4_OFF;
- break;
- default:
- pr_err("%s: Error, invalid micbias register\n", __func__);
+ } else {
+ pr_err("%s: Error, invalid micbias %s\n", __func__, w->name);
return -EINVAL;
}
@@ -2226,6 +2185,16 @@
else if (strnstr(w->name, internal3_text, 30))
snd_soc_update_bits(codec, micb_int_reg, 0x3, 0x3);
+ if (micb_ctl_reg == TAIKO_A_MICB_2_CTL) {
+ WCD9XXX_BCL_LOCK(&taiko->resmgr);
+ wcd9xxx_resmgr_add_cond_update_bits(&taiko->resmgr,
+ WCD9XXX_COND_HPH_MIC,
+ micb_ctl_reg, w->shift,
+ false);
+ WCD9XXX_BCL_UNLOCK(&taiko->resmgr);
+ } else
+ snd_soc_update_bits(codec, micb_ctl_reg, 1 << w->shift,
+ 1 << w->shift);
break;
case SND_SOC_DAPM_POST_PMU:
usleep_range(20000, 20000);
@@ -2233,6 +2202,16 @@
wcd9xxx_resmgr_notifier_call(&taiko->resmgr, e_post_on);
break;
case SND_SOC_DAPM_POST_PMD:
+ if (micb_ctl_reg == TAIKO_A_MICB_2_CTL) {
+ WCD9XXX_BCL_LOCK(&taiko->resmgr);
+ wcd9xxx_resmgr_rm_cond_update_bits(&taiko->resmgr,
+ WCD9XXX_COND_HPH_MIC,
+ micb_ctl_reg, 7, false);
+ WCD9XXX_BCL_UNLOCK(&taiko->resmgr);
+ } else
+ snd_soc_update_bits(codec, micb_ctl_reg, 1 << w->shift,
+ 0);
+
/* Let MBHC module know so micbias switch to be off */
wcd9xxx_resmgr_notifier_call(&taiko->resmgr, e_post_off);
@@ -2496,18 +2475,52 @@
}
return 0;
}
-static int taiko_hphr_dac_event(struct snd_soc_dapm_widget *w,
+
+static int taiko_hphl_dac_event(struct snd_soc_dapm_widget *w,
struct snd_kcontrol *kcontrol, int event)
{
struct snd_soc_codec *codec = w->codec;
+ struct taiko_priv *taiko_p = snd_soc_codec_get_drvdata(codec);
pr_debug("%s %s %d\n", __func__, w->name, event);
switch (event) {
case SND_SOC_DAPM_PRE_PMU:
- snd_soc_update_bits(codec, w->reg, 0x40, 0x40);
+ snd_soc_update_bits(codec, TAIKO_A_CDC_CLK_RDAC_CLK_EN_CTL,
+ 0x02, 0x02);
+ wcd9xxx_clsh_fsm(codec, &taiko_p->clsh_d,
+ WCD9XXX_CLSH_STATE_HPHL,
+ WCD9XXX_CLSH_REQ_ENABLE,
+ WCD9XXX_CLSH_EVENT_PRE_DAC);
break;
case SND_SOC_DAPM_POST_PMD:
+ snd_soc_update_bits(codec, TAIKO_A_CDC_CLK_RDAC_CLK_EN_CTL,
+ 0x02, 0x00);
+ }
+ return 0;
+}
+
+static int taiko_hphr_dac_event(struct snd_soc_dapm_widget *w,
+ struct snd_kcontrol *kcontrol, int event)
+{
+ struct snd_soc_codec *codec = w->codec;
+ struct taiko_priv *taiko_p = snd_soc_codec_get_drvdata(codec);
+
+ pr_debug("%s %s %d\n", __func__, w->name, event);
+
+ switch (event) {
+ case SND_SOC_DAPM_PRE_PMU:
+ snd_soc_update_bits(codec, TAIKO_A_CDC_CLK_RDAC_CLK_EN_CTL,
+ 0x04, 0x04);
+ snd_soc_update_bits(codec, w->reg, 0x40, 0x40);
+ wcd9xxx_clsh_fsm(codec, &taiko_p->clsh_d,
+ WCD9XXX_CLSH_STATE_HPHR,
+ WCD9XXX_CLSH_REQ_ENABLE,
+ WCD9XXX_CLSH_EVENT_PRE_DAC);
+ break;
+ case SND_SOC_DAPM_POST_PMD:
+ snd_soc_update_bits(codec, TAIKO_A_CDC_CLK_RDAC_CLK_EN_CTL,
+ 0x04, 0x00);
snd_soc_update_bits(codec, w->reg, 0x40, 0x00);
break;
}
@@ -2520,14 +2533,17 @@
struct snd_soc_codec *codec = w->codec;
struct taiko_priv *taiko = snd_soc_codec_get_drvdata(codec);
enum wcd9xxx_notify_event e_pre_on, e_post_off;
+ u8 req_clsh_state;
pr_debug("%s: %s event = %d\n", __func__, w->name, event);
if (w->shift == 5) {
e_pre_on = WCD9XXX_EVENT_PRE_HPHR_PA_ON;
e_post_off = WCD9XXX_EVENT_POST_HPHR_PA_OFF;
+ req_clsh_state = WCD9XXX_CLSH_STATE_HPHL;
} else if (w->shift == 4) {
e_pre_on = WCD9XXX_EVENT_PRE_HPHL_PA_ON;
e_post_off = WCD9XXX_EVENT_POST_HPHL_PA_OFF;
+ req_clsh_state = WCD9XXX_CLSH_STATE_HPHR;
} else {
pr_err("%s: Invalid w->shift %d\n", __func__, w->shift);
return -EINVAL;
@@ -2540,29 +2556,27 @@
break;
case SND_SOC_DAPM_POST_PMU:
- usleep_range(10000, 10000);
+ wcd9xxx_clsh_fsm(codec, &taiko->clsh_d,
+ req_clsh_state,
+ WCD9XXX_CLSH_REQ_ENABLE,
+ WCD9XXX_CLSH_EVENT_POST_PA);
- snd_soc_update_bits(codec, TAIKO_A_BUCK_MODE_5, 0x02, 0x00);
- snd_soc_update_bits(codec, TAIKO_A_NCP_STATIC, 0x20, 0x00);
- snd_soc_update_bits(codec, TAIKO_A_BUCK_MODE_3, 0x04, 0x04);
- snd_soc_update_bits(codec, TAIKO_A_BUCK_MODE_3, 0x08, 0x00);
- usleep_range(10, 10);
+ usleep_range(5000, 5000);
break;
case SND_SOC_DAPM_POST_PMD:
/* Let MBHC module know PA turned off */
wcd9xxx_resmgr_notifier_call(&taiko->resmgr, e_post_off);
- /*
- * schedule work is required because at the time HPH PA DAPM
- * event callback is called by DAPM framework, CODEC dapm mutex
- * would have been locked while snd_soc_jack_report also
- * attempts to acquire same lock.
- */
+ wcd9xxx_clsh_fsm(codec, &taiko->clsh_d,
+ req_clsh_state,
+ WCD9XXX_CLSH_REQ_DISABLE,
+ WCD9XXX_CLSH_EVENT_POST_PA);
+
pr_debug("%s: sleep 10 ms after %s PA disable.\n", __func__,
w->name);
- usleep_range(10000, 10000);
+ usleep_range(5000, 5000);
break;
}
return 0;
@@ -2579,11 +2593,16 @@
struct snd_kcontrol *kcontrol, int event)
{
struct snd_soc_codec *codec = w->codec;
+ struct taiko_priv *taiko = snd_soc_codec_get_drvdata(codec);
pr_debug("%s %s %d\n", __func__, w->name, event);
switch (event) {
case SND_SOC_DAPM_PRE_PMU:
+ wcd9xxx_clsh_fsm(codec, &taiko->clsh_d,
+ WCD9XXX_CLSH_STATE_LO,
+ WCD9XXX_CLSH_REQ_ENABLE,
+ WCD9XXX_CLSH_EVENT_PRE_DAC);
snd_soc_update_bits(codec, w->reg, 0x40, 0x40);
break;
@@ -2738,15 +2757,11 @@
{"SLIM TX10 MUX", "DEC9", "DEC9 MUX"},
{"SLIM TX10 MUX", "DEC10", "DEC10 MUX"},
- /* Change Pump */
- {"CP", NULL, "CLASS_H_CLK"},
-
/* Earpiece (RX MIX1) */
{"EAR", NULL, "EAR PA"},
{"EAR PA", NULL, "EAR_PA_MIXER"},
{"EAR_PA_MIXER", NULL, "DAC1"},
- {"DAC1", NULL, "CLASS_H_EAR"},
- {"CLASS_H_EAR", NULL, "CP"},
+ {"DAC1", NULL, "RX_BIAS"},
{"ANC1 FB MUX", "EAR_HPH_L", "RX1 MIX2"},
{"ANC1 FB MUX", "EAR_LINE_1", "RX2 MIX2"},
@@ -2758,15 +2773,11 @@
{"HPHL", NULL, "HPHL_PA_MIXER"},
{"HPHL_PA_MIXER", NULL, "HPHL DAC"},
+ {"HPHL DAC", NULL, "RX_BIAS"},
{"HPHR", NULL, "HPHR_PA_MIXER"},
{"HPHR_PA_MIXER", NULL, "HPHR DAC"},
-
- {"HPHL DAC", NULL, "CLASS_H_HPH_L"},
- {"CLASS_H_HPH_L", NULL, "CP"},
-
- {"HPHR DAC", NULL, "CLASS_H_HPH_R"},
- {"CLASS_H_HPH_R", NULL, "CP"},
+ {"HPHR DAC", NULL, "RX_BIAS"},
{"ANC", NULL, "ANC1 MUX"},
{"ANC", NULL, "ANC2 MUX"},
@@ -2781,8 +2792,8 @@
{"ANC", NULL, "CDC_CONN"},
- {"DAC1", "Switch", "RX1 CHAIN"},
- {"HPHL DAC", "Switch", "RX1 CHAIN"},
+ {"DAC1", "Switch", "CLASS_H_DSM MUX"},
+ {"HPHL DAC", "Switch", "CLASS_H_DSM MUX"},
{"HPHR DAC", NULL, "RX2 CHAIN"},
{"LINEOUT1", NULL, "LINEOUT1 PA"},
@@ -2791,30 +2802,20 @@
{"LINEOUT4", NULL, "LINEOUT4 PA"},
{"SPK_OUT", NULL, "SPK PA"},
- {"LINEOUT1 PA", NULL, "CP"},
{"LINEOUT1 PA", NULL, "LINEOUT1_PA_MIXER"},
{"LINEOUT1_PA_MIXER", NULL, "LINEOUT1 DAC"},
- {"LINEOUT2 PA", NULL, "CP"},
{"LINEOUT2 PA", NULL, "LINEOUT2_PA_MIXER"},
{"LINEOUT2_PA_MIXER", NULL, "LINEOUT2 DAC"},
- {"LINEOUT3 PA", NULL, "CP"},
{"LINEOUT3 PA", NULL, "LINEOUT3_PA_MIXER"},
{"LINEOUT3_PA_MIXER", NULL, "LINEOUT3 DAC"},
- {"LINEOUT4 PA", NULL, "CP"},
{"LINEOUT4 PA", NULL, "LINEOUT4_PA_MIXER"},
{"LINEOUT4_PA_MIXER", NULL, "LINEOUT4 DAC"},
- {"CP", NULL, "CLASS_H_LINEOUTS_PA"},
- {"CLASS_H_LINEOUTS_PA", NULL, "CLASS_H_CLK"},
-
-
-
{"LINEOUT1 DAC", NULL, "RX3 MIX1"},
-
{"RDAC5 MUX", "DEM3_INV", "RX3 MIX1"},
{"RDAC5 MUX", "DEM4", "RX4 MIX1"},
@@ -2831,12 +2832,13 @@
{"SPK DAC", NULL, "RX7 MIX2"},
{"SPK DAC", NULL, "VDD_SPKDRV"},
+ {"CLASS_H_DSM MUX", "DSM_HPHL_RX1", "RX1 CHAIN"},
+
{"RX1 CHAIN", NULL, "RX1 MIX2"},
{"RX2 CHAIN", NULL, "RX2 MIX2"},
{"RX1 CHAIN", NULL, "ANC"},
{"RX2 CHAIN", NULL, "ANC"},
- {"CLASS_H_CLK", NULL, "RX_BIAS"},
{"LINEOUT1 DAC", NULL, "RX_BIAS"},
{"LINEOUT2 DAC", NULL, "RX_BIAS"},
{"LINEOUT3 DAC", NULL, "RX_BIAS"},
@@ -3967,24 +3969,81 @@
struct snd_kcontrol *kcontrol, int event)
{
struct snd_soc_codec *codec = w->codec;
+ struct taiko_priv *taiko_p = snd_soc_codec_get_drvdata(codec);
pr_debug("%s %s %d\n", __func__, w->name, event);
switch (event) {
- break;
case SND_SOC_DAPM_POST_PMU:
-
- snd_soc_update_bits(codec, TAIKO_A_BUCK_MODE_5, 0x02, 0x00);
- snd_soc_update_bits(codec, TAIKO_A_NCP_STATIC, 0x20, 0x00);
- snd_soc_update_bits(codec, TAIKO_A_BUCK_MODE_3, 0x04, 0x04);
- snd_soc_update_bits(codec, TAIKO_A_BUCK_MODE_3, 0x08, 0x00);
+ wcd9xxx_clsh_fsm(codec, &taiko_p->clsh_d,
+ WCD9XXX_CLSH_STATE_EAR,
+ WCD9XXX_CLSH_REQ_ENABLE,
+ WCD9XXX_CLSH_EVENT_POST_PA);
usleep_range(5000, 5000);
break;
+ case SND_SOC_DAPM_POST_PMD:
+ wcd9xxx_clsh_fsm(codec, &taiko_p->clsh_d,
+ WCD9XXX_CLSH_STATE_EAR,
+ WCD9XXX_CLSH_REQ_DISABLE,
+ WCD9XXX_CLSH_EVENT_POST_PA);
+ usleep_range(5000, 5000);
+ }
+ return 0;
+}
+
+static int taiko_codec_ear_dac_event(struct snd_soc_dapm_widget *w,
+ struct snd_kcontrol *kcontrol, int event)
+{
+ struct snd_soc_codec *codec = w->codec;
+ struct taiko_priv *taiko_p = snd_soc_codec_get_drvdata(codec);
+
+ pr_debug("%s %s %d\n", __func__, w->name, event);
+
+ switch (event) {
+ case SND_SOC_DAPM_PRE_PMU:
+ wcd9xxx_clsh_fsm(codec, &taiko_p->clsh_d,
+ WCD9XXX_CLSH_STATE_EAR,
+ WCD9XXX_CLSH_REQ_ENABLE,
+ WCD9XXX_CLSH_EVENT_PRE_DAC);
+ break;
+ }
+
+ return 0;
+}
+
+static int taiko_codec_dsm_mux_event(struct snd_soc_dapm_widget *w,
+ struct snd_kcontrol *kcontrol, int event)
+{
+ struct snd_soc_codec *codec = w->codec;
+ u8 reg_val, zoh_mux_val = 0x00;
+
+ pr_debug("%s: event = %d\n", __func__, event);
+
+ switch (event) {
+ case SND_SOC_DAPM_POST_PMU:
+ reg_val = snd_soc_read(codec, TAIKO_A_CDC_CONN_CLSH_CTL);
+
+ if ((reg_val & 0x30) == 0x10)
+ zoh_mux_val = 0x04;
+ else if ((reg_val & 0x30) == 0x20)
+ zoh_mux_val = 0x08;
+
+ if (zoh_mux_val != 0x00)
+ snd_soc_update_bits(codec,
+ TAIKO_A_CDC_CONN_CLSH_CTL,
+ 0x0C, zoh_mux_val);
+ break;
+
+ case SND_SOC_DAPM_POST_PMD:
+ snd_soc_update_bits(codec, TAIKO_A_CDC_CONN_CLSH_CTL,
+ 0x0C, 0x00);
+ break;
}
return 0;
}
+
/* Todo: Have seperate dapm widgets for I2S and Slimbus.
* Might Need to have callbacks registered only for slimbus
*/
@@ -3993,10 +4052,12 @@
SND_SOC_DAPM_OUTPUT("EAR"),
SND_SOC_DAPM_PGA_E("EAR PA", TAIKO_A_RX_EAR_EN, 4, 0, NULL, 0,
- taiko_codec_enable_ear_pa, SND_SOC_DAPM_POST_PMU),
+ taiko_codec_enable_ear_pa, SND_SOC_DAPM_POST_PMU |
+ SND_SOC_DAPM_POST_PMD),
- SND_SOC_DAPM_MIXER("DAC1", TAIKO_A_RX_EAR_EN, 6, 0, dac1_switch,
- ARRAY_SIZE(dac1_switch)),
+ SND_SOC_DAPM_MIXER_E("DAC1", TAIKO_A_RX_EAR_EN, 6, 0, dac1_switch,
+ ARRAY_SIZE(dac1_switch), taiko_codec_ear_dac_event,
+ SND_SOC_DAPM_PRE_PMU),
SND_SOC_DAPM_AIF_IN_E("AIF1 PB", "AIF1 Playback", 0, SND_SOC_NOPM,
AIF1_PB, 0, taiko_codec_enable_slimrx,
@@ -4036,8 +4097,9 @@
SND_SOC_DAPM_PGA_E("HPHL", TAIKO_A_RX_HPH_CNP_EN, 5, 0, NULL, 0,
taiko_hph_pa_event, SND_SOC_DAPM_PRE_PMU |
SND_SOC_DAPM_POST_PMU | SND_SOC_DAPM_POST_PMD),
- SND_SOC_DAPM_MIXER("HPHL DAC", TAIKO_A_RX_HPH_L_DAC_CTL, 7, 0,
- hphl_switch, ARRAY_SIZE(hphl_switch)),
+ SND_SOC_DAPM_MIXER_E("HPHL DAC", TAIKO_A_RX_HPH_L_DAC_CTL, 7, 0,
+ hphl_switch, ARRAY_SIZE(hphl_switch), taiko_hphl_dac_event,
+ SND_SOC_DAPM_PRE_PMU | SND_SOC_DAPM_POST_PMD),
SND_SOC_DAPM_PGA_E("HPHR", TAIKO_A_RX_HPH_CNP_EN, 4, 0, NULL, 0,
taiko_hph_pa_event, SND_SOC_DAPM_PRE_PMU |
@@ -4173,36 +4235,20 @@
SND_SOC_DAPM_MUX("RDAC7 MUX", SND_SOC_NOPM, 0, 0,
&rx_dac7_mux),
- SND_SOC_DAPM_SUPPLY("CLASS_H_CLK", TAIKO_A_CDC_CLK_OTHR_CTL, 0, 0,
- taiko_codec_enable_class_h_clk, SND_SOC_DAPM_PRE_PMU |
- SND_SOC_DAPM_PRE_PMD),
-
- SND_SOC_DAPM_SUPPLY("CLASS_H_EAR", TAIKO_A_CDC_CLSH_B1_CTL, 4, 0,
- taiko_codec_enable_class_h, SND_SOC_DAPM_POST_PMU),
-
- SND_SOC_DAPM_SUPPLY("CLASS_H_HPH_L", TAIKO_A_CDC_CLSH_B1_CTL, 3, 0,
- taiko_codec_enable_class_h, SND_SOC_DAPM_POST_PMU),
-
- SND_SOC_DAPM_SUPPLY("CLASS_H_HPH_R", TAIKO_A_CDC_CLSH_B1_CTL, 2, 0,
- taiko_codec_enable_class_h, SND_SOC_DAPM_POST_PMU),
-
- SND_SOC_DAPM_SUPPLY("CLASS_H_LINEOUTS_PA", SND_SOC_NOPM, 0, 0,
- taiko_codec_enable_class_h, SND_SOC_DAPM_POST_PMU),
-
- SND_SOC_DAPM_SUPPLY("CP", TAIKO_A_NCP_EN, 0, 0,
- taiko_codec_enable_charge_pump, SND_SOC_DAPM_PRE_PMU |
- SND_SOC_DAPM_POST_PMU | SND_SOC_DAPM_PRE_PMD),
+ SND_SOC_DAPM_MUX_E("CLASS_H_DSM MUX", SND_SOC_NOPM, 0, 0,
+ &class_h_dsm_mux, taiko_codec_dsm_mux_event,
+ SND_SOC_DAPM_POST_PMU | SND_SOC_DAPM_POST_PMD),
SND_SOC_DAPM_SUPPLY("RX_BIAS", SND_SOC_NOPM, 0, 0,
taiko_codec_enable_rx_bias, SND_SOC_DAPM_PRE_PMU |
SND_SOC_DAPM_POST_PMD),
- SND_SOC_DAPM_SUPPLY("CDC_I2S_RX_CONN", TAIKO_A_CDC_CLK_OTHR_CTL, 5, 0,
+ SND_SOC_DAPM_SUPPLY("CDC_I2S_RX_CONN", WCD9XXX_A_CDC_CLK_OTHR_CTL, 5, 0,
NULL, 0),
/* TX */
- SND_SOC_DAPM_SUPPLY("CDC_CONN", TAIKO_A_CDC_CLK_OTHR_CTL, 2, 0, NULL,
+ SND_SOC_DAPM_SUPPLY("CDC_CONN", WCD9XXX_A_CDC_CLK_OTHR_CTL, 2, 0, NULL,
0),
SND_SOC_DAPM_SUPPLY("LDO_H", TAIKO_A_LDO_H_MODE_1, 7, 0,
@@ -4220,15 +4266,18 @@
SND_SOC_DAPM_INPUT("AMIC1"),
- SND_SOC_DAPM_MICBIAS_E("MIC BIAS1 External", TAIKO_A_MICB_1_CTL, 7, 0,
- taiko_codec_enable_micbias, SND_SOC_DAPM_PRE_PMU |
- SND_SOC_DAPM_POST_PMU | SND_SOC_DAPM_POST_PMD),
- SND_SOC_DAPM_MICBIAS_E("MIC BIAS1 Internal1", TAIKO_A_MICB_1_CTL, 7, 0,
- taiko_codec_enable_micbias, SND_SOC_DAPM_PRE_PMU |
- SND_SOC_DAPM_POST_PMU | SND_SOC_DAPM_POST_PMD),
- SND_SOC_DAPM_MICBIAS_E("MIC BIAS1 Internal2", TAIKO_A_MICB_1_CTL, 7, 0,
- taiko_codec_enable_micbias, SND_SOC_DAPM_PRE_PMU |
- SND_SOC_DAPM_POST_PMU | SND_SOC_DAPM_POST_PMD),
+ SND_SOC_DAPM_MICBIAS_E("MIC BIAS1 External", SND_SOC_NOPM, 7, 0,
+ taiko_codec_enable_micbias,
+ SND_SOC_DAPM_PRE_PMU | SND_SOC_DAPM_POST_PMU |
+ SND_SOC_DAPM_POST_PMD),
+ SND_SOC_DAPM_MICBIAS_E("MIC BIAS1 Internal1", SND_SOC_NOPM, 7, 0,
+ taiko_codec_enable_micbias,
+ SND_SOC_DAPM_PRE_PMU | SND_SOC_DAPM_POST_PMU |
+ SND_SOC_DAPM_POST_PMD),
+ SND_SOC_DAPM_MICBIAS_E("MIC BIAS1 Internal2", SND_SOC_NOPM, 7, 0,
+ taiko_codec_enable_micbias,
+ SND_SOC_DAPM_PRE_PMU | SND_SOC_DAPM_POST_PMU |
+ SND_SOC_DAPM_POST_PMD),
SND_SOC_DAPM_ADC_E("ADC1", NULL, TAIKO_A_TX_1_2_EN, 7, 0,
taiko_codec_enable_adc, SND_SOC_DAPM_PRE_PMU |
SND_SOC_DAPM_POST_PMU | SND_SOC_DAPM_POST_PMD),
@@ -4311,31 +4360,38 @@
SND_SOC_DAPM_MUX("ANC1 FB MUX", SND_SOC_NOPM, 0, 0, &anc1_fb_mux),
SND_SOC_DAPM_INPUT("AMIC2"),
- SND_SOC_DAPM_MICBIAS_E("MIC BIAS2 External", TAIKO_A_MICB_2_CTL, 7, 0,
- taiko_codec_enable_micbias, SND_SOC_DAPM_PRE_PMU |
- SND_SOC_DAPM_POST_PMU | SND_SOC_DAPM_POST_PMD),
- SND_SOC_DAPM_MICBIAS_E("MIC BIAS2 Internal1", TAIKO_A_MICB_2_CTL, 7, 0,
- taiko_codec_enable_micbias, SND_SOC_DAPM_PRE_PMU |
- SND_SOC_DAPM_POST_PMU | SND_SOC_DAPM_POST_PMD),
- SND_SOC_DAPM_MICBIAS_E("MIC BIAS2 Internal2", TAIKO_A_MICB_2_CTL, 7, 0,
- taiko_codec_enable_micbias, SND_SOC_DAPM_PRE_PMU |
- SND_SOC_DAPM_POST_PMU | SND_SOC_DAPM_POST_PMD),
- SND_SOC_DAPM_MICBIAS_E("MIC BIAS2 Internal3", TAIKO_A_MICB_2_CTL, 7, 0,
- taiko_codec_enable_micbias, SND_SOC_DAPM_PRE_PMU |
- SND_SOC_DAPM_POST_PMU | SND_SOC_DAPM_POST_PMD),
- SND_SOC_DAPM_MICBIAS_E("MIC BIAS3 External", TAIKO_A_MICB_3_CTL, 7, 0,
- taiko_codec_enable_micbias, SND_SOC_DAPM_PRE_PMU |
- SND_SOC_DAPM_POST_PMU | SND_SOC_DAPM_POST_PMD),
- SND_SOC_DAPM_MICBIAS_E("MIC BIAS3 Internal1", TAIKO_A_MICB_3_CTL, 7, 0,
- taiko_codec_enable_micbias, SND_SOC_DAPM_PRE_PMU |
- SND_SOC_DAPM_POST_PMU | SND_SOC_DAPM_POST_PMD),
- SND_SOC_DAPM_MICBIAS_E("MIC BIAS3 Internal2", TAIKO_A_MICB_3_CTL, 7, 0,
- taiko_codec_enable_micbias, SND_SOC_DAPM_PRE_PMU |
- SND_SOC_DAPM_POST_PMU | SND_SOC_DAPM_POST_PMD),
- SND_SOC_DAPM_MICBIAS_E("MIC BIAS4 External", TAIKO_A_MICB_4_CTL, 7,
- 0, taiko_codec_enable_micbias,
- SND_SOC_DAPM_PRE_PMU | SND_SOC_DAPM_POST_PMU |
- SND_SOC_DAPM_POST_PMD),
+ SND_SOC_DAPM_MICBIAS_E("MIC BIAS2 External", SND_SOC_NOPM, 7, 0,
+ taiko_codec_enable_micbias,
+ SND_SOC_DAPM_PRE_PMU | SND_SOC_DAPM_POST_PMU |
+ SND_SOC_DAPM_POST_PMD),
+ SND_SOC_DAPM_MICBIAS_E("MIC BIAS2 Internal1", SND_SOC_NOPM, 7, 0,
+ taiko_codec_enable_micbias,
+ SND_SOC_DAPM_PRE_PMU |
+ SND_SOC_DAPM_POST_PMU | SND_SOC_DAPM_POST_PMD),
+ SND_SOC_DAPM_MICBIAS_E("MIC BIAS2 Internal2", SND_SOC_NOPM, 7, 0,
+ taiko_codec_enable_micbias,
+ SND_SOC_DAPM_PRE_PMU | SND_SOC_DAPM_POST_PMU |
+ SND_SOC_DAPM_POST_PMD),
+ SND_SOC_DAPM_MICBIAS_E("MIC BIAS2 Internal3", SND_SOC_NOPM, 7, 0,
+ taiko_codec_enable_micbias,
+ SND_SOC_DAPM_PRE_PMU | SND_SOC_DAPM_POST_PMU |
+ SND_SOC_DAPM_POST_PMD),
+ SND_SOC_DAPM_MICBIAS_E("MIC BIAS3 External", SND_SOC_NOPM, 7, 0,
+ taiko_codec_enable_micbias,
+ SND_SOC_DAPM_PRE_PMU | SND_SOC_DAPM_POST_PMU |
+ SND_SOC_DAPM_POST_PMD),
+ SND_SOC_DAPM_MICBIAS_E("MIC BIAS3 Internal1", SND_SOC_NOPM, 7, 0,
+ taiko_codec_enable_micbias,
+ SND_SOC_DAPM_PRE_PMU |
+ SND_SOC_DAPM_POST_PMU | SND_SOC_DAPM_POST_PMD),
+ SND_SOC_DAPM_MICBIAS_E("MIC BIAS3 Internal2", SND_SOC_NOPM, 7, 0,
+ taiko_codec_enable_micbias,
+ SND_SOC_DAPM_PRE_PMU |
+ SND_SOC_DAPM_POST_PMU | SND_SOC_DAPM_POST_PMD),
+ SND_SOC_DAPM_MICBIAS_E("MIC BIAS4 External", SND_SOC_NOPM, 7,
+ 0, taiko_codec_enable_micbias,
+ SND_SOC_DAPM_PRE_PMU | SND_SOC_DAPM_POST_PMU |
+ SND_SOC_DAPM_POST_PMD),
SND_SOC_DAPM_ADC_E("ADC2", NULL, TAIKO_A_TX_1_2_EN, 3, 0,
taiko_codec_enable_adc, SND_SOC_DAPM_PRE_PMU |
@@ -4511,84 +4567,6 @@
return IRQ_HANDLED;
}
-static const struct taiko_reg_mask_val taiko_1_0_class_h_ear[] = {
-
- /* CLASS-H EAR IDLE_THRESHOLD Table */
- TAIKO_REG_VAL(TAIKO_A_CDC_CLSH_IDLE_EAR_THSD, 0x26),
- TAIKO_REG_VAL(TAIKO_A_CDC_CLSH_FCLKONLY_EAR_THSD, 0x2C),
-
- /* CLASS-H EAR I_PA_FACT Table. */
- TAIKO_REG_VAL(TAIKO_A_CDC_CLSH_I_PA_FACT_EAR_L, 0xA9),
- TAIKO_REG_VAL(TAIKO_A_CDC_CLSH_I_PA_FACT_EAR_U, 0x07),
-
- /* CLASS-H EAR Voltage Headroom , Voltage Min. */
- TAIKO_REG_VAL(TAIKO_A_CDC_CLSH_V_PA_HD_EAR, 0x0D),
- TAIKO_REG_VAL(TAIKO_A_CDC_CLSH_V_PA_MIN_EAR, 0x3A),
-
- /* CLASS-H EAR K values --chnages from load. */
- TAIKO_REG_VAL(TAIKO_A_CDC_CLSH_K_ADDR, 0x08),
- TAIKO_REG_VAL(TAIKO_A_CDC_CLSH_K_DATA, 0x1B),
- TAIKO_REG_VAL(TAIKO_A_CDC_CLSH_K_DATA, 0x00),
- TAIKO_REG_VAL(TAIKO_A_CDC_CLSH_K_DATA, 0x2D),
- TAIKO_REG_VAL(TAIKO_A_CDC_CLSH_K_DATA, 0x00),
- TAIKO_REG_VAL(TAIKO_A_CDC_CLSH_K_DATA, 0x36),
- TAIKO_REG_VAL(TAIKO_A_CDC_CLSH_K_DATA, 0x00),
- TAIKO_REG_VAL(TAIKO_A_CDC_CLSH_K_DATA, 0x37),
- TAIKO_REG_VAL(TAIKO_A_CDC_CLSH_K_DATA, 0x00),
- /** end of Ear PA load 32 */
-};
-
-static const struct taiko_reg_mask_val taiko_1_0_class_h_hph[] = {
-
- /* CLASS-H HPH IDLE_THRESHOLD Table */
- TAIKO_REG_VAL(TAIKO_A_CDC_CLSH_IDLE_HPH_THSD, 0x13),
- TAIKO_REG_VAL(TAIKO_A_CDC_CLSH_FCLKONLY_HPH_THSD, 0x19),
-
- /* CLASS-H HPH I_PA_FACT Table */
- TAIKO_REG_VAL(TAIKO_A_CDC_CLSH_I_PA_FACT_HPH_L, 0x9A),
- TAIKO_REG_VAL(TAIKO_A_CDC_CLSH_I_PA_FACT_HPH_U, 0x06),
-
- /* CLASS-H HPH Voltage Headroom , Voltage Min */
- TAIKO_REG_VAL(TAIKO_A_CDC_CLSH_V_PA_HD_HPH, 0x0D),
- TAIKO_REG_VAL(TAIKO_A_CDC_CLSH_V_PA_MIN_HPH, 0x1D),
-
- /* CLASS-H HPH K values --chnages from load .*/
- TAIKO_REG_VAL(TAIKO_A_CDC_CLSH_K_ADDR, 0x00),
- TAIKO_REG_VAL(TAIKO_A_CDC_CLSH_K_DATA, 0xAE),
- TAIKO_REG_VAL(TAIKO_A_CDC_CLSH_K_DATA, 0x01),
- TAIKO_REG_VAL(TAIKO_A_CDC_CLSH_K_DATA, 0x1C),
- TAIKO_REG_VAL(TAIKO_A_CDC_CLSH_K_DATA, 0x00),
- TAIKO_REG_VAL(TAIKO_A_CDC_CLSH_K_DATA, 0x25),
- TAIKO_REG_VAL(TAIKO_A_CDC_CLSH_K_DATA, 0x00),
- TAIKO_REG_VAL(TAIKO_A_CDC_CLSH_K_DATA, 0x27),
- TAIKO_REG_VAL(TAIKO_A_CDC_CLSH_K_DATA, 0x00),
-};
-
-static int taiko_config_ear_class_h(struct snd_soc_codec *codec, u32 ear_load)
-{
- u32 i;
-
- if (ear_load != 32)
- return -EINVAL;
-
- for (i = 0; i < ARRAY_SIZE(taiko_1_0_class_h_ear); i++)
- snd_soc_write(codec, taiko_1_0_class_h_ear[i].reg,
- taiko_1_0_class_h_ear[i].val);
- return 0;
-}
-
-static int taiko_config_hph_class_h(struct snd_soc_codec *codec, u32 hph_load)
-{
- u32 i;
- if (hph_load != 16)
- return -EINVAL;
-
- for (i = 0; i < ARRAY_SIZE(taiko_1_0_class_h_hph); i++)
- snd_soc_write(codec, taiko_1_0_class_h_hph[i].reg,
- taiko_1_0_class_h_hph[i].val);
- return 0;
-}
-
static int taiko_handle_pdata(struct taiko_priv *taiko)
{
struct snd_soc_codec *codec = taiko->codec;
@@ -4727,14 +4705,11 @@
0x00 : 0x16);
snd_soc_update_bits(codec, TAIKO_A_MICB_4_CTL, 0x1E, value);
- taiko_config_ear_class_h(codec, 32);
- taiko_config_hph_class_h(codec, 16);
-
done:
return rc;
}
-static const struct taiko_reg_mask_val taiko_reg_defaults[] = {
+static const struct wcd9xxx_reg_mask_val taiko_reg_defaults[] = {
/* set MCLk to 9.6 */
TAIKO_REG_VAL(TAIKO_A_CHIP_CTL, 0x02),
@@ -4743,24 +4718,6 @@
/* EAR PA deafults */
TAIKO_REG_VAL(TAIKO_A_RX_EAR_CMBUFF, 0x05),
- /* BUCK and NCP defaults for EAR and HS */
- TAIKO_REG_VAL(TAIKO_A_BUCK_CTRL_CCL_1, 0x5B),
-
- /* CLASS-H defaults for EAR and HS */
- TAIKO_REG_VAL(TAIKO_A_CDC_CLSH_BUCK_NCP_VARS, 0x00),
- TAIKO_REG_VAL(TAIKO_A_CDC_CLSH_BUCK_NCP_VARS, 0x04),
- TAIKO_REG_VAL(TAIKO_A_CDC_CLSH_B2_CTL, 0x01),
- TAIKO_REG_VAL(TAIKO_A_CDC_CLSH_B2_CTL, 0x05),
- TAIKO_REG_VAL(TAIKO_A_CDC_CLSH_B2_CTL, 0x35),
- TAIKO_REG_VAL(TAIKO_A_CDC_CLSH_B3_CTL, 0x30),
- TAIKO_REG_VAL(TAIKO_A_CDC_CLSH_B3_CTL, 0x3B),
-
- /*
- * For CLASS-H, Enable ANC delay buffer,
- * set HPHL and EAR PA ref gain to 0 DB.
- */
- TAIKO_REG_VAL(TAIKO_A_CDC_CLSH_B1_CTL, 0x26),
-
/* RX deafults */
TAIKO_REG_VAL(TAIKO_A_CDC_RX1_B5_CTL, 0x78),
TAIKO_REG_VAL(TAIKO_A_CDC_RX2_B5_CTL, 0x78),
@@ -4782,25 +4739,31 @@
TAIKO_REG_VAL(TAIKO_A_CDC_RX7_B6_CTL, 0x80),
};
-static const struct taiko_reg_mask_val taiko_1_0_reg_defaults[] = {
+static const struct wcd9xxx_reg_mask_val taiko_1_0_reg_defaults[] = {
/*
* The following only need to be written for Taiko 1.0 parts.
* Taiko 2.0 will have appropriate defaults for these registers.
*/
/* BUCK default */
- TAIKO_REG_VAL(TAIKO_A_BUCK_CTRL_CCL_4, 0x50),
+ TAIKO_REG_VAL(WCD9XXX_A_BUCK_CTRL_CCL_4, 0x50),
+
+ /* Required defaults for class H operation */
+ TAIKO_REG_VAL(TAIKO_A_RX_HPH_CHOP_CTL, 0xF4),
+ TAIKO_REG_VAL(TAIKO_A_BIAS_CURR_CTL_2, 0x08),
+ TAIKO_REG_VAL(WCD9XXX_A_BUCK_CTRL_CCL_1, 0x5B),
+ TAIKO_REG_VAL(WCD9XXX_A_BUCK_CTRL_CCL_3, 0x60),
/* Choose max non-overlap time for NCP */
TAIKO_REG_VAL(TAIKO_A_NCP_CLK, 0xFC),
/* Use 25mV/50mV for deltap/m to reduce ripple */
- TAIKO_REG_VAL(TAIKO_A_BUCK_CTRL_VCL_1, 0x08),
+ TAIKO_REG_VAL(WCD9XXX_A_BUCK_CTRL_VCL_1, 0x08),
/*
* Set DISABLE_MODE_SEL<1:0> to 0b10 (disable PWM in auto mode).
* Note that the other bits of this register will be changed during
* Rx PA bring up.
*/
- TAIKO_REG_VAL(TAIKO_A_BUCK_MODE_3, 0xCE),
+ TAIKO_REG_VAL(WCD9XXX_A_BUCK_MODE_3, 0xCE),
/* Reduce HPH DAC bias to 70% */
TAIKO_REG_VAL(TAIKO_A_RX_HPH_BIAS_PA, 0x7A),
/*Reduce EAR DAC bias to 70% */
@@ -4829,7 +4792,7 @@
* Don't update TAIKO_A_CHIP_CTL, TAIKO_A_BUCK_CTRL_CCL_1 and
* TAIKO_A_RX_EAR_CMBUFF as those are updated in taiko_reg_defaults
*/
-static const struct taiko_reg_mask_val taiko_2_0_reg_defaults[] = {
+static const struct wcd9xxx_reg_mask_val taiko_2_0_reg_defaults[] = {
TAIKO_REG_VAL(TAIKO_A_CDC_TX_1_GAIN, 0x2),
TAIKO_REG_VAL(TAIKO_A_CDC_TX_2_GAIN, 0x2),
TAIKO_REG_VAL(TAIKO_A_CDC_TX_1_2_ADC_IB, 0x44),
@@ -4839,9 +4802,9 @@
TAIKO_REG_VAL(TAIKO_A_CDC_TX_5_GAIN, 0x2),
TAIKO_REG_VAL(TAIKO_A_CDC_TX_6_GAIN, 0x2),
TAIKO_REG_VAL(TAIKO_A_CDC_TX_5_6_ADC_IB, 0x44),
- TAIKO_REG_VAL(TAIKO_A_BUCK_MODE_3, 0xCE),
- TAIKO_REG_VAL(TAIKO_A_BUCK_CTRL_VCL_1, 0x8),
- TAIKO_REG_VAL(TAIKO_A_BUCK_CTRL_CCL_4, 0x51),
+ TAIKO_REG_VAL(WCD9XXX_A_BUCK_MODE_3, 0xCE),
+ TAIKO_REG_VAL(WCD9XXX_A_BUCK_CTRL_VCL_1, 0x8),
+ TAIKO_REG_VAL(WCD9XXX_A_BUCK_CTRL_CCL_4, 0x51),
TAIKO_REG_VAL(TAIKO_A_NCP_DTEST, 0x10),
TAIKO_REG_VAL(TAIKO_A_RX_HPH_CHOP_CTL, 0xA4),
TAIKO_REG_VAL(TAIKO_A_RX_HPH_BIAS_PA, 0x7A),
@@ -4902,7 +4865,7 @@
}
}
-static const struct taiko_reg_mask_val taiko_codec_reg_init_val[] = {
+static const struct wcd9xxx_reg_mask_val taiko_codec_reg_init_val[] = {
/* Initialize current threshold to 350MA
* number of wait and run cycles to 4096
*/
@@ -4920,9 +4883,6 @@
{TAIKO_A_RX_LINE_4_GAIN, 0x20, 0x20},
{TAIKO_A_SPKR_DRV_GAIN, 0x04, 0x04},
- /* CLASS H config */
- {TAIKO_A_CDC_CONN_CLSH_CTL, 0x3C, 0x14},
-
/* Use 16 bit sample size for TX1 to TX6 */
{TAIKO_A_CDC_CONN_TX_SB_B1_CTL, 0x30, 0x20},
{TAIKO_A_CDC_CONN_TX_SB_B2_CTL, 0x30, 0x20},
@@ -5072,6 +5032,24 @@
return 0;
}
+static int taiko_codec_get_buck_mv(struct snd_soc_codec *codec)
+{
+ int buck_volt = WCD9XXX_CDC_BUCK_UNSUPPORTED;
+ struct taiko_priv *taiko = snd_soc_codec_get_drvdata(codec);
+ struct wcd9xxx_pdata *pdata = taiko->resmgr.pdata;
+ int i;
+
+ for (i = 0; i < ARRAY_SIZE(pdata->regulator); i++) {
+ if (!strncmp(pdata->regulator[i].name,
+ WCD9XXX_SUPPLY_BUCK_NAME,
+ sizeof(WCD9XXX_SUPPLY_BUCK_NAME))) {
+ buck_volt = pdata->regulator[i].min_uV;
+ break;
+ }
+ }
+ return buck_volt;
+}
+
static int taiko_codec_probe(struct snd_soc_codec *codec)
{
struct wcd9xxx *control;
@@ -5103,8 +5081,10 @@
tx_hpf_corner_freq_callback);
}
+
snd_soc_codec_set_drvdata(codec, taiko);
+
/* codec resmgr module init */
wcd9xxx = codec->control_data;
pdata = dev_get_platdata(codec->dev->parent);
@@ -5115,6 +5095,9 @@
return ret;
}
+ taiko->clsh_d.buck_mv = taiko_codec_get_buck_mv(codec);
+ wcd9xxx_clsh_init(&taiko->clsh_d);
+
/* init and start mbhc */
ret = wcd9xxx_mbhc_init(&taiko->mbhc, &taiko->resmgr, codec);
if (ret) {
diff --git a/sound/soc/codecs/wcd9320.h b/sound/soc/codecs/wcd9320.h
index aea31db..89a0b9f 100644
--- a/sound/soc/codecs/wcd9320.h
+++ b/sound/soc/codecs/wcd9320.h
@@ -41,12 +41,6 @@
TAIKO_PID_MIC_20_UA,
};
-struct taiko_reg_mask_val {
- u16 reg;
- u8 mask;
- u8 val;
-};
-
enum taiko_mbhc_analog_pwr_cfg {
TAIKO_ANALOG_PWR_COLLAPSED = 0,
TAIKO_ANALOG_PWR_ON,
diff --git a/sound/soc/codecs/wcd9xxx-common.c b/sound/soc/codecs/wcd9xxx-common.c
new file mode 100644
index 0000000..dbf2e39
--- /dev/null
+++ b/sound/soc/codecs/wcd9xxx-common.c
@@ -0,0 +1,591 @@
+/* Copyright (c) 2013, The Linux Foundation. All rights reserved.
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License version 2 and
+ * only version 2 as published by the Free Software Foundation.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ */
+
+#include <linux/module.h>
+#include <sound/soc.h>
+#include <linux/kernel.h>
+#include <linux/delay.h>
+#include <linux/mfd/wcd9xxx/wcd9xxx_registers.h>
+#include "wcd9xxx-common.h"
+
+#define CLSH_COMPUTE_EAR 0x01
+#define CLSH_COMPUTE_HPH_L 0x02
+#define CLSH_COMPUTE_HPH_R 0x03
+
+#define BUCK_VREF_2V 0xFF
+#define BUCK_VREF_1P8V 0xE6
+
+#define NCP_FCLK_LEVEL_8 0x08
+#define NCP_FCLK_LEVEL_5 0x05
+
+#define BUCK_SETTLE_TIME_US 50
+#define NCP_SETTLE_TIME_US 50
+
+static inline void wcd9xxx_enable_clsh_block(
+ struct snd_soc_codec *codec,
+ bool on)
+{
+ snd_soc_update_bits(codec, WCD9XXX_A_CDC_CLSH_B1_CTL,
+ 0x01, on ? 0x01 : 0x00);
+}
+
+static inline void wcd9xxx_enable_anc_delay(
+ struct snd_soc_codec *codec,
+ bool on)
+{
+ snd_soc_update_bits(codec, WCD9XXX_A_CDC_CLSH_B1_CTL,
+ 0x02, on ? 0x02 : 0x00);
+}
+
+static inline void wcd9xxx_enable_ncp(
+ struct snd_soc_codec *codec,
+ bool on)
+{
+ snd_soc_update_bits(codec, WCD9XXX_A_NCP_EN,
+ 0x01, on ? 0x01 : 0x00);
+}
+
+static inline void wcd9xxx_enable_buck(
+ struct snd_soc_codec *codec,
+ bool on)
+{
+ snd_soc_update_bits(codec, WCD9XXX_A_BUCK_MODE_1,
+ 0x80, on ? 0x80 : 0x00);
+}
+
+static int cdc_lo_count;
+
+static void (*clsh_state_fp[NUM_CLSH_STATES])
+ (struct snd_soc_codec *,
+ struct wcd9xxx_clsh_cdc_data *,
+ u8 req_state, bool req_type);
+
+static const char *state_to_str(u8 state)
+{
+ if (state == WCD9XXX_CLSH_STATE_IDLE)
+ return "STATE_IDLE";
+ else if (state == WCD9XXX_CLSH_STATE_EAR)
+ return "STATE_EAR";
+ else if (state == WCD9XXX_CLSH_STATE_HPHL)
+ return "STATE_HPH_L";
+ else if (state == WCD9XXX_CLSH_STATE_HPHR)
+ return "STATE_HPH_R";
+ else if (state == (WCD9XXX_CLSH_STATE_HPHL
+ | WCD9XXX_CLSH_STATE_HPHR))
+ return "STATE_HPH_L_R";
+ else if (state == WCD9XXX_CLSH_STATE_LO)
+ return "STATE_LO";
+
+ return "UNKNOWN_STATE";
+}
+
+static void wcd9xxx_cfg_clsh_buck(
+ struct snd_soc_codec *codec)
+{
+ int i;
+ const struct wcd9xxx_reg_mask_val reg_set[] = {
+ {WCD9XXX_A_BUCK_CTRL_CCL_4, 0x0B, 0x00},
+ {WCD9XXX_A_BUCK_CTRL_CCL_1, 0xF0, 0x50},
+ {WCD9XXX_A_BUCK_CTRL_CCL_3, 0x03, 0x00},
+ {WCD9XXX_A_BUCK_CTRL_CCL_3, 0x0B, 0x00},
+ };
+
+ for (i = 0; i < ARRAY_SIZE(reg_set); i++)
+ snd_soc_update_bits(codec, reg_set[i].reg, reg_set[i].mask,
+ reg_set[i].val);
+
+ dev_dbg(codec->dev, "%s: Programmed buck parameters", __func__);
+}
+
+static void wcd9xxx_cfg_clsh_param_common(
+ struct snd_soc_codec *codec)
+{
+ int i;
+ const struct wcd9xxx_reg_mask_val reg_set[] = {
+ {WCD9XXX_A_CDC_CLSH_BUCK_NCP_VARS, 0x3 << 0, 0},
+ {WCD9XXX_A_CDC_CLSH_BUCK_NCP_VARS, 0x3 << 2, 1 << 2},
+ {WCD9XXX_A_CDC_CLSH_BUCK_NCP_VARS, (0x1 << 4), 0},
+ {WCD9XXX_A_CDC_CLSH_B2_CTL, (0x3 << 0), 0x01},
+ {WCD9XXX_A_CDC_CLSH_B2_CTL, (0x3 << 2), (0x01 << 2)},
+ {WCD9XXX_A_CDC_CLSH_B2_CTL, (0xf << 4), (0x03 << 4)},
+ {WCD9XXX_A_CDC_CLSH_B3_CTL, (0xf << 4), (0x03 << 4)},
+ {WCD9XXX_A_CDC_CLSH_B3_CTL, (0xf << 0), (0x0B)},
+ {WCD9XXX_A_CDC_CLSH_B1_CTL, (0x1 << 5), (0x01 << 5)},
+ {WCD9XXX_A_CDC_CLSH_B1_CTL, (0x1 << 1), (0x01 << 1)},
+ };
+
+ for (i = 0; i < ARRAY_SIZE(reg_set); i++)
+ snd_soc_update_bits(codec, reg_set[i].reg, reg_set[i].mask,
+ reg_set[i].val);
+
+ dev_dbg(codec->dev, "%s: Programmed class H controller common parameters",
+ __func__);
+}
+
+static void wcd9xxx_chargepump_request(
+ struct snd_soc_codec *codec, bool on)
+{
+ static int cp_count;
+
+ if (on && (++cp_count == 1)) {
+ snd_soc_update_bits(codec, WCD9XXX_A_CDC_CLK_OTHR_CTL,
+ 0x01, 0x01);
+ dev_info(codec->dev, "%s: Charge Pump enabled, count = %d\n",
+ __func__, cp_count);
+ }
+
+ else if (!on) {
+ if (--cp_count < 0) {
+ dev_dbg(codec->dev, "%s: Unbalanced disable for charge pump\n",
+ __func__);
+ if (snd_soc_read(codec, WCD9XXX_A_CDC_CLK_OTHR_CTL)
+ & 0x01) {
+ dev_info(codec->dev, "%s: Actual chargepump is ON\n",
+ __func__);
+ }
+ cp_count = 0;
+ WARN_ON(1);
+ }
+
+ if (cp_count == 0) {
+ snd_soc_update_bits(codec, WCD9XXX_A_CDC_CLK_OTHR_CTL,
+ 0x01, 0x00);
+ dev_dbg(codec->dev, "%s: Charge pump disabled, count = %d\n",
+ __func__, cp_count);
+ }
+ }
+}
+
+static inline void wcd9xxx_clsh_computation_request(
+ struct snd_soc_codec *codec, int compute_pa, bool on)
+{
+ u8 reg_val, reg_mask;
+
+ switch (compute_pa) {
+ case CLSH_COMPUTE_EAR:
+ reg_mask = 0x10;
+ reg_val = (on ? 0x10 : 0x00);
+ break;
+ case CLSH_COMPUTE_HPH_L:
+ reg_mask = 0x08;
+ reg_val = (on ? 0x08 : 0x00);
+ break;
+ case CLSH_COMPUTE_HPH_R:
+ reg_mask = 0x04;
+ reg_val = (on ? 0x04 : 0x00);
+ break;
+ default:
+ dev_dbg(codec->dev, "%s: class h computation PA request incorrect\n",
+ __func__);
+ return;
+ }
+
+ snd_soc_update_bits(codec, WCD9XXX_A_CDC_CLSH_B1_CTL,
+ reg_mask, reg_val);
+
+}
+
+static void wcd9xxx_enable_buck_mode(struct snd_soc_codec *codec,
+ u8 buck_vref)
+{
+ int i;
+ const struct wcd9xxx_reg_mask_val reg_set[] = {
+ {WCD9XXX_A_BUCK_MODE_5, 0x02, 0x03},
+ {WCD9XXX_A_BUCK_MODE_4, 0xFF, buck_vref},
+ {WCD9XXX_A_BUCK_MODE_1, 0x04, 0x04},
+ {WCD9XXX_A_BUCK_MODE_1, 0x08, 0x00},
+ {WCD9XXX_A_BUCK_MODE_3, 0x04, 0x00},
+ {WCD9XXX_A_BUCK_MODE_3, 0x08, 0x00},
+ {WCD9XXX_A_BUCK_MODE_1, 0x80, 0x80},
+ };
+
+ for (i = 0; i < ARRAY_SIZE(reg_set); i++)
+ snd_soc_update_bits(codec, reg_set[i].reg,
+ reg_set[i].mask, reg_set[i].val);
+
+ dev_dbg(codec->dev, "%s: Done\n", __func__);
+ usleep_range(BUCK_SETTLE_TIME_US, BUCK_SETTLE_TIME_US);
+}
+
+static void wcd9xxx_clsh_enable_post_pa(struct snd_soc_codec *codec)
+{
+ int i;
+ const struct wcd9xxx_reg_mask_val reg_set[] = {
+ {WCD9XXX_A_BUCK_MODE_5, 0x02, 0x00},
+ {WCD9XXX_A_NCP_STATIC, 0x20, 0x00},
+ {WCD9XXX_A_BUCK_MODE_3, 0x04, 0x04},
+ {WCD9XXX_A_BUCK_MODE_3, 0x08, 0x08},
+ };
+
+ for (i = 0; i < ARRAY_SIZE(reg_set); i++)
+ snd_soc_update_bits(codec, reg_set[i].reg,
+ reg_set[i].mask, reg_set[i].val);
+
+ dev_dbg(codec->dev, "%s: completed clsh mode settings after PA enable\n",
+ __func__);
+
+}
+
+static void wcd9xxx_set_fclk_enable_ncp(struct snd_soc_codec *codec,
+ u8 fclk_level)
+{
+ int i;
+ const struct wcd9xxx_reg_mask_val reg_set[] = {
+ {WCD9XXX_A_NCP_STATIC, 0x20, 0x20},
+ {WCD9XXX_A_NCP_EN, 0x01, 0x01},
+ };
+ snd_soc_update_bits(codec, WCD9XXX_A_NCP_STATIC,
+ 0x010, 0x00);
+ snd_soc_update_bits(codec, WCD9XXX_A_NCP_STATIC,
+ 0x0F, fclk_level);
+ for (i = 0; i < ARRAY_SIZE(reg_set); i++)
+ snd_soc_update_bits(codec, reg_set[i].reg,
+ reg_set[i].mask, reg_set[i].val);
+
+ usleep_range(NCP_SETTLE_TIME_US, NCP_SETTLE_TIME_US);
+
+ dev_dbg(codec->dev, "%s: set ncp done\n", __func__);
+}
+
+static void wcd9xxx_cfg_clsh_param_ear(struct snd_soc_codec *codec)
+{
+ int i;
+ const struct wcd9xxx_reg_mask_val reg_set[] = {
+ {WCD9XXX_A_CDC_CLSH_B1_CTL, (0x1 << 7), 0},
+ {WCD9XXX_A_CDC_CLSH_V_PA_HD_EAR, (0x3f << 0), 0x0D},
+ {WCD9XXX_A_CDC_CLSH_V_PA_MIN_EAR, (0x3f << 0), 0x3A},
+
+ /* Under assumption that EAR load is 10.7ohm */
+ {WCD9XXX_A_CDC_CLSH_IDLE_EAR_THSD, (0x3f << 0), 0x26},
+ {WCD9XXX_A_CDC_CLSH_FCLKONLY_EAR_THSD, (0x3f << 0), 0x2C},
+ {WCD9XXX_A_CDC_CLSH_I_PA_FACT_EAR_L, 0xff, 0xA9},
+ {WCD9XXX_A_CDC_CLSH_I_PA_FACT_EAR_U, 0xff, 0x07},
+ {WCD9XXX_A_CDC_CLSH_K_ADDR, (0x1 << 7), 0},
+ {WCD9XXX_A_CDC_CLSH_K_ADDR, (0xf << 0), 0x08},
+ {WCD9XXX_A_CDC_CLSH_K_DATA, 0xff, 0x1b},
+ {WCD9XXX_A_CDC_CLSH_K_DATA, 0xff, 0x00},
+ {WCD9XXX_A_CDC_CLSH_K_DATA, 0xff, 0x2d},
+ {WCD9XXX_A_CDC_CLSH_K_DATA, 0xff, 0x00},
+ {WCD9XXX_A_CDC_CLSH_K_DATA, 0xff, 0x36},
+ {WCD9XXX_A_CDC_CLSH_K_DATA, 0xff, 0x00},
+ {WCD9XXX_A_CDC_CLSH_K_DATA, 0xff, 0x37},
+ {WCD9XXX_A_CDC_CLSH_K_DATA, 0xff, 0x00},
+ };
+
+ for (i = 0; i < ARRAY_SIZE(reg_set); i++)
+ snd_soc_update_bits(codec, reg_set[i].reg,
+ reg_set[i].mask, reg_set[i].val);
+
+ dev_dbg(codec->dev, "%s: Programmed Class H controller EAR specific params\n",
+ __func__);
+}
+
+static void wcd9xxx_cfg_clsh_param_hph(struct snd_soc_codec *codec)
+{
+ int i;
+ const struct wcd9xxx_reg_mask_val reg_set[] = {
+ {WCD9XXX_A_CDC_CLSH_B1_CTL, (0x1 << 6), 0},
+ {WCD9XXX_A_CDC_CLSH_V_PA_HD_HPH, 0x3f, 0x0D},
+ {WCD9XXX_A_CDC_CLSH_V_PA_MIN_HPH, 0x3f, 0x1D},
+
+ /* Under assumption that HPH load is 16ohm per channel */
+ {WCD9XXX_A_CDC_CLSH_IDLE_HPH_THSD, 0x3f, 0x13},
+ {WCD9XXX_A_CDC_CLSH_FCLKONLY_HPH_THSD, 0x1f, 0x19},
+ {WCD9XXX_A_CDC_CLSH_I_PA_FACT_HPH_L, 0xff, 0x97},
+ {WCD9XXX_A_CDC_CLSH_I_PA_FACT_HPH_U, 0xff, 0x05},
+ {WCD9XXX_A_CDC_CLSH_K_ADDR, (0x1 << 7), 0},
+ {WCD9XXX_A_CDC_CLSH_K_ADDR, 0x0f, 0},
+ {WCD9XXX_A_CDC_CLSH_K_DATA, 0xff, 0xAE},
+ {WCD9XXX_A_CDC_CLSH_K_DATA, 0xff, 0x01},
+ {WCD9XXX_A_CDC_CLSH_K_DATA, 0xff, 0x1C},
+ {WCD9XXX_A_CDC_CLSH_K_DATA, 0xff, 0x00},
+ {WCD9XXX_A_CDC_CLSH_K_DATA, 0xff, 0x24},
+ {WCD9XXX_A_CDC_CLSH_K_DATA, 0xff, 0x00},
+ {WCD9XXX_A_CDC_CLSH_K_DATA, 0xff, 0x25},
+ {WCD9XXX_A_CDC_CLSH_K_DATA, 0xff, 0x00},
+ };
+
+ for (i = 0; i < ARRAY_SIZE(reg_set); i++)
+ snd_soc_update_bits(codec, reg_set[i].reg, reg_set[i].mask,
+ reg_set[i].val);
+ dev_dbg(codec->dev, "%s: Programmed Class H controller HPH specific params\n",
+ __func__);
+}
+
+static void wcd9xxx_clsh_turnoff_postpa
+ (struct snd_soc_codec *codec)
+{
+
+ int i;
+
+ const struct wcd9xxx_reg_mask_val reg_set[] = {
+ {WCD9XXX_A_NCP_EN, 0x01, 0x00},
+ {WCD9XXX_A_BUCK_MODE_1, 0x80, 0x00},
+ {WCD9XXX_A_CDC_CLSH_B1_CTL, 0x10, 0x00},
+ };
+
+ wcd9xxx_chargepump_request(codec, false);
+
+ for (i = 0; i < ARRAY_SIZE(reg_set); i++)
+ snd_soc_update_bits(codec, reg_set[i].reg,
+ reg_set[i].mask, reg_set[i].val);
+
+ wcd9xxx_enable_clsh_block(codec, false);
+
+ dev_dbg(codec->dev, "%s: Done\n", __func__);
+}
+
+static void wcd9xxx_clsh_state_idle(struct snd_soc_codec *codec,
+ struct wcd9xxx_clsh_cdc_data *clsh_d,
+ u8 req_state, bool is_enable)
+{
+ if (is_enable) {
+ dev_dbg(codec->dev, "%s: wrong transition, cannot enable IDLE state\n",
+ __func__);
+ } else {
+ if (req_state == WCD9XXX_CLSH_STATE_EAR) {
+ wcd9xxx_clsh_turnoff_postpa(codec);
+ } else if (req_state == WCD9XXX_CLSH_STATE_HPHL) {
+ wcd9xxx_clsh_computation_request(codec,
+ CLSH_COMPUTE_HPH_L, false);
+ wcd9xxx_clsh_turnoff_postpa(codec);
+ } else if (req_state == WCD9XXX_CLSH_STATE_HPHR) {
+ wcd9xxx_clsh_computation_request(codec,
+ CLSH_COMPUTE_HPH_R, false);
+ wcd9xxx_clsh_turnoff_postpa(codec);
+ } else if (req_state == WCD9XXX_CLSH_STATE_LO) {
+ wcd9xxx_enable_ncp(codec, false);
+ wcd9xxx_enable_buck(codec, false);
+ }
+ }
+}
+
+static void wcd9xxx_clsh_state_ear(struct snd_soc_codec *codec,
+ struct wcd9xxx_clsh_cdc_data *clsh_d,
+ u8 req_state, bool is_enable)
+{
+ if (is_enable) {
+ wcd9xxx_cfg_clsh_buck(codec);
+ wcd9xxx_cfg_clsh_param_common(codec);
+ wcd9xxx_cfg_clsh_param_ear(codec);
+ wcd9xxx_enable_clsh_block(codec, true);
+ wcd9xxx_chargepump_request(codec, true);
+ wcd9xxx_enable_anc_delay(codec, true);
+ wcd9xxx_clsh_computation_request(codec,
+ CLSH_COMPUTE_EAR, true);
+ wcd9xxx_enable_buck_mode(codec, BUCK_VREF_2V);
+ wcd9xxx_set_fclk_enable_ncp(codec, NCP_FCLK_LEVEL_8);
+
+ dev_dbg(codec->dev, "%s: Enabled ear mode class h\n", __func__);
+ } else {
+ dev_dbg(codec->dev, "%s: stub fallback to ear\n", __func__);
+ }
+}
+
+static void wcd9xxx_clsh_state_hph_l(struct snd_soc_codec *codec,
+ struct wcd9xxx_clsh_cdc_data *clsh_d,
+ u8 req_state, bool is_enable)
+{
+ if (is_enable) {
+ wcd9xxx_cfg_clsh_buck(codec);
+ wcd9xxx_cfg_clsh_param_common(codec);
+ wcd9xxx_cfg_clsh_param_hph(codec);
+ wcd9xxx_enable_clsh_block(codec, true);
+ wcd9xxx_chargepump_request(codec, true);
+ wcd9xxx_enable_anc_delay(codec, true);
+ wcd9xxx_clsh_computation_request(codec,
+ CLSH_COMPUTE_HPH_L, true);
+ wcd9xxx_enable_buck_mode(codec, BUCK_VREF_2V);
+ wcd9xxx_set_fclk_enable_ncp(codec, NCP_FCLK_LEVEL_8);
+
+ dev_dbg(codec->dev, "%s: Done\n", __func__);
+ } else {
+ if (req_state == WCD9XXX_CLSH_STATE_HPHR) {
+ wcd9xxx_clsh_computation_request(codec,
+ CLSH_COMPUTE_HPH_R, false);
+ } else {
+ dev_dbg(codec->dev, "%s: stub fallback to hph_l\n",
+ __func__);
+ }
+ }
+}
+
+static void wcd9xxx_clsh_state_hph_r(struct snd_soc_codec *codec,
+ struct wcd9xxx_clsh_cdc_data *clsh_d,
+ u8 req_state, bool is_enable)
+{
+ if (is_enable) {
+
+ wcd9xxx_cfg_clsh_buck(codec);
+ wcd9xxx_cfg_clsh_param_common(codec);
+ wcd9xxx_cfg_clsh_param_hph(codec);
+ wcd9xxx_enable_clsh_block(codec, true);
+ wcd9xxx_chargepump_request(codec, true);
+ wcd9xxx_enable_anc_delay(codec, true);
+ wcd9xxx_clsh_computation_request(codec,
+ CLSH_COMPUTE_HPH_R, true);
+ wcd9xxx_enable_buck_mode(codec, BUCK_VREF_2V);
+ wcd9xxx_set_fclk_enable_ncp(codec, NCP_FCLK_LEVEL_8);
+
+ dev_dbg(codec->dev, "%s: Done\n", __func__);
+ } else {
+ if (req_state == WCD9XXX_CLSH_STATE_HPHL) {
+ wcd9xxx_clsh_computation_request(codec,
+ CLSH_COMPUTE_HPH_L, false);
+ } else {
+ dev_dbg(codec->dev, "%s: stub fallback to hph_r\n",
+ __func__);
+ }
+ }
+}
+
+static void wcd9xxx_clsh_state_hph_st(struct snd_soc_codec *codec,
+ struct wcd9xxx_clsh_cdc_data *clsh_d,
+ u8 req_state, bool is_enable)
+{
+ if (is_enable) {
+ wcd9xxx_clsh_computation_request(codec,
+ CLSH_COMPUTE_HPH_L, true);
+ wcd9xxx_clsh_computation_request(codec,
+ CLSH_COMPUTE_HPH_R, true);
+ } else {
+ dev_dbg(codec->dev, "%s: stub fallback to hph_st\n", __func__);
+ }
+}
+
+static void wcd9xxx_clsh_state_lo(struct snd_soc_codec *codec,
+ struct wcd9xxx_clsh_cdc_data *clsh_d,
+ u8 req_state, bool is_enable)
+{
+ if (is_enable) {
+ if (++cdc_lo_count > 1)
+ return;
+
+ wcd9xxx_enable_buck_mode(codec, BUCK_VREF_1P8V);
+ wcd9xxx_set_fclk_enable_ncp(codec, NCP_FCLK_LEVEL_5);
+
+ if (clsh_d->buck_mv == WCD9XXX_CDC_BUCK_MV_1P8) {
+ wcd9xxx_enable_buck(codec, false);
+ snd_soc_update_bits(codec, WCD9XXX_A_NCP_STATIC,
+ 0x20, 0x01);
+ wcd9xxx_enable_ncp(codec, true);
+ msleep(NCP_SETTLE_TIME_US);
+
+ } else {
+ snd_soc_update_bits(codec, WCD9XXX_A_NCP_EN,
+ 0x40, 0x00);
+ wcd9xxx_enable_ncp(codec, true);
+ msleep(NCP_SETTLE_TIME_US);
+ snd_soc_update_bits(codec, WCD9XXX_A_BUCK_MODE_5,
+ 0x01, 0x01);
+ snd_soc_update_bits(codec, WCD9XXX_A_BUCK_MODE_5,
+ 0xFB, (0x02 << 2));
+ }
+ snd_soc_update_bits(codec, WCD9XXX_A_BUCK_MODE_1,
+ 0x04, 0x00);
+ } else {
+ dev_dbg(codec->dev, "%s: stub fallback to lineout\n", __func__);
+ }
+}
+
+static void wcd9xxx_clsh_state_err(struct snd_soc_codec *codec,
+ struct wcd9xxx_clsh_cdc_data *clsh_d,
+ u8 req_state, bool is_enable)
+{
+ dev_dbg(codec->dev, "%s Wrong request for class H state machine requested to %s %s"
+ , __func__, is_enable ? "enable" : "disable",
+ state_to_str(req_state));
+ WARN_ON(1);
+}
+
+void wcd9xxx_clsh_fsm(struct snd_soc_codec *codec,
+ struct wcd9xxx_clsh_cdc_data *cdc_clsh_d,
+ u8 req_state, bool req_type, u8 clsh_event)
+{
+ u8 old_state, new_state;
+
+ switch (clsh_event) {
+
+ case WCD9XXX_CLSH_EVENT_PRE_DAC:
+
+ /* PRE_DAC event should be used only for Enable */
+ BUG_ON(req_type != WCD9XXX_CLSH_REQ_ENABLE);
+
+ old_state = cdc_clsh_d->state;
+ new_state = old_state | req_state;
+
+ (*clsh_state_fp[new_state]) (codec, cdc_clsh_d,
+ req_state, req_type);
+ cdc_clsh_d->state = new_state;
+ dev_info(codec->dev, "%s: ClassH state transition from %s to %s\n",
+ __func__, state_to_str(old_state),
+ state_to_str(cdc_clsh_d->state));
+
+ break;
+
+ case WCD9XXX_CLSH_EVENT_POST_PA:
+
+ if (req_type == WCD9XXX_CLSH_REQ_DISABLE) {
+ if (req_state == WCD9XXX_CLSH_STATE_LO
+ && --cdc_lo_count > 0)
+ break;
+
+ old_state = cdc_clsh_d->state;
+ new_state = old_state & (~req_state);
+
+ if (new_state < NUM_CLSH_STATES) {
+ (*clsh_state_fp[new_state]) (codec, cdc_clsh_d,
+ req_state, req_type);
+ cdc_clsh_d->state = new_state;
+ dev_info(codec->dev, "%s: ClassH state transition from %s to %s\n",
+ __func__, state_to_str(old_state),
+ state_to_str(cdc_clsh_d->state));
+
+ } else {
+ dev_dbg(codec->dev, "%s: wrong new state = %x\n",
+ __func__, new_state);
+ }
+
+
+ } else if (req_state != WCD9XXX_CLSH_STATE_LO) {
+ wcd9xxx_clsh_enable_post_pa(codec);
+ }
+
+ break;
+ }
+
+}
+EXPORT_SYMBOL_GPL(wcd9xxx_clsh_fsm);
+
+void wcd9xxx_clsh_init(struct wcd9xxx_clsh_cdc_data *clsh)
+{
+ int i;
+ clsh->state = WCD9XXX_CLSH_STATE_IDLE;
+
+ for (i = 0; i < NUM_CLSH_STATES; i++)
+ clsh_state_fp[i] = wcd9xxx_clsh_state_err;
+
+ clsh_state_fp[WCD9XXX_CLSH_STATE_IDLE] = wcd9xxx_clsh_state_idle;
+ clsh_state_fp[WCD9XXX_CLSH_STATE_EAR] = wcd9xxx_clsh_state_ear;
+ clsh_state_fp[WCD9XXX_CLSH_STATE_HPHL] =
+ wcd9xxx_clsh_state_hph_l;
+ clsh_state_fp[WCD9XXX_CLSH_STATE_HPHR] =
+ wcd9xxx_clsh_state_hph_r;
+ clsh_state_fp[WCD9XXX_CLSH_STATE_HPH_ST] =
+ wcd9xxx_clsh_state_hph_st;
+ clsh_state_fp[WCD9XXX_CLSH_STATE_LO] = wcd9xxx_clsh_state_lo;
+
+}
+EXPORT_SYMBOL_GPL(wcd9xxx_clsh_init);
+
+MODULE_DESCRIPTION("WCD9XXX Common");
+MODULE_LICENSE("GPL v2");
diff --git a/sound/soc/codecs/wcd9xxx-common.h b/sound/soc/codecs/wcd9xxx-common.h
new file mode 100644
index 0000000..743ab0c
--- /dev/null
+++ b/sound/soc/codecs/wcd9xxx-common.h
@@ -0,0 +1,68 @@
+/* Copyright (c) 2013, The Linux Foundation. All rights reserved.
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License version 2 and
+ * only version 2 as published by the Free Software Foundation.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ */
+
+#ifndef WCD9XXX_CODEC_COMMON
+
+#define WCD9XXX_CODEC_COMMON
+
+#define WCD9XXX_CLSH_REQ_ENABLE true
+#define WCD9XXX_CLSH_REQ_DISABLE false
+
+#define WCD9XXX_CLSH_EVENT_PRE_DAC 0x01
+#define WCD9XXX_CLSH_EVENT_POST_PA 0x02
+
+/* Basic states for Class H state machine.
+ * represented as a bit mask within a u8 data type
+ * bit 0: EAR mode
+ * bit 1: HPH Left mode
+ * bit 2: HPH Right mode
+ * bit 3: Lineout mode
+ * bit 4: Ultrasound mode
+ */
+#define WCD9XXX_CLSH_STATE_IDLE 0x00
+#define WCD9XXX_CLSH_STATE_EAR (0x01 << 0)
+#define WCD9XXX_CLSH_STATE_HPHL (0x01 << 1)
+#define WCD9XXX_CLSH_STATE_HPHR (0x01 << 2)
+#define WCD9XXX_CLSH_STATE_LO (0x01 << 3)
+#define NUM_CLSH_STATES ((0x01 << 4) - 1)
+
+/* Derived State: Bits 1 and 2 should be set for Headphone stereo */
+#define WCD9XXX_CLSH_STATE_HPH_ST (WCD9XXX_CLSH_STATE_HPHL | \
+ WCD9XXX_CLSH_STATE_HPHR)
+
+
+struct wcd9xxx_reg_mask_val {
+ u16 reg;
+ u8 mask;
+ u8 val;
+};
+
+/* Class H data that the codec driver will maintain */
+struct wcd9xxx_clsh_cdc_data {
+ u8 state;
+ int buck_mv;
+};
+
+
+enum wcd9xxx_buck_volt {
+ WCD9XXX_CDC_BUCK_UNSUPPORTED = 0,
+ WCD9XXX_CDC_BUCK_MV_1P8 = 1800000,
+ WCD9XXX_CDC_BUCK_MV_2P15 = 2150000,
+};
+
+extern void wcd9xxx_clsh_fsm(struct snd_soc_codec *codec,
+ struct wcd9xxx_clsh_cdc_data *cdc_clsh_d,
+ u8 req_state, bool req_type, u8 clsh_event);
+
+extern void wcd9xxx_clsh_init(struct wcd9xxx_clsh_cdc_data *clsh);
+
+#endif
diff --git a/sound/soc/codecs/wcd9xxx-mbhc.c b/sound/soc/codecs/wcd9xxx-mbhc.c
index a358be1..b3549cc 100644
--- a/sound/soc/codecs/wcd9xxx-mbhc.c
+++ b/sound/soc/codecs/wcd9xxx-mbhc.c
@@ -374,8 +374,14 @@
}
}
-static void wcd9xxx_jack_report(struct snd_soc_jack *jack, int status, int mask)
+static void wcd9xxx_jack_report(struct wcd9xxx_mbhc *mbhc,
+ struct snd_soc_jack *jack, int status, int mask)
{
+ if (jack == &mbhc->headset_jack)
+ wcd9xxx_resmgr_cond_update_cond(mbhc->resmgr,
+ WCD9XXX_COND_HPH_MIC,
+ status & SND_JACK_MICROPHONE);
+
snd_soc_jack_report_no_dapm(jack, status, mask);
}
@@ -388,7 +394,7 @@
codec = mbhc->codec;
if (mbhc->hph_status & jack_status) {
mbhc->hph_status &= ~jack_status;
- wcd9xxx_jack_report(&mbhc->headset_jack,
+ wcd9xxx_jack_report(mbhc, &mbhc->headset_jack,
mbhc->hph_status, WCD9XXX_JACK_MASK);
snd_soc_update_bits(codec, WCD9XXX_A_RX_HPH_OCP_CTL, 0x10,
0x00);
@@ -618,14 +624,14 @@
else if (mbhc->buttons_pressed) {
pr_debug("%s: release of button press%d\n",
__func__, jack_type);
- wcd9xxx_jack_report(&mbhc->button_jack, 0,
+ wcd9xxx_jack_report(mbhc, &mbhc->button_jack, 0,
mbhc->buttons_pressed);
mbhc->buttons_pressed &=
~WCD9XXX_JACK_BUTTON_MASK;
}
pr_debug("%s: Reporting removal %d(%x)\n", __func__,
jack_type, mbhc->hph_status);
- wcd9xxx_jack_report(&mbhc->headset_jack, mbhc->hph_status,
+ wcd9xxx_jack_report(mbhc, &mbhc->headset_jack, mbhc->hph_status,
WCD9XXX_JACK_MASK);
wcd9xxx_set_and_turnoff_hph_padac(mbhc);
hphrocp_off_report(mbhc, SND_JACK_OC_HPHR);
@@ -638,7 +644,7 @@
if (mbhc->hph_status && mbhc->hph_status != jack_type) {
pr_debug("%s: Reporting removal (%x)\n",
__func__, mbhc->hph_status);
- wcd9xxx_jack_report(&mbhc->headset_jack,
+ wcd9xxx_jack_report(mbhc, &mbhc->headset_jack,
0, WCD9XXX_JACK_MASK);
mbhc->hph_status = 0;
}
@@ -658,7 +664,7 @@
}
pr_debug("%s: Reporting insertion %d(%x)\n", __func__,
jack_type, mbhc->hph_status);
- wcd9xxx_jack_report(&mbhc->headset_jack,
+ wcd9xxx_jack_report(mbhc, &mbhc->headset_jack,
mbhc->hph_status, WCD9XXX_JACK_MASK);
wcd9xxx_clr_and_turnon_hph_padac(mbhc);
}
@@ -1606,6 +1612,14 @@
pr_debug("%s: enter, removal interrupt\n", __func__);
WCD9XXX_BCL_LOCK(mbhc->resmgr);
+ /*
+ * While we don't know whether MIC is there or not, let the resmgr know
+ * so micbias can be disabled temporarily
+ */
+ if (mbhc->current_plug == PLUG_TYPE_HEADSET)
+ wcd9xxx_resmgr_cond_update_cond(mbhc->resmgr,
+ WCD9XXX_COND_HPH_MIC, false);
+
vddio = (mbhc->mbhc_data.micb_mv != VDDIO_MICBIAS_MV &&
mbhc->mbhc_micbias_switched);
if (vddio)
@@ -1624,6 +1638,10 @@
*/
if (vddio && (mbhc->current_plug == PLUG_TYPE_HEADSET))
__wcd9xxx_switch_micbias(mbhc, 1, true, true);
+
+ if (mbhc->current_plug == PLUG_TYPE_HEADSET)
+ wcd9xxx_resmgr_cond_update_cond(mbhc->resmgr,
+ WCD9XXX_COND_HPH_MIC, true);
WCD9XXX_BCL_UNLOCK(mbhc->resmgr);
return IRQ_HANDLED;
@@ -1679,7 +1697,7 @@
pr_debug("%s: STA: %d, DCE: %d\n", __func__, sta_mv, dce_mv);
pr_debug("%s: Reporting long button press event\n", __func__);
- wcd9xxx_jack_report(&mbhc->button_jack, mbhc->buttons_pressed,
+ wcd9xxx_jack_report(mbhc, &mbhc->button_jack, mbhc->buttons_pressed,
mbhc->buttons_pressed);
pr_debug("%s: leave\n", __func__);
@@ -2357,7 +2375,7 @@
if (ret == 0) {
pr_debug("%s: Reporting long button release event\n",
__func__);
- wcd9xxx_jack_report(&mbhc->button_jack, 0,
+ wcd9xxx_jack_report(mbhc, &mbhc->button_jack, 0,
mbhc->buttons_pressed);
} else {
if (wcd9xxx_is_fake_press(mbhc)) {
@@ -2370,12 +2388,14 @@
} else {
pr_debug("%s: Reporting btn press\n",
__func__);
- wcd9xxx_jack_report(&mbhc->button_jack,
+ wcd9xxx_jack_report(mbhc,
+ &mbhc->button_jack,
mbhc->buttons_pressed,
mbhc->buttons_pressed);
pr_debug("%s: Reporting btn release\n",
__func__);
- wcd9xxx_jack_report(&mbhc->button_jack,
+ wcd9xxx_jack_report(mbhc,
+ &mbhc->button_jack,
0, mbhc->buttons_pressed);
}
}
@@ -2414,7 +2434,7 @@
WCD9XXX_IRQ_HPH_PA_OCPL_FAULT);
mbhc->hphlocp_cnt = 0;
mbhc->hph_status |= SND_JACK_OC_HPHL;
- wcd9xxx_jack_report(&mbhc->headset_jack,
+ wcd9xxx_jack_report(mbhc, &mbhc->headset_jack,
mbhc->hph_status,
WCD9XXX_JACK_MASK);
}
@@ -2443,7 +2463,7 @@
WCD9XXX_IRQ_HPH_PA_OCPR_FAULT);
mbhc->hphrocp_cnt = 0;
mbhc->hph_status |= SND_JACK_OC_HPHR;
- wcd9xxx_jack_report(&mbhc->headset_jack,
+ wcd9xxx_jack_report(mbhc, &mbhc->headset_jack,
mbhc->hph_status, WCD9XXX_JACK_MASK);
}
diff --git a/sound/soc/codecs/wcd9xxx-resmgr.c b/sound/soc/codecs/wcd9xxx-resmgr.c
index 17edd4a..2011346 100644
--- a/sound/soc/codecs/wcd9xxx-resmgr.c
+++ b/sound/soc/codecs/wcd9xxx-resmgr.c
@@ -94,6 +94,14 @@
"WCD9XXX_EVENT_LAST",
};
+struct wcd9xxx_resmgr_cond_entry {
+ unsigned short reg;
+ int shift;
+ bool invert;
+ enum wcd9xxx_resmgr_cond cond;
+ struct list_head list;
+};
+
static enum wcd9xxx_clock_type wcd9xxx_save_clock(struct wcd9xxx_resmgr
*resmgr);
static void wcd9xxx_restore_clock(struct wcd9xxx_resmgr *resmgr,
@@ -640,6 +648,93 @@
return rc;
}
+void wcd9xxx_resmgr_cond_trigger_cond(struct wcd9xxx_resmgr *resmgr,
+ enum wcd9xxx_resmgr_cond cond)
+{
+ struct list_head *l;
+ struct wcd9xxx_resmgr_cond_entry *e;
+ bool set;
+
+ pr_debug("%s: enter\n", __func__);
+ WCD9XXX_BCL_ASSERT_LOCKED(resmgr);
+ set = !!test_bit(cond, &resmgr->cond_flags);
+ list_for_each(l, &resmgr->update_bit_cond_h) {
+ e = list_entry(l, struct wcd9xxx_resmgr_cond_entry, list);
+ if (e->cond == cond)
+ snd_soc_update_bits(resmgr->codec, e->reg,
+ 1 << e->shift,
+ (set ? !e->invert : e->invert)
+ << e->shift);
+ }
+ pr_debug("%s: leave\n", __func__);
+}
+
+void wcd9xxx_resmgr_cond_update_cond(struct wcd9xxx_resmgr *resmgr,
+ enum wcd9xxx_resmgr_cond cond, bool set)
+{
+ WCD9XXX_BCL_ASSERT_LOCKED(resmgr);
+ if ((set && !test_and_set_bit(cond, &resmgr->cond_flags)) ||
+ (!set && test_and_clear_bit(cond, &resmgr->cond_flags))) {
+ pr_debug("%s: Resource %d condition changed to %s\n", __func__,
+ cond, set ? "set" : "clear");
+ wcd9xxx_resmgr_cond_trigger_cond(resmgr, cond);
+ }
+}
+
+int wcd9xxx_resmgr_add_cond_update_bits(struct wcd9xxx_resmgr *resmgr,
+ enum wcd9xxx_resmgr_cond cond,
+ unsigned short reg, int shift,
+ bool invert)
+{
+ struct wcd9xxx_resmgr_cond_entry *entry;
+
+ WCD9XXX_BCL_ASSERT_LOCKED(resmgr);
+ entry = kmalloc(sizeof(*entry), GFP_KERNEL);
+ if (!entry)
+ return -ENOMEM;
+
+ entry->cond = cond;
+ entry->reg = reg;
+ entry->shift = shift;
+ entry->invert = invert;
+ list_add_tail(&entry->list, &resmgr->update_bit_cond_h);
+
+ wcd9xxx_resmgr_cond_trigger_cond(resmgr, cond);
+
+ return 0;
+}
+
+/*
+ * wcd9xxx_resmgr_rm_cond_update_bits :
+ * Clear bit and remove from the conditional bit update list
+ */
+int wcd9xxx_resmgr_rm_cond_update_bits(struct wcd9xxx_resmgr *resmgr,
+ enum wcd9xxx_resmgr_cond cond,
+ unsigned short reg, int shift,
+ bool invert)
+{
+ struct list_head *l, *next;
+ struct wcd9xxx_resmgr_cond_entry *e = NULL;
+
+ pr_debug("%s: enter\n", __func__);
+ WCD9XXX_BCL_ASSERT_LOCKED(resmgr);
+ list_for_each_safe(l, next, &resmgr->update_bit_cond_h) {
+ e = list_entry(l, struct wcd9xxx_resmgr_cond_entry, list);
+ if (e->reg == reg && e->shift == shift && e->invert == invert) {
+ snd_soc_update_bits(resmgr->codec, e->reg,
+ 1 << e->shift,
+ e->invert << e->shift);
+ list_del(&e->list);
+ kfree(e);
+ return 0;
+ }
+ }
+ pr_err("%s: Cannot find update bit entry reg 0x%x, shift %d\n",
+ __func__, e ? e->reg : 0, e ? e->shift : 0);
+
+ return -EINVAL;
+}
+
int wcd9xxx_resmgr_register_notifier(struct wcd9xxx_resmgr *resmgr,
struct notifier_block *nblock)
{
@@ -669,6 +764,8 @@
resmgr->pdata = pdata;
resmgr->reg_addr = reg_addr;
+ INIT_LIST_HEAD(&resmgr->update_bit_cond_h);
+
BLOCKING_INIT_NOTIFIER_HEAD(&resmgr->notifier);
mutex_init(&resmgr->codec_resource_lock);
diff --git a/sound/soc/codecs/wcd9xxx-resmgr.h b/sound/soc/codecs/wcd9xxx-resmgr.h
index 6c30eeb..53c48f6 100644
--- a/sound/soc/codecs/wcd9xxx-resmgr.h
+++ b/sound/soc/codecs/wcd9xxx-resmgr.h
@@ -125,6 +125,9 @@
/* Notifier needs mbhc pointer with resmgr */
struct wcd9xxx_mbhc *mbhc;
+ unsigned long cond_flags;
+ struct list_head update_bit_cond_h;
+
/*
* Currently, only used for mbhc purpose, to protect
* concurrent execution of mbhc threaded irq handlers and
@@ -189,4 +192,18 @@
void wcd9xxx_resmgr_notifier_call(struct wcd9xxx_resmgr *resmgr,
const enum wcd9xxx_notify_event e);
+enum wcd9xxx_resmgr_cond {
+ WCD9XXX_COND_HPH_MIC = 1,
+};
+int wcd9xxx_resmgr_rm_cond_update_bits(struct wcd9xxx_resmgr *resmgr,
+ enum wcd9xxx_resmgr_cond cond,
+ unsigned short reg, int shift,
+ bool invert);
+int wcd9xxx_resmgr_add_cond_update_bits(struct wcd9xxx_resmgr *resmgr,
+ enum wcd9xxx_resmgr_cond cond,
+ unsigned short reg, int shift,
+ bool invert);
+void wcd9xxx_resmgr_cond_update_cond(struct wcd9xxx_resmgr *resmgr,
+ enum wcd9xxx_resmgr_cond cond, bool set);
+
#endif /* __WCD9XXX_COMMON_H__ */
diff --git a/sound/soc/msm/qdsp6v2/audio_acdb.c b/sound/soc/msm/qdsp6v2/audio_acdb.c
index 58fdc1b..b71132e 100644
--- a/sound/soc/msm/qdsp6v2/audio_acdb.c
+++ b/sound/soc/msm/qdsp6v2/audio_acdb.c
@@ -66,6 +66,12 @@
/* VocProc dev cfg cal*/
struct acdb_atomic_cal_block vocproc_dev_cal;
+ /* Custom topology */
+ struct acdb_atomic_cal_block adm_custom_topology;
+ struct acdb_atomic_cal_block asm_custom_topology;
+ atomic_t valid_adm_custom_top;
+ atomic_t valid_asm_custom_top;
+
/* AFE cal */
struct acdb_atomic_cal_block afe_cal[MAX_AUDPROC_TYPES];
@@ -134,6 +140,106 @@
atomic_set(&acdb_data.asm_topology, topology);
}
+void reset_custom_topology_flags(void)
+{
+ atomic_set(&acdb_data.valid_adm_custom_top, 1);
+ atomic_set(&acdb_data.valid_asm_custom_top, 1);
+}
+
+void get_adm_custom_topology(struct acdb_cal_block *cal_block)
+{
+ pr_debug("%s\n", __func__);
+
+ if (cal_block == NULL) {
+ pr_err("ACDB=> NULL pointer sent to %s\n", __func__);
+ goto done;
+ }
+
+ if (atomic_read(&acdb_data.valid_adm_custom_top) == 0) {
+ cal_block->cal_size = 0;
+ goto done;
+ }
+ atomic_set(&acdb_data.valid_adm_custom_top, 0);
+
+ cal_block->cal_size =
+ atomic_read(&acdb_data.adm_custom_topology.cal_size);
+ cal_block->cal_paddr =
+ atomic_read(&acdb_data.adm_custom_topology.cal_paddr);
+ cal_block->cal_kvaddr =
+ atomic_read(&acdb_data.adm_custom_topology.cal_kvaddr);
+done:
+ return;
+}
+
+void store_adm_custom_topology(struct cal_block *cal_block)
+{
+ pr_debug("%s,\n", __func__);
+
+ if (cal_block->cal_offset > atomic64_read(&acdb_data.mem_len)) {
+ pr_err("%s: offset %d is > mem_len %ld\n",
+ __func__, cal_block->cal_offset,
+ (long)atomic64_read(&acdb_data.mem_len));
+ goto done;
+ }
+
+ atomic_set(&acdb_data.adm_custom_topology.cal_size,
+ cal_block->cal_size);
+ atomic_set(&acdb_data.adm_custom_topology.cal_paddr,
+ cal_block->cal_offset + atomic64_read(&acdb_data.paddr));
+ atomic_set(&acdb_data.adm_custom_topology.cal_kvaddr,
+ cal_block->cal_offset +
+ atomic64_read(&acdb_data.kvaddr));
+done:
+ return;
+}
+
+void get_asm_custom_topology(struct acdb_cal_block *cal_block)
+{
+ pr_debug("%s\n", __func__);
+
+ if (cal_block == NULL) {
+ pr_err("ACDB=> NULL pointer sent to %s\n", __func__);
+ goto done;
+ }
+
+ if (atomic_read(&acdb_data.valid_asm_custom_top) == 0) {
+ cal_block->cal_size = 0;
+ goto done;
+ }
+ atomic_set(&acdb_data.valid_asm_custom_top, 0);
+
+ cal_block->cal_size =
+ atomic_read(&acdb_data.asm_custom_topology.cal_size);
+ cal_block->cal_paddr =
+ atomic_read(&acdb_data.asm_custom_topology.cal_paddr);
+ cal_block->cal_kvaddr =
+ atomic_read(&acdb_data.asm_custom_topology.cal_kvaddr);
+done:
+ return;
+}
+
+void store_asm_custom_topology(struct cal_block *cal_block)
+{
+ pr_debug("%s,\n", __func__);
+
+ if (cal_block->cal_offset > atomic64_read(&acdb_data.mem_len)) {
+ pr_err("%s: offset %d is > mem_len %ld\n",
+ __func__, cal_block->cal_offset,
+ (long)atomic64_read(&acdb_data.mem_len));
+ goto done;
+ }
+
+ atomic_set(&acdb_data.asm_custom_topology.cal_size,
+ cal_block->cal_size);
+ atomic_set(&acdb_data.asm_custom_topology.cal_paddr,
+ cal_block->cal_offset + atomic64_read(&acdb_data.paddr));
+ atomic_set(&acdb_data.asm_custom_topology.cal_kvaddr,
+ cal_block->cal_offset +
+ atomic64_read(&acdb_data.kvaddr));
+done:
+ return;
+}
+
void get_voice_cal_allocation(struct acdb_cal_block *cal_block)
{
cal_block->cal_size = ACDB_TOTAL_VOICE_ALLOCATION;
@@ -672,6 +778,8 @@
__func__);
}
+ atomic_set(&acdb_data.valid_adm_custom_top, 1);
+ atomic_set(&acdb_data.valid_asm_custom_top, 1);
atomic_inc(&usage_count);
return result;
}
@@ -925,6 +1033,12 @@
case AUDIO_SET_LSM_CAL:
store_lsm_cal((struct cal_block *)data);
goto done;
+ case AUDIO_SET_ADM_CUSTOM_TOPOLOGY:
+ store_adm_custom_topology((struct cal_block *)data);
+ goto done;
+ case AUDIO_SET_ASM_CUSTOM_TOPOLOGY:
+ store_asm_custom_topology((struct cal_block *)data);
+ goto done;
default:
pr_err("ACDB=> ACDB ioctl not found!\n");
}
@@ -998,6 +1112,8 @@
memset(&acdb_data, 0, sizeof(acdb_data));
mutex_init(&acdb_data.acdb_mutex);
atomic_set(&usage_count, 0);
+ atomic_set(&acdb_data.valid_adm_custom_top, 1);
+ atomic_set(&acdb_data.valid_asm_custom_top, 1);
return misc_register(&acdb_misc);
}
diff --git a/sound/soc/msm/qdsp6v2/audio_acdb.h b/sound/soc/msm/qdsp6v2/audio_acdb.h
index 8528e3c..0b6110d 100644
--- a/sound/soc/msm/qdsp6v2/audio_acdb.h
+++ b/sound/soc/msm/qdsp6v2/audio_acdb.h
@@ -46,6 +46,9 @@
uint32_t get_adm_rx_topology(void);
uint32_t get_adm_tx_topology(void);
uint32_t get_asm_topology(void);
+void reset_custom_topology_flags(void);
+void get_adm_custom_topology(struct acdb_cal_block *cal_block);
+void get_asm_custom_topology(struct acdb_cal_block *cal_block);
void get_voice_cal_allocation(struct acdb_cal_block *cal_block);
void get_lsm_cal(struct acdb_cal_block *cal_block);
void get_anc_cal(struct acdb_cal_block *cal_block);
diff --git a/sound/soc/msm/qdsp6v2/audio_ocmem.c b/sound/soc/msm/qdsp6v2/audio_ocmem.c
index 145f095..1969fe8 100644
--- a/sound/soc/msm/qdsp6v2/audio_ocmem.c
+++ b/sound/soc/msm/qdsp6v2/audio_ocmem.c
@@ -30,6 +30,15 @@
#define AUDIO_OCMEM_BUF_SIZE (512 * SZ_1K)
+#define _BIT_MASK_\
+ ((1 << OCMEM_STATE_EXIT) |\
+ (1 << OCMEM_STATE_GROW) |\
+ (1 << OCMEM_STATE_SHRINK))
+
+#define set_bit_pos(x, y) (atomic_set(&x, (atomic_read(&x) | (1 << y))))
+#define clear_bit_pos(x, y) (atomic_set(&x, (atomic_read(&x) & (~(1 << y)))))
+#define test_bit_pos(x, y) ((atomic_read(&x)) & (1 << y))
+
static int enable_ocmem_audio_voice = 1;
module_param(enable_ocmem_audio_voice, int,
S_IRUGO | S_IWUSR | S_IWGRP);
@@ -48,6 +57,8 @@
OCMEM_STATE_MAP_FAIL,
OCMEM_STATE_UNMAP_FAIL,
OCMEM_STATE_EXIT,
+ OCMEM_STATE_SSR,
+ OCMEM_STATE_DISABLE,
};
static void audio_ocmem_process_workdata(struct work_struct *work);
@@ -74,6 +85,7 @@
atomic_t audio_cond;
atomic_t audio_exit;
spinlock_t audio_lock;
+ struct mutex protect_lock;
struct workqueue_struct *audio_ocmem_workqueue;
struct workqueue_struct *voice_ocmem_workqueue;
bool ocmem_en;
@@ -81,7 +93,6 @@
static struct audio_ocmem_prv audio_ocmem_lcl;
-
static int audio_ocmem_client_cb(struct notifier_block *this,
unsigned long event1, void *data)
{
@@ -97,7 +108,9 @@
switch (event1) {
case OCMEM_MAP_DONE:
pr_debug("%s: map done\n", __func__);
- atomic_set(&audio_ocmem_lcl.audio_state, OCMEM_STATE_MAP_COMPL);
+ clear_bit_pos(audio_ocmem_lcl.audio_state,
+ OCMEM_STATE_MAP_TRANSITION);
+ set_bit_pos(audio_ocmem_lcl.audio_state, OCMEM_STATE_MAP_COMPL);
break;
case OCMEM_MAP_FAIL:
pr_debug("%s: map fail\n", __func__);
@@ -105,7 +118,9 @@
break;
case OCMEM_UNMAP_DONE:
pr_debug("%s: unmap done\n", __func__);
- atomic_set(&audio_ocmem_lcl.audio_state,
+ clear_bit_pos(audio_ocmem_lcl.audio_state,
+ OCMEM_STATE_UNMAP_TRANSITION);
+ set_bit_pos(audio_ocmem_lcl.audio_state,
OCMEM_STATE_UNMAP_COMPL);
break;
case OCMEM_UNMAP_FAIL:
@@ -115,13 +130,13 @@
break;
case OCMEM_ALLOC_GROW:
rbuf = data;
- if (rbuf->len == AUDIO_OCMEM_BUF_SIZE) {
+ if ((rbuf->len == AUDIO_OCMEM_BUF_SIZE)) {
audio_ocmem_lcl.buf = data;
pr_debug("%s: Alloc grow request received buf->addr: 0x%08lx\n",
__func__,
(audio_ocmem_lcl.buf)->addr);
- atomic_set(&audio_ocmem_lcl.audio_state,
- OCMEM_STATE_GROW);
+ set_bit_pos(audio_ocmem_lcl.audio_state,
+ OCMEM_STATE_GROW);
} else {
pr_debug("%s: Alloc grow request with size: %ld",
__func__,
@@ -132,19 +147,33 @@
break;
case OCMEM_ALLOC_SHRINK:
pr_debug("%s: Alloc shrink request received\n", __func__);
- atomic_set(&audio_ocmem_lcl.audio_state, OCMEM_STATE_SHRINK);
+ set_bit_pos(audio_ocmem_lcl.audio_state, OCMEM_STATE_SHRINK);
break;
default:
pr_err("%s: Invalid event[%ld]\n", __func__, event1);
break;
}
spin_unlock_irqrestore(&audio_ocmem_lcl.audio_lock, flags);
- if (!vwait && (atomic_read(&audio_ocmem_lcl.audio_cond))) {
atomic_set(&audio_ocmem_lcl.audio_cond, 0);
wake_up(&audio_ocmem_lcl.audio_wait);
- }
return rc;
}
+int get_state_to_process(atomic_t *state)
+{
+
+ if (test_bit_pos((*state), OCMEM_STATE_SHRINK)) {
+ pr_debug("%s: returning shrink state\n", __func__);
+ return OCMEM_STATE_SHRINK;
+ } else if (test_bit_pos((*state), OCMEM_STATE_GROW)) {
+ pr_debug("%s: returning grow state\n", __func__);
+ return OCMEM_STATE_GROW;
+ } else if (test_bit_pos((*state), OCMEM_STATE_EXIT)) {
+ pr_debug("%s: returning exit state\n", __func__);
+ return OCMEM_STATE_EXIT;
+ } else
+ return -EINVAL;
+
+}
/**
* audio_ocmem_enable() - Exercise OCMEM for audio
@@ -159,36 +188,12 @@
{
int ret;
int i, j;
+ int state_bit;
struct ocmem_buf *buf = NULL;
struct avcs_cmd_rsp_get_low_power_segments_info_t *lp_segptr;
pr_debug("%s\n", __func__);
- /* Non-blocking ocmem allocate (asynchronous) */
- buf = ocmem_allocate_nb(cid, AUDIO_OCMEM_BUF_SIZE);
- if (IS_ERR_OR_NULL(buf)) {
- pr_err("%s: failed: %d\n", __func__, cid);
- return -ENOMEM;
- }
- atomic_set(&audio_ocmem_lcl.audio_state, OCMEM_STATE_ALLOC);
-
- audio_ocmem_lcl.buf = buf;
- atomic_set(&audio_ocmem_lcl.audio_exit, 0);
- atomic_set(&audio_ocmem_lcl.audio_cond, 1);
- pr_debug("%s: buf->len: %ld\n", __func__, buf->len);
- if (!buf->len) {
- pr_debug("%s: buf.len is 0, waiting for ocmem region\n",
- __func__);
- wait_event_interruptible(audio_ocmem_lcl.audio_wait,
- (atomic_read(&audio_ocmem_lcl.audio_cond) == 0) ||
- (atomic_read(&audio_ocmem_lcl.audio_exit) == 1));
- if (atomic_read(&audio_ocmem_lcl.audio_exit)) {
- pr_err("%s: audio playback ended while waiting for ocmem\n",
- __func__);
- ret = -EINVAL;
- goto fail_cmd;
- }
- }
- pr_debug("%s: buf->len: %ld\n", __func__, (audio_ocmem_lcl.buf)->len);
+ atomic_set(&audio_ocmem_lcl.audio_state, OCMEM_STATE_DEFAULT);
if (audio_ocmem_lcl.lp_memseg_ptr == NULL) {
/* Retrieve low power segments */
ret = core_get_low_power_segments(
@@ -213,6 +218,42 @@
(uint32_t)audio_ocmem_lcl.mlist.chunks[j].ddr_paddr,
(uint32_t)audio_ocmem_lcl.mlist.chunks[j].size);
}
+ /* Non-blocking ocmem allocate (asynchronous) */
+ buf = ocmem_allocate_nb(cid, AUDIO_OCMEM_BUF_SIZE);
+ if (IS_ERR_OR_NULL(buf)) {
+ pr_err("%s: failed: %d\n", __func__, cid);
+ return -ENOMEM;
+ }
+
+ set_bit_pos(audio_ocmem_lcl.audio_state, OCMEM_STATE_ALLOC);
+
+ audio_ocmem_lcl.buf = buf;
+ atomic_set(&audio_ocmem_lcl.audio_exit, 0);
+ atomic_set(&audio_ocmem_lcl.audio_cond, 1);
+ pr_debug("%s: buf->len: %ld\n", __func__, buf->len);
+ if (!buf->len) {
+ pr_debug("%s: buf.len is 0, waiting for ocmem region\n",
+ __func__);
+ mutex_unlock(&audio_ocmem_lcl.protect_lock);
+ wait_event_interruptible(audio_ocmem_lcl.audio_wait,
+ (atomic_read(&audio_ocmem_lcl.audio_cond) == 0) ||
+ (atomic_read(&audio_ocmem_lcl.audio_exit) == 1));
+ if (atomic_read(&audio_ocmem_lcl.audio_exit)) {
+ ret = ocmem_free(OCMEM_LP_AUDIO, audio_ocmem_lcl.buf);
+ if (ret) {
+ pr_err("%s: ocmem_free failed, state[%d]\n",
+ __func__,
+ atomic_read(&audio_ocmem_lcl.audio_state));
+ }
+ pr_info("%s: audio playback ended while waiting for ocmem\n",
+ __func__);
+ ret = 0;
+ goto fail_cmd;
+ }
+ clear_bit_pos(audio_ocmem_lcl.audio_state, OCMEM_STATE_GROW);
+ mutex_trylock(&audio_ocmem_lcl.protect_lock);
+ }
+ pr_debug("%s: buf->len: %ld\n", __func__, (audio_ocmem_lcl.buf)->len);
/* vote for ocmem bus bandwidth */
ret = msm_bus_scale_client_update_request(
@@ -221,7 +262,7 @@
if (ret)
pr_err("%s: failed to vote for bus bandwidth\n", __func__);
- atomic_set(&audio_ocmem_lcl.audio_state, OCMEM_STATE_MAP_TRANSITION);
+ set_bit_pos(audio_ocmem_lcl.audio_state, OCMEM_STATE_MAP_TRANSITION);
pr_debug("%s: buf->addr: 0x%08lx, len: %ld, audio_state[0x%x]\n",
__func__,
@@ -236,16 +277,25 @@
atomic_set(&audio_ocmem_lcl.audio_state, OCMEM_STATE_MAP_FAIL);
}
+ wait_event_interruptible(audio_ocmem_lcl.audio_wait,
+ test_bit_pos(audio_ocmem_lcl.audio_state,
+ OCMEM_STATE_MAP_COMPL) != 0);
+ atomic_set(&audio_ocmem_lcl.audio_cond, 1);
+
+ mutex_unlock(&audio_ocmem_lcl.protect_lock);
pr_debug("%s: audio_cond[%d] audio_state[0x%x]\n", __func__,
atomic_read(&audio_ocmem_lcl.audio_cond),
atomic_read(&audio_ocmem_lcl.audio_state));
- while ((atomic_read(&audio_ocmem_lcl.audio_state) !=
- OCMEM_STATE_EXIT)) {
+
+ while ((test_bit_pos(audio_ocmem_lcl.audio_state,
+ OCMEM_STATE_DISABLE)) == 0) {
wait_event_interruptible(audio_ocmem_lcl.audio_wait,
- atomic_read(&audio_ocmem_lcl.audio_cond) == 0);
+ (atomic_read(&audio_ocmem_lcl.audio_state) &
+ _BIT_MASK_) != 0);
- switch (atomic_read(&audio_ocmem_lcl.audio_state)) {
+ state_bit = get_state_to_process(&audio_ocmem_lcl.audio_state);
+ switch (state_bit) {
case OCMEM_STATE_MAP_COMPL:
pr_debug("%s: audio_cond[0x%x], audio_state[0x%x]\n",
__func__, atomic_read(&audio_ocmem_lcl.audio_cond),
@@ -258,6 +308,10 @@
pr_debug("%s: ocmem shrink request process\n",
__func__);
atomic_set(&audio_ocmem_lcl.audio_cond, 1);
+ clear_bit_pos(audio_ocmem_lcl.audio_state,
+ OCMEM_STATE_MAP_COMPL);
+ set_bit_pos(audio_ocmem_lcl.audio_state,
+ OCMEM_STATE_UNMAP_TRANSITION);
ret = ocmem_unmap(cid, audio_ocmem_lcl.buf,
&audio_ocmem_lcl.mlist);
if (ret) {
@@ -267,12 +321,9 @@
goto fail_cmd;
}
- atomic_set(&audio_ocmem_lcl.audio_state,
- OCMEM_STATE_UNMAP_TRANSITION);
wait_event_interruptible(audio_ocmem_lcl.audio_wait,
- atomic_read(&audio_ocmem_lcl.audio_cond) == 0);
- atomic_set(&audio_ocmem_lcl.audio_state,
- OCMEM_STATE_UNMAP_COMPL);
+ test_bit_pos(audio_ocmem_lcl.audio_state,
+ OCMEM_STATE_UNMAP_COMPL) != 0);
ret = ocmem_shrink(cid, audio_ocmem_lcl.buf, 0);
if (ret) {
pr_err("%s: ocmem_shrink failed, state[%d]\n",
@@ -281,11 +332,18 @@
goto fail_cmd;
}
atomic_set(&audio_ocmem_lcl.audio_cond, 1);
+ clear_bit_pos(audio_ocmem_lcl.audio_state,
+ OCMEM_STATE_SHRINK);
+ pr_debug("%s:shrink process complete\n", __func__);
break;
case OCMEM_STATE_GROW:
pr_debug("%s: ocmem grow request process\n",
__func__);
atomic_set(&audio_ocmem_lcl.audio_cond, 1);
+ clear_bit_pos(audio_ocmem_lcl.audio_state,
+ OCMEM_STATE_UNMAP_COMPL);
+ set_bit_pos(audio_ocmem_lcl.audio_state,
+ OCMEM_STATE_MAP_TRANSITION);
ret = ocmem_map(cid, audio_ocmem_lcl.buf,
&audio_ocmem_lcl.mlist);
if (ret) {
@@ -294,14 +352,102 @@
atomic_read(&audio_ocmem_lcl.audio_state));
goto fail_cmd;
}
- atomic_set(&audio_ocmem_lcl.audio_state,
- OCMEM_STATE_MAP_TRANSITION);
wait_event_interruptible(audio_ocmem_lcl.audio_wait,
- atomic_read(&audio_ocmem_lcl.audio_cond) == 0);
- atomic_set(&audio_ocmem_lcl.audio_state,
- OCMEM_STATE_MAP_COMPL);
+ test_bit_pos(audio_ocmem_lcl.audio_state,
+ OCMEM_STATE_MAP_COMPL) != 0);
+
+ clear_bit_pos(audio_ocmem_lcl.audio_state,
+ OCMEM_STATE_GROW);
atomic_set(&audio_ocmem_lcl.audio_cond, 1);
break;
+ case OCMEM_STATE_EXIT:
+ if (test_bit_pos(audio_ocmem_lcl.audio_state,
+ OCMEM_STATE_MAP_COMPL)) {
+ clear_bit_pos(audio_ocmem_lcl.audio_state,
+ OCMEM_STATE_MAP_COMPL);
+ set_bit_pos(audio_ocmem_lcl.audio_state,
+ OCMEM_STATE_UNMAP_TRANSITION);
+ ret = ocmem_unmap(cid, audio_ocmem_lcl.buf,
+ &audio_ocmem_lcl.mlist);
+ if (ret) {
+ pr_err("%s: ocmem_unmap failed, state[0x%x]\n",
+ __func__,
+ atomic_read(&audio_ocmem_lcl.audio_state));
+ goto fail_cmd;
+ }
+ wait_event_interruptible(
+ audio_ocmem_lcl.audio_wait,
+ test_bit_pos(audio_ocmem_lcl.audio_state,
+ OCMEM_STATE_UNMAP_COMPL) != 0);
+ }
+
+ if (test_bit_pos(audio_ocmem_lcl.audio_state,
+ OCMEM_STATE_SHRINK)) {
+ pr_debug("%s: SHRINK while exiting\n",
+ __func__);
+ ret = ocmem_shrink(cid, audio_ocmem_lcl.buf,
+ 0);
+ if (ret) {
+ pr_err("%s: ocmem_shrink failed, state[0x%x]\n",
+ __func__,
+ atomic_read(&audio_ocmem_lcl.audio_state));
+ goto fail_cmd;
+ }
+ clear_bit_pos(audio_ocmem_lcl.audio_state,
+ OCMEM_STATE_SHRINK);
+
+ }
+
+ pr_debug("%s: calling ocmem free\n", __func__);
+ ret = ocmem_free(OCMEM_LP_AUDIO, audio_ocmem_lcl.buf);
+ if (ret == -EAGAIN) {
+ pr_debug("%s: received EAGAIN\n", __func__);
+ if (test_bit_pos(audio_ocmem_lcl.audio_state,
+ OCMEM_STATE_SHRINK)) {
+ ret = ocmem_shrink(cid,
+ audio_ocmem_lcl.buf,
+ 0);
+ if (ret) {
+ pr_err("%s: ocmem_shrink failed, state[0x%x]\n",
+ __func__,
+ atomic_read(&audio_ocmem_lcl.audio_state));
+ goto fail_cmd;
+ }
+ pr_debug("calling free after EAGAIN");
+ ret = ocmem_free(OCMEM_LP_AUDIO,
+ audio_ocmem_lcl.buf);
+ if (ret) {
+ pr_err("%s: ocmem_free failed\n",
+ __func__);
+ goto fail_cmd;
+ }
+ } else {
+ pr_debug("%s: shrink callback already processed\n",
+ __func__);
+ goto fail_cmd;
+ }
+ } else if (ret) {
+ pr_err("%s: ocmem_free failed, state[0x%x], ret:%d\n",
+ __func__,
+ atomic_read(&audio_ocmem_lcl.audio_state),
+ ret);
+ goto fail_cmd;
+ }
+ pr_debug("%s: ocmem_free success\n", __func__);
+ msm_bus_scale_client_update_request(
+ audio_ocmem_lcl.audio_ocmem_bus_client,
+ 0);
+ set_bit_pos(audio_ocmem_lcl.audio_state,
+ OCMEM_STATE_DISABLE);
+ break;
+
+
+ case -EINVAL:
+ pr_info("%s: audio_cond[%d] audio_state[0x%x]\n",
+ __func__,
+ atomic_read(&audio_ocmem_lcl.audio_cond),
+ atomic_read(&audio_ocmem_lcl.audio_state));
+ break;
}
}
ret = 0;
@@ -320,64 +466,17 @@
*/
int audio_ocmem_disable(int cid)
{
- int ret;
- int cur_state;
-
- pr_debug("%s: disable\n", __func__);
- cur_state = atomic_read(&audio_ocmem_lcl.audio_state);
- if (atomic_cmpxchg(&audio_ocmem_lcl.audio_cond, 1, 0)) {
- atomic_set(&audio_ocmem_lcl.audio_state, OCMEM_STATE_EXIT);
- wake_up(&audio_ocmem_lcl.audio_wait);
- }
pr_debug("%s: audio_cond[0x%x], audio_state[0x%x]\n", __func__,
atomic_read(&audio_ocmem_lcl.audio_cond),
atomic_read(&audio_ocmem_lcl.audio_state));
- switch (cur_state) {
- case OCMEM_STATE_MAP_COMPL:
- atomic_set(&audio_ocmem_lcl.audio_cond, 1);
- ret = ocmem_unmap(cid, audio_ocmem_lcl.buf,
- &audio_ocmem_lcl.mlist);
- if (ret) {
- pr_err("%s: ocmem_unmap failed, state[%d]\n",
- __func__,
- atomic_read(&audio_ocmem_lcl.audio_state));
- goto fail_cmd;
- }
+ set_bit_pos(audio_ocmem_lcl.audio_state,
+ OCMEM_STATE_EXIT);
+ wake_up(&audio_ocmem_lcl.audio_wait);
- atomic_set(&audio_ocmem_lcl.audio_state, OCMEM_STATE_EXIT);
-
- wait_event_interruptible(audio_ocmem_lcl.audio_wait,
- atomic_read(&audio_ocmem_lcl.audio_cond) == 0);
- case OCMEM_STATE_UNMAP_COMPL:
- case OCMEM_STATE_MAP_FAIL:
- case OCMEM_STATE_MAP_TRANSITION:
- case OCMEM_STATE_ALLOC:
- ret = ocmem_free(OCMEM_LP_AUDIO, audio_ocmem_lcl.buf);
- if (ret) {
- pr_err("%s: ocmem_free failed, state[%d]\n",
- __func__,
- atomic_read(&audio_ocmem_lcl.audio_state));
- goto fail_cmd;
- }
- pr_debug("%s: state=%d", __func__,
- atomic_read(&audio_ocmem_lcl.audio_state));
- atomic_set(&audio_ocmem_lcl.audio_state, OCMEM_STATE_EXIT);
- pr_debug("%s: ocmem_free success\n", __func__);
- break;
-
- default:
- pr_debug("%s:error: state=%d", __func__,
- atomic_read(&audio_ocmem_lcl.audio_state));
- break;
-
- }
- msm_bus_scale_client_update_request(
- audio_ocmem_lcl.audio_ocmem_bus_client,
- 0);
+ mutex_unlock(&audio_ocmem_lcl.protect_lock);
+ pr_debug("%s: exit\n", __func__);
return 0;
-fail_cmd:
- return ret;
}
static void voice_ocmem_process_workdata(struct work_struct *work)
@@ -497,6 +596,10 @@
container_of(work, struct audio_ocmem_workdata, work);
en = audio_ocm_work->en;
+ mutex_lock(&audio_ocmem_lcl.protect_lock);
+ /* if previous work waiting for ocmem - signal it to exit */
+ atomic_set(&audio_ocmem_lcl.audio_exit, 1);
+ pr_debug("%s: acquired mutex for %d\n", __func__, en);
switch (audio_ocm_work->id) {
case AUDIO:
cid = OCMEM_LP_AUDIO;
@@ -548,9 +651,6 @@
workdata->id = id;
workdata->en = enable;
- /* if previous work waiting for ocmem - signal it to exit */
- atomic_set(&audio_ocmem_lcl.audio_exit, 1);
-
INIT_WORK(&workdata->work, audio_ocmem_process_workdata);
queue_work(audio_ocmem_lcl.audio_ocmem_workqueue,
&workdata->work);
@@ -611,6 +711,7 @@
atomic_set(&audio_ocmem_lcl.audio_state, OCMEM_STATE_DEFAULT);
atomic_set(&audio_ocmem_lcl.audio_exit, 0);
spin_lock_init(&audio_ocmem_lcl.audio_lock);
+ mutex_init(&audio_ocmem_lcl.protect_lock);
audio_ocmem_lcl.ocmem_en = true;
/* populate platform data */
diff --git a/sound/soc/msm/qdsp6v2/q6adm.c b/sound/soc/msm/qdsp6v2/q6adm.c
index bc11304..685deef 100644
--- a/sound/soc/msm/qdsp6v2/q6adm.c
+++ b/sound/soc/msm/qdsp6v2/q6adm.c
@@ -46,8 +46,11 @@
/* 0 - (MAX_AUDPROC_TYPES -1): audproc handles */
/* (MAX_AUDPROC_TYPES -1) - (2 * MAX_AUDPROC_TYPES -1): audvol handles */
- atomic_t mem_map_cal_handles[(2 * MAX_AUDPROC_TYPES)];
+/* + 1 for custom ADM topology */
+ atomic_t mem_map_cal_handles[(2 * MAX_AUDPROC_TYPES) + 1];
atomic_t mem_map_cal_index;
+
+ int set_custom_topology;
};
static struct adm_ctl this_adm;
@@ -309,6 +312,8 @@
atomic_set(&this_adm.copp_stat[i], 0);
}
this_adm.apr = NULL;
+ reset_custom_topology_flags();
+ this_adm.set_custom_topology = 1;
}
pr_debug("Resetting calibration blocks");
for (i = 0; i < MAX_AUDPROC_TYPES; i++) {
@@ -350,6 +355,7 @@
case ADM_CMD_DEVICE_CLOSE_V5:
case ADM_CMD_SHARED_MEM_UNMAP_REGIONS:
case ADM_CMD_MATRIX_MAP_ROUTINGS_V5:
+ case ADM_CMD_ADD_TOPOLOGIES:
pr_debug("%s: Basic callback received, wake up.\n",
__func__);
atomic_set(&this_adm.copp_stat[index], 1);
@@ -435,6 +441,87 @@
return 0;
}
+void send_adm_custom_topology(int port_id)
+{
+ struct acdb_cal_block cal_block;
+ struct cmd_set_topologies adm_top;
+ int index;
+ int result;
+ int size = 4096;
+
+ get_adm_custom_topology(&cal_block);
+ if (cal_block.cal_size == 0) {
+ pr_debug("%s: no cal to send addr= 0x%x\n",
+ __func__, cal_block.cal_paddr);
+ goto done;
+ }
+
+ index = afe_get_port_index(port_id);
+ if (index < 0 || index >= AFE_MAX_PORTS) {
+ pr_err("%s: invalid port idx %d portid %#x\n",
+ __func__, index, port_id);
+ goto done;
+ }
+
+ if (this_adm.set_custom_topology) {
+ /* specific index 4 for adm topology memory */
+ atomic_set(&this_adm.mem_map_cal_index, 4);
+
+ /* Only call this once */
+ this_adm.set_custom_topology = 0;
+
+ result = adm_memory_map_regions(port_id, &cal_block.cal_paddr,
+ 0, &size, 1);
+ if (result < 0) {
+ pr_err("%s: mmap did not work! addr = 0x%x, size = %d\n",
+ __func__, cal_block.cal_paddr,
+ cal_block.cal_size);
+ goto done;
+ }
+ }
+
+
+ adm_top.hdr.hdr_field = APR_HDR_FIELD(APR_MSG_TYPE_SEQ_CMD,
+ APR_HDR_LEN(20), APR_PKT_VER);
+ adm_top.hdr.pkt_size = APR_PKT_SIZE(APR_HDR_SIZE,
+ sizeof(adm_top));
+ adm_top.hdr.src_svc = APR_SVC_ADM;
+ adm_top.hdr.src_domain = APR_DOMAIN_APPS;
+ adm_top.hdr.src_port = port_id;
+ adm_top.hdr.dest_svc = APR_SVC_ADM;
+ adm_top.hdr.dest_domain = APR_DOMAIN_ADSP;
+ adm_top.hdr.dest_port = atomic_read(&this_adm.copp_id[index]);
+ adm_top.hdr.token = port_id;
+ adm_top.hdr.opcode = ADM_CMD_ADD_TOPOLOGIES;
+ adm_top.payload_addr_lsw = cal_block.cal_paddr;
+ adm_top.payload_addr_msw = 0;
+ adm_top.mem_map_handle = atomic_read(&this_adm.mem_map_cal_handles[4]);
+ adm_top.payload_size = cal_block.cal_size;
+
+ atomic_set(&this_adm.copp_stat[index], 0);
+ pr_debug("%s: Sending ADM_CMD_ADD_TOPOLOGIES payload = 0x%x, size = %d\n",
+ __func__, adm_top.payload_addr_lsw,
+ adm_top.payload_size);
+ result = apr_send_pkt(this_adm.apr, (uint32_t *)&adm_top);
+ if (result < 0) {
+ pr_err("%s: Set topologies failed port = 0x%x payload = 0x%x\n",
+ __func__, port_id, cal_block.cal_paddr);
+ goto done;
+ }
+ /* Wait for the callback */
+ result = wait_event_timeout(this_adm.wait[index],
+ atomic_read(&this_adm.copp_stat[index]),
+ msecs_to_jiffies(TIMEOUT_MS));
+ if (!result) {
+ pr_err("%s: Set topologies timed out port = 0x%x, payload = 0x%x\n",
+ __func__, port_id, cal_block.cal_paddr);
+ goto done;
+ }
+
+done:
+ return;
+}
+
static int send_adm_cal_block(int port_id, struct acdb_cal_block *aud_cal)
{
s32 result = 0;
@@ -684,6 +771,7 @@
rtac_set_adm_handle(this_adm.apr);
}
+ send_adm_custom_topology(port_id);
/* Create a COPP if port id are not enabled */
if (atomic_read(&this_adm.copp_cnt[index]) == 0) {
@@ -1154,6 +1242,7 @@
{
int i = 0;
this_adm.apr = NULL;
+ this_adm.set_custom_topology = 1;
for (i = 0; i < AFE_MAX_PORTS; i++) {
atomic_set(&this_adm.copp_id[i], RESET_COPP_ID);
diff --git a/sound/soc/msm/qdsp6v2/q6asm.c b/sound/soc/msm/qdsp6v2/q6asm.c
index 3d8d5eb..0c1bb209 100644
--- a/sound/soc/msm/qdsp6v2/q6asm.c
+++ b/sound/soc/msm/qdsp6v2/q6asm.c
@@ -106,6 +106,9 @@
static int out_cold_index;
static char *out_buffer;
static char *in_buffer;
+static int set_custom_topology;
+static int topology_map_handle;
+
static int audio_output_latency_dbgfs_open(struct inode *inode,
struct file *file)
{
@@ -341,6 +344,90 @@
return;
}
+void send_asm_custom_topology(struct audio_client *ac)
+{
+ struct acdb_cal_block cal_block;
+ struct cmd_set_topologies asm_top;
+ struct audio_buffer *buf;
+ struct asm_buffer_node *buf_node = NULL;
+ struct list_head *ptr, *next;
+ int result;
+ int size = 4096;
+
+ get_asm_custom_topology(&cal_block);
+ if (cal_block.cal_size == 0) {
+ pr_debug("%s: no cal to send addr= 0x%x\n",
+ __func__, cal_block.cal_paddr);
+ goto done;
+ }
+
+ if (set_custom_topology) {
+ /* Only call this once */
+ set_custom_topology = 0;
+
+ /* Use first asm buf to map memory */
+ buf = kzalloc(sizeof(struct audio_buffer), GFP_KERNEL);
+ if (!buf) {
+ pr_debug("%s: could not allocate temp memory\n",
+ __func__);
+ goto done;
+ }
+ buf[0].phys = cal_block.cal_paddr;
+ ac->port[0].buf = buf;
+
+ result = q6asm_memory_map_regions(ac, 0, size, 1, 1);
+ if (result < 0) {
+ pr_err("%s: mmap did not work! addr = 0x%x, size = %d\n",
+ __func__, cal_block.cal_paddr,
+ cal_block.cal_size);
+ goto done;
+ }
+
+ list_for_each_safe(ptr, next, &ac->port[IN].mem_map_handle) {
+ buf_node = list_entry(ptr, struct asm_buffer_node,
+ list);
+ if (buf_node->buf_addr_lsw == cal_block.cal_paddr) {
+ topology_map_handle = buf_node->mmap_hdl;
+ break;
+ }
+ }
+
+ kfree(buf);
+ }
+
+ q6asm_add_hdr(ac, &asm_top.hdr, APR_PKT_SIZE(APR_HDR_SIZE,
+ sizeof(asm_top)), TRUE);
+
+ asm_top.hdr.opcode = ASM_CMD_ADD_TOPOLOGIES;
+ asm_top.payload_addr_lsw = cal_block.cal_paddr;
+ asm_top.payload_addr_msw = 0;
+ asm_top.mem_map_handle = topology_map_handle;
+ asm_top.payload_size = cal_block.cal_size;
+
+ pr_debug("%s: Sending ASM_CMD_ADD_TOPOLOGIES payload = 0x%x, size = %d, map handle = 0x%x\n",
+ __func__, asm_top.payload_addr_lsw,
+ asm_top.payload_size, asm_top.mem_map_handle);
+
+ result = apr_send_pkt(ac->apr, (uint32_t *) &asm_top);
+ if (result < 0) {
+ pr_err("%s: Set topologies failed payload = 0x%x\n",
+ __func__, cal_block.cal_paddr);
+ goto done;
+ }
+
+ result = wait_event_timeout(ac->cmd_wait,
+ (atomic_read(&ac->cmd_state) == 0), 5*HZ);
+ if (result < 0) {
+ pr_err("%s: Set topologies failed payload = 0x%x\n",
+ __func__, cal_block.cal_paddr);
+ goto done;
+ }
+
+
+done:
+ return;
+}
+
int q6asm_audio_client_buf_free(unsigned int dir,
struct audio_client *ac)
{
@@ -552,6 +639,8 @@
goto fail;
init_waitqueue_head(&ac->cmd_wait);
+ init_waitqueue_head(&ac->time_wait);
+ atomic_set(&ac->time_flag, 1);
INIT_LIST_HEAD(&ac->port[0].mem_map_handle);
INIT_LIST_HEAD(&ac->port[1].mem_map_handle);
pr_debug("%s: mem_map_handle list init'ed\n", __func__);
@@ -563,6 +652,8 @@
atomic_set(&ac->cmd_state, 0);
atomic_set(&ac->nowait_cmd_cnt, 0);
+ send_asm_custom_topology(ac);
+
pr_debug("%s: session[%d]\n", __func__, ac->session);
return ac;
@@ -822,6 +913,8 @@
apr_reset(this_mmap.apr);
atomic_set(&this_mmap.ref_cnt, 0);
this_mmap.apr = NULL;
+ reset_custom_topology_flags();
+ set_custom_topology = 1;
return 0;
}
sid = (data->token >> 8) & 0x0F;
@@ -956,6 +1049,8 @@
(uint32_t *)data->payload, ac->priv);
apr_reset(ac->apr);
ac->apr = NULL;
+ reset_custom_topology_flags();
+ set_custom_topology = 1;
return 0;
}
@@ -997,6 +1092,7 @@
case ASM_STREAM_CMD_OPEN_READWRITE_V2:
case ASM_DATA_CMD_MEDIA_FMT_UPDATE_V2:
case ASM_STREAM_CMD_SET_ENCDEC_PARAM:
+ case ASM_CMD_ADD_TOPOLOGIES:
pr_debug("%s:Payload = [0x%x]stat[0x%x]\n",
__func__, payload[0], payload[1]);
if (atomic_read(&ac->cmd_state) && wakeup_flag) {
@@ -1128,10 +1224,8 @@
payload[0], payload[1], payload[2]);
ac->time_stamp = (uint64_t)(((uint64_t)payload[2] << 32) |
payload[1]);
- if (atomic_read(&ac->cmd_state)) {
- atomic_set(&ac->cmd_state, 0);
- wake_up(&ac->cmd_wait);
- }
+ if (atomic_cmpxchg(&ac->time_flag, 1, 0))
+ wake_up(&ac->time_wait);
break;
case ASM_DATA_EVENT_SR_CM_CHANGE_NOTIFY:
case ASM_DATA_EVENT_ENC_SR_CM_CHANGE_NOTIFY:
@@ -3342,7 +3436,7 @@
}
q6asm_add_hdr(ac, &hdr, sizeof(hdr), TRUE);
hdr.opcode = ASM_SESSION_CMD_GET_SESSIONTIME_V3;
- atomic_set(&ac->cmd_state, 1);
+ atomic_set(&ac->time_flag, 1);
pr_debug("%s: session[%d]opcode[0x%x]\n", __func__,
ac->session,
@@ -3352,8 +3446,8 @@
pr_err("Commmand 0x%x failed\n", hdr.opcode);
goto fail_cmd;
}
- rc = wait_event_timeout(ac->cmd_wait,
- (atomic_read(&ac->cmd_state) == 0), 5*HZ);
+ rc = wait_event_timeout(ac->time_wait,
+ (atomic_read(&ac->time_flag) == 0), 5*HZ);
if (!rc) {
pr_err("%s: timeout in getting session time from DSP\n",
__func__);
@@ -3564,6 +3658,7 @@
{
pr_debug("%s\n", __func__);
memset(session, 0, sizeof(session));
+ set_custom_topology = 1;
config_debug_fs_init();