| commit | c2a9ff1b4c87f0ca36d39b5710f2bb1c6ee20d57 | [log] [tgz] |
|---|---|---|
| author | xiaogang <xiaogang@codeaurora.org> | Fri Jul 05 03:34:17 2013 +0800 |
| committer | Xiaogang Cui <xiaogang@codeaurora.org> | Tue Jul 16 09:26:31 2013 +0800 |
| tree | db2152189a2a40ea4437d41d2ca959b5c33416bc | |
| parent | 6787d44d941e49ea2587d397f5b68044b5e34fb8 [diff] |
msm: clock-debug: Update fmax_rates to print uV/uA values for each level
Example output after change:
/sys/kernel/debug/clk/a7sspll $ cat fmax_rates
reg 0 reg 1
freq uV uV
0 0 1
1000000000 1800000 4
[ 1900000000 1800000 5]
0 1800000 7
Change-Id: I1563cd8f77d479e0c6c67ee3c93a66fbafb6d6f7
Signed-off-by: Xiaogang Cui <xiaogang@codeaurora.org>