Merge "devfreq: Add CPUBW HW monitor governor."
diff --git a/Documentation/devicetree/bindings/arm/msm/cpr-regulator.txt b/Documentation/devicetree/bindings/arm/msm/cpr-regulator.txt
index 3a293a3..9af81da 100644
--- a/Documentation/devicetree/bindings/arm/msm/cpr-regulator.txt
+++ b/Documentation/devicetree/bindings/arm/msm/cpr-regulator.txt
@@ -11,7 +11,7 @@
bits to indicate what bin (and voltage range) a chip is in.
Required properties:
-- compatible: Must be "qti,cpr-regulator"
+- compatible: Must be "qcom,cpr-regulator"
- reg: Register addresses for RBCPR, RBCPR clock
select, PVS and CPR eFuse address
- reg-names: Register names. Must be "rbcpr", "rbcpr_clk",
@@ -22,41 +22,41 @@
should be 1 for SVS corner
- regulator-max-microvolt: Maximum corner value as max constraint, which
should be 4 for SUPER_TURBO or 3 for TURBO
-- qti,pvs-init-voltage: A list of integers whose length is equal to 2
- to the power of qti,pvs-fuse[num-of-bits]. The
+- qcom,pvs-init-voltage: A list of integers whose length is equal to 2
+ to the power of qcom,pvs-fuse[num-of-bits]. The
location or 0-based index of an element in the
list corresponds to the bin number. The value of
each integer corresponds to the initial voltage
of the PVS bin in turbo mode in microvolts.
-- qti,pvs-corner-ceiling-slow: Ceiling voltages of all corners for APC_PVS_SLOW
-- qti,pvs-corner-ceiling-nom: Ceiling voltages of all corners for APC_PVS_NOM
-- qti,pvs-corner-ceiling-fast: Ceiling voltages of all corners for APC_PVS_FAST
+- qcom,pvs-corner-ceiling-slow: Ceiling voltages of all corners for APC_PVS_SLOW
+- qcom,pvs-corner-ceiling-nom: Ceiling voltages of all corners for APC_PVS_NOM
+- qcom,pvs-corner-ceiling-fast: Ceiling voltages of all corners for APC_PVS_FAST
The ceiling voltages for each of above three
properties may look like this:
0 (SVS voltage): 1050000 uV
1 (NORMAL voltage): 1150000 uV
2 (TURBO voltage): 1275000 uV
- vdd-apc-supply: Regulator to supply VDD APC power
-- qti,vdd-apc-step-up-limit: Limit of vdd-apc-supply steps for scaling up.
-- qti,vdd-apc-step-down-limit: Limit of vdd-apc-supply steps for scaling down.
-- qti,cpr-ref-clk: The reference clock in kHz.
-- qti,cpr-timer-delay: The delay in microseconds for the timer interval.
-- qti,cpr-timer-cons-up: Consecutive number of timer interval (qti,cpr-timer-delay)
+- qcom,vdd-apc-step-up-limit: Limit of vdd-apc-supply steps for scaling up.
+- qcom,vdd-apc-step-down-limit: Limit of vdd-apc-supply steps for scaling down.
+- qcom,cpr-ref-clk: The reference clock in kHz.
+- qcom,cpr-timer-delay: The delay in microseconds for the timer interval.
+- qcom,cpr-timer-cons-up: Consecutive number of timer interval (qcom,cpr-timer-delay)
occurred before issuing UP interrupt.
-- qti,cpr-timer-cons-down: Consecutive number of timer interval (qti,cpr-timer-delay)
+- qcom,cpr-timer-cons-down: Consecutive number of timer interval (qcom,cpr-timer-delay)
occurred before issuing DOWN interrupt.
-- qti,cpr-irq-line: Internal interrupt route signal of RBCPR, one of 0, 1 or 2.
-- qti,cpr-step-quotient: Number of CPR quotient (Ring Oscillator(RO) count) per vdd-apc-supply step
+- qcom,cpr-irq-line: Internal interrupt route signal of RBCPR, one of 0, 1 or 2.
+- qcom,cpr-step-quotient: Number of CPR quotient (Ring Oscillator(RO) count) per vdd-apc-supply step
to issue error_steps.
-- qti,cpr-up-threshold: The threshold for CPR to issue interrupt when
+- qcom,cpr-up-threshold: The threshold for CPR to issue interrupt when
error_steps is greater than it when stepping up.
-- qti,cpr-down-threshold: The threshold for CPR to issue interrupt when
+- qcom,cpr-down-threshold: The threshold for CPR to issue interrupt when
error_steps is greater than it when stepping down.
-- qti,cpr-idle-clocks: Idle clock cycles RO can be in.
-- qti,cpr-gcnt-time: The time for gate count in microseconds.
-- qti,cpr-apc-volt-step: The voltage in microvolt per CPR step, such as 5000uV.
+- qcom,cpr-idle-clocks: Idle clock cycles RO can be in.
+- qcom,cpr-gcnt-time: The time for gate count in microseconds.
+- qcom,cpr-apc-volt-step: The voltage in microvolt per CPR step, such as 5000uV.
-- qti,pvs-fuse-redun-sel: Array of 5 elements to indicate where to read the bits, what value to
+- qcom,pvs-fuse-redun-sel: Array of 5 elements to indicate where to read the bits, what value to
compare with in order to decide if the redundant PVS fuse bits would be
used instead of the original bits and method to read fuse row, reading
register through SCM or directly. The 5 elements with index [0..4] are:
@@ -70,19 +70,19 @@
Otherwise, the original PVS bits should be selected. If the 5th
element is 0, read the fuse row from register directly. Otherwise,
read it through SCM.
-- qti,pvs-fuse: Array of 4 elements to indicate the bits for PVS fuse and read method.
+- qcom,pvs-fuse: Array of 4 elements to indicate the bits for PVS fuse and read method.
The array should have index and value like this:
[0] => the PVS fuse row number
[1] => LSB bit position of the bits
[2] => number of bits
[3] => fuse reading method, 0 for direct reading or 1 for SCM reading
-- qti,pvs-fuse-redun: Array of 4 elements to indicate the bits for redundant PVS fuse.
+- qcom,pvs-fuse-redun: Array of 4 elements to indicate the bits for redundant PVS fuse.
The array should have index and value like this:
[0] => the redundant PVS fuse row number
[1] => LSB bit position of the bits
[2] => number of bits
[3] => fuse reading method, 0 for direct reading or 1 for SCM reading
-- qti,cpr-fuse-redun-sel: Array of 5 elements to indicate where to read the bits, what value to
+- qcom,cpr-fuse-redun-sel: Array of 5 elements to indicate where to read the bits, what value to
compare with in order to decide if the redundant CPR fuse bits would be
used instead of the original bits and method to read fuse row, using SCM
to read or read register directly. The 5 elements with index [0..4] are:
@@ -96,32 +96,32 @@
Otherwise, the original CPR bits should be selected. If the 5th element
is 0, read the fuse row from register directly. Otherwise, read it through
SCM.
-- qti,cpr-fuse-row: Array of row number of CPR fuse and method to read that row. It should have
+- qcom,cpr-fuse-row: Array of row number of CPR fuse and method to read that row. It should have
index and value like this:
[0] => the fuse row number
[1] => fuse reading method, 0 for direct reading or 1 for SCM reading
-- qti,cpr-fuse-bp-cpr-disable: Bit position of the bit to indicate if CPR should be disable
-- qti,cpr-fuse-bp-scheme: Bit position of the bit to indicate if it's a global/local scheme
-- qti,cpr-fuse-target-quot: Array of bit positions in fuse for Target Quotient of all corners.
+- qcom,cpr-fuse-bp-cpr-disable: Bit position of the bit to indicate if CPR should be disable
+- qcom,cpr-fuse-bp-scheme: Bit position of the bit to indicate if it's a global/local scheme
+- qcom,cpr-fuse-target-quot: Array of bit positions in fuse for Target Quotient of all corners.
It should have index and value like this:
[0] => bit position of the LSB bit for SVS target quotient
[1] => bit position of the LSB bit for NOMINAL target quotient
[2] => bit position of the LSB bit for TURBO target quotient
-- qti,cpr-fuse-ro-sel: Array of bit positions in fuse for RO select of all corners.
+- qcom,cpr-fuse-ro-sel: Array of bit positions in fuse for RO select of all corners.
It should have index and value like this:
[0] => bit position of the LSB bit for SVS RO select bits
[1] => bit position of the LSB bit for NOMINAL RO select bits
[2] => bit position of the LSB bit for TURBO RO select bits
-- qti,cpr-fuse-redun-row: Array of row number of redundant CPR fuse and method to read that
+- qcom,cpr-fuse-redun-row: Array of row number of redundant CPR fuse and method to read that
row. It should have index and value like this:
[0] => the redundant fuse row number
[1] => the value to indicate reading the fuse row directly or using SCM
-- qti,cpr-fuse-redun-target-quot: Array of bit positions in fuse for redundant Target Quotient of all corners.
+- qcom,cpr-fuse-redun-target-quot: Array of bit positions in fuse for redundant Target Quotient of all corners.
It should have index and value like this:
[0] => bit position of the LSB bit for redundant SVS target quotient
[1] => bit position of the LSB bit for redundant NOMINAL target quotient
[2] => bit position of the LSB bit for redundant TURBO target quotient
-- qti,cpr-fuse-redun-ro-sel: Array of bit positions in eFuse for redundant RO select.
+- qcom,cpr-fuse-redun-ro-sel: Array of bit positions in eFuse for redundant RO select.
It should have index and value like this:
[0] => bit position of the LSB bit for redundant SVS RO select bits
[1] => bit position of the LSB bit for redundant NOMINAL RO select bits
@@ -131,23 +131,23 @@
Optional properties:
- vdd-mx-supply: Regulator to supply memory power as dependency
of VDD APC.
-- qti,vdd-mx-vmax: The maximum voltage in uV for vdd-mx-supply. This
+- qcom,vdd-mx-vmax: The maximum voltage in uV for vdd-mx-supply. This
is required when vdd-mx-supply is present.
-- qti,vdd-mx-vmin-method: The method to determine the minimum voltage for
+- qcom,vdd-mx-vmin-method: The method to determine the minimum voltage for
vdd-mx-supply, which can be one of following
choices compared with VDD APC:
0 => equal to the voltage(vmin) of VDD APC
1 => equal to PVS corner ceiling voltage
2 => equal to slow speed corner ceiling
- 3 => equal to qti,vdd-mx-vmax
+ 3 => equal to qcom,vdd-mx-vmax
This is required when vdd-mx-supply is present.
-- qti,cpr-fuse-redun-bp-cpr-disable: Redundant bit position of the bit to indicate if CPR should be disable
-- qti,cpr-fuse-redun-bp-scheme: Redundant bit position of the bit to indicate if it's a global/local scheme
+- qcom,cpr-fuse-redun-bp-cpr-disable: Redundant bit position of the bit to indicate if CPR should be disable
+- qcom,cpr-fuse-redun-bp-scheme: Redundant bit position of the bit to indicate if it's a global/local scheme
This property is required if cpr-fuse-redun-bp-cpr-disable
is present, and vise versa.
-- qti,cpr-enable: Present: CPR enabled by default.
+- qcom,cpr-enable: Present: CPR enabled by default.
Not Present: CPR disable by default.
-- qti,cpr-fuse-cond-min-volt-sel: Array of 5 elements to indicate where to read the bits, what value to
+- qcom,cpr-fuse-cond-min-volt-sel: Array of 5 elements to indicate where to read the bits, what value to
compare with in order to decide if the conditional minimum apc voltage needs
to be applied and the fuse reading method.
The 5 elements with index[0..4] are:
@@ -159,11 +159,11 @@
When the value of the fuse bits specified by first 3 elements is not equal to
the value in 4th element, then set the apc voltage for all parts running
at each voltage corner to be not lower than the voltage defined
- using "qti,cpr-cond-min-voltage".
-- qti,cpr-cond-min-voltage: Minimum voltage in microvolts for SVS, NOM and TURBO mode if the fuse bits
- defined in qti,cpr-fuse-cond-min-volt-sel have not been programmed with the
+ using "qcom,cpr-cond-min-voltage".
+- qcom,cpr-cond-min-voltage: Minimum voltage in microvolts for SVS, NOM and TURBO mode if the fuse bits
+ defined in qcom,cpr-fuse-cond-min-volt-sel have not been programmed with the
expected data. This is required if cpr-fuse-cond-min-volt-sel is present.
-- qti,cpr-fuse-uplift-sel: Array of 5 elements to indicate where to read the bits, what value to
+- qcom,cpr-fuse-uplift-sel: Array of 5 elements to indicate where to read the bits, what value to
compare with in order to enable or disable the pvs voltage uplift workaround,
and the fuse reading method.
The 5 elements with index[0..4] are:
@@ -175,7 +175,7 @@
[4]: => fuse reading method, 0 for direct reading or 1 for SCM reading.
When the value of the fuse bits specified by first 3 elements equals to the
value in 4th element, the pvs voltage uplift workaround will be enabled.
-- qti,speed-bin-fuse-sel: Array of 4 elements to indicate where to read the speed bin of the processor,
+- qcom,speed-bin-fuse-sel: Array of 4 elements to indicate where to read the speed bin of the processor,
and the fuse reading method.
The 4 elements with index[0..3] are:
[0]: => the fuse row number of the selector;
@@ -183,22 +183,22 @@
[2]: => number of the bits;
[3]: => fuse reading method, 0 for direct reading or 1 for SCM reading.
This is required if cpr-fuse-uplift-disable-sel is present.
-- qti,cpr-uplift-voltage: Uplift in microvolts used for increasing pvs init voltage. If this property is present,
+- qcom,cpr-uplift-voltage: Uplift in microvolts used for increasing pvs init voltage. If this property is present,
This is required if cpr-fuse-uplift-disable-sel is present.
-- qti,cpr-uplift-max-volt: Maximum voltage in microvolts used for pvs voltage uplift workaround to limit
+- qcom,cpr-uplift-max-volt: Maximum voltage in microvolts used for pvs voltage uplift workaround to limit
the maximum pvs voltage.
This is required if cpr-fuse-uplift-disable-sel is present.
-- qti,cpr-uplift-quotient: Three numbers used for pvs voltage uplift workaround to be added to the target
+- qcom,cpr-uplift-quotient: Three numbers used for pvs voltage uplift workaround to be added to the target
quotient for each corner.
The 3 quotient increment with index[0..2] are:
[0]: => for SVS corner target quotient;
[1]: => for NORM corner target quotient;
[2]: => for TURBO corner target quotient;
This is required if cpr-fuse-uplift-disable-sel is present.
-- qti,cpr-uplift-speed-bin: The speed bin value corresponding to one type of processor which needs to apply the
+- qcom,cpr-uplift-speed-bin: The speed bin value corresponding to one type of processor which needs to apply the
pvs voltage uplift workaround.
This is required if cpr-fuse-uplift-disable-sel is present.
-- qti,cpr-quot-adjust-table: Array of triples in which each triple indicates the speed bin of the CPU, the virtual
+- qcom,cpr-quot-adjust-table: Array of triples in which each triple indicates the speed bin of the CPU, the virtual
corner to use and the quotient adjustment.
The 3 elements in one triple are:
[0]: => the speed bin of the CPU.
@@ -207,17 +207,21 @@
If the speed bin in a triple is equal to the speed bin of the CPU, the adjustment would
be subtracted from the quotient value of the voltage corner when the CPU is running at
that virtual corner. Each virtual corner value must be in the range 1 to the number of
- elements in qti,cpr-corner-map.
-- qti,cpr-corner-map: Array of elements of fuse corner value for each virtual corner.
+ elements in qcom,cpr-corner-map.
+- qcom,cpr-corner-map: Array of elements of fuse corner value for each virtual corner.
The location or 1-based index of an element in the list corresponds to
the virtual corner value. For example, the first element in the list is the fuse corner
value that virtual corner 1 maps to.
- This is required if qti,cpr-quot-adjust-table is present.
+ This is required if qcom,cpr-quot-adjust-table is present.
+- qcom,cpr-quotient-adjustment: Present: CPR adjusts quotient value. The
+ adjustment equals to the quotient adjustment
+ in millivolts multiply the KV value.
+ Not Present: CPR will not adjust quotient value.
Example:
apc_vreg_corner: regulator@f9018000 {
status = "okay";
- compatible = "qti,cpr-regulator";
+ compatible = "qcom,cpr-regulator";
reg = <0xf9018000 0x1000>, <0xfc4b8000 0x1000>;
reg-names = "rbcpr", "efuse_addr";
interrupts = <0 15 0>;
@@ -225,11 +229,11 @@
regulator-min-microvolt = <1>;
regulator-max-microvolt = <3>;
- qti,pvs-fuse = <22 6 5 1>;
- qti,pvs-fuse-redun-sel = <22 24 3 2 1>;
- qti,pvs-fuse-redun = <22 27 5 1>;
+ qcom,pvs-fuse = <22 6 5 1>;
+ qcom,pvs-fuse-redun-sel = <22 24 3 2 1>;
+ qcom,pvs-fuse-redun = <22 27 5 1>;
- qti,pvs-init-voltage = <1330000 1330000 1330000 1320000
+ qcom,pvs-init-voltage = <1330000 1330000 1330000 1320000
1310000 1300000 1290000 1280000
1270000 1260000 1250000 1240000
1230000 1220000 1210000 1200000
@@ -237,46 +241,46 @@
1150000 1140000 1140000 1140000
1140000 1140000 1140000 1140000
1140000 1140000 1140000 1140000>;
- qti,pvs-corner-ceiling-slow = <1050000 1160000 1275000>;
- qti,pvs-corner-ceiling-nom = <975000 1075000 1200000>;
- qti,pvs-corner-ceiling-fast = <900000 1000000 1140000>;
+ qcom,pvs-corner-ceiling-slow = <1050000 1160000 1275000>;
+ qcom,pvs-corner-ceiling-nom = <975000 1075000 1200000>;
+ qcom,pvs-corner-ceiling-fast = <900000 1000000 1140000>;
vdd-apc-supply = <&pm8226_s2>;
vdd-mx-supply = <&pm8226_l3_ao>;
- qti,vdd-mx-vmax = <1350000>;
- qti,vdd-mx-vmin-method = <1>;
- qti,vdd-apc-step-up-limit = <1>;
- qti,vdd-apc-step-down-limit = <1>;
- qti,cpr-ref-clk = <19200>;
- qti,cpr-timer-delay = <5000>;
- qti,cpr-timer-cons-up = <1>;
- qti,cpr-timer-cons-down = <2>;
- qti,cpr-irq-line = <0>;
- qti,cpr-step-quotient = <15>;
- qti,cpr-up-threshold = <1>;
- qti,cpr-down-threshold = <2>;
- qti,cpr-idle-clocks = <5>;
- qti,cpr-gcnt-time = <1>;
- qti,cpr-apc-volt-step = <5000>;
+ qcom,vdd-mx-vmax = <1350000>;
+ qcom,vdd-mx-vmin-method = <1>;
+ qcom,vdd-apc-step-up-limit = <1>;
+ qcom,vdd-apc-step-down-limit = <1>;
+ qcom,cpr-ref-clk = <19200>;
+ qcom,cpr-timer-delay = <5000>;
+ qcom,cpr-timer-cons-up = <1>;
+ qcom,cpr-timer-cons-down = <2>;
+ qcom,cpr-irq-line = <0>;
+ qcom,cpr-step-quotient = <15>;
+ qcom,cpr-up-threshold = <1>;
+ qcom,cpr-down-threshold = <2>;
+ qcom,cpr-idle-clocks = <5>;
+ qcom,cpr-gcnt-time = <1>;
+ qcom,cpr-apc-volt-step = <5000>;
- qti,cpr-fuse-row = <138 1>;
- qti,cpr-fuse-bp-cpr-disable = <36>;
- qti,cpr-fuse-bp-scheme = <37>;
- qti,cpr-fuse-target-quot = <24 12 0>;
- qti,cpr-fuse-ro-sel = <54 38 41>;
- qti,cpr-fuse-redun-sel = <138 57 1 1 1>;
- qti,cpr-fuse-redun-row = <139 1>;
- qti,cpr-fuse-redun-target-quot = <24 12 0>;
- qti,cpr-fuse-redun-ro-sel = <46 36 39>;
- qti,cpr-fuse-cond-min-volt-sel = <54 42 6 7 1>;
- qti,cpr-cond-min-voltage = <1140000>;
- qti,cpr-fuse-uplift-sel = <22 53 1 0 0>;
- qti,cpr-uplift-voltage = <50000>;
- qti,cpr-uplift-quotient = <0 0 120>;
- qti,cpr-uplift-max-volt = <1350000>;
- qti,cpr-uplift-speed-bin = <1>;
- qti,speed-bin-fuse-sel = <22 0 3 0>;
- qti,cpr-corner-map = <1 1 2 2 3 3 3 3 3 3 3 3>;
- qti,cpr-quot-adjust-table = <1 1 0>, <1 2 0>, <1 3 0>,
+ qcom,cpr-fuse-row = <138 1>;
+ qcom,cpr-fuse-bp-cpr-disable = <36>;
+ qcom,cpr-fuse-bp-scheme = <37>;
+ qcom,cpr-fuse-target-quot = <24 12 0>;
+ qcom,cpr-fuse-ro-sel = <54 38 41>;
+ qcom,cpr-fuse-redun-sel = <138 57 1 1 1>;
+ qcom,cpr-fuse-redun-row = <139 1>;
+ qcom,cpr-fuse-redun-target-quot = <24 12 0>;
+ qcom,cpr-fuse-redun-ro-sel = <46 36 39>;
+ qcom,cpr-fuse-cond-min-volt-sel = <54 42 6 7 1>;
+ qcom,cpr-cond-min-voltage = <1140000>;
+ qcom,cpr-fuse-uplift-sel = <22 53 1 0 0>;
+ qcom,cpr-uplift-voltage = <50000>;
+ qcom,cpr-uplift-quotient = <0 0 120>;
+ qcom,cpr-uplift-max-volt = <1350000>;
+ qcom,cpr-uplift-speed-bin = <1>;
+ qcom,speed-bin-fuse-sel = <22 0 3 0>;
+ qcom,cpr-corner-map = <1 1 2 2 3 3 3 3 3 3 3 3>;
+ qcom,cpr-quot-adjust-table = <1 1 0>, <1 2 0>, <1 3 0>,
<1 4 0>, <1 5 450>, <1 6 375>,
<1 7 300>, <1 8 225>, <1 9 187>,
<1 10 150>, <1 11 75>, <1 12 0>;
diff --git a/arch/arm/boot/dts/msm8226-camera-sensor-cdp.dtsi b/arch/arm/boot/dts/msm8226-camera-sensor-cdp.dtsi
index fa5c739..20bb2aa 100644
--- a/arch/arm/boot/dts/msm8226-camera-sensor-cdp.dtsi
+++ b/arch/arm/boot/dts/msm8226-camera-sensor-cdp.dtsi
@@ -17,7 +17,7 @@
cell-index = <0>;
compatible = "qcom,camera-led-flash";
qcom,flash-type = <1>;
- qcom,flash-source = <&pm8226_flash0 &pm8226_flash1>;
+ qcom,flash-source = <&pm8226_flash0>;
qcom,torch-source = <&pm8226_torch>;
};
};
diff --git a/arch/arm/boot/dts/msm8226-camera-sensor-mtp.dtsi b/arch/arm/boot/dts/msm8226-camera-sensor-mtp.dtsi
index 5d1e1c8..07a4383 100644
--- a/arch/arm/boot/dts/msm8226-camera-sensor-mtp.dtsi
+++ b/arch/arm/boot/dts/msm8226-camera-sensor-mtp.dtsi
@@ -17,7 +17,7 @@
cell-index = <0>;
compatible = "qcom,camera-led-flash";
qcom,flash-type = <1>;
- qcom,flash-source = <&pm8226_flash0 &pm8226_flash1>;
+ qcom,flash-source = <&pm8226_flash0>;
qcom,torch-source = <&pm8226_torch>;
};
};
diff --git a/arch/arm/boot/dts/msm8226-camera-sensor-qrd.dtsi b/arch/arm/boot/dts/msm8226-camera-sensor-qrd.dtsi
index fd6d618..0436600 100644
--- a/arch/arm/boot/dts/msm8226-camera-sensor-qrd.dtsi
+++ b/arch/arm/boot/dts/msm8226-camera-sensor-qrd.dtsi
@@ -17,7 +17,7 @@
cell-index = <0>;
compatible = "qcom,camera-led-flash";
qcom,flash-type = <1>;
- qcom,flash-source = <&pm8226_flash0 &pm8226_flash1>;
+ qcom,flash-source = <&pm8226_flash0>;
qcom,torch-source = <&pm8226_torch>;
};
};
diff --git a/arch/arm/boot/dts/msm8226-regulator.dtsi b/arch/arm/boot/dts/msm8226-regulator.dtsi
index dbeaa97..0146367 100644
--- a/arch/arm/boot/dts/msm8226-regulator.dtsi
+++ b/arch/arm/boot/dts/msm8226-regulator.dtsi
@@ -30,7 +30,7 @@
&soc {
apc_vreg_corner: regulator@f9018000 {
status = "okay";
- compatible = "qti,cpr-regulator";
+ compatible = "qcom,cpr-regulator";
reg = <0xf9018000 0x1000>, <0xf9011064 4>, <0xfc4b8000 0x1000>;
reg-names = "rbcpr", "rbcpr_clk", "efuse_addr";
interrupts = <0 15 0>;
@@ -38,61 +38,61 @@
regulator-min-microvolt = <1>;
regulator-max-microvolt = <12>;
- qti,pvs-fuse-redun-sel = <22 24 3 2 0>;
- qti,pvs-fuse = <22 6 5 0>;
- qti,pvs-fuse-redun = <22 27 5 0>;
+ qcom,pvs-fuse-redun-sel = <22 24 3 2 0>;
+ qcom,pvs-fuse = <22 6 5 0>;
+ qcom,pvs-fuse-redun = <22 27 5 0>;
- qti,pvs-init-voltage = <1275000 1275000 1275000 1275000 1275000
+ qcom,pvs-init-voltage = <1275000 1275000 1275000 1275000 1275000
1275000 1260000 1245000 1230000 1215000
1200000 1185000 1170000 1155000 1140000
1140000 1140000 1140000 1140000 1140000
1150000 1140000 1140000 1140000 1140000
1140000 1140000 1140000 1275000 1275000
1275000 1275000>;
- qti,pvs-corner-ceiling-slow = <1050000 1150000 1275000>;
- qti,pvs-corner-ceiling-nom = <1050000 1075000 1200000>;
- qti,pvs-corner-ceiling-fast = <1050000 1050000 1100000>;
+ qcom,pvs-corner-ceiling-slow = <1050000 1150000 1275000>;
+ qcom,pvs-corner-ceiling-nom = <1050000 1075000 1200000>;
+ qcom,pvs-corner-ceiling-fast = <1050000 1050000 1100000>;
vdd-apc-supply = <&pm8226_s2>;
vdd-mx-supply = <&pm8226_l3_ao>;
- qti,vdd-mx-vmax = <1350000>;
- qti,vdd-mx-vmin-method = <1>;
+ qcom,vdd-mx-vmax = <1350000>;
+ qcom,vdd-mx-vmin-method = <1>;
- qti,cpr-ref-clk = <19200>;
- qti,cpr-timer-delay = <5000>;
- qti,cpr-timer-cons-up = <0>;
- qti,cpr-timer-cons-down = <2>;
- qti,cpr-irq-line = <0>;
- qti,cpr-step-quotient = <15>;
- qti,cpr-up-threshold = <0>;
- qti,cpr-down-threshold = <10>;
- qti,cpr-idle-clocks = <0>;
- qti,cpr-gcnt-time = <1>;
- qti,vdd-apc-step-up-limit = <1>;
- qti,vdd-apc-step-down-limit = <1>;
- qti,cpr-apc-volt-step = <5000>;
+ qcom,cpr-ref-clk = <19200>;
+ qcom,cpr-timer-delay = <5000>;
+ qcom,cpr-timer-cons-up = <0>;
+ qcom,cpr-timer-cons-down = <2>;
+ qcom,cpr-irq-line = <0>;
+ qcom,cpr-step-quotient = <15>;
+ qcom,cpr-up-threshold = <0>;
+ qcom,cpr-down-threshold = <10>;
+ qcom,cpr-idle-clocks = <0>;
+ qcom,cpr-gcnt-time = <1>;
+ qcom,vdd-apc-step-up-limit = <1>;
+ qcom,vdd-apc-step-down-limit = <1>;
+ qcom,cpr-apc-volt-step = <5000>;
- qti,cpr-fuse-redun-sel = <138 57 1 1 0>;
- qti,cpr-fuse-row = <138 0>;
- qti,cpr-fuse-bp-cpr-disable = <36>;
- qti,cpr-fuse-bp-scheme = <37>;
- qti,cpr-fuse-target-quot = <24 12 0>;
- qti,cpr-fuse-ro-sel = <54 38 41>;
- qti,cpr-fuse-redun-row = <139 0>;
- qti,cpr-fuse-redun-target-quot = <24 12 0>;
- qti,cpr-fuse-redun-ro-sel = <46 36 39>;
+ qcom,cpr-fuse-redun-sel = <138 57 1 1 0>;
+ qcom,cpr-fuse-row = <138 0>;
+ qcom,cpr-fuse-bp-cpr-disable = <36>;
+ qcom,cpr-fuse-bp-scheme = <37>;
+ qcom,cpr-fuse-target-quot = <24 12 0>;
+ qcom,cpr-fuse-ro-sel = <54 38 41>;
+ qcom,cpr-fuse-redun-row = <139 0>;
+ qcom,cpr-fuse-redun-target-quot = <24 12 0>;
+ qcom,cpr-fuse-redun-ro-sel = <46 36 39>;
- qti,cpr-enable;
- qti,cpr-fuse-cond-min-volt-sel = <54 42 6 7 1>;
- qti,cpr-cond-min-voltage = <1140000>;
- qti,cpr-fuse-uplift-sel = <22 53 1 0 0>;
- qti,cpr-uplift-voltage = <50000>;
- qti,cpr-uplift-quotient = <0 0 120>;
- qti,cpr-uplift-max-volt = <1350000>;
- qti,cpr-uplift-speed-bin = <1>;
- qti,speed-bin-fuse-sel = <22 0 3 0>;
- qti,cpr-corner-map = <1 1 2 2 3 3 3 3 3 3 3 3>;
- qti,cpr-quot-adjust-table =
+ qcom,cpr-enable;
+ qcom,cpr-fuse-cond-min-volt-sel = <54 42 6 7 1>;
+ qcom,cpr-cond-min-voltage = <1140000>;
+ qcom,cpr-fuse-uplift-sel = <22 53 1 0 0>;
+ qcom,cpr-uplift-voltage = <50000>;
+ qcom,cpr-uplift-quotient = <0 0 120>;
+ qcom,cpr-uplift-max-volt = <1350000>;
+ qcom,cpr-uplift-speed-bin = <1>;
+ qcom,speed-bin-fuse-sel = <22 0 3 0>;
+ qcom,cpr-corner-map = <1 1 2 2 3 3 3 3 3 3 3 3>;
+ qcom,cpr-quot-adjust-table =
<1 5 450>,
<1 6 375>,
<1 7 300>,
diff --git a/arch/arm/boot/dts/msm8226-v2.dtsi b/arch/arm/boot/dts/msm8226-v2.dtsi
index f1f43b2..089d415 100644
--- a/arch/arm/boot/dts/msm8226-v2.dtsi
+++ b/arch/arm/boot/dts/msm8226-v2.dtsi
@@ -52,20 +52,20 @@
};
&apc_vreg_corner {
- qti,pvs-init-voltage = <1330000 1330000 1330000 1320000 1310000
+ qcom,pvs-init-voltage = <1330000 1330000 1330000 1320000 1310000
1300000 1290000 1280000 1270000 1260000
1250000 1240000 1230000 1220000 1210000
1200000 1190000 1180000 1170000 1160000
1150000 1140000 1140000 1140000 1140000
1140000 1140000 1140000 1140000 1140000
1140000 1140000>;
- qti,pvs-corner-ceiling-slow = <1050000 1150000 1280000>;
- qti,pvs-corner-ceiling-nom = <1050000 1080000 1200000>;
- qti,pvs-corner-ceiling-fast = <1050000 1050000 1100000>;
- qti,cpr-step-quotient = <30>;
- qti,cpr-up-threshold = <0>;
- qti,cpr-down-threshold = <5>;
- qti,cpr-apc-volt-step = <10000>;
+ qcom,pvs-corner-ceiling-slow = <1050000 1150000 1280000>;
+ qcom,pvs-corner-ceiling-nom = <1050000 1080000 1200000>;
+ qcom,pvs-corner-ceiling-fast = <1050000 1050000 1100000>;
+ qcom,cpr-step-quotient = <30>;
+ qcom,cpr-up-threshold = <0>;
+ qcom,cpr-down-threshold = <5>;
+ qcom,cpr-apc-volt-step = <10000>;
};
&msm_gpu {
diff --git a/arch/arm/boot/dts/msm8610-regulator.dtsi b/arch/arm/boot/dts/msm8610-regulator.dtsi
index 21788f5..1340612 100644
--- a/arch/arm/boot/dts/msm8610-regulator.dtsi
+++ b/arch/arm/boot/dts/msm8610-regulator.dtsi
@@ -30,7 +30,7 @@
&soc {
apc_vreg_corner: regulator@f9018000 {
status = "okay";
- compatible = "qti,cpr-regulator";
+ compatible = "qcom,cpr-regulator";
reg = <0xf9018000 0x1000>, <0xf9011064 4>, <0xfc4b8000 0x1000>;
reg-names = "rbcpr", "rbcpr_clk", "efuse_addr";
interrupts = <0 15 0>;
@@ -38,54 +38,54 @@
regulator-min-microvolt = <1>;
regulator-max-microvolt = <12>;
- qti,pvs-fuse-redun-sel = <53 25 3 2 1>;
- qti,pvs-fuse = <23 6 5 1>;
- qti,pvs-fuse-redun = <61 47 5 1>;
+ qcom,pvs-fuse-redun-sel = <53 25 3 2 1>;
+ qcom,pvs-fuse = <23 6 5 1>;
+ qcom,pvs-fuse-redun = <61 47 5 1>;
- qti,pvs-init-voltage = <1275000 1275000 1275000 1275000 1275000
+ qcom,pvs-init-voltage = <1275000 1275000 1275000 1275000 1275000
1275000 1275000 1275000 1275000 1275000
1275000 1275000 1275000 1275000 1275000
1275000 1275000 1275000 1275000 1275000
1275000 1275000 1275000 1275000 1275000
1275000 1275000 1275000 1275000 1275000
1275000 1275000>;
- qti,pvs-corner-ceiling-slow = <1050000 1150000 1275000>;
- qti,pvs-corner-ceiling-nom = <1050000 1075000 1275000>;
- qti,pvs-corner-ceiling-fast = <1050000 1050000 1275000>;
+ qcom,pvs-corner-ceiling-slow = <1050000 1150000 1275000>;
+ qcom,pvs-corner-ceiling-nom = <1050000 1075000 1275000>;
+ qcom,pvs-corner-ceiling-fast = <1050000 1050000 1275000>;
vdd-apc-supply = <&pm8110_s2>;
vdd-mx-supply = <&pm8110_l3_ao>;
- qti,vdd-mx-vmax = <1350000>;
- qti,vdd-mx-vmin-method = <1>;
+ qcom,vdd-mx-vmax = <1350000>;
+ qcom,vdd-mx-vmin-method = <1>;
- qti,cpr-ref-clk = <19200>;
- qti,cpr-timer-delay = <5000>;
- qti,cpr-timer-cons-up = <0>;
- qti,cpr-timer-cons-down = <2>;
- qti,cpr-irq-line = <0>;
- qti,cpr-step-quotient = <15>;
- qti,cpr-up-threshold = <0>;
- qti,cpr-down-threshold = <10>;
- qti,cpr-idle-clocks = <5>;
- qti,cpr-gcnt-time = <1>;
- qti,vdd-apc-step-up-limit = <1>;
- qti,vdd-apc-step-down-limit = <1>;
- qti,cpr-apc-volt-step = <5000>;
+ qcom,cpr-ref-clk = <19200>;
+ qcom,cpr-timer-delay = <5000>;
+ qcom,cpr-timer-cons-up = <0>;
+ qcom,cpr-timer-cons-down = <2>;
+ qcom,cpr-irq-line = <0>;
+ qcom,cpr-step-quotient = <15>;
+ qcom,cpr-up-threshold = <0>;
+ qcom,cpr-down-threshold = <10>;
+ qcom,cpr-idle-clocks = <5>;
+ qcom,cpr-gcnt-time = <1>;
+ qcom,vdd-apc-step-up-limit = <1>;
+ qcom,vdd-apc-step-down-limit = <1>;
+ qcom,cpr-apc-volt-step = <5000>;
- qti,cpr-fuse-redun-sel = <53 25 3 2 1>;
- qti,cpr-fuse-row = <61 1>;
- qti,cpr-fuse-bp-cpr-disable = <39>;
- qti,cpr-fuse-bp-scheme = <40>;
- qti,cpr-fuse-target-quot = <27 15 3>;
- qti,cpr-fuse-ro-sel = <47 41 44>;
- qti,cpr-fuse-redun-row = <52 1>;
- qti,cpr-fuse-redun-bp-cpr-disable = <24>;
- qti,cpr-fuse-redun-bp-scheme = <25>;
- qti,cpr-fuse-redun-target-quot = <32 12 0>;
- qti,cpr-fuse-redun-ro-sel = <44 26 29>;
- qti,cpr-corner-map = <1 1 2 2 3 3 3 3 3 3 3 3>;
+ qcom,cpr-fuse-redun-sel = <53 25 3 2 1>;
+ qcom,cpr-fuse-row = <61 1>;
+ qcom,cpr-fuse-bp-cpr-disable = <39>;
+ qcom,cpr-fuse-bp-scheme = <40>;
+ qcom,cpr-fuse-target-quot = <27 15 3>;
+ qcom,cpr-fuse-ro-sel = <47 41 44>;
+ qcom,cpr-fuse-redun-row = <52 1>;
+ qcom,cpr-fuse-redun-bp-cpr-disable = <24>;
+ qcom,cpr-fuse-redun-bp-scheme = <25>;
+ qcom,cpr-fuse-redun-target-quot = <32 12 0>;
+ qcom,cpr-fuse-redun-ro-sel = <44 26 29>;
+ qcom,cpr-corner-map = <1 1 2 2 3 3 3 3 3 3 3 3>;
- qti,cpr-enable;
+ qcom,cpr-enable;
};
};
diff --git a/arch/arm/boot/dts/msm8926-camera-sensor-qrd.dtsi b/arch/arm/boot/dts/msm8926-camera-sensor-qrd.dtsi
index 9b812da..ac2d908 100644
--- a/arch/arm/boot/dts/msm8926-camera-sensor-qrd.dtsi
+++ b/arch/arm/boot/dts/msm8926-camera-sensor-qrd.dtsi
@@ -17,7 +17,7 @@
cell-index = <0>;
compatible = "qcom,camera-led-flash";
qcom,flash-type = <1>;
- qcom,flash-source = <&pm8226_flash0 &pm8226_flash1>;
+ qcom,flash-source = <&pm8226_flash0>;
qcom,torch-source = <&pm8226_torch>;
};
};
diff --git a/arch/arm/boot/dts/msm8926.dtsi b/arch/arm/boot/dts/msm8926.dtsi
index d2ab717..963c1b8 100644
--- a/arch/arm/boot/dts/msm8926.dtsi
+++ b/arch/arm/boot/dts/msm8926.dtsi
@@ -151,20 +151,21 @@
};
&apc_vreg_corner {
- qti,pvs-init-voltage = <1350000 1340000 1330000 1320000 1310000
+ qcom,pvs-init-voltage = <1350000 1340000 1330000 1320000 1310000
1300000 1290000 1280000 1270000 1260000
1250000 1240000 1230000 1220000 1210000
1200000 1190000 1180000 1170000 1160000
1150000 1140000 1140000 1140000 1140000
1140000 1140000 1140000 1140000 1140000
1140000 1140000>;
- qti,pvs-corner-ceiling-slow = <1050000 1150000 1280000>;
- qti,pvs-corner-ceiling-nom = <1050000 1080000 1200000>;
- qti,pvs-corner-ceiling-fast = <1050000 1050000 1100000>;
- qti,cpr-step-quotient = <30>;
- qti,cpr-up-threshold = <0>;
- qti,cpr-down-threshold = <5>;
- qti,cpr-apc-volt-step = <10000>;
+ qcom,pvs-corner-ceiling-slow = <1050000 1150000 1280000>;
+ qcom,pvs-corner-ceiling-nom = <1050000 1080000 1200000>;
+ qcom,pvs-corner-ceiling-fast = <1050000 1050000 1100000>;
+ qcom,cpr-step-quotient = <30>;
+ qcom,cpr-up-threshold = <0>;
+ qcom,cpr-down-threshold = <1>;
+ qcom,cpr-apc-volt-step = <10000>;
+ qcom,cpr-quotient-adjustment = <96>;
};
&tsens {
diff --git a/arch/arm/mach-msm/cpr-regulator.c b/arch/arm/mach-msm/cpr-regulator.c
index fa132fa..28afc91 100644
--- a/arch/arm/mach-msm/cpr-regulator.c
+++ b/arch/arm/mach-msm/cpr-regulator.c
@@ -219,6 +219,7 @@
int *corner_map;
u32 num_corners;
int *quot_adjust;
+ u32 quotient_adjustment;
};
#define CPR_DEBUG_MASK_IRQ BIT(0)
@@ -622,13 +623,9 @@
}
cpr_vreg->last_volt[corner] = new_volt;
- /* Restore default threshold for DOWN */
- reg_mask = RBCPR_CTL_DN_THRESHOLD_MASK <<
- RBCPR_CTL_DN_THRESHOLD_SHIFT;
- reg_val = cpr_vreg->down_threshold <<
- RBCPR_CTL_DN_THRESHOLD_SHIFT;
- /* and disable auto nack down */
- reg_mask |= RBCPR_CTL_SW_AUTO_CONT_NACK_DN_EN;
+ /* Disable auto nack down */
+ reg_mask = RBCPR_CTL_SW_AUTO_CONT_NACK_DN_EN;
+ reg_val = 0;
cpr_ctl_modify(cpr_vreg, reg_mask, reg_val);
@@ -652,16 +649,12 @@
cpr_vreg->floor_volt[fuse_corner]);
cpr_irq_clr_nack(cpr_vreg);
- /* Maximize the DOWN threshold */
- reg_mask = RBCPR_CTL_DN_THRESHOLD_MASK <<
- RBCPR_CTL_DN_THRESHOLD_SHIFT;
- reg_val = reg_mask;
cpr_debug_irq("gcnt = 0x%08x (quot = %d)\n", gcnt,
quot);
/* Enable auto nack down */
- reg_mask |= RBCPR_CTL_SW_AUTO_CONT_NACK_DN_EN;
- reg_val |= RBCPR_CTL_SW_AUTO_CONT_NACK_DN_EN;
+ reg_mask = RBCPR_CTL_SW_AUTO_CONT_NACK_DN_EN;
+ reg_val = RBCPR_CTL_SW_AUTO_CONT_NACK_DN_EN;
cpr_ctl_modify(cpr_vreg, reg_mask, reg_val);
@@ -1063,13 +1056,13 @@
int rc, i;
rc = of_property_read_u32(of_node,
- "qti,cpr-uplift-voltage", &uplift_voltage);
+ "qcom,cpr-uplift-voltage", &uplift_voltage);
if (rc < 0) {
pr_err("cpr-uplift-voltage is missing, rc = %d", rc);
return rc;
}
rc = of_property_read_u32(of_node,
- "qti,cpr-uplift-max-volt", &uplift_max_volt);
+ "qcom,cpr-uplift-max-volt", &uplift_max_volt);
if (rc < 0) {
pr_err("cpr-uplift-max-volt is missing, rc = %d", rc);
return rc;
@@ -1091,11 +1084,11 @@
u64 efuse_bits;
int rc, process;
u32 pvs_fuse[4], pvs_fuse_redun_sel[5];
- u32 init_v;
+ u32 init_v, quot_adjust;
bool redundant;
size_t pvs_bins;
- rc = of_property_read_u32_array(of_node, "qti,pvs-fuse-redun-sel",
+ rc = of_property_read_u32_array(of_node, "qcom,pvs-fuse-redun-sel",
pvs_fuse_redun_sel, 5);
if (rc < 0) {
pr_err("pvs-fuse-redun-sel missing: rc=%d\n", rc);
@@ -1105,14 +1098,14 @@
redundant = cpr_fuse_is_setting_expected(cpr_vreg, pvs_fuse_redun_sel);
if (redundant) {
- rc = of_property_read_u32_array(of_node, "qti,pvs-fuse-redun",
+ rc = of_property_read_u32_array(of_node, "qcom,pvs-fuse-redun",
pvs_fuse, 4);
if (rc < 0) {
pr_err("pvs-fuse-redun missing: rc=%d\n", rc);
return rc;
}
} else {
- rc = of_property_read_u32_array(of_node, "qti,pvs-fuse",
+ rc = of_property_read_u32_array(of_node, "qcom,pvs-fuse",
pvs_fuse, 4);
if (rc < 0) {
pr_err("pvs-fuse missing: rc=%d\n", rc);
@@ -1128,7 +1121,7 @@
pvs_bins = 1 << pvs_fuse[2];
- rc = of_property_read_u32_array(of_node, "qti,pvs-init-voltage",
+ rc = of_property_read_u32_array(of_node, "qcom,pvs-init-voltage",
cpr_vreg->pvs_init_v, pvs_bins);
if (rc < 0) {
pr_err("pvs-init-voltage missing: rc=%d\n", rc);
@@ -1168,6 +1161,11 @@
cpr_vreg->process = process;
+ rc = of_property_read_u32(of_node,
+ "qcom,cpr-quotient-adjustment", "_adjust);
+ if (!rc)
+ cpr_vreg->quotient_adjustment = quot_adjust;
+
return 0;
}
@@ -1175,7 +1173,7 @@
do { \
if (!rc) { \
rc = of_property_read_u32(of_node, \
- "qti," cpr_property, \
+ "qcom," cpr_property, \
cpr_config); \
if (rc) { \
pr_err("Missing " #cpr_property \
@@ -1212,14 +1210,14 @@
/* Parse dependency parameters */
if (cpr_vreg->vdd_mx) {
- rc = of_property_read_u32(of_node, "qti,vdd-mx-vmax",
+ rc = of_property_read_u32(of_node, "qcom,vdd-mx-vmax",
&cpr_vreg->vdd_mx_vmax);
if (rc < 0) {
pr_err("vdd-mx-vmax missing: rc=%d\n", rc);
return rc;
}
- rc = of_property_read_u32(of_node, "qti,vdd-mx-vmin-method",
+ rc = of_property_read_u32(of_node, "qcom,vdd-mx-vmin-method",
&cpr_vreg->vdd_mx_vmin_method);
if (rc < 0) {
pr_err("vdd-mx-vmin-method missing: rc=%d\n", rc);
@@ -1252,7 +1250,7 @@
int rc, i;
rc = of_property_read_u32_array(of_node,
- "qti,cpr-uplift-quotient", delta_quot, 3);
+ "qcom,cpr-uplift-quotient", delta_quot, 3);
if (rc < 0) {
pr_err("cpr-uplift-quotient is missing: %d", rc);
return rc;
@@ -1271,7 +1269,7 @@
u32 *tmp;
bool corners_mapped;
- prop = of_find_property(dev->of_node, "qti,cpr-corner-map", NULL);
+ prop = of_find_property(dev->of_node, "qcom,cpr-corner-map", NULL);
if (prop) {
size = prop->length / sizeof(u32);
@@ -1294,10 +1292,10 @@
cpr_vreg->corner_map[i] = i;
} else {
rc = of_property_read_u32_array(dev->of_node,
- "qti,cpr-corner-map", &cpr_vreg->corner_map[1], size);
+ "qcom,cpr-corner-map", &cpr_vreg->corner_map[1], size);
if (rc) {
- pr_err("qti,cpr-corner-map missing, rc = %d", rc);
+ pr_err("qcom,cpr-corner-map missing, rc = %d", rc);
return rc;
}
}
@@ -1310,12 +1308,12 @@
return -ENOMEM;
}
- prop = of_find_property(dev->of_node, "qti,cpr-quot-adjust-table",
+ prop = of_find_property(dev->of_node, "qcom,cpr-quot-adjust-table",
NULL);
if (prop) {
if (!corners_mapped) {
- pr_err("qti,cpr-corner-map missing\n");
+ pr_err("qcom,cpr-corner-map missing\n");
return -EINVAL;
}
@@ -1325,9 +1323,9 @@
return -ENOMEM;
rc = of_property_read_u32_array(dev->of_node,
- "qti,cpr-quot-adjust-table", tmp, size);
+ "qcom,cpr-quot-adjust-table", tmp, size);
if (rc) {
- pr_err("qti,cpr-quot-adjust-table missing, rc = %d",
+ pr_err("qcom,cpr-quot-adjust-table missing, rc = %d",
rc);
kfree(tmp);
return rc;
@@ -1336,7 +1334,7 @@
stripe_size = sizeof(struct quot_adjust_info) / sizeof(int);
if ((size % stripe_size) != 0) {
- pr_err("qti,cpr-quot-adjust-table data is not correct");
+ pr_err("qcom,cpr-quot-adjust-table data is not correct");
kfree(tmp);
return -EINVAL;
}
@@ -1349,7 +1347,7 @@
cpr_vreg->quot_adjust[tmp[i + 1]] =
tmp[i + 2];
} else {
- pr_err("qti,cpr-quot-adjust-table data is not correct");
+ pr_err("qcom,cpr-quot-adjust-table data is not correct");
kfree(tmp);
return -EINVAL;
}
@@ -1377,7 +1375,7 @@
u32 ro_sel, val;
u64 fuse_bits, fuse_bits_2;
- rc = of_property_read_u32_array(of_node, "qti,cpr-fuse-redun-sel",
+ rc = of_property_read_u32_array(of_node, "qcom,cpr-fuse-redun-sel",
cpr_fuse_redun_sel, 5);
if (rc < 0) {
pr_err("cpr-fuse-redun-sel missing: rc=%d\n", rc);
@@ -1388,16 +1386,16 @@
if (redundant) {
rc = of_property_read_u32_array(of_node,
- "qti,cpr-fuse-redun-row",
+ "qcom,cpr-fuse-redun-row",
cpr_fuse_row, 2);
- targ_quot_str = "qti,cpr-fuse-redun-target-quot";
- ro_sel_str = "qti,cpr-fuse-redun-ro-sel";
+ targ_quot_str = "qcom,cpr-fuse-redun-target-quot";
+ ro_sel_str = "qcom,cpr-fuse-redun-ro-sel";
} else {
rc = of_property_read_u32_array(of_node,
- "qti,cpr-fuse-row",
+ "qcom,cpr-fuse-row",
cpr_fuse_row, 2);
- targ_quot_str = "qti,cpr-fuse-target-quot";
- ro_sel_str = "qti,cpr-fuse-ro-sel";
+ targ_quot_str = "qcom,cpr-fuse-target-quot";
+ ro_sel_str = "qcom,cpr-fuse-ro-sel";
}
if (rc)
return rc;
@@ -1427,7 +1425,7 @@
if (redundant) {
if (of_property_read_bool(of_node,
- "qti,cpr-fuse-redun-bp-cpr-disable")) {
+ "qcom,cpr-fuse-redun-bp-cpr-disable")) {
CPR_PROP_READ_U32(of_node,
"cpr-fuse-redun-bp-cpr-disable",
&bp_cpr_disable, rc);
@@ -1446,7 +1444,7 @@
CPR_PROP_READ_U32(of_node, "cpr-fuse-bp-scheme",
&bp_scheme, rc);
rc = of_property_read_u32_array(of_node,
- "qti,cpr-fuse-row",
+ "qcom,cpr-fuse-row",
temp_row, 2);
if (rc)
return rc;
@@ -1477,6 +1475,7 @@
& CPR_FUSE_RO_SEL_BITS_MASK;
val = (fuse_bits >> bp_target_quot[i])
& CPR_FUSE_TARGET_QUOT_BITS_MASK;
+ val += cpr_vreg->quotient_adjustment;
cpr_vreg->cpr_fuse_target_quot[i] = val;
cpr_vreg->cpr_fuse_ro_sel[i] = ro_sel;
pr_info("Corner[%d]: ro_sel = %d, target quot = %d\n",
@@ -1611,7 +1610,7 @@
return rc;
/* Init module parameter with the DT value */
- cpr_vreg->enable = of_property_read_bool(of_node, "qti,cpr-enable");
+ cpr_vreg->enable = of_property_read_bool(of_node, "qcom,cpr-enable");
cpr_enable = (int) cpr_vreg->enable;
pr_info("CPR is %s by default.\n",
cpr_vreg->enable ? "enabled" : "disabled");
@@ -1716,12 +1715,12 @@
u32 fuse_sel[5];
/*
* Restrict all pvs corner voltages to a minimum value of
- * qti,cpr-cond-min-voltage if the fuse defined in
- * qti,cpr-fuse-cond-min-volt-sel does not read back with
+ * qcom,cpr-cond-min-voltage if the fuse defined in
+ * qcom,cpr-fuse-cond-min-volt-sel does not read back with
* the expected value.
*/
rc = of_property_read_u32_array(of_node,
- "qti,cpr-fuse-cond-min-volt-sel", fuse_sel, 5);
+ "qcom,cpr-fuse-cond-min-volt-sel", fuse_sel, 5);
if (!rc) {
if (!cpr_fuse_is_setting_expected(cpr_vreg, fuse_sel))
cpr_vreg->flags |= FLAGS_SET_MIN_VOLTAGE;
@@ -1737,7 +1736,7 @@
u32 speed_bits;
rc = of_property_read_u32_array(of_node,
- "qti,speed-bin-fuse-sel", fuse_sel, 4);
+ "qcom,speed-bin-fuse-sel", fuse_sel, 4);
if (!rc) {
fuse_bits = cpr_read_efuse_row(cpr_vreg,
@@ -1760,13 +1759,13 @@
u32 uplift_speed_bin;
rc = of_property_read_u32_array(of_node,
- "qti,cpr-fuse-uplift-sel", fuse_sel, 5);
+ "qcom,cpr-fuse-uplift-sel", fuse_sel, 5);
if (!rc) {
rc = of_property_read_u32(of_node,
- "qti,cpr-uplift-speed-bin",
+ "qcom,cpr-uplift-speed-bin",
&uplift_speed_bin);
if (rc < 0) {
- pr_err("qti,cpr-uplift-speed-bin missing\n");
+ pr_err("qcom,cpr-uplift-speed-bin missing\n");
return rc;
}
if (cpr_fuse_is_setting_expected(cpr_vreg, fuse_sel)
@@ -1786,7 +1785,7 @@
u32 min_uv = 0;
rc = of_property_read_u32_array(of_node,
- "qti,pvs-corner-ceiling-slow",
+ "qcom,pvs-corner-ceiling-slow",
&cpr_vreg->pvs_corner_v[APC_PVS_SLOW][CPR_FUSE_CORNER_SVS],
CPR_FUSE_CORNER_MAX - CPR_FUSE_CORNER_SVS);
if (rc < 0) {
@@ -1795,7 +1794,7 @@
}
rc = of_property_read_u32_array(of_node,
- "qti,pvs-corner-ceiling-nom",
+ "qcom,pvs-corner-ceiling-nom",
&cpr_vreg->pvs_corner_v[APC_PVS_NOM][CPR_FUSE_CORNER_SVS],
CPR_FUSE_CORNER_MAX - CPR_FUSE_CORNER_SVS);
if (rc < 0) {
@@ -1804,7 +1803,7 @@
}
rc = of_property_read_u32_array(of_node,
- "qti,pvs-corner-ceiling-fast",
+ "qcom,pvs-corner-ceiling-fast",
&cpr_vreg->pvs_corner_v[APC_PVS_FAST][CPR_FUSE_CORNER_SVS],
CPR_FUSE_CORNER_MAX - CPR_FUSE_CORNER_SVS);
if (rc < 0) {
@@ -1820,7 +1819,7 @@
return rc;
}
if (cpr_vreg->flags & FLAGS_SET_MIN_VOLTAGE) {
- of_property_read_u32(of_node, "qti,cpr-cond-min-voltage",
+ of_property_read_u32(of_node, "qcom,cpr-cond-min-voltage",
&min_uv);
for (i = APC_PVS_SLOW; i < NUM_APC_PVS; i++)
for (j = CPR_FUSE_CORNER_SVS; j < CPR_FUSE_CORNER_MAX;
diff --git a/arch/arm/mach-msm/smd.c b/arch/arm/mach-msm/smd.c
index 09b3113..1241e44 100644
--- a/arch/arm/mach-msm/smd.c
+++ b/arch/arm/mach-msm/smd.c
@@ -2285,7 +2285,7 @@
edge_to_pids[ch->type].subsys_name);
irq_chip->irq_mask(irq_data);
if (cpumask)
- irq_chip->irq_set_affinity(irq_data, cpumask, true);
+ irq_set_affinity(int_cfg->irq_id, cpumask);
} else {
SMD_POWER_INFO("SMD Unmasking interrupts from %s\n",
edge_to_pids[ch->type].subsys_name);
diff --git a/drivers/media/platform/msm/camera_v2/isp/msm_isp_util.c b/drivers/media/platform/msm/camera_v2/isp/msm_isp_util.c
index 3cb48d1..a12c692 100644
--- a/drivers/media/platform/msm/camera_v2/isp/msm_isp_util.c
+++ b/drivers/media/platform/msm/camera_v2/isp/msm_isp_util.c
@@ -1,4 +1,4 @@
-/* Copyright (c) 2013, The Linux Foundation. All rights reserved.
+/* Copyright (c) 2013-2014, The Linux Foundation. All rights reserved.
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License version 2 and
@@ -277,6 +277,43 @@
return rc;
}
+static int msm_isp_get_max_clk_rate(struct vfe_device *vfe_dev, long *rate)
+{
+ int clk_idx = 0;
+ unsigned long max_value = ~0;
+ long round_rate = 0;
+
+ if (!vfe_dev || !rate) {
+ pr_err("%s:%d failed: vfe_dev %p rate %p\n", __func__, __LINE__,
+ vfe_dev, rate);
+ return -EINVAL;
+ }
+
+ *rate = 0;
+ if (!vfe_dev->hw_info) {
+ pr_err("%s:%d failed: vfe_dev->hw_info %p\n", __func__,
+ __LINE__, vfe_dev->hw_info);
+ return -EINVAL;
+ }
+
+ clk_idx = vfe_dev->hw_info->vfe_clk_idx;
+ if (clk_idx >= ARRAY_SIZE(vfe_dev->vfe_clk)) {
+ pr_err("%s:%d failed: clk_idx %d max array size %d\n",
+ __func__, __LINE__, clk_idx,
+ ARRAY_SIZE(vfe_dev->vfe_clk));
+ return -EINVAL;
+ }
+
+ round_rate = clk_round_rate(vfe_dev->vfe_clk[clk_idx], max_value);
+ if (round_rate < 0) {
+ pr_err("%s: Invalid vfe clock rate\n", __func__);
+ return -EINVAL;
+ }
+
+ *rate = round_rate;
+ return 0;
+}
+
static int msm_isp_set_clk_rate(struct vfe_device *vfe_dev, long *rate)
{
int rc = 0;
@@ -618,6 +655,23 @@
case GET_SOC_HW_VER:
*cfg_data = vfe_dev->soc_hw_version;
break;
+ case GET_MAX_CLK_RATE: {
+ int rc = 0;
+
+ if (cmd_len < sizeof(unsigned long)) {
+ pr_err("%s:%d failed: invalid cmd len %d exp %d\n",
+ __func__, __LINE__, cmd_len,
+ sizeof(unsigned long));
+ return -EINVAL;
+ }
+ rc = msm_isp_get_max_clk_rate(vfe_dev,
+ (unsigned long *)cfg_data);
+ if (rc < 0) {
+ pr_err("%s:%d failed: rc %d\n", __func__, __LINE__, rc);
+ return -EINVAL;
+ }
+ break;
+ }
}
return 0;
}
diff --git a/drivers/media/platform/msm/wfd/vsg-subdev.c b/drivers/media/platform/msm/wfd/vsg-subdev.c
index c20250e..1f827bb 100644
--- a/drivers/media/platform/msm/wfd/vsg-subdev.c
+++ b/drivers/media/platform/msm/wfd/vsg-subdev.c
@@ -1,4 +1,4 @@
-/* Copyright (c) 2012-2013, The Linux Foundation. All rights reserved.
+/* Copyright (c) 2012-2014, The Linux Foundation. All rights reserved.
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License version 2 and
@@ -23,6 +23,8 @@
#define DEFAULT_MAX_FRAME_INTERVAL (1*NSEC_PER_SEC)
#define DEFAULT_MODE ((enum vsg_modes)VSG_MODE_CFR)
#define MAX_BUFS_BUSY_WITH_ENC 5
+#define TICKS_PER_TIMEOUT 2
+
static void vsg_reset_timer(struct hrtimer *timer, ktime_t time)
{
@@ -120,9 +122,10 @@
INIT_LIST_HEAD(&buf_info->node);
ktime_get_ts(&buf_info->time);
- vsg_reset_timer(&context->threshold_timer, ns_to_ktime(
- context->max_frame_interval));
-
+ if (work->work_delayed) {
+ buf_info->time = timespec_sub(buf_info->time,
+ context->delayed_frame_interval);
+ }
temp = NULL;
list_for_each_entry(temp, &context->busy_queue.node, node) {
if (mdp_buf_info_equals(&temp->mdp_buf_info,
@@ -233,6 +236,7 @@
INIT_WORK(&new_work->work, vsg_work_func);
new_work->context = context;
+ new_work->work_delayed = work->work_delayed;
queue_work(context->work_queue, &new_work->work);
}
@@ -245,25 +249,43 @@
{
struct vsg_context *context = NULL;
struct vsg_work *task = NULL;
-
- task = kzalloc(sizeof(*task), GFP_ATOMIC);
+ int64_t max_frame_interval = 0;
context = container_of(timer, struct vsg_context,
threshold_timer);
+
+ if (!context) {
+ WFD_MSG_ERR("Context not proper in %s", __func__);
+ goto threshold_err_no_context;
+ }
+ max_frame_interval = context->max_frame_interval;
+ if (list_empty(&context->free_queue.node) && !context->vsync_wait) {
+ context->vsync_wait = true;
+ max_frame_interval = context->max_frame_interval /
+ TICKS_PER_TIMEOUT;
+ goto restart_timer;
+ } else if (context->vsync_wait) {
+ max_frame_interval = context->max_frame_interval /
+ TICKS_PER_TIMEOUT;
+ context->vsync_wait = false;
+ }
+
+ task = kzalloc(sizeof(*task), GFP_ATOMIC);
if (!task) {
WFD_MSG_ERR("Out of memory in %s", __func__);
goto threshold_err_bad_param;
- } else if (!context) {
- WFD_MSG_ERR("Context not proper in %s", __func__);
- goto threshold_err_no_context;
}
INIT_WORK(&task->work, vsg_timer_helper_func);
task->context = context;
+ task->work_delayed = false;
+ if (max_frame_interval < context->max_frame_interval)
+ task->work_delayed = true;
queue_work(context->work_queue, &task->work);
+restart_timer:
threshold_err_bad_param:
hrtimer_forward_now(&context->threshold_timer, ns_to_ktime(
- context->max_frame_interval));
+ max_frame_interval));
return HRTIMER_RESTART;
threshold_err_no_context:
return HRTIMER_NORESTART;
@@ -298,6 +320,7 @@
context->last_buffer = NULL;
context->mode = DEFAULT_MODE;
context->state = VSG_STATE_NONE;
+ context->vsync_wait = false;
mutex_init(&context->mutex);
sd->dev_priv = context;
@@ -568,7 +591,8 @@
context->max_frame_interval, interval);
context->max_frame_interval = interval;
}
-
+ context->delayed_frame_interval =
+ ns_to_timespec(context->frame_interval / TICKS_PER_TIMEOUT);
mutex_unlock(&context->mutex);
return 0;
}
diff --git a/drivers/media/platform/msm/wfd/vsg-subdev.h b/drivers/media/platform/msm/wfd/vsg-subdev.h
index 3347e5b..bbaced1 100644
--- a/drivers/media/platform/msm/wfd/vsg-subdev.h
+++ b/drivers/media/platform/msm/wfd/vsg-subdev.h
@@ -1,4 +1,4 @@
-/* Copyright (c) 2012, The Linux Foundation. All rights reserved.
+/* Copyright (c) 2012-2014, The Linux Foundation. All rights reserved.
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License version 2 and
@@ -56,7 +56,7 @@
};
struct vsg_context {
- struct vsg_buf_info free_queue, busy_queue;
+ struct vsg_buf_info free_queue, busy_queue;
struct vsg_msg_ops vmops;
/* All time related values below in nanosecs */
int64_t frame_interval, max_frame_interval, frame_interval_variance;
@@ -66,11 +66,14 @@
struct vsg_buf_info *last_buffer;
int mode;
int state;
+ bool vsync_wait;
+ struct timespec delayed_frame_interval;
};
struct vsg_work {
struct vsg_context *context;
struct work_struct work;
+ bool work_delayed;
};
struct vsg_encode_work {
diff --git a/drivers/video/msm/mdss/mdss_dsi.h b/drivers/video/msm/mdss/mdss_dsi.h
index 855ec6c..b89a935 100644
--- a/drivers/video/msm/mdss/mdss_dsi.h
+++ b/drivers/video/msm/mdss/mdss_dsi.h
@@ -1,4 +1,4 @@
-/* Copyright (c) 2012-2013, The Linux Foundation. All rights reserved.
+/* Copyright (c) 2012-2014, The Linux Foundation. All rights reserved.
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License version 2 and
@@ -330,7 +330,8 @@
void mdss_dsi_phy_enable(struct mdss_dsi_ctrl_pdata *ctrl, int on);
void mdss_dsi_phy_init(struct mdss_panel_data *pdata);
void mdss_dsi_phy_sw_reset(unsigned char *ctrl_base);
-void mdss_dsi_cmd_test_pattern(struct mdss_panel_data *pdata);
+void mdss_dsi_cmd_test_pattern(struct mdss_dsi_ctrl_pdata *ctrl);
+void mdss_dsi_video_test_pattern(struct mdss_dsi_ctrl_pdata *ctrl);
void mdss_dsi_panel_pwm_cfg(struct mdss_dsi_ctrl_pdata *ctrl);
void mdss_dsi_ctrl_init(struct mdss_dsi_ctrl_pdata *ctrl);
diff --git a/drivers/video/msm/mdss/mdss_dsi_host.c b/drivers/video/msm/mdss/mdss_dsi_host.c
index 65e6214..bd156fc 100644
--- a/drivers/video/msm/mdss/mdss_dsi_host.c
+++ b/drivers/video/msm/mdss/mdss_dsi_host.c
@@ -1,4 +1,4 @@
-/* Copyright (c) 2012-2013, The Linux Foundation. All rights reserved.
+/* Copyright (c) 2012-2014, The Linux Foundation. All rights reserved.
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License version 2 and
@@ -200,28 +200,34 @@
spin_unlock(&ctrl->irq_lock);
}
-void mdss_dsi_cmd_test_pattern(struct mdss_panel_data *pdata)
+void mdss_dsi_video_test_pattern(struct mdss_dsi_ctrl_pdata *ctrl)
{
- struct mdss_dsi_ctrl_pdata *ctrl_pdata = NULL;
int i;
- if (pdata == NULL) {
- pr_err("%s: Invalid input data\n", __func__);
- return;
- }
-
- ctrl_pdata = container_of(pdata, struct mdss_dsi_ctrl_pdata,
- panel_data);
-
- MIPI_OUTP((ctrl_pdata->ctrl_base) + 0x015c, 0x201);
- MIPI_OUTP((ctrl_pdata->ctrl_base) + 0x016c, 0xff0000); /* red */
+ MIPI_OUTP((ctrl->ctrl_base) + 0x015c, 0x021);
+ MIPI_OUTP((ctrl->ctrl_base) + 0x0164, 0xff0000); /* red */
i = 0;
while (i++ < 50) {
- MIPI_OUTP((ctrl_pdata->ctrl_base) + 0x0184, 0x1);
+ MIPI_OUTP((ctrl->ctrl_base) + 0x0180, 0x1);
/* Add sleep to get ~50 fps frame rate*/
msleep(20);
}
- MIPI_OUTP((ctrl_pdata->ctrl_base) + 0x015c, 0x0);
+ MIPI_OUTP((ctrl->ctrl_base) + 0x015c, 0x0);
+}
+
+void mdss_dsi_cmd_test_pattern(struct mdss_dsi_ctrl_pdata *ctrl)
+{
+ int i;
+
+ MIPI_OUTP((ctrl->ctrl_base) + 0x015c, 0x201);
+ MIPI_OUTP((ctrl->ctrl_base) + 0x016c, 0xff0000); /* red */
+ i = 0;
+ while (i++ < 50) {
+ MIPI_OUTP((ctrl->ctrl_base) + 0x0184, 0x1);
+ /* Add sleep to get ~50 fps frame rate*/
+ msleep(20);
+ }
+ MIPI_OUTP((ctrl->ctrl_base) + 0x015c, 0x0);
}
void mdss_dsi_host_init(struct mipi_panel_info *pinfo,
diff --git a/fs/ext4/ext4_jbd2.c b/fs/ext4/ext4_jbd2.c
index aca1790..d0b8f98 100644
--- a/fs/ext4/ext4_jbd2.c
+++ b/fs/ext4/ext4_jbd2.c
@@ -109,10 +109,10 @@
if (ext4_handle_valid(handle)) {
err = jbd2_journal_dirty_metadata(handle, bh);
- if (err) {
- /* Errors can only happen if there is a bug */
- handle->h_err = err;
- __ext4_journal_stop(where, line, handle);
+ /* Errors can only happen if there is a bug */
+ if (WARN_ON_ONCE(err)) {
+ ext4_journal_abort_handle(where, line, __func__, bh,
+ handle, err);
}
} else {
if (inode)
diff --git a/fs/ext4/super.c b/fs/ext4/super.c
index e1fb1d5..48609bc 100644
--- a/fs/ext4/super.c
+++ b/fs/ext4/super.c
@@ -4105,6 +4105,7 @@
ext4_commit_super(sb, 1);
jbd2_journal_clear_err(journal);
+ jbd2_journal_update_sb_errno(journal);
}
}
diff --git a/fs/ext4/xattr.c b/fs/ext4/xattr.c
index e88748e..6c27436 100644
--- a/fs/ext4/xattr.c
+++ b/fs/ext4/xattr.c
@@ -1267,6 +1267,8 @@
s_min_extra_isize) {
tried_min_extra_isize++;
new_extra_isize = s_min_extra_isize;
+ kfree(is); is = NULL;
+ kfree(bs); bs = NULL;
goto retry;
}
error = -1;
diff --git a/fs/jbd2/journal.c b/fs/jbd2/journal.c
index 1afb701..9956ac6 100644
--- a/fs/jbd2/journal.c
+++ b/fs/jbd2/journal.c
@@ -1340,7 +1340,7 @@
* Update a journal's errno. Write updated superblock to disk waiting for IO
* to complete.
*/
-static void jbd2_journal_update_sb_errno(journal_t *journal)
+void jbd2_journal_update_sb_errno(journal_t *journal)
{
journal_superblock_t *sb = journal->j_superblock;
@@ -1352,6 +1352,7 @@
jbd2_write_superblock(journal, WRITE_SYNC);
}
+EXPORT_SYMBOL(jbd2_journal_update_sb_errno);
/*
* Read the superblock for a given journal, performing initial
diff --git a/include/linux/jbd2.h b/include/linux/jbd2.h
index 912c30a..2ed66ef 100644
--- a/include/linux/jbd2.h
+++ b/include/linux/jbd2.h
@@ -1091,6 +1091,7 @@
extern int jbd2_journal_recover (journal_t *journal);
extern int jbd2_journal_wipe (journal_t *, int);
extern int jbd2_journal_skip_recovery (journal_t *);
+extern void jbd2_journal_update_sb_errno(journal_t *);
extern void jbd2_journal_update_sb_log_tail (journal_t *, tid_t,
unsigned long, int);
extern void __jbd2_journal_abort_hard (journal_t *);
diff --git a/include/linux/regulator/cpr-regulator.h b/include/linux/regulator/cpr-regulator.h
index 2e2d931..3b23d17 100644
--- a/include/linux/regulator/cpr-regulator.h
+++ b/include/linux/regulator/cpr-regulator.h
@@ -16,7 +16,7 @@
#include <linux/regulator/machine.h>
-#define CPR_REGULATOR_DRIVER_NAME "qti,cpr-regulator"
+#define CPR_REGULATOR_DRIVER_NAME "qcom,cpr-regulator"
#define CPR_PVS_EFUSE_BITS_MAX 5
#define CPR_PVS_EFUSE_BINS_MAX (1 << CPR_PVS_EFUSE_BITS_MAX)
diff --git a/include/media/msmb_isp.h b/include/media/msmb_isp.h
index 568a3fa..3ba0abe 100644
--- a/include/media/msmb_isp.h
+++ b/include/media/msmb_isp.h
@@ -228,6 +228,7 @@
VFE_READ_DMI_32BIT,
VFE_READ_DMI_64BIT,
GET_SOC_HW_VER,
+ GET_MAX_CLK_RATE,
};
struct msm_vfe_cfg_cmd2 {