msm: pm2: Raise SPI interrupt instread of SGI to non boot CPUs
Once APPS comes out of PC and mpdecision want to bring the non-boot
cpus to online, first CORE0 raises the SPI interrupt(MPCORE) to bring
the cores(1/2/3) online. While bringing the cores online, CORE0 raises
the SPI interrupt instead of SGI. Because once APPS does a PC QGIC
looses its state and none of the non-boot cpus are not capable of
receiving the SGI interrupt until cores configure the QGIC PPIs&SGIs
by themselves.
Change-Id: Ic4aedeffbcd3fa2f0aa15e2e8ed7e25a03468f87
Signed-off-by: Murali Nalajala <mnalajal@codeaurora.org>
diff --git a/arch/arm/mach-msm/platsmp-8625.c b/arch/arm/mach-msm/platsmp-8625.c
index 3b31b9f..0e75cae 100644
--- a/arch/arm/mach-msm/platsmp-8625.c
+++ b/arch/arm/mach-msm/platsmp-8625.c
@@ -1,4 +1,4 @@
-/* Copyright (c) 2012, Code Aurora Forum. All rights reserved.
+/* Copyright (c) 2012, The Linux Foundation. All rights reserved.
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License version 2 and
@@ -121,10 +121,10 @@
write_pen_release(-1);
/* clear the IPC pending SPI */
- if (power_collapsed) {
+ if (per_cpu(power_collapsed, cpu)) {
raise_clear_spi(cpu, false);
clear_pending_spi(cpu_data[cpu].ipc_irq);
- power_collapsed = 0;
+ per_cpu(power_collapsed, cpu) = 0;
}
/*
@@ -216,7 +216,7 @@
* GDFS which needs to be brought out by raising an SPI.
*/
- if (power_collapsed) {
+ if (per_cpu(power_collapsed, cpu)) {
gic_configure_and_raise(cpu_data[cpu].ipc_irq, cpu);
raise_clear_spi(cpu, true);
} else {
diff --git a/arch/arm/mach-msm/pm.h b/arch/arm/mach-msm/pm.h
index faefe34..bd61feb 100644
--- a/arch/arm/mach-msm/pm.h
+++ b/arch/arm/mach-msm/pm.h
@@ -1,7 +1,7 @@
/* arch/arm/mach-msm/pm.h
*
* Copyright (C) 2007 Google, Inc.
- * Copyright (c) 2009-2012, Code Aurora Forum. All rights reserved.
+ * Copyright (c) 2009-2012, The Linux Foundation. All rights reserved.
* Author: San Mehat <san@android.com>
*
* This software is licensed under the terms of the GNU General Public
@@ -27,7 +27,7 @@
#define msm_secondary_startup NULL
#endif
-extern int power_collapsed;
+DECLARE_PER_CPU(int, power_collapsed);
struct msm_pm_irq_calls {
unsigned int (*irq_pending)(void);
diff --git a/arch/arm/mach-msm/pm2.c b/arch/arm/mach-msm/pm2.c
index ae2a4bc..96c1218 100644
--- a/arch/arm/mach-msm/pm2.c
+++ b/arch/arm/mach-msm/pm2.c
@@ -3,7 +3,7 @@
* MSM Power Management Routines
*
* Copyright (C) 2007 Google, Inc.
- * Copyright (c) 2008-2012 Code Aurora Forum. All rights reserved.
+ * Copyright (c) 2008-2012 The Linux Foundation. All rights reserved.
*
* This software is licensed under the terms of the GNU General Public
* License version 2, as published by the Free Software Foundation, and
@@ -75,8 +75,9 @@
MSM_PM_DEBUG_HOTPLUG = BIT(7),
};
+DEFINE_PER_CPU(int, power_collapsed);
+
static int msm_pm_debug_mask;
-int power_collapsed;
module_param_named(
debug_mask, msm_pm_debug_mask, int, S_IRUGO | S_IWUSR | S_IWGRP
);
@@ -565,7 +566,7 @@
__raw_writel(0, APPS_PWRDOWN);
mb();
- if (power_collapsed) {
+ if (per_cpu(power_collapsed, 1)) {
/*
* enable the SCU while coming out of power
* collapse.
@@ -983,6 +984,7 @@
* path by reading the MPA5_GDFS_CNT_VAL register.
*/
if (cpu_is_msm8625()) {
+ int cpu;
/*
* on system reset, default value of MPA5_GDFS_CNT_VAL
* is = 0x0, later modem reprogram this value to
@@ -997,7 +999,11 @@
/* 8x25Q */
if (SOCINFO_VERSION_MAJOR(socinfo_get_version()) >= 3) {
if (val != 0x000F0002) {
- power_collapsed = 1;
+ for_each_possible_cpu(cpu) {
+ if (!cpu)
+ continue;
+ per_cpu(power_collapsed, cpu) = 1;
+ }
/*
* override DBGNOPOWERDN and program the GDFS
* count val
@@ -1008,7 +1014,11 @@
modem_early_exit = 1;
} else {
if (val != 0x00030002) {
- power_collapsed = 1;
+ for_each_possible_cpu(cpu) {
+ if (!cpu)
+ continue;
+ per_cpu(power_collapsed, cpu) = 1;
+ }
/*
* override DBGNOPOWERDN and program the GDFS
* count val