qlge: Fix timeout on indexed register wait.
There are 8 banks of 'sub-registers' each of which are accessed
through address/data register pair. An example would be reading
flash or the xgmac. Accessing these require the driver to wait for
a ready bit before writing the address and then accessing the data.
This patch increases the timeout to 100us to prevent timeouts
that have been seen on some platforms.
These register are accessed in process context only.
Signed-off-by: Ron Mercer <ron.mercer@qlogic.com>
Signed-off-by: David S. Miller <davem@davemloft.net>
1 file changed