USB: dwc3: Add workaround for possible bug related to PHY CDR
Currently, the default and the recommended value for GUSB3PIPECTL[21:19]
in the RTL is 3'b100 or 32 consecutive errors. Based on analysis and
experiments in the lab, it is found that there is a relatively low
probability of getting 32 consecutive word errors in the presence of
random recovered noise (during electrical idle). This can delay the entry
to a low power state such that for applications where the link stays in a
non-U0 state for a short duration (< 1 microsecond), the local PHY does
not enter the low power state prior to receiving a potential LFPS wakeup.
This causes the PHY CDR (Clock and Data Recovery) operation to be unstable
for some Synopsys PHYs.
The proposal now is to change the default and the recommended value for
GUSB3PIPECTL[21:19] in the RTL from 3'b100 to a minimum of 3'b001. Perform
the same in software for controllers prior to 2.30a revision.
CRs-fixed: 371300
Change-Id: I305e4600ee3c97c3500b4a54b238ff3f61cc8718
Signed-off-by: Pavankumar Kondeti <pkondeti@codeaurora.org>
2 files changed