USB: ci13xxx_msm: Clear LINK's SW_VBUS state in USBCMD on DISCONNECT
Most platforms typically rely on USB PHY for sess_vld signal inside
the Link Controller. In case VBUS is not fed to PHY, software can
configure LINK to rely on software controlled bit in USBCMD register
(USBCMD_SESS_VLD_CTRL) for sess_valid. LINK pulls DP HIGH when
running in peripheral mode and sess_valid signal is present.
On VBUS DISCONNET, software currently stops LINK without clearing
sess_valid bit. And it is noticed that USB LINK continues to pull
DP high even after stopping if USBCMD_SESS_VLD_CTRL is not cleared.
This results in charger compliance tests failing renegotiation tests
where CDP --> SDP transition is checked by removing and reapplying
VBUS within 100 msec. Failure happens as compliance tester finds
DP at way too high level (~2.8v) during primary detection stage.
CRs-fixed: 633479
Change-Id: I883867e39e4d1a306e5e63ec1da445a3aede1585
Signed-off-by: Manu Gautam <mgautam@codeaurora.org>
Signed-off-by: ChandanaKishori Chiluveru <cchilu@codeaurora.org>
1 file changed