ARM: SAMSUNG: Add clk enable/disable of pwm
PWM timers use pclk("timers" clk) as parent clk. If this pclk is the
disabled state when PWM driver is probed, then it causes wrong read and
write operation about registers of PWM.
Signed-off-by: Joonyoung Shim <jy0922.shim@samsung.com>
Signed-off-by: Kyungmin Park <kyungmin.park@samsung.com>
Signed-off-by: Kukjin Kim <kgene.kim@samsung.com>
diff --git a/arch/arm/plat-samsung/pwm.c b/arch/arm/plat-samsung/pwm.c
index f37457c..dc1185d 100644
--- a/arch/arm/plat-samsung/pwm.c
+++ b/arch/arm/plat-samsung/pwm.c
@@ -299,6 +299,9 @@
goto err_clk_tin;
}
+ clk_enable(pwm->clk);
+ clk_enable(pwm->clk_div);
+
local_irq_save(flags);
tcon = __raw_readl(S3C2410_TCON);
@@ -326,6 +329,8 @@
return 0;
err_clk_tdiv:
+ clk_disable(pwm->clk_div);
+ clk_disable(pwm->clk);
clk_put(pwm->clk_div);
err_clk_tin:
@@ -340,6 +345,8 @@
{
struct pwm_device *pwm = platform_get_drvdata(pdev);
+ clk_disable(pwm->clk_div);
+ clk_disable(pwm->clk);
clk_put(pwm->clk_div);
clk_put(pwm->clk);
kfree(pwm);