tree d16899c361fb77e7732eb603835cb95c3af49421
parent 882417851a0f2e09e110038a13e88e9b5a100800
author Chris Wilson <chris@chris-wilson.co.uk> 1294477341 +0000
committer Chris Wilson <chris@chris-wilson.co.uk> 1294778694 +0000

drm/i915: Include TLB miss overhead for computing WM

The docs recommend that if 8 display lines fit inside the FIFO buffer,
then the number of watermark entries should be increased to hide the
latency of filling the rest of the FIFO buffer.

Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>