Merge "Merge branch 'Linux 3.0.21' into msm-3.0" into msm-3.0
diff --git a/arch/arm/mach-msm/Makefile b/arch/arm/mach-msm/Makefile
index 7bc2fdd..e93993c 100644
--- a/arch/arm/mach-msm/Makefile
+++ b/arch/arm/mach-msm/Makefile
@@ -257,7 +257,7 @@
obj-$(CONFIG_MACH_MSM8930_CDP) += board-8930-all.o board-8930-regulator.o
obj-$(CONFIG_MACH_MSM8930_MTP) += board-8930-all.o board-8930-regulator.o
obj-$(CONFIG_MACH_MSM8930_FLUID) += board-8930-all.o board-8930-regulator.o
-obj-$(CONFIG_ARCH_MSM8960) += bms-batterydata.o
+obj-$(CONFIG_PM8921_BMS) += bms-batterydata.o bms-batterydata-desay.o
obj-$(CONFIG_MACH_APQ8064_SIM) += board-8064-all.o board-8064-regulator.o
obj-$(CONFIG_MACH_APQ8064_RUMI3) += board-8064-all.o board-8064-regulator.o
obj-$(CONFIG_ARCH_MSM9615) += board-9615.o devices-9615.o board-9615-regulator.o board-9615-gpiomux.o board-9615-storage.o
diff --git a/arch/arm/mach-msm/acpuclock-8960.c b/arch/arm/mach-msm/acpuclock-8960.c
index 3a042d9..cbeac3f 100644
--- a/arch/arm/mach-msm/acpuclock-8960.c
+++ b/arch/arm/mach-msm/acpuclock-8960.c
@@ -142,7 +142,6 @@
struct core_speed *current_speed;
struct l2_level *l2_vote;
struct vreg vreg[NUM_VREG];
- bool first_set_call;
unsigned int *hfpll_vdd_tbl;
};
@@ -167,7 +166,6 @@
static struct scalable scalable_8960[] = {
[CPU0] = {
.hfpll_base = MSM_HFPLL_BASE + 0x200,
- .hfpll_vdd_tbl = hfpll_vdd_tbl_8960,
.aux_clk_sel = MSM_ACC0_BASE + 0x014,
.l2cpmr_iaddr = L2CPUCPMR_IADDR,
.vreg[VREG_CORE] = { "krait0", 1300000 },
@@ -186,7 +184,6 @@
},
[CPU1] = {
.hfpll_base = MSM_HFPLL_BASE + 0x300,
- .hfpll_vdd_tbl = hfpll_vdd_tbl_8960,
.aux_clk_sel = MSM_ACC1_BASE + 0x014,
.l2cpmr_iaddr = L2CPUCPMR_IADDR,
.vreg[VREG_CORE] = { "krait1", 1300000 },
@@ -223,7 +220,6 @@
static struct scalable scalable_8064[] = {
[CPU0] = {
.hfpll_base = MSM_HFPLL_BASE + 0x200,
- .hfpll_vdd_tbl = hfpll_vdd_tbl_8064,
.aux_clk_sel = MSM_ACC0_BASE + 0x014,
.l2cpmr_iaddr = L2CPUCPMR_IADDR,
.vreg[VREG_CORE] = { "krait0", 1300000 },
@@ -239,7 +235,6 @@
},
[CPU1] = {
.hfpll_base = MSM_HFPLL_BASE + 0x240,
- .hfpll_vdd_tbl = hfpll_vdd_tbl_8064,
.aux_clk_sel = MSM_ACC1_BASE + 0x014,
.l2cpmr_iaddr = L2CPUCPMR_IADDR,
.vreg[VREG_CORE] = { "krait1", 1300000 },
@@ -255,7 +250,6 @@
},
[CPU2] = {
.hfpll_base = MSM_HFPLL_BASE + 0x280,
- .hfpll_vdd_tbl = hfpll_vdd_tbl_8064,
.aux_clk_sel = MSM_ACC2_BASE + 0x014,
.l2cpmr_iaddr = L2CPUCPMR_IADDR,
.vreg[VREG_CORE] = { "krait2", 1300000 },
@@ -271,7 +265,6 @@
},
[CPU3] = {
.hfpll_base = MSM_HFPLL_BASE + 0x2C0,
- .hfpll_vdd_tbl = hfpll_vdd_tbl_8064,
.aux_clk_sel = MSM_ACC3_BASE + 0x014,
.l2cpmr_iaddr = L2CPUCPMR_IADDR,
.vreg[VREG_CORE] = { "krait3", 1300000 },
@@ -299,7 +292,6 @@
static struct scalable scalable_8930[] = {
[CPU0] = {
.hfpll_base = MSM_HFPLL_BASE + 0x200,
- .hfpll_vdd_tbl = hfpll_vdd_tbl_8064,
.aux_clk_sel = MSM_ACC0_BASE + 0x014,
.l2cpmr_iaddr = L2CPUCPMR_IADDR,
.vreg[VREG_CORE] = { "krait0", 1300000 },
@@ -316,7 +308,6 @@
},
[CPU1] = {
.hfpll_base = MSM_HFPLL_BASE + 0x300,
- .hfpll_vdd_tbl = hfpll_vdd_tbl_8064,
.aux_clk_sel = MSM_ACC1_BASE + 0x014,
.l2cpmr_iaddr = L2CPUCPMR_IADDR,
.vreg[VREG_CORE] = { "krait1", 1300000 },
@@ -346,7 +337,6 @@
static struct scalable scalable_8627[] = {
[CPU0] = {
.hfpll_base = MSM_HFPLL_BASE + 0x200,
- .hfpll_vdd_tbl = hfpll_vdd_tbl_8064,
.aux_clk_sel = MSM_ACC0_BASE + 0x014,
.l2cpmr_iaddr = L2CPUCPMR_IADDR,
.vreg[VREG_CORE] = { "krait0", 1300000 },
@@ -363,7 +353,6 @@
},
[CPU1] = {
.hfpll_base = MSM_HFPLL_BASE + 0x300,
- .hfpll_vdd_tbl = hfpll_vdd_tbl_8064,
.aux_clk_sel = MSM_ACC1_BASE + 0x014,
.l2cpmr_iaddr = L2CPUCPMR_IADDR,
.vreg[VREG_CORE] = { "krait1", 1300000 },
@@ -380,7 +369,6 @@
},
[L2] = {
.hfpll_base = MSM_HFPLL_BASE + 0x400,
- .hfpll_vdd_tbl = hfpll_vdd_dig_tbl_8930,
.aux_clk_sel = MSM_APCS_GCC_BASE + 0x028,
.l2cpmr_iaddr = L2CPMR_IADDR,
.vreg[VREG_HFPLL_B] = { "hfpll_l2", 1800000,
@@ -1084,18 +1072,9 @@
return max(tgt->l2_level->vdd_dig, pll_vdd_dig);
}
-static unsigned int calculate_vdd_core(int cpu, struct acpu_level *tgt)
+static unsigned int calculate_vdd_core(struct acpu_level *tgt)
{
- unsigned int pll_vdd_core;
-
- if (tgt->speed.src != HFPLL)
- pll_vdd_core = scalable[cpu].hfpll_vdd_tbl[HFPLL_VDD_NONE];
- else if (tgt->speed.pll_l_val > HFPLL_LOW_VDD_PLL_L_MAX)
- pll_vdd_core = scalable[cpu].hfpll_vdd_tbl[HFPLL_VDD_NOM];
- else
- pll_vdd_core = scalable[cpu].hfpll_vdd_tbl[HFPLL_VDD_LOW];
-
- return max(tgt->vdd_core, pll_vdd_core);
+ return tgt->vdd_core;
}
/* Set the CPU's clock rate and adjust the L2 rate, if appropriate. */
@@ -1120,7 +1099,7 @@
strt_acpu_s = scalable[cpu].current_speed;
/* Return early if rate didn't change. */
- if (rate == strt_acpu_s->khz && scalable[cpu].first_set_call == false)
+ if (rate == strt_acpu_s->khz)
goto out;
/* Find target frequency. */
@@ -1138,7 +1117,7 @@
/* Calculate voltage requirements for the current CPU. */
vdd_mem = calculate_vdd_mem(tgt);
vdd_dig = calculate_vdd_dig(tgt);
- vdd_core = calculate_vdd_core(cpu, tgt);
+ vdd_core = calculate_vdd_core(tgt);
/* Increase VDD levels if needed. */
if (reason == SETRATE_CPUFREQ || reason == SETRATE_HOTPLUG) {
@@ -1174,7 +1153,6 @@
/* Drop VDD levels if we can. */
decrease_vdd(cpu, vdd_core, vdd_mem, vdd_dig, reason);
- scalable[cpu].first_set_call = false;
pr_debug("ACPU%d speed change complete\n", cpu);
out:
@@ -1205,13 +1183,41 @@
}
/* Voltage regulator initialization. */
-static void __init regulator_init(int set_vdd)
+static void __init regulator_init(struct acpu_level *lvl)
{
int cpu, ret;
struct scalable *sc;
+ unsigned int vdd_mem, vdd_dig, vdd_core;
+
+ vdd_mem = calculate_vdd_mem(lvl);
+ vdd_dig = calculate_vdd_dig(lvl);
for_each_possible_cpu(cpu) {
sc = &scalable[cpu];
+
+ /* Set initial vdd_mem vote. */
+ ret = rpm_vreg_set_voltage(sc->vreg[VREG_MEM].rpm_vreg_id,
+ sc->vreg[VREG_MEM].rpm_vreg_voter, vdd_mem,
+ sc->vreg[VREG_MEM].max_vdd, 0);
+ if (ret) {
+ pr_err("%s initialization failed (%d)\n",
+ sc->vreg[VREG_MEM].name, ret);
+ BUG();
+ }
+ sc->vreg[VREG_MEM].cur_vdd = vdd_mem;
+
+ /* Set initial vdd_dig vote. */
+ ret = rpm_vreg_set_voltage(sc->vreg[VREG_DIG].rpm_vreg_id,
+ sc->vreg[VREG_DIG].rpm_vreg_voter, vdd_dig,
+ sc->vreg[VREG_DIG].max_vdd, 0);
+ if (ret) {
+ pr_err("%s initialization failed (%d)\n",
+ sc->vreg[VREG_DIG].name, ret);
+ BUG();
+ }
+ sc->vreg[VREG_DIG].cur_vdd = vdd_dig;
+
+ /* Setup Krait CPU regulators and initial core voltage. */
sc->vreg[VREG_CORE].reg = regulator_get(NULL,
sc->vreg[VREG_CORE].name);
if (IS_ERR(sc->vreg[VREG_CORE].reg)) {
@@ -1220,18 +1226,21 @@
PTR_ERR(sc->vreg[VREG_CORE].reg));
BUG();
}
-
- ret = regulator_set_voltage(sc->vreg[VREG_CORE].reg,
- set_vdd,
+ vdd_core = calculate_vdd_core(lvl);
+ ret = regulator_set_voltage(sc->vreg[VREG_CORE].reg, vdd_core,
sc->vreg[VREG_CORE].max_vdd);
- if (ret)
- pr_err("regulator_set_voltage(%s) failed"
- " (%d)\n", sc->vreg[VREG_CORE].name, ret);
-
+ if (ret) {
+ pr_err("%s initialization failed (%d)\n",
+ sc->vreg[VREG_CORE].name, ret);
+ BUG();
+ }
+ sc->vreg[VREG_CORE].cur_vdd = vdd_core;
ret = regulator_enable(sc->vreg[VREG_CORE].reg);
- if (ret)
+ if (ret) {
pr_err("regulator_enable(%s) failed (%d)\n",
sc->vreg[VREG_CORE].name, ret);
+ BUG();
+ }
}
}
@@ -1258,12 +1267,6 @@
set_sec_clk_src(sc, tgt_s->sec_src_sel);
set_pri_clk_src(sc, tgt_s->pri_src_sel);
sc->current_speed = tgt_s;
-
- /*
- * Set this flag so that the first call to acpuclk_8960_set_rate() can
- * drop voltages and set initial bus bandwidth requests.
- */
- sc->first_set_call = true;
}
static void __init per_cpu_init(void *data)
@@ -1491,7 +1494,7 @@
{
struct acpu_level *max_acpu_level = select_freq_plan();
- regulator_init(max_acpu_level->vdd_core);
+ regulator_init(max_acpu_level);
bus_init(max_acpu_level->l2_level->bw_level);
init_clock_sources(&scalable[L2], &max_acpu_level->l2_level->speed);
diff --git a/arch/arm/mach-msm/bms-batterydata-desay.c b/arch/arm/mach-msm/bms-batterydata-desay.c
new file mode 100644
index 0000000..5488a2f
--- /dev/null
+++ b/arch/arm/mach-msm/bms-batterydata-desay.c
@@ -0,0 +1,84 @@
+/* Copyright (c) 2011-2012, Code Aurora Forum. All rights reserved.
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License version 2 and
+ * only version 2 as published by the Free Software Foundation.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ */
+
+#include <linux/mfd/pm8xxx/pm8921-bms.h>
+
+static struct single_row_lut desay_5200_fcc_temp = {
+ .x = {-20, 0, 25, 40},
+ .y = {5690, 5722, 5722, 5727},
+ .cols = 4
+};
+
+static struct single_row_lut desay_5200_fcc_sf = {
+ .x = {0},
+ .y = {100},
+ .cols = 1
+};
+
+static struct pc_temp_ocv_lut desay_5200_pc_temp_ocv = {
+ .rows = 29,
+ .cols = 4,
+ .temp = {-20, 0, 25, 40},
+ .percent = {100, 95, 90, 85, 80, 75, 70, 65, 60, 55,
+ 50, 45, 40, 35, 30, 25, 20, 15, 10, 9, 8,
+ 7, 6, 5, 4, 3, 2, 1, 0
+ },
+ .ocv = {
+ {4185, 4184, 4181, 4178},
+ {4103, 4117, 4120, 4119},
+ {4044, 4067, 4074, 4073},
+ {3987, 4019, 4031, 4030},
+ {3941, 3974, 3992, 3992},
+ {3902, 3936, 3958, 3957},
+ {3866, 3901, 3926, 3926},
+ {3835, 3870, 3891, 3896},
+ {3811, 3842, 3855, 3858},
+ {3792, 3818, 3827, 3827},
+ {3776, 3795, 3806, 3806},
+ {3762, 3778, 3789, 3790},
+ {3748, 3765, 3777, 3777},
+ {3735, 3752, 3767, 3765},
+ {3720, 3739, 3756, 3754},
+ {3704, 3726, 3743, 3736},
+ {3685, 3712, 3723, 3716},
+ {3664, 3697, 3695, 3689},
+ {3623, 3672, 3669, 3664},
+ {3611, 3666, 3666, 3661},
+ {3597, 3659, 3662, 3658},
+ {3579, 3648, 3657, 3653},
+ {3559, 3630, 3644, 3639},
+ {3532, 3600, 3612, 3606},
+ {3497, 3558, 3565, 3559},
+ {3450, 3500, 3504, 3498},
+ {3380, 3417, 3421, 3416},
+ {3265, 3287, 3296, 3293},
+ {3000, 3000, 3000, 3000}
+ },
+};
+
+static struct pc_sf_lut desay_5200_pc_sf = {
+ .rows = 1,
+ .cols = 1,
+ .cycles = {0},
+ .percent = {100},
+ .sf = {
+ {100}
+ },
+};
+
+struct pm8921_bms_battery_data desay_5200_data = {
+ .fcc = 5200,
+ .fcc_temp_lut = &desay_5200_fcc_temp,
+ .fcc_sf_lut = &desay_5200_fcc_sf,
+ .pc_temp_ocv_lut = &desay_5200_pc_temp_ocv,
+ .pc_sf_lut = &desay_5200_pc_sf,
+};
diff --git a/arch/arm/mach-msm/bms-batterydata.c b/arch/arm/mach-msm/bms-batterydata.c
index ea2a9f6..e71e350 100644
--- a/arch/arm/mach-msm/bms-batterydata.c
+++ b/arch/arm/mach-msm/bms-batterydata.c
@@ -91,74 +91,3 @@
.pc_temp_ocv_lut = &palladium_1500_pc_temp_ocv,
.pc_sf_lut = &palladium_1500_pc_sf,
};
-
-static struct single_row_lut desay_5200_fcc_temp = {
- .x = {-20, 0, 25, 40},
- .y = {5690, 5722, 5722, 5727},
- .cols = 4
-};
-
-static struct single_row_lut desay_5200_fcc_sf = {
- .x = {0},
- .y = {100},
- .cols = 1
-};
-
-static struct pc_temp_ocv_lut desay_5200_pc_temp_ocv = {
- .rows = 29,
- .cols = 4,
- .temp = {-20, 0, 25, 40},
- .percent = {100, 95, 90, 85, 80, 75, 70, 65, 60, 55,
- 50, 45, 40, 35, 30, 25, 20, 15, 10, 9, 8,
- 7, 6, 5, 4, 3, 2, 1, 0
- },
- .ocv = {
- {4185, 4184, 4181, 4178},
- {4103, 4117, 4120, 4119},
- {4044, 4067, 4074, 4073},
- {3987, 4019, 4031, 4030},
- {3941, 3974, 3992, 3992},
- {3902, 3936, 3958, 3957},
- {3866, 3901, 3926, 3926},
- {3835, 3870, 3891, 3896},
- {3811, 3842, 3855, 3858},
- {3792, 3818, 3827, 3827},
- {3776, 3795, 3806, 3806},
- {3762, 3778, 3789, 3790},
- {3748, 3765, 3777, 3777},
- {3735, 3752, 3767, 3765},
- {3720, 3739, 3756, 3754},
- {3704, 3726, 3743, 3736},
- {3685, 3712, 3723, 3716},
- {3664, 3697, 3695, 3689},
- {3623, 3672, 3669, 3664},
- {3611, 3666, 3666, 3661},
- {3597, 3659, 3662, 3658},
- {3579, 3648, 3657, 3653},
- {3559, 3630, 3644, 3639},
- {3532, 3600, 3612, 3606},
- {3497, 3558, 3565, 3559},
- {3450, 3500, 3504, 3498},
- {3380, 3417, 3421, 3416},
- {3265, 3287, 3296, 3293},
- {3000, 3000, 3000, 3000}
- },
-};
-
-static struct pc_sf_lut desay_5200_pc_sf = {
- .rows = 1,
- .cols = 1,
- .cycles = {0},
- .percent = {100},
- .sf = {
- {100}
- },
-};
-
-struct pm8921_bms_battery_data desay_5200_data = {
- .fcc = 5200,
- .fcc_temp_lut = &desay_5200_fcc_temp,
- .fcc_sf_lut = &desay_5200_fcc_sf,
- .pc_temp_ocv_lut = &desay_5200_pc_temp_ocv,
- .pc_sf_lut = &desay_5200_pc_sf,
-};
diff --git a/arch/arm/mach-msm/board-8064-gpu.c b/arch/arm/mach-msm/board-8064-gpu.c
index 9fbb1c7..2708283 100644
--- a/arch/arm/mach-msm/board-8064-gpu.c
+++ b/arch/arm/mach-msm/board-8064-gpu.c
@@ -160,7 +160,7 @@
.io_fraction = 33,
},
{
- .gpu_freq = 1920000000,
+ .gpu_freq = 192000000,
.bus_freq = 1,
.io_fraction = 100,
},
diff --git a/arch/arm/mach-msm/board-msm7627a-display.c b/arch/arm/mach-msm/board-msm7627a-display.c
index e4d44b4..86343f5 100644
--- a/arch/arm/mach-msm/board-msm7627a-display.c
+++ b/arch/arm/mach-msm/board-msm7627a-display.c
@@ -549,93 +549,6 @@
};
#endif
-static int evb_backlight_control(int level)
-{
-
- int i = 0;
- int remainder;
- /* device address byte = 0x72 */
- gpio_set_value_cansleep(96, 0);
- udelay(67);
- gpio_set_value_cansleep(96, 1);
- udelay(33);
- gpio_set_value_cansleep(96, 0);
- udelay(33);
- gpio_set_value_cansleep(96, 1);
- udelay(67);
- gpio_set_value_cansleep(96, 0);
- udelay(33);
- gpio_set_value_cansleep(96, 1);
- udelay(67);
- gpio_set_value_cansleep(96, 0);
- udelay(33);
- gpio_set_value_cansleep(96, 1);
- udelay(67);
- gpio_set_value_cansleep(96, 0);
- udelay(67);
- gpio_set_value_cansleep(96, 1);
- udelay(33);
- gpio_set_value_cansleep(96, 0);
- udelay(67);
- gpio_set_value_cansleep(96, 1);
- udelay(33);
- gpio_set_value_cansleep(96, 0);
- udelay(33);
- gpio_set_value_cansleep(96, 1);
- udelay(67);
- gpio_set_value_cansleep(96, 0);
- udelay(67);
- gpio_set_value_cansleep(96, 1);
- udelay(33);
-
- /* t-EOS and t-start */
- gpio_set_value_cansleep(96, 0);
- ndelay(4200);
- gpio_set_value_cansleep(96, 1);
- ndelay(9000);
-
- /* data byte */
- /* RFA = 0 */
- gpio_set_value_cansleep(96, 0);
- udelay(67);
- gpio_set_value_cansleep(96, 1);
- udelay(33);
-
- /* Address bits */
- gpio_set_value_cansleep(96, 0);
- udelay(67);
- gpio_set_value_cansleep(96, 1);
- udelay(33);
- gpio_set_value_cansleep(96, 0);
- udelay(67);
- gpio_set_value_cansleep(96, 1);
- udelay(33);
-
- /* Data bits */
- for (i = 0; i < 5; i++) {
- remainder = (level) & (16);
- if (remainder) {
- gpio_set_value_cansleep(96, 0);
- udelay(33);
- gpio_set_value_cansleep(96, 1);
- udelay(67);
- } else {
- gpio_set_value_cansleep(96, 0);
- udelay(67);
- gpio_set_value_cansleep(96, 1);
- udelay(33);
- }
- level = level << 1;
- }
-
- /* t-EOS */
- gpio_set_value_cansleep(96, 0);
- ndelay(12000);
- gpio_set_value_cansleep(96, 1);
- return 0;
-}
-
-
static struct msm_panel_common_pdata mipi_truly_pdata = {
.pmic_backlight = mipi_truly_set_bl,
};
@@ -649,7 +562,7 @@
};
static struct msm_panel_common_pdata mipi_NT35510_pdata = {
- .pmic_backlight = evb_backlight_control,
+ .pmic_backlight = NULL,/*mipi_NT35510_set_bl,*/
};
static struct platform_device mipi_dsi_NT35510_panel_device = {
@@ -1077,7 +990,7 @@
return rc;
rc = gpio_tlmm_config(GPIO_CFG(GPIO_QRD3_LCD_BACKLIGHT_EN, 0,
- GPIO_CFG_OUTPUT, GPIO_CFG_PULL_UP, GPIO_CFG_2MA),
+ GPIO_CFG_OUTPUT, GPIO_CFG_NO_PULL, GPIO_CFG_2MA),
GPIO_CFG_ENABLE);
if (rc < 0) {
pr_err("failed QRD3 GPIO_BACKLIGHT_EN tlmm config\n");
@@ -1133,17 +1046,7 @@
qrd3_dsi_gpio_initialized = 1;
}
- if (on) {
- gpio_set_value_cansleep(GPIO_QRD3_LCD_BACKLIGHT_EN, 1);
- udelay(190);
- gpio_set_value_cansleep(GPIO_QRD3_LCD_BACKLIGHT_EN, 0);
- udelay(286);
- gpio_set_value_cansleep(GPIO_QRD3_LCD_BACKLIGHT_EN, 1);
- /* 1 wire mode starts from this low to high transition */
- udelay(50);
- } else
- gpio_set_value_cansleep(GPIO_QRD3_LCD_BACKLIGHT_EN, !!on);
-
+ gpio_set_value_cansleep(GPIO_QRD3_LCD_BACKLIGHT_EN, !!on);
gpio_set_value_cansleep(GPIO_QRD3_LCD_EXT_2V85_EN, !!on);
gpio_set_value_cansleep(GPIO_QRD3_LCD_EXT_1V8_EN, !!on);
@@ -1206,11 +1109,10 @@
if (machine_is_msm7627a_qrd1())
platform_add_devices(qrd_fb_devices,
ARRAY_SIZE(qrd_fb_devices));
- else if (machine_is_msm7627a_evb() || machine_is_msm8625_evb()) {
- mipi_NT35510_pdata.bl_lock = 1;
+ else if (machine_is_msm7627a_evb() || machine_is_msm8625_evb())
platform_add_devices(evb_fb_devices,
ARRAY_SIZE(evb_fb_devices));
- } else if (machine_is_msm7627a_qrd3() || machine_is_msm8625_qrd7()) {
+ else if (machine_is_msm7627a_qrd3() || machine_is_msm8625_qrd7()) {
sku3_lcdc_lcd_camera_power_init();
platform_add_devices(qrd3_fb_devices,
ARRAY_SIZE(qrd3_fb_devices));
diff --git a/arch/arm/mach-msm/include/mach/board.h b/arch/arm/mach-msm/include/mach/board.h
index aaeb5cc..ae4d632 100644
--- a/arch/arm/mach-msm/include/mach/board.h
+++ b/arch/arm/mach-msm/include/mach/board.h
@@ -351,7 +351,6 @@
struct msm_panel_common_pdata {
uintptr_t hw_revision_addr;
int gpio;
- bool bl_lock;
int (*backlight_level)(int level, int max, int min);
int (*pmic_backlight)(int level);
int (*panel_num)(void);
diff --git a/drivers/i2c/busses/i2c-qup.c b/drivers/i2c/busses/i2c-qup.c
index e11979b..8476033 100644
--- a/drivers/i2c/busses/i2c-qup.c
+++ b/drivers/i2c/busses/i2c-qup.c
@@ -1254,6 +1254,18 @@
dev->pos = 0;
/*
+ * If bootloaders leave a pending interrupt on certain GSBI's,
+ * then we reset the core before registering for interrupts.
+ */
+ clk_prepare_enable(dev->clk);
+ clk_prepare_enable(dev->pclk);
+ writel_relaxed(1, dev->base + QUP_SW_RESET);
+ if (qup_i2c_poll_state(dev, 0, true) != 0)
+ goto err_reset_failed;
+ clk_disable_unprepare(dev->clk);
+ clk_disable_unprepare(dev->pclk);
+
+ /*
* We use num_irqs to also indicate if we got 3 interrupts or just 1.
* If we have just 1, we use err_irq as the general purpose irq
* and handle the changes in ISR accordingly
@@ -1337,6 +1349,9 @@
qup_i2c_free_gpios(dev);
if (dev->gsbi)
iounmap(dev->gsbi);
+err_reset_failed:
+ clk_disable_unprepare(dev->clk);
+ clk_disable_unprepare(dev->pclk);
err_request_gpio_failed:
err_gsbi_failed:
iounmap(dev->base);
diff --git a/drivers/video/msm/mdp4_overlay.c b/drivers/video/msm/mdp4_overlay.c
index 46e683a..36cfd16 100644
--- a/drivers/video/msm/mdp4_overlay.c
+++ b/drivers/video/msm/mdp4_overlay.c
@@ -2506,7 +2506,7 @@
#endif
}
- if (mfd->mdp_rev >= MDP_REV_42 && !mfd->use_ov0_blt &&
+ if (mfd->mdp_rev >= MDP_REV_41 && !mfd->use_ov0_blt &&
(pipe->mixer_num == MDP4_MIXER0)) {
ctrl->stage[pipe->mixer_num][pipe->mixer_stage] = NULL;
} else {
diff --git a/drivers/video/msm/mipi_NT35510.c b/drivers/video/msm/mipi_NT35510.c
index a62d1ac..930b4e9 100644
--- a/drivers/video/msm/mipi_NT35510.c
+++ b/drivers/video/msm/mipi_NT35510.c
@@ -18,7 +18,6 @@
static struct msm_panel_common_pdata *mipi_nt35510_pdata;
static struct dsi_buf nt35510_tx_buf;
static struct dsi_buf nt35510_rx_buf;
-spinlock_t bl_spinlock;
#define NT35510_SLEEP_OFF_DELAY 150
#define NT35510_DISPLAY_ON_DELAY 150
@@ -524,16 +523,8 @@
static void mipi_nt35510_set_backlight(struct msm_fb_data_type *mfd)
{
- int bl_level;
- unsigned long flags;
- bl_level = mfd->bl_level;
-
- if (mipi_nt35510_pdata->bl_lock) {
- spin_lock_irqsave(&bl_spinlock, flags);
- mipi_nt35510_pdata->pmic_backlight(bl_level);
- spin_unlock_irqrestore(&bl_spinlock, flags);
- } else
- mipi_nt35510_pdata->pmic_backlight(bl_level);
+ /* Add backlight changes later*/
+ return;
}
static struct msm_fb_panel_data nt35510_panel_data = {
@@ -561,8 +552,6 @@
return -ENODEV;
ch_used[channel] = TRUE;
- if (mipi_nt35510_pdata->bl_lock)
- spin_lock_init(&bl_spinlock);
ret = mipi_nt35510_lcd_init();
if (ret) {
@@ -575,6 +564,7 @@
return -ENOMEM;
nt35510_panel_data.panel_info = *pinfo;
+
ret = platform_device_add_data(pdev, &nt35510_panel_data,
sizeof(nt35510_panel_data));
if (ret) {
diff --git a/drivers/video/msm/mipi_NT35510_cmd_wvga_pt.c b/drivers/video/msm/mipi_NT35510_cmd_wvga_pt.c
index f052e93..2c4ee3e 100644
--- a/drivers/video/msm/mipi_NT35510_cmd_wvga_pt.c
+++ b/drivers/video/msm/mipi_NT35510_cmd_wvga_pt.c
@@ -56,7 +56,7 @@
pinfo.lcdc.border_clr = 0; /* blk */
pinfo.lcdc.underflow_clr = 0xff; /* blue */
pinfo.lcdc.hsync_skew = 0;
- pinfo.bl_max = 31;
+ pinfo.bl_max = 100;
pinfo.bl_min = 1;
pinfo.fb_num = 2;
diff --git a/drivers/video/msm/mipi_NT35510_video_wvga_pt.c b/drivers/video/msm/mipi_NT35510_video_wvga_pt.c
index 4e97d99..82e03b2 100644
--- a/drivers/video/msm/mipi_NT35510_video_wvga_pt.c
+++ b/drivers/video/msm/mipi_NT35510_video_wvga_pt.c
@@ -59,7 +59,7 @@
delayed from VSYNC active edge */
pinfo.lcdc.hsync_skew = 0;
pinfo.clk_rate = 499000000;
- pinfo.bl_max = 31;
+ pinfo.bl_max = 100; /*16; CHECK THIS!!!*/
pinfo.bl_min = 1;
pinfo.fb_num = 2;