| commit | dc529a4fe1ae4667c819437a94185e8581e1e680 | [log] [tgz] |
|---|---|---|
| author | Eric Anholt <eric@anholt.net> | Tue Mar 10 22:34:49 2009 -0700 |
| committer | Eric Anholt <eric@anholt.net> | Wed Mar 11 11:02:06 2009 -0700 |
| tree | 88933130acf93d8715b42c232aae8be369e1ed0e | |
| parent | d7619c4b9c95cc9a2e7f0f4f7ae21165ab5cb1e7 [diff] |
drm/i915: fix 945 fence register writes for fence 8 and above. The last 8 fence registers sit at a different offset, so when we went to set fence number 8 in the lower offset, we instead set PGETBL_CTL, and the GPU got all sorts of angry at us. fd.o bug #20567. Easily reproducible by running glxgears and killing it about 6 times. Signed-off-by: Eric Anholt <eric@anholt.net>