Merge changes Ibb7afffd,Ie00815ed into msm-3.0
* changes:
msm: board-qrd7627a: Add support for synaptics touchscreen
input: touchscreen: Add support for synaptics clearpad3000
diff --git a/arch/arm/Kconfig b/arch/arm/Kconfig
index b2dbee3..2e7f3a3 100644
--- a/arch/arm/Kconfig
+++ b/arch/arm/Kconfig
@@ -24,7 +24,7 @@
select HAVE_PERF_EVENTS
select PERF_USE_VMALLOC
select HAVE_REGS_AND_STACK_ACCESS_API
- select HAVE_HW_BREAKPOINT if (PERF_EVENTS && (CPU_V6 || CPU_V6K || CPU_V7))
+ #select HAVE_HW_BREAKPOINT if (PERF_EVENTS && (CPU_V6 || CPU_V6K || CPU_V7))
select HAVE_C_RECORDMCOUNT
select HAVE_GENERIC_HARDIRQS
select HAVE_SPARSE_IRQ
@@ -1774,6 +1774,7 @@
bool "Flattened Device Tree support"
select OF
select OF_EARLY_FLATTREE
+ select IRQ_DOMAIN
help
Include support for flattened device tree machine descriptions.
diff --git a/arch/arm/boot/dts/msmcopper.dts b/arch/arm/boot/dts/msmcopper.dts
new file mode 100644
index 0000000..4e3d66d
--- /dev/null
+++ b/arch/arm/boot/dts/msmcopper.dts
@@ -0,0 +1,17 @@
+/dts-v1/;
+
+/include/ "skeleton.dtsi"
+
+/ {
+ model = "Qualcomm MSM Copper";
+ compatible = "qcom,msmcopper-sim", "qcom,msmcopper";
+ interrupt-parent = <&intc>;
+
+ intc: interrupt-controller@F9000000 {
+ compatible = "qcom,msm-qgic2";
+ interrupt-controller;
+ #interrupt-cells = <1>;
+ reg = <0xF9000000 0x1000>,
+ <0xF9002000 0x1000>;
+ };
+};
diff --git a/arch/arm/boot/dts/skeleton.dtsi b/arch/arm/boot/dts/skeleton.dtsi
new file mode 100644
index 0000000..b41d241
--- /dev/null
+++ b/arch/arm/boot/dts/skeleton.dtsi
@@ -0,0 +1,13 @@
+/*
+ * Skeleton device tree; the bare minimum needed to boot; just include and
+ * add a compatible value. The bootloader will typically populate the memory
+ * node.
+ */
+
+/ {
+ #address-cells = <1>;
+ #size-cells = <1>;
+ chosen { };
+ aliases { };
+ memory { device_type = "memory"; reg = <0 0>; };
+};
diff --git a/arch/arm/configs/msm7627a-perf_defconfig b/arch/arm/configs/msm7627a-perf_defconfig
index 33b9a37..06d04f7 100644
--- a/arch/arm/configs/msm7627a-perf_defconfig
+++ b/arch/arm/configs/msm7627a-perf_defconfig
@@ -158,6 +158,7 @@
CONFIG_BT_MSM_SLEEP=y
CONFIG_MSM_BT_POWER=y
CONFIG_RFKILL=y
+CONFIG_RFKILL_PM=y
CONFIG_MTD=y
CONFIG_MTD_TESTS=m
CONFIG_MTD_CMDLINE_PARTS=y
@@ -183,6 +184,8 @@
CONFIG_SMSC911X=y
# CONFIG_NETDEV_10000 is not set
CONFIG_LIBRA_SDIOIF=m
+CONFIG_CFG80211=y
+CONFIG_CFG80211_WEXT=n
# CONFIG_INPUT_MOUSEDEV is not set
CONFIG_INPUT_EVDEV=y
CONFIG_INPUT_EVBUG=m
diff --git a/arch/arm/configs/msm7627a_defconfig b/arch/arm/configs/msm7627a_defconfig
index 1eaec3f..909a0bf 100644
--- a/arch/arm/configs/msm7627a_defconfig
+++ b/arch/arm/configs/msm7627a_defconfig
@@ -156,6 +156,7 @@
CONFIG_BT_MSM_SLEEP=y
CONFIG_MSM_BT_POWER=y
CONFIG_RFKILL=y
+CONFIG_RFKILL_PM=y
CONFIG_MTD=y
CONFIG_MTD_TESTS=m
CONFIG_MTD_CMDLINE_PARTS=y
@@ -181,6 +182,8 @@
CONFIG_SMSC911X=y
# CONFIG_NETDEV_10000 is not set
CONFIG_LIBRA_SDIOIF=m
+CONFIG_CFG80211=y
+CONFIG_CFG80211_WEXT=n
# CONFIG_INPUT_MOUSEDEV is not set
CONFIG_INPUT_EVDEV=y
CONFIG_INPUT_EVBUG=m
diff --git a/arch/arm/configs/msm8660-perf_defconfig b/arch/arm/configs/msm8660-perf_defconfig
index ace54ef..0f41c0a 100644
--- a/arch/arm/configs/msm8660-perf_defconfig
+++ b/arch/arm/configs/msm8660-perf_defconfig
@@ -214,6 +214,7 @@
CONFIG_MSM_BT_POWER=y
# CONFIG_WIRELESS_EXT_SYSFS is not set
CONFIG_RFKILL=y
+CONFIG_RFKILL_PM=y
CONFIG_BLK_DEV_LOOP=y
CONFIG_BLK_DEV_RAM=y
CONFIG_MISC_DEVICES=y
@@ -248,6 +249,8 @@
# CONFIG_NETDEV_1000 is not set
# CONFIG_NETDEV_10000 is not set
CONFIG_LIBRA_SDIOIF=m
+CONFIG_CFG80211=y
+CONFIG_CFG80211_WEXT=n
CONFIG_PPP=y
CONFIG_PPP_ASYNC=y
CONFIG_PPP_DEFLATE=y
diff --git a/arch/arm/configs/msm8660_defconfig b/arch/arm/configs/msm8660_defconfig
index 41e3a6d..e900062 100644
--- a/arch/arm/configs/msm8660_defconfig
+++ b/arch/arm/configs/msm8660_defconfig
@@ -205,6 +205,7 @@
CONFIG_MSM_BT_POWER=y
# CONFIG_WIRELESS_EXT_SYSFS is not set
CONFIG_RFKILL=y
+CONFIG_RFKILL_PM=y
CONFIG_BLK_DEV_LOOP=y
CONFIG_BLK_DEV_RAM=y
CONFIG_MISC_DEVICES=y
@@ -241,6 +242,8 @@
# CONFIG_NETDEV_1000 is not set
# CONFIG_NETDEV_10000 is not set
CONFIG_LIBRA_SDIOIF=m
+CONFIG_CFG80211=y
+CONFIG_CFG80211_WEXT=n
CONFIG_PPP=y
CONFIG_PPP_ASYNC=y
CONFIG_PPP_DEFLATE=y
diff --git a/arch/arm/configs/msm9615_defconfig b/arch/arm/configs/msm9615_defconfig
index 3de67e9..f8ccbb3 100644
--- a/arch/arm/configs/msm9615_defconfig
+++ b/arch/arm/configs/msm9615_defconfig
@@ -159,6 +159,10 @@
# CONFIG_MMC_MSM_SDC4_SUPPORT is not set
# CONFIG_MMC_MSM_SDC5_SUPPORT is not set
CONFIG_MMC_MSM_SPS_SUPPORT=y
+CONFIG_RTC_CLASS=y
+# CONFIG_RTC_INTF_ALARM is not set
+# CONFIG_RTC_DRV_MSM is not set
+CONFIG_RTC_DRV_PM8XXX=y
CONFIG_MSM_SSBI=y
CONFIG_SPS=y
CONFIG_SPS_SUPPORT_BAMDMA=y
diff --git a/arch/arm/include/asm/mach/arch.h b/arch/arm/include/asm/mach/arch.h
index 946f4d7..ae744a8 100644
--- a/arch/arm/include/asm/mach/arch.h
+++ b/arch/arm/include/asm/mach/arch.h
@@ -70,4 +70,11 @@
#define MACHINE_END \
};
+#define DT_MACHINE_START(_name, _namestr) \
+static const struct machine_desc __mach_desc_##_name \
+ __used \
+ __attribute__((__section__(".arch.info.init"))) = { \
+ .nr = ~0, \
+ .name = _namestr,
+
#endif
diff --git a/arch/arm/include/asm/prom.h b/arch/arm/include/asm/prom.h
index 11b8708..6f65ca8 100644
--- a/arch/arm/include/asm/prom.h
+++ b/arch/arm/include/asm/prom.h
@@ -16,11 +16,6 @@
#include <asm/setup.h>
#include <asm/irq.h>
-static inline void irq_dispose_mapping(unsigned int virq)
-{
- return;
-}
-
extern struct machine_desc *setup_machine_fdt(unsigned int dt_phys);
extern void arm_dt_memblock_reserve(void);
diff --git a/arch/arm/kernel/devtree.c b/arch/arm/kernel/devtree.c
index 0cdd7b4..1a33e9d 100644
--- a/arch/arm/kernel/devtree.c
+++ b/arch/arm/kernel/devtree.c
@@ -132,17 +132,3 @@
return mdesc_best;
}
-
-/**
- * irq_create_of_mapping - Hook to resolve OF irq specifier into a Linux irq#
- *
- * Currently the mapping mechanism is trivial; simple flat hwirq numbers are
- * mapped 1:1 onto Linux irq numbers. Cascaded irq controllers are not
- * supported.
- */
-unsigned int irq_create_of_mapping(struct device_node *controller,
- const u32 *intspec, unsigned int intsize)
-{
- return intspec[0];
-}
-EXPORT_SYMBOL_GPL(irq_create_of_mapping);
diff --git a/arch/arm/mach-msm/board-9615.c b/arch/arm/mach-msm/board-9615.c
index 82a0bb9..40cbee0 100644
--- a/arch/arm/mach-msm/board-9615.c
+++ b/arch/arm/mach-msm/board-9615.c
@@ -29,6 +29,7 @@
#include "board-9615.h"
#include "cpuidle.h"
#include "pm.h"
+#include "acpuclock.h"
static struct pm8xxx_irq_platform_data pm8xxx_irq_pdata __devinitdata = {
.irq_base = PM8018_IRQ_BASE,
@@ -563,6 +564,9 @@
msm_device_gadget_peripheral.dev.parent = &msm_device_otg.dev;
platform_add_devices(common_devices, ARRAY_SIZE(common_devices));
+ msm_clock_init(&msm9615_clock_init_data);
+ acpuclk_init(&acpuclk_9615_soc_data);
+
msm9615_init_mmc();
msm_pm_set_platform_data(msm_pm_data, ARRAY_SIZE(msm_pm_data));
msm_pm_set_rpm_wakeup_irq(RPM_APCC_CPU0_WAKE_UP_IRQ);
diff --git a/arch/arm/mach-msm/board-msm8x60.c b/arch/arm/mach-msm/board-msm8x60.c
index dab800f..6141e1f 100644
--- a/arch/arm/mach-msm/board-msm8x60.c
+++ b/arch/arm/mach-msm/board-msm8x60.c
@@ -2548,19 +2548,15 @@
*/
if (machine_is_msm8x60_fluid()) {
/* fluid has different firmware, gpios */
- peripheral_dsps.name = DSPS_PIL_FLUID_NAME;
pdata->pil_name = DSPS_PIL_FLUID_NAME;
pdata->gpios = dsps_fluid_gpios;
pdata->gpios_num = ARRAY_SIZE(dsps_fluid_gpios);
} else {
- peripheral_dsps.name = DSPS_PIL_GENERIC_NAME;
pdata->pil_name = DSPS_PIL_GENERIC_NAME;
pdata->gpios = dsps_surf_gpios;
pdata->gpios_num = ARRAY_SIZE(dsps_surf_gpios);
}
- msm_pil_add_device(&peripheral_dsps);
-
platform_device_register(&msm_dsps_device);
}
#endif /* CONFIG_MSM_DSPS */
diff --git a/arch/arm/mach-msm/clock-8960.c b/arch/arm/mach-msm/clock-8960.c
index 734b1fe..ee122ec 100644
--- a/arch/arm/mach-msm/clock-8960.c
+++ b/arch/arm/mach-msm/clock-8960.c
@@ -5159,6 +5159,7 @@
CLK_LOOKUP("afab_a_clk", afab_a_clk.c, NULL),
CLK_LOOKUP("cfpb_clk", cfpb_clk.c, NULL),
CLK_LOOKUP("cfpb_a_clk", cfpb_a_clk.c, NULL),
+ CLK_LOOKUP("cfpb_a_clk", cfpb_a_clk.c, "clock-8960"),
CLK_LOOKUP("dfab_clk", dfab_clk.c, NULL),
CLK_LOOKUP("dfab_a_clk", dfab_a_clk.c, NULL),
CLK_LOOKUP("ebi1_clk", ebi1_clk.c, NULL),
@@ -5821,6 +5822,7 @@
{
int rc;
struct clk *mmfpb_a_clk = clk_get_sys("clock-8960", "mmfpb_a_clk");
+ struct clk *cfpb_a_clk = clk_get_sys("clock-8960", "cfpb_a_clk");
/* Vote for MMFPB to be at least 76.8MHz when an Apps CPU is active. */
if (WARN(IS_ERR(mmfpb_a_clk), "mmfpb_a_clk not found (%ld)\n",
@@ -5833,6 +5835,16 @@
if (WARN(rc, "mmfpb_a_clk not enabled (%d)\n", rc))
return rc;
+ /* Vote for CFPB to be at least 64MHz when an Apps CPU is active. */
+ if (WARN(IS_ERR(cfpb_a_clk), "cfpb_a_clk not found (%ld)\n",
+ PTR_ERR(cfpb_a_clk)))
+ return PTR_ERR(cfpb_a_clk);
+ rc = clk_set_min_rate(cfpb_a_clk, 64000000);
+ if (WARN(rc, "cfpb_a_clk rate was not set (%d)\n", rc))
+ return rc;
+ rc = clk_enable(cfpb_a_clk);
+ if (WARN(rc, "cfpb_a_clk not enabled (%d)\n", rc))
+ return rc;
return local_unvote_sys_vdd(HIGH);
}
diff --git a/arch/arm/mach-msm/clock-9615.c b/arch/arm/mach-msm/clock-9615.c
index 84121ef..63d3f72 100644
--- a/arch/arm/mach-msm/clock-9615.c
+++ b/arch/arm/mach-msm/clock-9615.c
@@ -27,6 +27,7 @@
#include <mach/clk.h>
#include <mach/msm_xo.h>
#include <mach/rpm-9615.h>
+#include <mach/rpm-regulator.h>
#include "clock-local.h"
#include "clock-voter.h"
@@ -290,17 +291,14 @@
/* Update the sys_vdd voltage given a level. */
static int msm9615_update_sys_vdd(enum sys_vdd_level level)
{
- /* TODO: Implement when rpm-regulator is ready.
static const int vdd_uv[] = {
- [NONE...LOW] = 945000,
- [NOMINAL] = 1050000,
+ [NONE...LOW] = 1150000,
+ [NOMINAL] = 1150000,
[HIGH] = 1150000,
};
- return rpm_vreg_set_voltage(RPM_VREG_ID_PM8921_S3, RPM_VREG_VOTER3,
+ return rpm_vreg_set_voltage(RPM_VREG_ID_PM8018_S1, RPM_VREG_VOTER3,
vdd_uv[level], vdd_uv[HIGH], 1);
- */
- return 0;
}
static int soc_clk_reset(struct clk *clk, enum clk_reset_action action)
diff --git a/arch/arm/mach-msm/devices-8064.c b/arch/arm/mach-msm/devices-8064.c
index 99e8d23..3606c41 100644
--- a/arch/arm/mach-msm/devices-8064.c
+++ b/arch/arm/mach-msm/devices-8064.c
@@ -21,6 +21,7 @@
#include <mach/msm_iomap.h>
#include <mach/usbdiag.h>
#include <mach/msm_sps.h>
+#include <mach/dma.h>
#include "clock.h"
#include "devices.h"
@@ -53,13 +54,21 @@
#define MSM_HSUSB_PHYS 0x12500000
#define MSM_HSUSB_SIZE SZ_4K
-
static struct resource msm_dmov_resource[] = {
{
.start = ADM_0_SCSS_0_IRQ,
- .end = (resource_size_t)MSM_DMOV_BASE,
.flags = IORESOURCE_IRQ,
},
+ {
+ .start = 0x18300000,
+ .end = 0x18300000 + SZ_1M - 1,
+ .flags = IORESOURCE_MEM,
+ },
+};
+
+static struct msm_dmov_pdata msm_dmov_pdata = {
+ .sd = 0,
+ .sd_size = 0x800,
};
struct platform_device apq8064_device_dmov = {
@@ -67,6 +76,9 @@
.id = -1,
.resource = msm_dmov_resource,
.num_resources = ARRAY_SIZE(msm_dmov_resource),
+ .dev = {
+ .platform_data = &msm_dmov_pdata,
+ },
};
static struct resource resources_uart_gsbi1[] = {
diff --git a/arch/arm/mach-msm/devices-8960.c b/arch/arm/mach-msm/devices-8960.c
index b531dec..e81e2e8 100644
--- a/arch/arm/mach-msm/devices-8960.c
+++ b/arch/arm/mach-msm/devices-8960.c
@@ -803,9 +803,18 @@
static struct resource msm_dmov_resource[] = {
{
.start = ADM_0_SCSS_1_IRQ,
- .end = (resource_size_t)MSM_DMOV_BASE,
.flags = IORESOURCE_IRQ,
},
+ {
+ .start = 0x18320000,
+ .end = 0x18320000 + SZ_1M - 1,
+ .flags = IORESOURCE_MEM,
+ },
+};
+
+static struct msm_dmov_pdata msm_dmov_pdata = {
+ .sd = 1,
+ .sd_size = 0x800,
};
struct platform_device msm8960_device_dmov = {
@@ -813,6 +822,9 @@
.id = -1,
.resource = msm_dmov_resource,
.num_resources = ARRAY_SIZE(msm_dmov_resource),
+ .dev = {
+ .platform_data = &msm_dmov_pdata,
+ },
};
static struct platform_device *msm_sdcc_devices[] __initdata = {
diff --git a/arch/arm/mach-msm/devices-9615.c b/arch/arm/mach-msm/devices-9615.c
index f65750b..74e7871 100644
--- a/arch/arm/mach-msm/devices-9615.c
+++ b/arch/arm/mach-msm/devices-9615.c
@@ -30,7 +30,6 @@
#include <mach/msm_sps.h>
#include <mach/dma.h>
#include "devices.h"
-#include "acpuclock.h"
#include "mpm.h"
#include "spm.h"
#include "pm.h"
@@ -60,9 +59,18 @@
static struct resource msm_dmov_resource[] = {
{
.start = ADM_0_SCSS_1_IRQ,
- .end = (resource_size_t)MSM_DMOV_BASE,
.flags = IORESOURCE_IRQ,
},
+ {
+ .start = 0x18320000,
+ .end = 0x18320000 + SZ_1M - 1,
+ .flags = IORESOURCE_MEM,
+ },
+};
+
+static struct msm_dmov_pdata msm_dmov_pdata = {
+ .sd = 1,
+ .sd_size = 0x800,
};
struct platform_device msm9615_device_dmov = {
@@ -70,6 +78,9 @@
.id = -1,
.resource = msm_dmov_resource,
.num_resources = ARRAY_SIZE(msm_dmov_resource),
+ .dev = {
+ .platform_data = &msm_dmov_pdata,
+ },
};
static struct resource resources_otg[] = {
@@ -779,8 +790,6 @@
void __init msm9615_device_init(void)
{
msm_spm_init(msm_spm_data, ARRAY_SIZE(msm_spm_data));
- msm_clock_init(&msm9615_clock_init_data);
- acpuclk_init(&acpuclk_9615_soc_data);
BUG_ON(msm_rpm_init(&msm_rpm_data));
BUG_ON(msm_rpmrs_levels_init(msm_rpmrs_levels,
ARRAY_SIZE(msm_rpmrs_levels)));
diff --git a/arch/arm/mach-msm/devices-fsm9xxx.c b/arch/arm/mach-msm/devices-fsm9xxx.c
index 426be10..d46e4d6 100644
--- a/arch/arm/mach-msm/devices-fsm9xxx.c
+++ b/arch/arm/mach-msm/devices-fsm9xxx.c
@@ -232,12 +232,21 @@
* ADM
*/
-struct resource msm_dmov_resource[] = {
+static struct resource msm_dmov_resource[] = {
{
.start = INT_ADM_AARM,
- .end = (resource_size_t) MSM_DMOV_BASE,
.flags = IORESOURCE_IRQ,
},
+ {
+ .start = 0x94610000,
+ .end = 0x94610000 + SZ_4K - 1,
+ .flags = IORESOURCE_MEM,
+ },
+};
+
+static struct msm_dmov_pdata msm_dmov_pdata = {
+ .sd = 3,
+ .sd_size = 0x400,
};
struct platform_device msm_device_dmov = {
@@ -245,6 +254,9 @@
.id = -1,
.resource = msm_dmov_resource,
.num_resources = ARRAY_SIZE(msm_dmov_resource),
+ .dev = {
+ .platform_data = &msm_dmov_pdata,
+ },
};
/*
diff --git a/arch/arm/mach-msm/devices-msm7x01a.c b/arch/arm/mach-msm/devices-msm7x01a.c
index 9ed6fd1..1b9eb86 100644
--- a/arch/arm/mach-msm/devices-msm7x01a.c
+++ b/arch/arm/mach-msm/devices-msm7x01a.c
@@ -384,12 +384,21 @@
.id = -1,
};
-struct resource msm_dmov_resource[] = {
+static struct resource msm_dmov_resource[] = {
{
.start = INT_ADM_AARM,
- .end = (resource_size_t)MSM_DMOV_BASE,
.flags = IORESOURCE_IRQ,
},
+ {
+ .start = 0xA9700000,
+ .end = 0xA9700000 + SZ_4K - 1,
+ .flags = IORESOURCE_MEM,
+ },
+};
+
+static struct msm_dmov_pdata msm_dmov_pdata = {
+ .sd = 3,
+ .sd_size = 0x400,
};
struct platform_device msm_device_dmov = {
@@ -397,6 +406,9 @@
.id = -1,
.resource = msm_dmov_resource,
.num_resources = ARRAY_SIZE(msm_dmov_resource),
+ .dev = {
+ .platform_data = &msm_dmov_pdata,
+ },
};
#define MSM_SDC1_BASE 0xA0400000
diff --git a/arch/arm/mach-msm/devices-msm7x25.c b/arch/arm/mach-msm/devices-msm7x25.c
index ca3caa2..c166c8d 100644
--- a/arch/arm/mach-msm/devices-msm7x25.c
+++ b/arch/arm/mach-msm/devices-msm7x25.c
@@ -407,12 +407,21 @@
.id = -1,
};
-struct resource msm_dmov_resource[] = {
+static struct resource msm_dmov_resource[] = {
{
.start = INT_ADM_AARM,
- .end = (resource_size_t)MSM_DMOV_BASE,
.flags = IORESOURCE_IRQ,
},
+ {
+ .start = 0xA9700000,
+ .end = 0xA9700000 + SZ_4K - 1,
+ .flags = IORESOURCE_MEM,
+ },
+};
+
+static struct msm_dmov_pdata msm_dmov_pdata = {
+ .sd = 3,
+ .sd_size = 0x400,
};
struct platform_device msm_device_dmov = {
@@ -420,6 +429,9 @@
.id = -1,
.resource = msm_dmov_resource,
.num_resources = ARRAY_SIZE(msm_dmov_resource),
+ .dev = {
+ .platform_data = &msm_dmov_pdata,
+ },
};
#define MSM_SDC1_BASE 0xA0400000
diff --git a/arch/arm/mach-msm/devices-msm7x27.c b/arch/arm/mach-msm/devices-msm7x27.c
index 3772884..1bb9a21 100644
--- a/arch/arm/mach-msm/devices-msm7x27.c
+++ b/arch/arm/mach-msm/devices-msm7x27.c
@@ -372,12 +372,21 @@
.id = -1,
};
-struct resource msm_dmov_resource[] = {
+static struct resource msm_dmov_resource[] = {
{
.start = INT_ADM_AARM,
- .end = (resource_size_t)MSM_DMOV_BASE,
.flags = IORESOURCE_IRQ,
},
+ {
+ .start = 0xA9700000,
+ .end = 0xA9700000 + SZ_4K - 1,
+ .flags = IORESOURCE_MEM,
+ },
+};
+
+static struct msm_dmov_pdata msm_dmov_pdata = {
+ .sd = 3,
+ .sd_size = 0x400,
};
struct platform_device msm_device_dmov = {
@@ -385,6 +394,9 @@
.id = -1,
.resource = msm_dmov_resource,
.num_resources = ARRAY_SIZE(msm_dmov_resource),
+ .dev = {
+ .platform_data = &msm_dmov_pdata,
+ },
};
#define MSM_SDC1_BASE 0xA0400000
diff --git a/arch/arm/mach-msm/devices-msm7x27a.c b/arch/arm/mach-msm/devices-msm7x27a.c
index 488db75..7008bd5 100644
--- a/arch/arm/mach-msm/devices-msm7x27a.c
+++ b/arch/arm/mach-msm/devices-msm7x27a.c
@@ -188,17 +188,29 @@
static struct resource msm_dmov_resource[] = {
{
- .start = INT_ADM_AARM,
- .end = (resource_size_t)MSM_DMOV_BASE,
- .flags = IORESOURCE_IRQ,
+ .start = INT_ADM_AARM,
+ .flags = IORESOURCE_IRQ,
+ },
+ {
+ .start = 0xA9700000,
+ .end = 0xA9700000 + SZ_4K - 1,
+ .flags = IORESOURCE_MEM,
},
};
+static struct msm_dmov_pdata msm_dmov_pdata = {
+ .sd = 3,
+ .sd_size = 0x400,
+};
+
struct platform_device msm_device_dmov = {
- .name = "msm_dmov",
- .id = -1,
- .resource = msm_dmov_resource,
- .num_resources = ARRAY_SIZE(msm_dmov_resource),
+ .name = "msm_dmov",
+ .id = -1,
+ .resource = msm_dmov_resource,
+ .num_resources = ARRAY_SIZE(msm_dmov_resource),
+ .dev = {
+ .platform_data = &msm_dmov_pdata,
+ },
};
struct platform_device msm_device_smd = {
diff --git a/arch/arm/mach-msm/devices-msm7x30.c b/arch/arm/mach-msm/devices-msm7x30.c
index d7832a3..d7fc93e 100644
--- a/arch/arm/mach-msm/devices-msm7x30.c
+++ b/arch/arm/mach-msm/devices-msm7x30.c
@@ -585,12 +585,21 @@
.id = -1,
};
-struct resource msm_dmov_resource[] = {
+static struct resource msm_dmov_resource[] = {
{
.start = INT_ADM_AARM,
- .end = (resource_size_t)MSM_DMOV_BASE,
.flags = IORESOURCE_IRQ,
},
+ {
+ .start = 0xAC400000,
+ .end = 0xAC400000 + SZ_4K - 1,
+ .flags = IORESOURCE_MEM,
+ },
+};
+
+static struct msm_dmov_pdata msm_dmov_pdata = {
+ .sd = 2,
+ .sd_size = 0x400,
};
struct platform_device msm_device_dmov = {
@@ -598,6 +607,9 @@
.id = -1,
.resource = msm_dmov_resource,
.num_resources = ARRAY_SIZE(msm_dmov_resource),
+ .dev = {
+ .platform_data = &msm_dmov_pdata,
+ },
};
#define MSM_SDC1_BASE 0xA0400000
diff --git a/arch/arm/mach-msm/devices-msm8x60.c b/arch/arm/mach-msm/devices-msm8x60.c
index 445f1d4..9f3e03d 100644
--- a/arch/arm/mach-msm/devices-msm8x60.c
+++ b/arch/arm/mach-msm/devices-msm8x60.c
@@ -1833,20 +1833,38 @@
.id = -1,
};
-struct resource msm_dmov_resource_adm0[] = {
+static struct resource msm_dmov_resource_adm0[] = {
{
.start = INT_ADM0_AARM,
- .end = (resource_size_t)MSM_DMOV_ADM0_BASE,
.flags = IORESOURCE_IRQ,
},
+ {
+ .start = 0x18320000,
+ .end = 0x18320000 + SZ_1M - 1,
+ .flags = IORESOURCE_MEM,
+ },
};
-struct resource msm_dmov_resource_adm1[] = {
+static struct resource msm_dmov_resource_adm1[] = {
{
.start = INT_ADM1_AARM,
- .end = (resource_size_t)MSM_DMOV_ADM1_BASE,
.flags = IORESOURCE_IRQ,
},
+ {
+ .start = 0x18420000,
+ .end = 0x18420000 + SZ_1M - 1,
+ .flags = IORESOURCE_MEM,
+ },
+};
+
+static struct msm_dmov_pdata msm_dmov_pdata_adm0 = {
+ .sd = 1,
+ .sd_size = 0x800,
+};
+
+static struct msm_dmov_pdata msm_dmov_pdata_adm1 = {
+ .sd = 1,
+ .sd_size = 0x800,
};
struct platform_device msm_device_dmov_adm0 = {
@@ -1854,6 +1872,9 @@
.id = 0,
.resource = msm_dmov_resource_adm0,
.num_resources = ARRAY_SIZE(msm_dmov_resource_adm0),
+ .dev = {
+ .platform_data = &msm_dmov_pdata_adm0,
+ },
};
struct platform_device msm_device_dmov_adm1 = {
@@ -1861,6 +1882,9 @@
.id = 1,
.resource = msm_dmov_resource_adm1,
.num_resources = ARRAY_SIZE(msm_dmov_resource_adm1),
+ .dev = {
+ .platform_data = &msm_dmov_pdata_adm1,
+ },
};
/* MSM Video core device */
diff --git a/arch/arm/mach-msm/devices-qsd8x50.c b/arch/arm/mach-msm/devices-qsd8x50.c
index 5ae5b8b..2367719 100644
--- a/arch/arm/mach-msm/devices-qsd8x50.c
+++ b/arch/arm/mach-msm/devices-qsd8x50.c
@@ -438,12 +438,21 @@
.id = -1,
};
-struct resource msm_dmov_resource[] = {
+static struct resource msm_dmov_resource[] = {
{
.start = INT_ADM_AARM,
- .end = (resource_size_t)MSM_DMOV_BASE,
.flags = IORESOURCE_IRQ,
},
+ {
+ .start = 0xA9700000,
+ .end = 0xA9700000 + SZ_4K - 1,
+ .flags = IORESOURCE_MEM,
+ },
+};
+
+static struct msm_dmov_pdata msm_dmov_pdata = {
+ .sd = 3,
+ .sd_size = 0x400,
};
struct platform_device msm_device_dmov = {
@@ -451,6 +460,9 @@
.id = -1,
.resource = msm_dmov_resource,
.num_resources = ARRAY_SIZE(msm_dmov_resource),
+ .dev = {
+ .platform_data = &msm_dmov_pdata,
+ },
};
#define MSM_SDC1_BASE 0xA0300000
diff --git a/arch/arm/mach-msm/devices.h b/arch/arm/mach-msm/devices.h
index 458b00d..1748838 100644
--- a/arch/arm/mach-msm/devices.h
+++ b/arch/arm/mach-msm/devices.h
@@ -187,7 +187,6 @@
struct platform_device *msm_add_gsbi9_uart(void);
extern struct platform_device msm_device_touchscreen;
-extern struct pil_device peripheral_dsps;
extern struct platform_device led_pdev;
extern struct platform_device ion_dev;
diff --git a/arch/arm/mach-msm/dma.c b/arch/arm/mach-msm/dma.c
index ddf7732..ad1aecd 100644
--- a/arch/arm/mach-msm/dma.c
+++ b/arch/arm/mach-msm/dma.c
@@ -57,6 +57,8 @@
struct msm_dmov_crci_conf *crci_conf;
struct msm_dmov_chan_conf *chan_conf;
int channel_active;
+ int sd;
+ size_t sd_size;
struct list_head ready_commands[MSM_DMOV_CHANNEL_COUNT];
struct list_head active_commands[MSM_DMOV_CHANNEL_COUNT];
spinlock_t lock;
@@ -185,7 +187,8 @@
#endif
#define MSM_DMOV_ID_COUNT (MSM_DMOV_CHANNEL_COUNT * ARRAY_SIZE(dmov_conf))
-#define DMOV_REG(name, adm) ((name) + (dmov_conf[adm].base))
+#define DMOV_REG(name, adm) ((name) + (dmov_conf[adm].base) +\
+ (dmov_conf[adm].sd * dmov_conf[adm].sd_size))
#define DMOV_ID_TO_ADM(id) ((id) / MSM_DMOV_CHANNEL_COUNT)
#define DMOV_ID_TO_CHAN(id) ((id) % MSM_DMOV_CHANNEL_COUNT)
#define DMOV_CHAN_ADM_TO_ID(ch, adm) ((ch) + (adm) * MSM_DMOV_CHANNEL_COUNT)
@@ -620,33 +623,46 @@
int adm = (pdev->id >= 0) ? pdev->id : 0;
int i;
int ret;
- struct resource *res =
+ struct msm_dmov_pdata *pdata = pdev->dev.platform_data;
+ struct resource *irqres =
platform_get_resource(pdev, IORESOURCE_IRQ, 0);
+ struct resource *mres =
+ platform_get_resource(pdev, IORESOURCE_MEM, 0);
- if (res) {
- dmov_conf[adm].irq = res->start;
- dmov_conf[adm].base = (void *)res->end;
+ if (pdata) {
+ dmov_conf[adm].sd = pdata->sd;
+ dmov_conf[adm].sd_size = pdata->sd_size;
}
- if (!dmov_conf[adm].base || !dmov_conf[adm].irq)
+ if (!dmov_conf[adm].sd_size)
return -ENXIO;
+ if (!irqres || !irqres->start)
+ return -ENXIO;
+ dmov_conf[adm].irq = irqres->start;
+
+ if (!mres || !mres->start)
+ return -ENXIO;
+ dmov_conf[adm].base = ioremap_nocache(mres->start, resource_size(mres));
+ if (!dmov_conf[adm].base)
+ return -ENOMEM;
+
ret = request_irq(dmov_conf[adm].irq, msm_datamover_irq_handler,
0, "msmdatamover", NULL);
if (ret) {
PRINT_ERROR("Requesting ADM%d irq %d failed\n", adm,
dmov_conf[adm].irq);
- return ret;
+ goto out_map;
}
disable_irq(dmov_conf[adm].irq);
ret = msm_dmov_init_clocks(pdev);
if (ret) {
PRINT_ERROR("Requesting ADM%d clocks failed\n", adm);
- return -ENOENT;
+ goto out_irq;
}
ret = msm_dmov_clk_toggle(adm, 1);
if (ret) {
PRINT_ERROR("Enabling ADM%d clocks failed\n", adm);
- return -ENOENT;
+ goto out_irq;
}
config_datamover(adm);
@@ -661,6 +677,11 @@
wmb();
msm_dmov_clk_toggle(adm, 0);
return ret;
+out_irq:
+ free_irq(dmov_conf[adm].irq, NULL);
+out_map:
+ iounmap(dmov_conf[adm].base);
+ return ret;
}
static struct platform_driver msm_dmov_driver = {
diff --git a/arch/arm/mach-msm/include/mach/board.h b/arch/arm/mach-msm/include/mach/board.h
index 349b2d0..bc41915 100644
--- a/arch/arm/mach-msm/include/mach/board.h
+++ b/arch/arm/mach-msm/include/mach/board.h
@@ -415,6 +415,7 @@
void __init msm_map_qsd8x50_io(void);
void __init msm_map_msm8x60_io(void);
void __init msm_map_msm8960_io(void);
+void __init msm_map_msm8930_io(void);
void __init msm_map_apq8064_io(void);
void __init msm_map_msm7x30_io(void);
void __init msm_map_fsm9xxx_io(void);
diff --git a/arch/arm/mach-msm/include/mach/dma-fsm9xxx.h b/arch/arm/mach-msm/include/mach/dma-fsm9xxx.h
index 300ee87..e284267 100644
--- a/arch/arm/mach-msm/include/mach/dma-fsm9xxx.h
+++ b/arch/arm/mach-msm/include/mach/dma-fsm9xxx.h
@@ -13,12 +13,6 @@
#ifndef __ASM_ARCH_MSM_DMA_FSM9XXX_H
#define __ASM_ARCH_MSM_DMA_FSM9XXX_H
-#define DMOV_SD_SIZE 0x1400
-#define DMOV_SD_MASTER 0
-#define DMOV_SD_AARM 3
-#define DMOV_SD_MASTER_ADDR(off, ch) DMOV_ADDR(off, ch, DMOV_SD_MASTER)
-#define DMOV_SD_AARM_ADDR(off, ch) DMOV_ADDR(off, ch, DMOV_SD_AARM)
-
/* DMA channels allocated to Scorpion */
#define DMOV_GP_CHAN 4
#define DMOV_CE1_IN_CHAN 5
diff --git a/arch/arm/mach-msm/include/mach/dma.h b/arch/arm/mach-msm/include/mach/dma.h
index 9c331a4..1474fcb 100644
--- a/arch/arm/mach-msm/include/mach/dma.h
+++ b/arch/arm/mach-msm/include/mach/dma.h
@@ -38,6 +38,11 @@
void *user; /* Pointer for caller's reference */
};
+struct msm_dmov_pdata {
+ int sd;
+ size_t sd_size;
+};
+
void msm_dmov_enqueue_cmd(unsigned id, struct msm_dmov_cmd *cmd);
void msm_dmov_enqueue_cmd_ext(unsigned id, struct msm_dmov_cmd *cmd);
void msm_dmov_stop_cmd(unsigned id, struct msm_dmov_cmd *cmd, int graceful);
@@ -46,64 +51,37 @@
#define DMOV_CRCIS_PER_CONF 10
-#define DMOV_ADDR(off, ch, sd) ((DMOV_SD_SIZE*(sd)) + (off) + ((ch) << 2))
-#define DMOV_SD0(off, ch) DMOV_ADDR(off, ch, 0)
-#define DMOV_SD1(off, ch) DMOV_ADDR(off, ch, 1)
-#define DMOV_SD2(off, ch) DMOV_ADDR(off, ch, 2)
-#define DMOV_SD3(off, ch) DMOV_ADDR(off, ch, 3)
+#define DMOV_ADDR(off, ch) ((off) + ((ch) << 2))
-#if defined(CONFIG_ARCH_MSM7X30)
-#define DMOV_SD_SIZE 0x400
-#define DMOV_SD_AARM 2
-#elif defined(CONFIG_ARCH_MSM8960) || defined(CONFIG_ARCH_MSM9615)
-#define DMOV_SD_SIZE 0x800
-#define DMOV_SD_AARM 1
-#elif defined(CONFIG_ARCH_APQ8064)
-#define DMOV_SD_SIZE 0x800
-#define DMOV_SD_AARM 0
-#elif defined(CONFIG_MSM_ADM3)
-#define DMOV_SD_SIZE 0x800
-#define DMOV_SD_MASTER 1
-#define DMOV_SD_AARM 1
-#define DMOV_SD_MASTER_ADDR(off, ch) DMOV_ADDR(off, ch, DMOV_SD_MASTER)
-#elif defined(CONFIG_ARCH_FSM9XXX)
-/* defined in dma-fsm9xxx.h */
-#else
-#define DMOV_SD_SIZE 0x400
-#define DMOV_SD_AARM 3
-#endif
-
-#define DMOV_SD_AARM_ADDR(off, ch) DMOV_ADDR(off, ch, DMOV_SD_AARM)
-
-#define DMOV_CMD_PTR(ch) DMOV_SD_AARM_ADDR(0x000, ch)
+#define DMOV_CMD_PTR(ch) DMOV_ADDR(0x000, ch)
#define DMOV_CMD_LIST (0 << 29) /* does not work */
#define DMOV_CMD_PTR_LIST (1 << 29) /* works */
#define DMOV_CMD_INPUT_CFG (2 << 29) /* untested */
#define DMOV_CMD_OUTPUT_CFG (3 << 29) /* untested */
#define DMOV_CMD_ADDR(addr) ((addr) >> 3)
-#define DMOV_RSLT(ch) DMOV_SD_AARM_ADDR(0x040, ch)
+#define DMOV_RSLT(ch) DMOV_ADDR(0x040, ch)
#define DMOV_RSLT_VALID (1 << 31) /* 0 == host has empties result fifo */
#define DMOV_RSLT_ERROR (1 << 3)
#define DMOV_RSLT_FLUSH (1 << 2)
#define DMOV_RSLT_DONE (1 << 1) /* top pointer done */
#define DMOV_RSLT_USER (1 << 0) /* command with FR force result */
-#define DMOV_FLUSH0(ch) DMOV_SD_AARM_ADDR(0x080, ch)
-#define DMOV_FLUSH1(ch) DMOV_SD_AARM_ADDR(0x0C0, ch)
-#define DMOV_FLUSH2(ch) DMOV_SD_AARM_ADDR(0x100, ch)
-#define DMOV_FLUSH3(ch) DMOV_SD_AARM_ADDR(0x140, ch)
-#define DMOV_FLUSH4(ch) DMOV_SD_AARM_ADDR(0x180, ch)
-#define DMOV_FLUSH5(ch) DMOV_SD_AARM_ADDR(0x1C0, ch)
+#define DMOV_FLUSH0(ch) DMOV_ADDR(0x080, ch)
+#define DMOV_FLUSH1(ch) DMOV_ADDR(0x0C0, ch)
+#define DMOV_FLUSH2(ch) DMOV_ADDR(0x100, ch)
+#define DMOV_FLUSH3(ch) DMOV_ADDR(0x140, ch)
+#define DMOV_FLUSH4(ch) DMOV_ADDR(0x180, ch)
+#define DMOV_FLUSH5(ch) DMOV_ADDR(0x1C0, ch)
#define DMOV_FLUSH_TYPE (1 << 31)
-#define DMOV_STATUS(ch) DMOV_SD_AARM_ADDR(0x200, ch)
+#define DMOV_STATUS(ch) DMOV_ADDR(0x200, ch)
#define DMOV_STATUS_RSLT_COUNT(n) (((n) >> 29))
#define DMOV_STATUS_CMD_COUNT(n) (((n) >> 27) & 3)
#define DMOV_STATUS_RSLT_VALID (1 << 1)
#define DMOV_STATUS_CMD_PTR_RDY (1 << 0)
-#define DMOV_CONF(ch) DMOV_SD_MASTER_ADDR(0x240, ch)
+#define DMOV_CONF(ch) DMOV_ADDR(0x240, ch)
#define DMOV_CONF_SD(sd) (((sd & 4) << 11) | ((sd & 3) << 4))
#define DMOV_CONF_IRQ_EN (1 << 6)
#define DMOV_CONF_FORCE_RSLT_EN (1 << 7)
@@ -111,28 +89,28 @@
#define DMOV_CONF_MPU_DISABLE (1 << 11)
#define DMOV_CONF_PRIORITY(n) (n << 0)
-#define DMOV_DBG_ERR(ci) DMOV_SD_MASTER_ADDR(0x280, ci)
+#define DMOV_DBG_ERR(ci) DMOV_ADDR(0x280, ci)
-#define DMOV_RSLT_CONF(ch) DMOV_SD_AARM_ADDR(0x300, ch)
+#define DMOV_RSLT_CONF(ch) DMOV_ADDR(0x300, ch)
#define DMOV_RSLT_CONF_FORCE_TOP_PTR_RSLT (1 << 2)
#define DMOV_RSLT_CONF_FORCE_FLUSH_RSLT (1 << 1)
#define DMOV_RSLT_CONF_IRQ_EN (1 << 0)
-#define DMOV_ISR DMOV_SD_AARM_ADDR(0x380, 0)
+#define DMOV_ISR DMOV_ADDR(0x380, 0)
-#define DMOV_CI_CONF(ci) DMOV_SD_MASTER_ADDR(0x390, ci)
+#define DMOV_CI_CONF(ci) DMOV_ADDR(0x390, ci)
#define DMOV_CI_CONF_RANGE_END(n) ((n) << 24)
#define DMOV_CI_CONF_RANGE_START(n) ((n) << 16)
#define DMOV_CI_CONF_MAX_BURST(n) ((n) << 0)
-#define DMOV_CI_DBG_ERR(ci) DMOV_SD_MASTER_ADDR(0x3B0, ci)
+#define DMOV_CI_DBG_ERR(ci) DMOV_ADDR(0x3B0, ci)
-#define DMOV_CRCI_CONF0 DMOV_SD_MASTER_ADDR(0x3D0, 0)
-#define DMOV_CRCI_CONF1 DMOV_SD_MASTER_ADDR(0x3D4, 0)
+#define DMOV_CRCI_CONF0 DMOV_ADDR(0x3D0, 0)
+#define DMOV_CRCI_CONF1 DMOV_ADDR(0x3D4, 0)
#define DMOV_CRCI_CONF0_SD(crci, sd) (sd << (crci*3))
#define DMOV_CRCI_CONF1_SD(crci, sd) (sd << ((crci-DMOV_CRCIS_PER_CONF)*3))
-#define DMOV_CRCI_CTL(crci) DMOV_SD_AARM_ADDR(0x400, crci)
+#define DMOV_CRCI_CTL(crci) DMOV_ADDR(0x400, crci)
#define DMOV_CRCI_CTL_BLK_SZ(n) ((n) << 0)
#define DMOV_CRCI_CTL_RST (1 << 17)
#define DMOV_CRCI_MUX (1 << 18)
diff --git a/arch/arm/mach-msm/include/mach/irqs-8930.h b/arch/arm/mach-msm/include/mach/irqs-8930.h
new file mode 100644
index 0000000..ed927bd
--- /dev/null
+++ b/arch/arm/mach-msm/include/mach/irqs-8930.h
@@ -0,0 +1,292 @@
+/* Copyright (c) 2011, Code Aurora Forum. All rights reserved.
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License version 2 and
+ * only version 2 as published by the Free Software Foundation.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ */
+
+#ifndef __ASM_ARCH_MSM_IRQS_8930_H
+#define __ASM_ARCH_MSM_IRQS_8930_H
+
+/* MSM ACPU Interrupt Numbers */
+
+/* 0-15: STI/SGI (software triggered/generated interrupts)
+ 16-31: PPI (private peripheral interrupts)
+ 32+: SPI (shared peripheral interrupts) */
+
+#define GIC_PPI_START 16
+#define GIC_SPI_START 32
+
+#define INT_VGIC (GIC_PPI_START + 0)
+#define INT_DEBUG_TIMER_EXP (GIC_PPI_START + 1)
+#define INT_GP_TIMER_EXP (GIC_PPI_START + 2)
+#define INT_GP_TIMER2_EXP (GIC_PPI_START + 3)
+#define WDT0_ACCSCSSNBARK_INT (GIC_PPI_START + 4)
+#define WDT1_ACCSCSSNBARK_INT (GIC_PPI_START + 5)
+#define AVS_SVICINT (GIC_PPI_START + 6)
+#define AVS_SVICINTSWDONE (GIC_PPI_START + 7)
+#define CPU_DBGCPUXCOMMRXFULL (GIC_PPI_START + 8)
+#define CPU_DBGCPUXCOMMTXEMPTY (GIC_PPI_START + 9)
+#define INT_ARMQC_PERFMON (GIC_PPI_START + 10)
+#define SC_AVSCPUXDOWN (GIC_PPI_START + 11)
+#define SC_AVSCPUXUP (GIC_PPI_START + 12)
+#define SC_SICCPUXACGIRPTREQ (GIC_PPI_START + 13)
+#define SC_SICCPUXEXTFAULTIRPTREQ (GIC_PPI_START + 14)
+/* PPI 15 is unused */
+
+#define APCC_QGICACGIRPTREQ (GIC_SPI_START + 0)
+#define APCC_QGICL2PERFMONIRPTREQ (GIC_SPI_START + 1)
+#define SC_SICL2PERFMONIRPTREQ APCC_QGICL2PERFMONIRPTREQ
+#define APCC_QGICL2IRPTREQ (GIC_SPI_START + 2)
+#define APCC_QGICMPUIRPTREQ (GIC_SPI_START + 3)
+#define TLMM_MSM_DIR_CONN_IRQ_0 (GIC_SPI_START + 4)
+#define TLMM_MSM_DIR_CONN_IRQ_1 (GIC_SPI_START + 5)
+#define TLMM_MSM_DIR_CONN_IRQ_2 (GIC_SPI_START + 6)
+#define TLMM_MSM_DIR_CONN_IRQ_3 (GIC_SPI_START + 7)
+#define TLMM_MSM_DIR_CONN_IRQ_4 (GIC_SPI_START + 8)
+#define TLMM_MSM_DIR_CONN_IRQ_5 (GIC_SPI_START + 9)
+#define TLMM_MSM_DIR_CONN_IRQ_6 (GIC_SPI_START + 10)
+#define TLMM_MSM_DIR_CONN_IRQ_7 (GIC_SPI_START + 11)
+#define TLMM_MSM_DIR_CONN_IRQ_8 (GIC_SPI_START + 12)
+#define TLMM_MSM_DIR_CONN_IRQ_9 (GIC_SPI_START + 13)
+#define PM8921_SEC_IRQ_103 (GIC_SPI_START + 14)
+#define PM8018_SEC_IRQ_106 (GIC_SPI_START + 15)
+#define TLMM_MSM_SUMMARY_IRQ (GIC_SPI_START + 16)
+#define SPDM_RT_1_IRQ (GIC_SPI_START + 17)
+#define SPDM_DIAG_IRQ (GIC_SPI_START + 18)
+#define RPM_APCC_CPU0_GP_HIGH_IRQ (GIC_SPI_START + 19)
+#define RPM_APCC_CPU0_GP_MEDIUM_IRQ (GIC_SPI_START + 20)
+#define RPM_APCC_CPU0_GP_LOW_IRQ (GIC_SPI_START + 21)
+#define RPM_APCC_CPU0_WAKE_UP_IRQ (GIC_SPI_START + 22)
+#define RPM_APCC_CPU1_GP_HIGH_IRQ (GIC_SPI_START + 23)
+#define RPM_APCC_CPU1_GP_MEDIUM_IRQ (GIC_SPI_START + 24)
+#define RPM_APCC_CPU1_GP_LOW_IRQ (GIC_SPI_START + 25)
+#define RPM_APCC_CPU1_WAKE_UP_IRQ (GIC_SPI_START + 26)
+#define SSBI2_2_SC_CPU0_SECURE_IRQ (GIC_SPI_START + 27)
+#define SSBI2_2_SC_CPU0_NON_SECURE_IRQ (GIC_SPI_START + 28)
+#define SSBI2_1_SC_CPU0_SECURE_IRQ (GIC_SPI_START + 29)
+#define SSBI2_1_SC_CPU0_NON_SECURE_IRQ (GIC_SPI_START + 30)
+#define MSMC_SC_SEC_CE_IRQ (GIC_SPI_START + 31)
+#define MSMC_SC_PRI_CE_IRQ (GIC_SPI_START + 32)
+#define SLIMBUS0_CORE_EE1_IRQ (GIC_SPI_START + 33)
+#define SLIMBUS0_BAM_EE1_IRQ (GIC_SPI_START + 34)
+#define Q6FW_WDOG_EXPIRED_IRQ (GIC_SPI_START + 35)
+#define Q6SW_WDOG_EXPIRED_IRQ (GIC_SPI_START + 36)
+#define MSS_TO_APPS_IRQ_0 (GIC_SPI_START + 37)
+#define MSS_TO_APPS_IRQ_1 (GIC_SPI_START + 38)
+#define MSS_TO_APPS_IRQ_2 (GIC_SPI_START + 39)
+#define MSS_TO_APPS_IRQ_3 (GIC_SPI_START + 40)
+#define MSS_TO_APPS_IRQ_4 (GIC_SPI_START + 41)
+#define MSS_TO_APPS_IRQ_5 (GIC_SPI_START + 42)
+#define MSS_TO_APPS_IRQ_6 (GIC_SPI_START + 43)
+#define MSS_TO_APPS_IRQ_7 (GIC_SPI_START + 44)
+#define MSS_TO_APPS_IRQ_8 (GIC_SPI_START + 45)
+#define MSS_TO_APPS_IRQ_9 (GIC_SPI_START + 46)
+#define VPE_IRQ (GIC_SPI_START + 47)
+#define VFE_IRQ (GIC_SPI_START + 48)
+#define VCODEC_IRQ (GIC_SPI_START + 49)
+/* SPI IRQ 50 is unused */
+#define SMMU_VPE_CB_SC_SECURE_IRQ (GIC_SPI_START + 51)
+#define SMMU_VPE_CB_SC_NON_SECURE_IRQ (GIC_SPI_START + 52)
+#define SMMU_VFE_CB_SC_SECURE_IRQ (GIC_SPI_START + 53)
+#define SMMU_VFE_CB_SC_NON_SECURE_IRQ (GIC_SPI_START + 54)
+#define SMMU_VCODEC_B_CB_SC_SECURE_IRQ (GIC_SPI_START + 55)
+#define SMMU_VCODEC_B_CB_SC_NON_SECURE_IRQ (GIC_SPI_START + 56)
+#define SMMU_VCODEC_A_CB_SC_SECURE_IRQ (GIC_SPI_START + 57)
+#define SMMU_VCODEC_A_CB_SC_NON_SECURE_IRQ (GIC_SPI_START + 58)
+#define SMMU_ROT_CB_SC_SECURE_IRQ (GIC_SPI_START + 59)
+#define SMMU_ROT_CB_SC_NON_SECURE_IRQ (GIC_SPI_START + 60)
+#define SMMU_MDP1_CB_SC_SECURE_IRQ (GIC_SPI_START + 61)
+#define SMMU_MDP1_CB_SC_NON_SECURE_IRQ (GIC_SPI_START + 62)
+#define SMMU_MDP0_CB_SC_SECURE_IRQ (GIC_SPI_START + 63)
+#define SMMU_MDP0_CB_SC_NON_SECURE_IRQ (GIC_SPI_START + 64)
+/* SPI IRQ 65 is unused */
+/* SPI IRQ 66 is unused */
+#define SMMU_IJPEG_CB_SC_SECURE_IRQ (GIC_SPI_START + 67)
+#define SMMU_IJPEG_CB_SC_NON_SECURE_IRQ (GIC_SPI_START + 68)
+#define SMMU_GFX3D_CB_SC_SECURE_IRQ (GIC_SPI_START + 69)
+#define SMMU_GFX3D_CB_SC_NON_SECURE_IRQ (GIC_SPI_START + 70)
+/* SPI IRQ 71 is unused */
+/* SPI IRQ 72 is unused */
+#define ROT_IRQ (GIC_SPI_START + 73)
+#define MMSS_FABRIC_IRQ (GIC_SPI_START + 74)
+#define MDP_IRQ (GIC_SPI_START + 75)
+/* SPI IRQ 76 is unused */
+#define JPEG_IRQ (GIC_SPI_START + 77)
+#define MMSS_IMEM_IRQ (GIC_SPI_START + 78)
+#define HDMI_IRQ (GIC_SPI_START + 79)
+#define GFX3D_IRQ (GIC_SPI_START + 80)
+/* SPI IRQ 81 is unused */
+#define DSI1_IRQ (GIC_SPI_START + 82)
+#define CSI_1_IRQ (GIC_SPI_START + 83)
+#define CSI_0_IRQ (GIC_SPI_START + 84)
+#define LPASS_SCSS_AUDIO_IF_OUT0_IRQ (GIC_SPI_START + 85)
+#define LPASS_SCSS_MIDI_IRQ (GIC_SPI_START + 86)
+#define LPASS_Q6SS_WDOG_EXPIRED (GIC_SPI_START + 87)
+#define LPASS_SCSS_GP_LOW_IRQ (GIC_SPI_START + 88)
+#define LPASS_SCSS_GP_MEDIUM_IRQ (GIC_SPI_START + 89)
+#define LPASS_SCSS_GP_HIGH_IRQ (GIC_SPI_START + 90)
+#define TOP_IMEM_IRQ (GIC_SPI_START + 91)
+#define FABRIC_SYS_IRQ (GIC_SPI_START + 92)
+#define FABRIC_APPS_IRQ (GIC_SPI_START + 93)
+#define USB1_HS_BAM_IRQ (GIC_SPI_START + 94)
+#define SDC4_BAM_IRQ (GIC_SPI_START + 95)
+#define SDC3_BAM_IRQ (GIC_SPI_START + 96)
+#define SDC2_BAM_IRQ (GIC_SPI_START + 97)
+#define SDC1_BAM_IRQ (GIC_SPI_START + 98)
+#define FABRIC_SPS_IRQ (GIC_SPI_START + 99)
+#define USB1_HS_IRQ (GIC_SPI_START + 100)
+#define SDC4_IRQ_0 (GIC_SPI_START + 101)
+#define SDC3_IRQ_0 (GIC_SPI_START + 102)
+#define SDC2_IRQ_0 (GIC_SPI_START + 103)
+#define SDC1_IRQ_0 (GIC_SPI_START + 104)
+#define SPS_BAM_DMA_IRQ (GIC_SPI_START + 105)
+#define SPS_SEC_VIOL_IRQ (GIC_SPI_START + 106)
+#define SPS_MTI_0 (GIC_SPI_START + 107)
+#define SPS_MTI_1 (GIC_SPI_START + 108)
+#define SPS_MTI_2 (GIC_SPI_START + 109)
+#define SPS_MTI_3 (GIC_SPI_START + 110)
+#define GPS_PPS_OUT (GIC_SPI_START + 111)
+#define SPS_MTI_5 (GIC_SPI_START + 112)
+#define SPS_MTI_6 (GIC_SPI_START + 113)
+#define SPS_MTI_7 (GIC_SPI_START + 114)
+#define SPS_MTI_8 (GIC_SPI_START + 115)
+#define TLMM_MSM_DIR_CONN_IRQ_11 (GIC_SPI_START + 116)
+#define TLMM_MSM_DIR_CONN_IRQ_10 (GIC_SPI_START + 117)
+#define BAM_DMA1 (GIC_SPI_START + 118)
+#define BAM_DMA2 (GIC_SPI_START + 119)
+#define SDC1_IRQ (GIC_SPI_START + 120)
+#define SDC2_IRQ (GIC_SPI_START + 121)
+#define SDC3_IRQ (GIC_SPI_START + 122)
+#define SPS_MTI_16 (GIC_SPI_START + 123)
+#define SPS_MTI_17 (GIC_SPI_START + 124)
+#define SPS_MTI_18 (GIC_SPI_START + 125)
+#define SPS_MTI_19 (GIC_SPI_START + 126)
+#define SPS_MTI_20 (GIC_SPI_START + 127)
+#define SPS_MTI_21 (GIC_SPI_START + 128)
+#define SPS_MTI_22 (GIC_SPI_START + 129)
+#define SPS_MTI_23 (GIC_SPI_START + 130)
+#define SPS_MTI_24 (GIC_SPI_START + 131)
+#define SPS_MTI_25 (GIC_SPI_START + 132)
+#define SPS_MTI_26 (GIC_SPI_START + 133)
+#define SPS_MTI_27 (GIC_SPI_START + 134)
+#define SPS_MTI_28 (GIC_SPI_START + 135)
+#define SPS_MTI_29 (GIC_SPI_START + 136)
+#define SPS_MTI_30 (GIC_SPI_START + 137)
+#define SPS_MTI_31 (GIC_SPI_START + 138)
+#define CSIPHY_4LN_IRQ (GIC_SPI_START + 139)
+#define MSM8930_CSIPHY_2LN_IRQ (GIC_SPI_START + 140)
+#define USB2_IRQ (GIC_SPI_START + 141)
+#define USB1_IRQ (GIC_SPI_START + 142)
+#define TSSC_SSBI_IRQ (GIC_SPI_START + 143)
+#define TSSC_SAMPLE_IRQ (GIC_SPI_START + 144)
+#define TSSC_PENUP_IRQ (GIC_SPI_START + 145)
+#define MSM8930_GSBI1_UARTDM_IRQ (GIC_SPI_START + 146)
+#define MSM8930_GSBI1_QUP_IRQ (GIC_SPI_START + 147)
+#define MSM8930_GSBI2_UARTDM_IRQ (GIC_SPI_START + 148)
+#define MSM8930_GSBI2_QUP_IRQ (GIC_SPI_START + 149)
+#define GSBI3_UARTDM_IRQ (GIC_SPI_START + 150)
+#define GSBI3_QUP_IRQ (GIC_SPI_START + 151)
+#define GSBI4_UARTDM_IRQ (GIC_SPI_START + 152)
+#define GSBI4_QUP_IRQ (GIC_SPI_START + 153)
+#define GSBI5_UARTDM_IRQ (GIC_SPI_START + 154)
+#define GSBI5_QUP_IRQ (GIC_SPI_START + 155)
+#define GSBI6_UARTDM_IRQ (GIC_SPI_START + 156)
+#define GSBI6_QUP_IRQ (GIC_SPI_START + 157)
+#define GSBI7_UARTDM_IRQ (GIC_SPI_START + 158)
+#define GSBI7_QUP_IRQ (GIC_SPI_START + 159)
+#define GSBI8_UARTDM_IRQ (GIC_SPI_START + 160)
+#define GSBI8_QUP_IRQ (GIC_SPI_START + 161)
+#define TSIF_TSPP_IRQ (GIC_SPI_START + 162)
+#define TSIF_BAM_IRQ (GIC_SPI_START + 163)
+#define TSIF2_IRQ (GIC_SPI_START + 164)
+#define TSIF1_IRQ (GIC_SPI_START + 165)
+/* SPI IRQ 166 is unused */
+#define ISPIF_IRQ (GIC_SPI_START + 167)
+#define MSMC_SC_SEC_TMR_IRQ (GIC_SPI_START + 168)
+#define MSMC_SC_SEC_WDOG_BARK_IRQ (GIC_SPI_START + 169)
+#define ADM_0_SCSS_0_IRQ (GIC_SPI_START + 170)
+#define ADM_0_SCSS_1_IRQ (GIC_SPI_START + 171)
+#define ADM_0_SCSS_2_IRQ (GIC_SPI_START + 172)
+#define ADM_0_SCSS_3_IRQ (GIC_SPI_START + 173)
+#define CC_SCSS_WDT1CPU1BITEEXPIRED (GIC_SPI_START + 174)
+#define CC_SCSS_WDT1CPU0BITEEXPIRED (GIC_SPI_START + 175)
+#define CC_SCSS_WDT0CPU1BITEEXPIRED (GIC_SPI_START + 176)
+#define CC_SCSS_WDT0CPU0BITEEXPIRED (GIC_SPI_START + 177)
+#define TSENS_UPPER_LOWER_INT (GIC_SPI_START + 178)
+#define SSBI2_2_SC_CPU1_SECURE_INT (GIC_SPI_START + 179)
+#define SSBI2_2_SC_CPU1_NON_SECURE_INT (GIC_SPI_START + 180)
+#define SSBI2_1_SC_CPU1_SECURE_INT (GIC_SPI_START + 181)
+#define SSBI2_1_SC_CPU1_NON_SECURE_INT (GIC_SPI_START + 182)
+#define XPU_SUMMARY_IRQ (GIC_SPI_START + 183)
+#define BUS_EXCEPTION_SUMMARY_IRQ (GIC_SPI_START + 184)
+#define HSDDRX_EBI1CH0_IRQ (GIC_SPI_START + 185)
+/* SPI IRQ 186 is unused */
+#define SDC5_BAM_IRQ (GIC_SPI_START + 187)
+#define SDC5_IRQ_0 (GIC_SPI_START + 188)
+#define GSBI9_UARTDM_IRQ (GIC_SPI_START + 189)
+#define GSBI9_QUP_IRQ (GIC_SPI_START + 190)
+#define GSBI10_UARTDM_IRQ (GIC_SPI_START + 191)
+#define GSBI10_QUP_IRQ (GIC_SPI_START + 192)
+#define GSBI11_UARTDM_IRQ (GIC_SPI_START + 193)
+#define GSBI11_QUP_IRQ (GIC_SPI_START + 194)
+#define GSBI12_UARTDM_IRQ (GIC_SPI_START + 195)
+#define GSBI12_QUP_IRQ (GIC_SPI_START + 196)
+#define RIVA_APSS_LTECOEX_IRQ (GIC_SPI_START + 197)
+#define RIVA_APSS_SPARE_IRQ (GIC_SPI_START + 198)
+#define RIVA_APSS_WDOG_BITE_RESET_RDY_IRQ (GIC_SPI_START + 199)
+#define RIVA_APSS_RESET_DONE_IRQ (GIC_SPI_START + 200)
+#define RIVA_APSS_ASIC_IRQ (GIC_SPI_START + 201)
+#define RIVA_APPS_WLAN_RX_DATA_AVAIL_IRQ (GIC_SPI_START + 202)
+#define RIVA_APPS_WLAN_DATA_XFER_DONE_IRQ (GIC_SPI_START + 203)
+#define RIVA_APPS_WLAN_SMSM_IRQ (GIC_SPI_START + 204)
+#define RIVA_APPS_LOG_CTRL_IRQ (GIC_SPI_START + 205)
+#define RIVA_APPS_FM_CTRL_IRQ (GIC_SPI_START + 206)
+#define RIVA_APPS_HCI_IRQ (GIC_SPI_START + 207)
+#define RIVA_APPS_WLAN_CTRL_IRQ (GIC_SPI_START + 208)
+#define A2_BAM_IRQ (GIC_SPI_START + 209)
+/* SPI IRQ 210 is unused */
+/* SPI IRQ 211 is unused */
+/* SPI IRQ 212 is unused */
+#define PPSS_WDOG_TIMER_IRQ (GIC_SPI_START + 213)
+#define SPS_SLIMBUS_CORE_EE0_IRQ (GIC_SPI_START + 214)
+#define SPS_SLIMBUS_BAM_EE0_IRQ (GIC_SPI_START + 215)
+#define QDSS_ETB_IRQ (GIC_SPI_START + 216)
+#define QDSS_CTI2KPSS_CPU1_IRQ (GIC_SPI_START + 217)
+#define QDSS_CTI2KPSS_CPU0_IRQ (GIC_SPI_START + 218)
+#define TLMM_MSM_DIR_CONN_IRQ_16 (GIC_SPI_START + 219)
+#define TLMM_MSM_DIR_CONN_IRQ_17 (GIC_SPI_START + 220)
+#define TLMM_MSM_DIR_CONN_IRQ_18 (GIC_SPI_START + 221)
+#define TLMM_MSM_DIR_CONN_IRQ_19 (GIC_SPI_START + 222)
+#define TLMM_MSM_DIR_CONN_IRQ_20 (GIC_SPI_START + 223)
+#define TLMM_MSM_DIR_CONN_IRQ_21 (GIC_SPI_START + 224)
+#define PM8921_SEC_IRQ_104 (GIC_SPI_START + 225)
+#define PM8018_SEC_IRQ_107 (GIC_SPI_START + 226)
+#define USB_HSIC_IRQ (GIC_SPI_START + 229)
+#define CE2_BAM_XPU_IRQ (GIC_SPI_START + 230)
+#define CE1_BAM_XPU_IRQ (GIC_SPI_START + 231)
+#define GFX3D_VBIF_IRPT (GIC_SPI_START + 232)
+#define RBIF_IRQ_0 (GIC_SPI_START + 233)
+#define RBIF_IRQ_1 (GIC_SPI_START + 234)
+#define RBIF_IRQ_2 (GIC_SPI_START + 235)
+
+/* Backwards compatible IRQ macros. */
+#define INT_ADM_AARM ADM_0_SCSS_0_IRQ
+
+/* smd/smsm interrupts */
+#define INT_A9_M2A_0 (GIC_SPI_START + 37) /*MSS_TO_APPS_IRQ_0*/
+#define INT_A9_M2A_5 (GIC_SPI_START + 38) /*MSS_TO_APPS_IRQ_1*/
+#define INT_ADSP_A11 LPASS_SCSS_GP_HIGH_IRQ
+#define INT_ADSP_A11_SMSM LPASS_SCSS_GP_MEDIUM_IRQ
+#define INT_DSPS_A11 SPS_MTI_31
+#define INT_DSPS_A11_SMSM SPS_MTI_30
+#define INT_WCNSS_A11 RIVA_APSS_SPARE_IRQ
+#define INT_WCNSS_A11_SMSM RIVA_APPS_WLAN_SMSM_IRQ
+
+#endif
+
diff --git a/arch/arm/mach-msm/include/mach/irqs.h b/arch/arm/mach-msm/include/mach/irqs.h
index f38eddb..b086bff 100644
--- a/arch/arm/mach-msm/include/mach/irqs.h
+++ b/arch/arm/mach-msm/include/mach/irqs.h
@@ -19,12 +19,17 @@
#define MSM_IRQ_BIT(irq) (1 << ((irq) & 31))
-#if defined(CONFIG_ARCH_MSM8960) || defined(CONFIG_ARCH_APQ8064)
+#if defined(CONFIG_ARCH_MSM8960) || defined(CONFIG_ARCH_APQ8064) || \
+ defined(CONFIG_ARCH_MSM8930)
#ifdef CONFIG_ARCH_MSM8960
#include "irqs-8960.h"
#endif
+#ifdef CONFIG_ARCH_MSM8930
+#include "irqs-8930.h"
+#endif
+
#ifdef CONFIG_ARCH_APQ8064
#include "irqs-8064.h"
#endif
diff --git a/arch/arm/mach-msm/include/mach/msm_iomap-7x00.h b/arch/arm/mach-msm/include/mach/msm_iomap-7x00.h
index 571391b..d1aef0a 100644
--- a/arch/arm/mach-msm/include/mach/msm_iomap-7x00.h
+++ b/arch/arm/mach-msm/include/mach/msm_iomap-7x00.h
@@ -58,10 +58,6 @@
#define MSM_GPT_BASE MSM_TMR_BASE
#define MSM_DGT_BASE (MSM_TMR_BASE + 0x10)
-#define MSM_DMOV_BASE IOMEM(0xF8002000)
-#define MSM_DMOV_PHYS 0xA9700000
-#define MSM_DMOV_SIZE SZ_4K
-
#define MSM_GPIO1_BASE IOMEM(0xF8003000)
#define MSM_GPIO1_PHYS 0xA9200000
#define MSM_GPIO1_SIZE SZ_4K
diff --git a/arch/arm/mach-msm/include/mach/msm_iomap-7x30.h b/arch/arm/mach-msm/include/mach/msm_iomap-7x30.h
index fce9e35..e49e870 100644
--- a/arch/arm/mach-msm/include/mach/msm_iomap-7x30.h
+++ b/arch/arm/mach-msm/include/mach/msm_iomap-7x30.h
@@ -47,10 +47,6 @@
#define MSM_TMR_BASE MSM_CSR_BASE
#define MSM_TMR_SIZE SZ_4K
-#define MSM_DMOV_BASE IOMEM(0xFA002000)
-#define MSM_DMOV_PHYS 0xAC400000
-#define MSM_DMOV_SIZE SZ_4K
-
#define MSM_GPIO1_BASE IOMEM(0xFA003000)
#define MSM_GPIO1_PHYS 0xAC001000
#define MSM_GPIO1_SIZE SZ_4K
diff --git a/arch/arm/mach-msm/include/mach/msm_iomap-7xxx.h b/arch/arm/mach-msm/include/mach/msm_iomap-7xxx.h
index 1fb9d0e..da0c54c 100644
--- a/arch/arm/mach-msm/include/mach/msm_iomap-7xxx.h
+++ b/arch/arm/mach-msm/include/mach/msm_iomap-7xxx.h
@@ -47,10 +47,6 @@
#define MSM_TMR_BASE MSM_CSR_BASE
#define MSM_TMR_SIZE SZ_4K
-#define MSM_DMOV_BASE IOMEM(0xFA002000)
-#define MSM_DMOV_PHYS 0xA9700000
-#define MSM_DMOV_SIZE SZ_4K
-
#define MSM_GPIO1_BASE IOMEM(0xFA003000)
#define MSM_GPIO1_PHYS 0xA9200000
#define MSM_GPIO1_SIZE SZ_4K
diff --git a/arch/arm/mach-msm/include/mach/msm_iomap-8064.h b/arch/arm/mach-msm/include/mach/msm_iomap-8064.h
index 665ccd0..7f5bd75 100644
--- a/arch/arm/mach-msm/include/mach/msm_iomap-8064.h
+++ b/arch/arm/mach-msm/include/mach/msm_iomap-8064.h
@@ -44,9 +44,6 @@
#define APQ8064_QGIC_CPU_PHYS 0x02002000
#define APQ8064_QGIC_CPU_SIZE SZ_4K
-#define APQ8064_DMOV_PHYS 0x18300000
-#define APQ8064_DMOV_SIZE SZ_1M
-
#define APQ8064_TLMM_PHYS 0x00800000
#define APQ8064_TLMM_SIZE SZ_16K
diff --git a/arch/arm/mach-msm/include/mach/msm_iomap-8930.h b/arch/arm/mach-msm/include/mach/msm_iomap-8930.h
new file mode 100644
index 0000000..8e50824
--- /dev/null
+++ b/arch/arm/mach-msm/include/mach/msm_iomap-8930.h
@@ -0,0 +1,116 @@
+/*
+ * Copyright (C) 2007 Google, Inc.
+ * Copyright (c) 2008-2011, Code Aurora Forum. All rights reserved.
+ * Author: Brian Swetland <swetland@google.com>
+ *
+ * This software is licensed under the terms of the GNU General Public
+ * License version 2, as published by the Free Software Foundation, and
+ * may be copied, distributed, and modified under those terms.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ *
+ *
+ * The MSM peripherals are spread all over across 768MB of physical
+ * space, which makes just having a simple IO_ADDRESS macro to slide
+ * them into the right virtual location rough. Instead, we will
+ * provide a master phys->virt mapping for peripherals here.
+ *
+ */
+
+#ifndef __ASM_ARCH_MSM_IOMAP_8930_H
+#define __ASM_ARCH_MSM_IOMAP_8930_H
+
+/* Physical base address and size of peripherals.
+ * Ordered by the virtual base addresses they will be mapped at.
+ *
+ * If you add or remove entries here, you'll want to edit the
+ * msm_io_desc array in arch/arm/mach-msm/io.c to reflect your
+ * changes.
+ *
+ */
+
+#define MSM8930_TMR_PHYS 0x0200A000
+#define MSM8930_TMR_SIZE SZ_4K
+
+#define MSM8930_TMR0_PHYS 0x0208A000
+#define MSM8930_TMR0_SIZE SZ_4K
+
+#define MSM8930_RPM_PHYS 0x00108000
+#define MSM8930_RPM_SIZE SZ_4K
+
+#define MSM8930_RPM_MPM_PHYS 0x00200000
+#define MSM8930_RPM_MPM_SIZE SZ_4K
+
+#define MSM8930_TCSR_PHYS 0x1A400000
+#define MSM8930_TCSR_SIZE SZ_4K
+
+#define MSM8930_APCS_GCC_PHYS 0x02011000
+#define MSM8930_APCS_GCC_SIZE SZ_4K
+
+#define MSM8930_SAW_L2_PHYS 0x02012000
+#define MSM8930_SAW_L2_SIZE SZ_4K
+
+#define MSM8930_SAW0_PHYS 0x02089000
+#define MSM8930_SAW0_SIZE SZ_4K
+
+#define MSM8930_SAW1_PHYS 0x02099000
+#define MSM8930_SAW1_SIZE SZ_4K
+
+#define MSM8930_IMEM_PHYS 0x2A03F000
+#define MSM8930_IMEM_SIZE SZ_4K
+
+#define MSM8930_ACC0_PHYS 0x02088000
+#define MSM8930_ACC0_SIZE SZ_4K
+
+#define MSM8930_ACC1_PHYS 0x02098000
+#define MSM8930_ACC1_SIZE SZ_4K
+
+#define MSM8930_QGIC_DIST_PHYS 0x02000000
+#define MSM8930_QGIC_DIST_SIZE SZ_4K
+
+#define MSM8930_QGIC_CPU_PHYS 0x02002000
+#define MSM8930_QGIC_CPU_SIZE SZ_4K
+
+#define MSM8930_CLK_CTL_PHYS 0x00900000
+#define MSM8930_CLK_CTL_SIZE SZ_16K
+
+#define MSM8930_MMSS_CLK_CTL_PHYS 0x04000000
+#define MSM8930_MMSS_CLK_CTL_SIZE SZ_4K
+
+#define MSM8930_LPASS_CLK_CTL_PHYS 0x28000000
+#define MSM8930_LPASS_CLK_CTL_SIZE SZ_4K
+
+#define MSM8930_HFPLL_PHYS 0x00903000
+#define MSM8930_HFPLL_SIZE SZ_4K
+
+#define MSM8930_TLMM_PHYS 0x00800000
+#define MSM8930_TLMM_SIZE SZ_16K
+
+#define MSM8930_DMOV_PHYS 0x18320000
+#define MSM8930_DMOV_SIZE SZ_1M
+
+#define MSM8930_SIC_NON_SECURE_PHYS 0x12100000
+#define MSM8930_SIC_NON_SECURE_SIZE SZ_64K
+
+#define MSM_GPT_BASE (MSM_TMR_BASE + 0x4)
+#define MSM_DGT_BASE (MSM_TMR_BASE + 0x24)
+
+#define MSM8930_HDMI_PHYS 0x04A00000
+#define MSM8930_HDMI_SIZE SZ_4K
+
+#ifdef CONFIG_MSM_DEBUG_UART
+#define MSM_DEBUG_UART_BASE IOMEM(0xFA740000)
+#define MSM_DEBUG_UART_SIZE SZ_4K
+
+#ifdef CONFIG_MSM_DEBUG_UART1
+#define MSM_DEBUG_UART_PHYS 0x16440000
+#endif
+#endif
+
+#define MSM8930_QFPROM_PHYS 0x00700000
+#define MSM8930_QFPROM_SIZE SZ_4K
+
+#endif
diff --git a/arch/arm/mach-msm/include/mach/msm_iomap-8960.h b/arch/arm/mach-msm/include/mach/msm_iomap-8960.h
index 56cbd2f..24505ae 100644
--- a/arch/arm/mach-msm/include/mach/msm_iomap-8960.h
+++ b/arch/arm/mach-msm/include/mach/msm_iomap-8960.h
@@ -89,9 +89,6 @@
#define MSM8960_TLMM_PHYS 0x00800000
#define MSM8960_TLMM_SIZE SZ_16K
-#define MSM8960_DMOV_PHYS 0x18320000
-#define MSM8960_DMOV_SIZE SZ_1M
-
#define MSM8960_SIC_NON_SECURE_PHYS 0x12100000
#define MSM8960_SIC_NON_SECURE_SIZE SZ_64K
diff --git a/arch/arm/mach-msm/include/mach/msm_iomap-8x50.h b/arch/arm/mach-msm/include/mach/msm_iomap-8x50.h
index cab4027..a073d6a 100644
--- a/arch/arm/mach-msm/include/mach/msm_iomap-8x50.h
+++ b/arch/arm/mach-msm/include/mach/msm_iomap-8x50.h
@@ -47,10 +47,6 @@
#define MSM_TMR_BASE MSM_CSR_BASE
#define MSM_TMR_SIZE SZ_4K
-#define MSM_DMOV_BASE IOMEM(0xFA002000)
-#define MSM_DMOV_PHYS 0xA9700000
-#define MSM_DMOV_SIZE SZ_4K
-
#define MSM_GPIO1_BASE IOMEM(0xFA003000)
#define MSM_GPIO1_PHYS 0xA9000000
#define MSM_GPIO1_SIZE SZ_4K
diff --git a/arch/arm/mach-msm/include/mach/msm_iomap-8x60.h b/arch/arm/mach-msm/include/mach/msm_iomap-8x60.h
index 4b91733..c1cf221 100644
--- a/arch/arm/mach-msm/include/mach/msm_iomap-8x60.h
+++ b/arch/arm/mach-msm/include/mach/msm_iomap-8x60.h
@@ -106,14 +106,6 @@
#define MSM_SAW1_PHYS 0x02052000
#define MSM_SAW1_SIZE SZ_4K
-#define MSM_DMOV_ADM0_BASE IOMEM(0xFA400000)
-#define MSM_DMOV_ADM0_PHYS 0x18320000
-#define MSM_DMOV_ADM0_SIZE SZ_1M
-
-#define MSM_DMOV_ADM1_BASE IOMEM(0xFA500000)
-#define MSM_DMOV_ADM1_PHYS 0x18420000
-#define MSM_DMOV_ADM1_SIZE SZ_1M
-
#define MSM_SIC_NON_SECURE_BASE IOMEM(0xFA600000)
#define MSM_SIC_NON_SECURE_PHYS 0x12100000
#define MSM_SIC_NON_SECURE_SIZE SZ_64K
diff --git a/arch/arm/mach-msm/include/mach/msm_iomap-9615.h b/arch/arm/mach-msm/include/mach/msm_iomap-9615.h
index e842f8e..dda5f50 100644
--- a/arch/arm/mach-msm/include/mach/msm_iomap-9615.h
+++ b/arch/arm/mach-msm/include/mach/msm_iomap-9615.h
@@ -41,9 +41,6 @@
#define MSM9615_QGIC_CPU_PHYS 0x02002000
#define MSM9615_QGIC_CPU_SIZE SZ_4K
-#define MSM9615_DMOV_PHYS 0x18320000
-#define MSM9615_DMOV_SIZE SZ_1M
-
#define MSM9615_TLMM_PHYS 0x00800000
#define MSM9615_TLMM_SIZE SZ_1M
diff --git a/arch/arm/mach-msm/include/mach/msm_iomap-fsm9xxx.h b/arch/arm/mach-msm/include/mach/msm_iomap-fsm9xxx.h
index 5261bcc..57bfd58 100644
--- a/arch/arm/mach-msm/include/mach/msm_iomap-fsm9xxx.h
+++ b/arch/arm/mach-msm/include/mach/msm_iomap-fsm9xxx.h
@@ -64,24 +64,6 @@
#define MSM_GRFC_PHYS 0x94038000
#define MSM_GRFC_SIZE SZ_4K
-#define MSM_DMOV_SD0_BASE IOMEM(0xFA00A000)
-#define MSM_DMOV_SD0_PHYS 0x94310000
-#define MSM_DMOV_SD0_SIZE SZ_4K
-
-#define MSM_DMOV_SD1_BASE IOMEM(0xFA00B000)
-#define MSM_DMOV_SD1_PHYS 0x94410000
-#define MSM_DMOV_SD1_SIZE SZ_4K
-
-#define MSM_DMOV_SD2_BASE IOMEM(0xFA00C000)
-#define MSM_DMOV_SD2_PHYS 0x94510000
-#define MSM_DMOV_SD2_SIZE SZ_4K
-
-#define MSM_DMOV_SD3_BASE IOMEM(0xFA00D000)
-#define MSM_DMOV_SD3_PHYS 0x94610000
-#define MSM_DMOV_SD3_SIZE SZ_4K
-
-#define MSM_DMOV_BASE MSM_DMOV_SD0_BASE
-
#define MSM_QFP_FUSE_BASE IOMEM(0xFA010000)
#define MSM_QFP_FUSE_PHYS 0x80000000
#define MSM_QFP_FUSE_SIZE SZ_32K
diff --git a/arch/arm/mach-msm/include/mach/msm_iomap.h b/arch/arm/mach-msm/include/mach/msm_iomap.h
index df19606..426dbad 100644
--- a/arch/arm/mach-msm/include/mach/msm_iomap.h
+++ b/arch/arm/mach-msm/include/mach/msm_iomap.h
@@ -43,8 +43,8 @@
#define IOMEM(x) ((void __force __iomem *)(x))
#endif
-#if defined(CONFIG_ARCH_MSM8960) || defined(CONFIG_ARCH_APQ8064) \
- || defined(CONFIG_ARCH_MSM9615)
+#if defined(CONFIG_ARCH_MSM8960) || defined(CONFIG_ARCH_APQ8064) || \
+ defined(CONFIG_ARCH_MSM8930) || defined(CONFIG_ARCH_MSM9615)
/* Unified iomap */
#define MSM_TMR_BASE IOMEM(0xFA000000) /* 4K */
@@ -67,7 +67,6 @@
#define MSM_HFPLL_BASE IOMEM(0xFA016000) /* 4K */
#define MSM_TLMM_BASE IOMEM(0xFA017000) /* 16K */
#define MSM_SHARED_RAM_BASE IOMEM(0xFA300000) /* 2M */
-#define MSM_DMOV_BASE IOMEM(0xFA500000) /* 1M */
#define MSM_SIC_NON_SECURE_BASE IOMEM(0xFA600000) /* 64K */
#define MSM_HDMI_BASE IOMEM(0xFA800000) /* 4K */
#define MSM_RPM_BASE IOMEM(0xFA801000) /* 4K */
@@ -83,6 +82,7 @@
#endif
#include "msm_iomap-8960.h"
+#include "msm_iomap-8930.h"
#include "msm_iomap-8064.h"
#include "msm_iomap-9615.h"
diff --git a/arch/arm/mach-msm/io.c b/arch/arm/mach-msm/io.c
index 3bb10fb..72acab8 100644
--- a/arch/arm/mach-msm/io.c
+++ b/arch/arm/mach-msm/io.c
@@ -61,7 +61,6 @@
MSM_DEVICE(VIC),
MSM_DEVICE(CSR),
MSM_DEVICE(TMR),
- MSM_DEVICE(DMOV),
MSM_DEVICE(GPIO1),
MSM_DEVICE(GPIO2),
MSM_DEVICE(CLK_CTL),
@@ -106,7 +105,6 @@
MSM_DEVICE(VIC),
MSM_DEVICE(CSR),
MSM_DEVICE(TMR),
- MSM_DEVICE(DMOV),
MSM_DEVICE(GPIO1),
MSM_DEVICE(GPIO2),
MSM_DEVICE(CLK_CTL),
@@ -145,8 +143,6 @@
MSM_DEVICE(SAW1),
MSM_DEVICE(GCC),
MSM_DEVICE(TLMM),
- MSM_DEVICE(DMOV_ADM0),
- MSM_DEVICE(DMOV_ADM1),
MSM_DEVICE(SCPLL),
MSM_DEVICE(RPM),
MSM_DEVICE(CLK_CTL),
@@ -186,7 +182,6 @@
MSM_CHIP_DEVICE(MMSS_CLK_CTL, MSM8960),
MSM_CHIP_DEVICE(LPASS_CLK_CTL, MSM8960),
MSM_CHIP_DEVICE(RPM, MSM8960),
- MSM_CHIP_DEVICE(DMOV, MSM8960),
MSM_CHIP_DEVICE(TLMM, MSM8960),
MSM_CHIP_DEVICE(HFPLL, MSM8960),
MSM_CHIP_DEVICE(SAW0, MSM8960),
@@ -213,13 +208,51 @@
}
#endif /* CONFIG_ARCH_MSM8960 */
+#ifdef CONFIG_ARCH_MSM8930
+static struct map_desc msm8930_io_desc[] __initdata = {
+ MSM_CHIP_DEVICE(QGIC_DIST, MSM8930),
+ MSM_CHIP_DEVICE(QGIC_CPU, MSM8930),
+ MSM_CHIP_DEVICE(ACC0, MSM8930),
+ MSM_CHIP_DEVICE(ACC1, MSM8930),
+ MSM_CHIP_DEVICE(TMR, MSM8930),
+ MSM_CHIP_DEVICE(TMR0, MSM8930),
+ MSM_CHIP_DEVICE(RPM_MPM, MSM8930),
+ MSM_CHIP_DEVICE(CLK_CTL, MSM8930),
+ MSM_CHIP_DEVICE(MMSS_CLK_CTL, MSM8930),
+ MSM_CHIP_DEVICE(LPASS_CLK_CTL, MSM8930),
+ MSM_CHIP_DEVICE(RPM, MSM8930),
+ MSM_CHIP_DEVICE(TLMM, MSM8930),
+ MSM_CHIP_DEVICE(HFPLL, MSM8930),
+ MSM_CHIP_DEVICE(SAW0, MSM8930),
+ MSM_CHIP_DEVICE(SAW1, MSM8930),
+ MSM_CHIP_DEVICE(SAW_L2, MSM8930),
+ MSM_CHIP_DEVICE(SIC_NON_SECURE, MSM8930),
+ MSM_CHIP_DEVICE(APCS_GCC, MSM8930),
+ MSM_CHIP_DEVICE(IMEM, MSM8930),
+ MSM_CHIP_DEVICE(HDMI, MSM8930),
+ {
+ .virtual = (unsigned long) MSM_SHARED_RAM_BASE,
+ .length = MSM_SHARED_RAM_SIZE,
+ .type = MT_DEVICE,
+ },
+#ifdef CONFIG_MSM_DEBUG_UART
+ MSM_DEVICE(DEBUG_UART),
+#endif
+ MSM_CHIP_DEVICE(QFPROM, MSM8930),
+};
+
+void __init msm_map_msm8930_io(void)
+{
+ msm_map_io(msm8930_io_desc, ARRAY_SIZE(msm8930_io_desc));
+}
+#endif /* CONFIG_ARCH_MSM8930 */
+
#ifdef CONFIG_ARCH_APQ8064
static struct map_desc apq8064_io_desc[] __initdata = {
MSM_CHIP_DEVICE(QGIC_DIST, APQ8064),
MSM_CHIP_DEVICE(QGIC_CPU, APQ8064),
MSM_CHIP_DEVICE(TMR, APQ8064),
MSM_CHIP_DEVICE(TMR0, APQ8064),
- MSM_CHIP_DEVICE(DMOV, APQ8064),
MSM_CHIP_DEVICE(TLMM, APQ8064),
MSM_CHIP_DEVICE(ACC0, APQ8064),
MSM_CHIP_DEVICE(ACC1, APQ8064),
@@ -249,7 +282,6 @@
MSM_DEVICE(VIC),
MSM_DEVICE(CSR),
MSM_DEVICE(TMR),
- MSM_DEVICE(DMOV),
MSM_DEVICE(GPIO1),
MSM_DEVICE(GPIO2),
MSM_DEVICE(CLK_CTL),
@@ -288,10 +320,6 @@
MSM_DEVICE(SAW),
MSM_DEVICE(GCC),
MSM_DEVICE(GRFC),
- MSM_DEVICE(DMOV_SD0),
- MSM_DEVICE(DMOV_SD1),
- MSM_DEVICE(DMOV_SD2),
- MSM_DEVICE(DMOV_SD3),
MSM_DEVICE(QFP_FUSE),
MSM_DEVICE(HH),
#ifdef CONFIG_MSM_DEBUG_UART
@@ -316,7 +344,6 @@
MSM_CHIP_DEVICE(QGIC_CPU, MSM9615),
MSM_CHIP_DEVICE(ACC0, MSM9615),
MSM_CHIP_DEVICE(TMR, MSM9615),
- MSM_CHIP_DEVICE(DMOV, MSM9615),
MSM_CHIP_DEVICE(TLMM, MSM9615),
MSM_CHIP_DEVICE(SAW0, MSM9615),
MSM_CHIP_DEVICE(APCS_GCC, MSM9615),
diff --git a/arch/arm/mach-msm/msm-krait-l2-accessors.c b/arch/arm/mach-msm/msm-krait-l2-accessors.c
index 61b5228..b03e2d2 100644
--- a/arch/arm/mach-msm/msm-krait-l2-accessors.c
+++ b/arch/arm/mach-msm/msm-krait-l2-accessors.c
@@ -12,6 +12,7 @@
*/
#include <linux/spinlock.h>
+#include <linux/module.h>
#include <asm/mach-types.h>
DEFINE_RAW_SPINLOCK(l2_access_lock);
@@ -40,6 +41,7 @@
return ret_val;
}
+EXPORT_SYMBOL(set_get_l2_indirect_reg);
void set_l2_indirect_reg(u32 reg_addr, u32 val)
{
@@ -58,6 +60,7 @@
isb();
raw_spin_unlock_irqrestore(&l2_access_lock, flags);
}
+EXPORT_SYMBOL(set_l2_indirect_reg);
u32 get_l2_indirect_reg(u32 reg_addr)
{
@@ -77,3 +80,4 @@
return val;
}
+EXPORT_SYMBOL(get_l2_indirect_reg);
diff --git a/arch/arm/mach-msm/peripheral-loader.c b/arch/arm/mach-msm/peripheral-loader.c
index dc3b26f..672f332 100644
--- a/arch/arm/mach-msm/peripheral-loader.c
+++ b/arch/arm/mach-msm/peripheral-loader.c
@@ -12,13 +12,14 @@
#include <linux/module.h>
#include <linux/string.h>
-#include <linux/platform_device.h>
+#include <linux/device.h>
#include <linux/firmware.h>
#include <linux/io.h>
#include <linux/debugfs.h>
#include <linux/elf.h>
#include <linux/mutex.h>
#include <linux/memblock.h>
+#include <linux/slab.h>
#include <mach/socinfo.h>
@@ -27,6 +28,13 @@
#include "peripheral-loader.h"
+struct pil_device {
+ struct pil_desc *desc;
+ int count;
+ struct mutex lock;
+ struct list_head list;
+};
+
static DEFINE_MUTEX(pil_list_lock);
static LIST_HEAD(pil_list);
@@ -35,7 +43,7 @@
struct pil_device *dev;
list_for_each_entry(dev, &pil_list, list)
- if (!strcmp(dev->name, str))
+ if (!strcmp(dev->desc->name, str))
return dev;
return NULL;
}
@@ -65,24 +73,24 @@
const u8 *data;
if (memblock_is_region_memory(phdr->p_paddr, phdr->p_memsz)) {
- dev_err(&pil->pdev.dev, "Kernel memory would be overwritten");
+ dev_err(pil->desc->dev, "Kernel memory would be overwritten");
return -EPERM;
}
if (phdr->p_filesz) {
- snprintf(fw_name, ARRAY_SIZE(fw_name), "%s.b%02d", pil->name,
- num);
- ret = request_firmware(&fw, fw_name, &pil->pdev.dev);
+ snprintf(fw_name, ARRAY_SIZE(fw_name), "%s.b%02d",
+ pil->desc->name, num);
+ ret = request_firmware(&fw, fw_name, pil->desc->dev);
if (ret) {
- dev_err(&pil->pdev.dev, "Failed to locate blob %s\n",
+ dev_err(pil->desc->dev, "Failed to locate blob %s\n",
fw_name);
return ret;
}
if (fw->size != phdr->p_filesz) {
- dev_err(&pil->pdev.dev,
- "Blob size %u doesn't match %u\n",
- fw->size, phdr->p_filesz);
+ dev_err(pil->desc->dev,
+ "Blob size %u doesn't match %u\n", fw->size,
+ phdr->p_filesz);
ret = -EPERM;
goto release_fw;
}
@@ -99,7 +107,7 @@
size = min_t(size_t, IOMAP_SIZE, count);
buf = ioremap(paddr, size);
if (!buf) {
- dev_err(&pil->pdev.dev, "Failed to map memory\n");
+ dev_err(pil->desc->dev, "Failed to map memory\n");
ret = -ENOMEM;
goto release_fw;
}
@@ -120,7 +128,7 @@
size = min_t(size_t, IOMAP_SIZE, count);
buf = ioremap(paddr, size);
if (!buf) {
- dev_err(&pil->pdev.dev, "Failed to map memory\n");
+ dev_err(pil->desc->dev, "Failed to map memory\n");
ret = -ENOMEM;
goto release_fw;
}
@@ -131,9 +139,10 @@
paddr += size;
}
- ret = pil->ops->verify_blob(pil, phdr->p_paddr, phdr->p_memsz);
+ ret = pil->desc->ops->verify_blob(pil->desc, phdr->p_paddr,
+ phdr->p_memsz);
if (ret)
- dev_err(&pil->pdev.dev, "Blob %u failed verification\n", num);
+ dev_err(pil->desc->dev, "Blob %u failed verification\n", num);
release_fw:
release_firmware(fw);
@@ -155,41 +164,41 @@
const struct elf32_phdr *phdr;
const struct firmware *fw;
- snprintf(fw_name, sizeof(fw_name), "%s.mdt", pil->name);
- ret = request_firmware(&fw, fw_name, &pil->pdev.dev);
+ snprintf(fw_name, sizeof(fw_name), "%s.mdt", pil->desc->name);
+ ret = request_firmware(&fw, fw_name, pil->desc->dev);
if (ret) {
- dev_err(&pil->pdev.dev, "Failed to locate %s\n", fw_name);
+ dev_err(pil->desc->dev, "Failed to locate %s\n", fw_name);
goto out;
}
if (fw->size < sizeof(*ehdr)) {
- dev_err(&pil->pdev.dev, "Not big enough to be an elf header\n");
+ dev_err(pil->desc->dev, "Not big enough to be an elf header\n");
ret = -EIO;
goto release_fw;
}
ehdr = (struct elf32_hdr *)fw->data;
if (memcmp(ehdr->e_ident, ELFMAG, SELFMAG)) {
- dev_err(&pil->pdev.dev, "Not an elf header\n");
+ dev_err(pil->desc->dev, "Not an elf header\n");
ret = -EIO;
goto release_fw;
}
if (ehdr->e_phnum == 0) {
- dev_err(&pil->pdev.dev, "No loadable segments\n");
+ dev_err(pil->desc->dev, "No loadable segments\n");
ret = -EIO;
goto release_fw;
}
if (sizeof(struct elf32_phdr) * ehdr->e_phnum +
sizeof(struct elf32_hdr) > fw->size) {
- dev_err(&pil->pdev.dev, "Program headers not within mdt\n");
+ dev_err(pil->desc->dev, "Program headers not within mdt\n");
ret = -EIO;
goto release_fw;
}
- ret = pil->ops->init_image(pil, fw->data, fw->size);
+ ret = pil->desc->ops->init_image(pil->desc, fw->data, fw->size);
if (ret) {
- dev_err(&pil->pdev.dev, "Invalid firmware metadata\n");
+ dev_err(pil->desc->dev, "Invalid firmware metadata\n");
goto release_fw;
}
@@ -200,15 +209,15 @@
ret = load_segment(phdr, i, pil);
if (ret) {
- dev_err(&pil->pdev.dev, "Failed to load segment %d\n",
+ dev_err(pil->desc->dev, "Failed to load segment %d\n",
i);
goto release_fw;
}
}
- ret = pil->ops->auth_and_reset(pil);
+ ret = pil->desc->ops->auth_and_reset(pil->desc);
if (ret) {
- dev_err(&pil->pdev.dev, "Failed to bring out of reset\n");
+ dev_err(pil->desc->dev, "Failed to bring out of reset\n");
goto release_fw;
}
@@ -242,9 +251,9 @@
if (!pil)
return ERR_PTR(-ENODEV);
- pil_d = find_peripheral(pil->depends_on);
+ pil_d = find_peripheral(pil->desc->depends_on);
if (pil_d) {
- void *p = pil_get(pil_d->name);
+ void *p = pil_get(pil_d->desc->name);
if (IS_ERR(p))
return p;
}
@@ -290,11 +299,11 @@
if (pil->count)
pil->count--;
if (pil->count == 0)
- pil->ops->shutdown(pil);
+ pil->desc->ops->shutdown(pil->desc);
unlock:
mutex_unlock(&pil->lock);
- pil_d = find_peripheral(pil->depends_on);
+ pil_d = find_peripheral(pil->desc->depends_on);
if (pil_d)
pil_put(pil_d);
}
@@ -310,7 +319,7 @@
mutex_lock(&pil->lock);
if (!WARN(!pil->count, "%s: Reference count mismatch\n", __func__))
- pil->ops->shutdown(pil);
+ pil->desc->ops->shutdown(pil->desc);
mutex_unlock(&pil->lock);
}
EXPORT_SYMBOL(pil_force_shutdown);
@@ -366,7 +375,7 @@
return -EFAULT;
if (!strncmp(buf, "get", 3)) {
- if (IS_ERR(pil_get(pil->name)))
+ if (IS_ERR(pil_get(pil->desc->name)))
return -EIO;
} else if (!strncmp(buf, "put", 3))
pil_put(pil);
@@ -401,8 +410,8 @@
if (!pil_base_dir)
return -ENOMEM;
- if (!debugfs_create_file(pil->name, S_IRUGO | S_IWUSR, pil_base_dir,
- pil, &msm_pil_debugfs_fops))
+ if (!debugfs_create_file(pil->desc->name, S_IRUGO | S_IWUSR,
+ pil_base_dir, pil, &msm_pil_debugfs_fops))
return -ENOMEM;
return 0;
}
@@ -416,29 +425,30 @@
mutex_lock(&pil_list_lock);
list_for_each_entry(pil, &pil_list, list)
- pil->ops->shutdown(pil);
+ pil->desc->ops->shutdown(pil->desc);
mutex_unlock(&pil_list_lock);
return 0;
}
late_initcall(msm_pil_shutdown_at_boot);
-int msm_pil_add_device(struct pil_device *pil)
+int msm_pil_register(struct pil_desc *desc)
{
- int ret;
- ret = platform_device_register(&pil->pdev);
- if (ret)
- return ret;
+ struct pil_device *pil = kzalloc(sizeof(*pil), GFP_KERNEL);
+ if (!pil)
+ return -ENOMEM;
mutex_init(&pil->lock);
+ INIT_LIST_HEAD(&pil->list);
+ pil->desc = desc;
mutex_lock(&pil_list_lock);
list_add(&pil->list, &pil_list);
mutex_unlock(&pil_list_lock);
- msm_pil_debugfs_add(pil);
- return 0;
+ return msm_pil_debugfs_add(pil);
}
+EXPORT_SYMBOL(msm_pil_register);
MODULE_LICENSE("GPL v2");
MODULE_DESCRIPTION("Load peripheral images and bring peripherals out of reset");
diff --git a/arch/arm/mach-msm/peripheral-loader.h b/arch/arm/mach-msm/peripheral-loader.h
index 097d9d7..3d4b4b2 100644
--- a/arch/arm/mach-msm/peripheral-loader.h
+++ b/arch/arm/mach-msm/peripheral-loader.h
@@ -12,28 +12,23 @@
#ifndef __MSM_PERIPHERAL_LOADER_H
#define __MSM_PERIPHERAL_LOADER_H
-#include <linux/list.h>
-#include <linux/mutex.h>
-#include <linux/platform_device.h>
+struct device;
-struct pil_device {
+struct pil_desc {
const char *name;
const char *depends_on;
- int count;
- struct mutex lock;
- struct platform_device pdev;
- struct list_head list;
- struct pil_reset_ops *ops;
+ struct device *dev;
+ const struct pil_reset_ops *ops;
};
struct pil_reset_ops {
- int (*init_image)(struct pil_device *pil, const u8 *metadata,
+ int (*init_image)(struct pil_desc *pil, const u8 *metadata,
size_t size);
- int (*verify_blob)(struct pil_device *pil, u32 phy_addr, size_t size);
- int (*auth_and_reset)(struct pil_device *pil);
- int (*shutdown)(struct pil_device *pil);
+ int (*verify_blob)(struct pil_desc *pil, u32 phy_addr, size_t size);
+ int (*auth_and_reset)(struct pil_desc *pil);
+ int (*shutdown)(struct pil_desc *pil);
};
-extern int msm_pil_add_device(struct pil_device *pil);
+extern int msm_pil_register(struct pil_desc *desc);
#endif
diff --git a/arch/arm/mach-msm/peripheral-reset-8960.c b/arch/arm/mach-msm/peripheral-reset-8960.c
index 2c47ee0..b964417 100644
--- a/arch/arm/mach-msm/peripheral-reset-8960.c
+++ b/arch/arm/mach-msm/peripheral-reset-8960.c
@@ -18,6 +18,7 @@
#include <linux/module.h>
#include <linux/slab.h>
#include <linux/regulator/consumer.h>
+#include <linux/platform_device.h>
#include <asm/mach-types.h>
@@ -167,25 +168,25 @@
static void __iomem *msm_riva_base;
static unsigned long riva_start;
-static int init_image_lpass_q6_trusted(struct pil_device *pil,
+static int init_image_lpass_q6_trusted(struct pil_desc *pil,
const u8 *metadata, size_t size)
{
return pas_init_image(PAS_Q6, metadata, size);
}
-static int init_image_modem_fw_q6_trusted(struct pil_device *pil,
+static int init_image_modem_fw_q6_trusted(struct pil_desc *pil,
const u8 *metadata, size_t size)
{
return pas_init_image(PAS_MODEM_FW, metadata, size);
}
-static int init_image_modem_sw_q6_trusted(struct pil_device *pil,
+static int init_image_modem_sw_q6_trusted(struct pil_desc *pil,
const u8 *metadata, size_t size)
{
return pas_init_image(PAS_MODEM_SW, metadata, size);
}
-static int init_image_lpass_q6_untrusted(struct pil_device *pil,
+static int init_image_lpass_q6_untrusted(struct pil_desc *pil,
const u8 *metadata, size_t size)
{
const struct elf32_hdr *ehdr = (struct elf32_hdr *)metadata;
@@ -193,7 +194,7 @@
return 0;
}
-static int init_image_modem_fw_q6_untrusted(struct pil_device *pil,
+static int init_image_modem_fw_q6_untrusted(struct pil_desc *pil,
const u8 *metadata, size_t size)
{
const struct elf32_hdr *ehdr = (struct elf32_hdr *)metadata;
@@ -201,7 +202,7 @@
return 0;
}
-static int init_image_modem_sw_q6_untrusted(struct pil_device *pil,
+static int init_image_modem_sw_q6_untrusted(struct pil_desc *pil,
const u8 *metadata, size_t size)
{
const struct elf32_hdr *ehdr = (struct elf32_hdr *)metadata;
@@ -209,7 +210,7 @@
return 0;
}
-static int verify_blob(struct pil_device *pil, u32 phy_addr, size_t size)
+static int verify_blob(struct pil_desc *pil, u32 phy_addr, size_t size)
{
return 0;
}
@@ -245,17 +246,17 @@
return pas_auth_and_reset(id);
}
-static int reset_lpass_q6_trusted(struct pil_device *pil)
+static int reset_lpass_q6_trusted(struct pil_desc *pil)
{
return reset_q6_trusted(PAS_Q6, &q6_lpass);
}
-static int reset_modem_fw_q6_trusted(struct pil_device *pil)
+static int reset_modem_fw_q6_trusted(struct pil_desc *pil)
{
return reset_q6_trusted(PAS_MODEM_FW, &q6_modem_fw);
}
-static int reset_modem_sw_q6_trusted(struct pil_device *pil)
+static int reset_modem_sw_q6_trusted(struct pil_desc *pil)
{
return reset_q6_trusted(PAS_MODEM_SW, &q6_modem_sw);
}
@@ -364,17 +365,17 @@
return 0;
}
-static int reset_lpass_q6_untrusted(struct pil_device *pil)
+static int reset_lpass_q6_untrusted(struct pil_desc *pil)
{
return reset_q6_untrusted(&q6_lpass);
}
-static int reset_modem_fw_q6_untrusted(struct pil_device *pil)
+static int reset_modem_fw_q6_untrusted(struct pil_desc *pil)
{
return reset_q6_untrusted(&q6_modem_fw);
}
-static int reset_modem_sw_q6_untrusted(struct pil_device *pil)
+static int reset_modem_sw_q6_untrusted(struct pil_desc *pil)
{
return reset_q6_untrusted(&q6_modem_sw);
}
@@ -395,17 +396,17 @@
return ret;
}
-static int shutdown_lpass_q6_trusted(struct pil_device *pil)
+static int shutdown_lpass_q6_trusted(struct pil_desc *pil)
{
return shutdown_q6_trusted(PAS_Q6, &q6_lpass);
}
-static int shutdown_modem_fw_q6_trusted(struct pil_device *pil)
+static int shutdown_modem_fw_q6_trusted(struct pil_desc *pil)
{
return shutdown_q6_trusted(PAS_MODEM_FW, &q6_modem_fw);
}
-static int shutdown_modem_sw_q6_trusted(struct pil_device *pil)
+static int shutdown_modem_sw_q6_trusted(struct pil_desc *pil)
{
return shutdown_q6_trusted(PAS_MODEM_SW, &q6_modem_sw);
}
@@ -438,22 +439,22 @@
return 0;
}
-static int shutdown_lpass_q6_untrusted(struct pil_device *pil)
+static int shutdown_lpass_q6_untrusted(struct pil_desc *pil)
{
return shutdown_q6_untrusted(&q6_lpass);
}
-static int shutdown_modem_fw_q6_untrusted(struct pil_device *pil)
+static int shutdown_modem_fw_q6_untrusted(struct pil_desc *pil)
{
return shutdown_q6_untrusted(&q6_modem_fw);
}
-static int shutdown_modem_sw_q6_untrusted(struct pil_device *pil)
+static int shutdown_modem_sw_q6_untrusted(struct pil_desc *pil)
{
return shutdown_q6_untrusted(&q6_modem_sw);
}
-static int init_image_riva_untrusted(struct pil_device *pil, const u8 *metadata,
+static int init_image_riva_untrusted(struct pil_desc *pil, const u8 *metadata,
size_t size)
{
const struct elf32_hdr *ehdr = (struct elf32_hdr *)metadata;
@@ -461,7 +462,7 @@
return 0;
}
-static int reset_riva_untrusted(struct pil_device *pil)
+static int reset_riva_untrusted(struct pil_desc *pil)
{
u32 reg;
bool xo;
@@ -552,7 +553,7 @@
return 0;
}
-static int shutdown_riva_untrusted(struct pil_device *pil)
+static int shutdown_riva_untrusted(struct pil_desc *pil)
{
u32 reg;
/* Put riva into reset */
@@ -562,23 +563,23 @@
return 0;
}
-static int init_image_riva_trusted(struct pil_device *pil, const u8 *metadata,
+static int init_image_riva_trusted(struct pil_desc *pil, const u8 *metadata,
size_t size)
{
return pas_init_image(PAS_RIVA, metadata, size);
}
-static int reset_riva_trusted(struct pil_device *pil)
+static int reset_riva_trusted(struct pil_desc *pil)
{
return pas_auth_and_reset(PAS_RIVA);
}
-static int shutdown_riva_trusted(struct pil_device *pil)
+static int shutdown_riva_trusted(struct pil_desc *pil)
{
return pas_shutdown(PAS_RIVA);
}
-static int init_image_dsps_untrusted(struct pil_device *pil, const u8 *metadata,
+static int init_image_dsps_untrusted(struct pil_desc *pil, const u8 *metadata,
size_t size)
{
/* Bring memory and bus interface out of reset */
@@ -587,7 +588,7 @@
return 0;
}
-static int reset_dsps_untrusted(struct pil_device *pil)
+static int reset_dsps_untrusted(struct pil_desc *pil)
{
writel_relaxed(0x10, PPSS_PROC_CLK_CTL);
/* Bring DSPS out of reset */
@@ -595,41 +596,41 @@
return 0;
}
-static int shutdown_dsps_untrusted(struct pil_device *pil)
+static int shutdown_dsps_untrusted(struct pil_desc *pil)
{
writel_relaxed(0x2, PPSS_RESET);
writel_relaxed(0x0, PPSS_PROC_CLK_CTL);
return 0;
}
-static int init_image_dsps_trusted(struct pil_device *pil, const u8 *metadata,
+static int init_image_dsps_trusted(struct pil_desc *pil, const u8 *metadata,
size_t size)
{
return pas_init_image(PAS_DSPS, metadata, size);
}
-static int reset_dsps_trusted(struct pil_device *pil)
+static int reset_dsps_trusted(struct pil_desc *pil)
{
return pas_auth_and_reset(PAS_DSPS);
}
-static int shutdown_dsps_trusted(struct pil_device *pil)
+static int shutdown_dsps_trusted(struct pil_desc *pil)
{
return pas_shutdown(PAS_DSPS);
}
-static int init_image_tzapps(struct pil_device *pil, const u8 *metadata,
+static int init_image_tzapps(struct pil_desc *pil, const u8 *metadata,
size_t size)
{
return pas_init_image(PAS_TZAPPS, metadata, size);
}
-static int reset_tzapps(struct pil_device *pil)
+static int reset_tzapps(struct pil_desc *pil)
{
return pas_auth_and_reset(PAS_TZAPPS);
}
-static int shutdown_tzapps(struct pil_device *pil)
+static int shutdown_tzapps(struct pil_desc *pil)
{
return pas_shutdown(PAS_TZAPPS);
}
@@ -676,59 +677,65 @@
.shutdown = shutdown_tzapps,
};
-static struct pil_device pil_lpass_q6 = {
+static struct platform_device pil_lpass_q6 = {
+ .name = "pil_lpass_q6",
+};
+
+static struct pil_desc pil_lpass_q6_desc = {
.name = "q6",
- .pdev = {
- .name = "pil_lpass_q6",
- .id = -1,
- },
+ .dev = &pil_lpass_q6.dev,
.ops = &pil_lpass_q6_ops,
};
-static struct pil_device pil_modem_fw_q6 = {
+static struct platform_device pil_modem_fw_q6 = {
+ .name = "pil_modem_fw_q6",
+};
+
+static struct pil_desc pil_modem_fw_q6_desc = {
.name = "modem_fw",
.depends_on = "q6",
- .pdev = {
- .name = "pil_modem_fw_q6",
- .id = -1,
- },
+ .dev = &pil_modem_fw_q6.dev,
.ops = &pil_modem_fw_q6_ops,
};
-static struct pil_device pil_modem_sw_q6 = {
+static struct platform_device pil_modem_sw_q6 = {
+ .name = "pil_modem_sw_q6",
+};
+
+static struct pil_desc pil_modem_sw_q6_desc = {
.name = "modem",
.depends_on = "modem_fw",
- .pdev = {
- .name = "pil_modem_sw_q6",
- .id = -1,
- },
+ .dev = &pil_modem_sw_q6.dev,
.ops = &pil_modem_sw_q6_ops,
};
-static struct pil_device pil_riva = {
+static struct platform_device pil_riva = {
+ .name = "pil_riva",
+};
+
+static struct pil_desc pil_riva_desc = {
.name = "wcnss",
- .pdev = {
- .name = "pil_riva",
- .id = -1,
- },
+ .dev = &pil_riva.dev,
.ops = &pil_riva_ops,
};
-static struct pil_device pil_dsps = {
+static struct platform_device pil_dsps = {
+ .name = "pil_dsps",
+};
+
+static struct pil_desc pil_dsps_desc = {
.name = "dsps",
- .pdev = {
- .name = "pil_dsps",
- .id = -1,
- },
+ .dev = &pil_dsps.dev,
.ops = &pil_dsps_ops,
};
-static struct pil_device pil_tzapps = {
+static struct platform_device pil_tzapps = {
+ .name = "pil_tzapps",
+};
+
+static struct pil_desc pil_tzapps_desc = {
.name = "tzapps",
- .pdev = {
- .name = "pil_tzapps",
- .id = -1,
- },
+ .dev = &pil_tzapps.dev,
.ops = &pil_tzapps_ops,
};
@@ -807,7 +814,8 @@
err = q6_reset_init(&q6_lpass);
if (err)
return err;
- msm_pil_add_device(&pil_lpass_q6);
+ BUG_ON(platform_device_register(&pil_lpass_q6));
+ BUG_ON(msm_pil_register(&pil_lpass_q6_desc));
mss_enable_reg = ioremap(MSM_MSS_ENABLE_PHYS, 4);
if (!mss_enable_reg)
@@ -818,20 +826,29 @@
iounmap(mss_enable_reg);
return err;
}
- msm_pil_add_device(&pil_modem_fw_q6);
+ BUG_ON(platform_device_register(&pil_modem_fw_q6));
+ if (err) {
+ iounmap(mss_enable_reg);
+ return err;
+ }
+ BUG_ON(msm_pil_register(&pil_modem_fw_q6_desc));
err = q6_reset_init(&q6_modem_sw);
if (err)
return err;
- msm_pil_add_device(&pil_modem_sw_q6);
+ BUG_ON(platform_device_register(&pil_modem_sw_q6));
+ BUG_ON(msm_pil_register(&pil_modem_sw_q6_desc));
- msm_pil_add_device(&pil_dsps);
- msm_pil_add_device(&pil_tzapps);
+ BUG_ON(platform_device_register(&pil_dsps));
+ BUG_ON(msm_pil_register(&pil_dsps_desc));
+ BUG_ON(platform_device_register(&pil_tzapps));
+ BUG_ON(msm_pil_register(&pil_tzapps_desc));
msm_riva_base = ioremap(MSM_RIVA_PHYS, SZ_256);
if (!msm_riva_base)
return -ENOMEM;
- msm_pil_add_device(&pil_riva);
+ BUG_ON(platform_device_register(&pil_riva));
+ BUG_ON(msm_pil_register(&pil_riva_desc));
return 0;
}
diff --git a/arch/arm/mach-msm/peripheral-reset.c b/arch/arm/mach-msm/peripheral-reset.c
index 5456e14..f3f5388 100644
--- a/arch/arm/mach-msm/peripheral-reset.c
+++ b/arch/arm/mach-msm/peripheral-reset.c
@@ -20,6 +20,9 @@
#include <linux/clk.h>
#include <linux/timer.h>
#include <linux/jiffies.h>
+#include <linux/platform_device.h>
+
+#include <asm/mach-types.h>
#include <mach/scm.h>
#include <mach/msm_iomap.h>
@@ -68,13 +71,13 @@
static void __iomem *msm_mms_regs_base;
static void __iomem *msm_lpass_qdsp6ss_base;
-static int init_image_modem_trusted(struct pil_device *pil, const u8 *metadata,
+static int init_image_modem_trusted(struct pil_desc *pil, const u8 *metadata,
size_t size)
{
return pas_init_image(PAS_MODEM, metadata, size);
}
-static int init_image_modem_untrusted(struct pil_device *pil,
+static int init_image_modem_untrusted(struct pil_desc *pil,
const u8 *metadata, size_t size)
{
struct elf32_hdr *ehdr = (struct elf32_hdr *)metadata;
@@ -82,13 +85,13 @@
return 0;
}
-static int init_image_q6_trusted(struct pil_device *pil,
+static int init_image_q6_trusted(struct pil_desc *pil,
const u8 *metadata, size_t size)
{
return pas_init_image(PAS_Q6, metadata, size);
}
-static int init_image_q6_untrusted(struct pil_device *pil, const u8 *metadata,
+static int init_image_q6_untrusted(struct pil_desc *pil, const u8 *metadata,
size_t size)
{
struct elf32_hdr *ehdr = (struct elf32_hdr *)metadata;
@@ -96,13 +99,13 @@
return 0;
}
-static int init_image_dsps_trusted(struct pil_device *pil, const u8 *metadata,
+static int init_image_dsps_trusted(struct pil_desc *pil, const u8 *metadata,
size_t size)
{
return pas_init_image(PAS_DSPS, metadata, size);
}
-static int init_image_dsps_untrusted(struct pil_device *pil, const u8 *metadata,
+static int init_image_dsps_untrusted(struct pil_desc *pil, const u8 *metadata,
size_t size)
{
struct elf32_hdr *ehdr = (struct elf32_hdr *)metadata;
@@ -113,7 +116,7 @@
return 0;
}
-static int verify_blob(struct pil_device *pil, u32 phy_addr, size_t size)
+static int verify_blob(struct pil_desc *pil, u32 phy_addr, size_t size)
{
return 0;
}
@@ -142,7 +145,7 @@
remove_modem_proxy_votes(0);
}
-static int reset_modem_untrusted(struct pil_device *pil)
+static int reset_modem_untrusted(struct pil_desc *pil)
{
u32 reg;
@@ -221,7 +224,7 @@
return 0;
}
-static int reset_modem_trusted(struct pil_device *pil)
+static int reset_modem_trusted(struct pil_desc *pil)
{
int ret;
@@ -234,7 +237,7 @@
return ret;
}
-static int shutdown_modem_untrusted(struct pil_device *pil)
+static int shutdown_modem_untrusted(struct pil_desc *pil)
{
u32 reg;
@@ -275,7 +278,7 @@
return 0;
}
-static int shutdown_modem_trusted(struct pil_device *pil)
+static int shutdown_modem_trusted(struct pil_desc *pil)
{
int ret;
@@ -343,7 +346,7 @@
remove_q6_proxy_votes(0);
}
-static int reset_q6_untrusted(struct pil_device *pil)
+static int reset_q6_untrusted(struct pil_desc *pil)
{
u32 reg;
@@ -389,14 +392,14 @@
return 0;
}
-static int reset_q6_trusted(struct pil_device *pil)
+static int reset_q6_trusted(struct pil_desc *pil)
{
make_q6_proxy_votes();
return pas_auth_and_reset(PAS_Q6);
}
-static int shutdown_q6_untrusted(struct pil_device *pil)
+static int shutdown_q6_untrusted(struct pil_desc *pil)
{
u32 reg;
@@ -423,7 +426,7 @@
return 0;
}
-static int shutdown_q6_trusted(struct pil_device *pil)
+static int shutdown_q6_trusted(struct pil_desc *pil)
{
int ret;
@@ -436,7 +439,7 @@
return 0;
}
-static int reset_dsps_untrusted(struct pil_device *pil)
+static int reset_dsps_untrusted(struct pil_desc *pil)
{
__raw_writel(0x10, PPSS_PROC_CLK_CTL);
while (__raw_readl(CLK_HALT_DFAB_STATE) & BIT(18))
@@ -447,35 +450,35 @@
return 0;
}
-static int reset_dsps_trusted(struct pil_device *pil)
+static int reset_dsps_trusted(struct pil_desc *pil)
{
return pas_auth_and_reset(PAS_DSPS);
}
-static int shutdown_dsps_trusted(struct pil_device *pil)
+static int shutdown_dsps_trusted(struct pil_desc *pil)
{
return pas_shutdown(PAS_DSPS);
}
-static int shutdown_dsps_untrusted(struct pil_device *pil)
+static int shutdown_dsps_untrusted(struct pil_desc *pil)
{
__raw_writel(0x2, PPSS_RESET);
__raw_writel(0x0, PPSS_PROC_CLK_CTL);
return 0;
}
-static int init_image_playready(struct pil_device *pil, const u8 *metadata,
+static int init_image_playready(struct pil_desc *pil, const u8 *metadata,
size_t size)
{
return pas_init_image(PAS_PLAYREADY, metadata, size);
}
-static int reset_playready(struct pil_device *pil)
+static int reset_playready(struct pil_desc *pil)
{
return pas_auth_and_reset(PAS_PLAYREADY);
}
-static int shutdown_playready(struct pil_device *pil)
+static int shutdown_playready(struct pil_desc *pil)
{
return pas_shutdown(PAS_PLAYREADY);
}
@@ -508,47 +511,49 @@
.shutdown = shutdown_playready,
};
-static struct pil_device peripherals[] = {
- {
- .name = "modem",
- .depends_on = "q6",
- .pdev = {
- .name = "pil_modem",
- .id = -1,
- },
- .ops = &pil_modem_ops,
- },
- {
- .name = "q6",
- .pdev = {
- .name = "pil_q6",
- .id = -1,
- },
- .ops = &pil_q6_ops,
- },
- {
- .name = "tzapps",
- .pdev = {
- .name = "pil_playready",
- .id = -1,
- },
- .ops = &pil_playready_ops,
- },
+static struct platform_device pil_modem = {
+ .name = "pil_modem",
};
-struct pil_device peripheral_dsps = {
+static struct pil_desc pil_modem_desc = {
+ .name = "modem",
+ .depends_on = "q6",
+ .dev = &pil_modem.dev,
+ .ops = &pil_modem_ops,
+};
+
+static struct platform_device pil_q6 = {
+ .name = "pil_q6",
+};
+
+static struct pil_desc pil_q6_desc = {
+ .name = "q6",
+ .dev = &pil_q6.dev,
+ .ops = &pil_q6_ops,
+};
+
+static struct platform_device pil_playready = {
+ .name = "pil_playready",
+};
+
+static struct pil_desc pil_playready_desc = {
+ .name = "tzapps",
+ .dev = &pil_playready.dev,
+ .ops = &pil_playready_ops,
+};
+
+static struct platform_device pil_dsps = {
+ .name = "pil_dsps",
+};
+
+static struct pil_desc pil_dsps_desc = {
.name = "dsps",
- .pdev = {
- .name = "pil_dsps",
- .id = -1,
- },
+ .dev = &pil_dsps.dev,
.ops = &pil_dsps_ops,
};
static int __init msm_peripheral_reset_init(void)
{
- unsigned i;
-
msm_mms_regs_base = ioremap(MSM_MMS_REGS_BASE, SZ_256);
if (!msm_mms_regs_base)
goto err;
@@ -583,8 +588,17 @@
pil_dsps_ops.shutdown = shutdown_dsps_trusted;
}
- for (i = 0; i < ARRAY_SIZE(peripherals); i++)
- msm_pil_add_device(&peripherals[i]);
+ BUG_ON(platform_device_register(&pil_q6));
+ BUG_ON(msm_pil_register(&pil_q6_desc));
+ BUG_ON(platform_device_register(&pil_modem));
+ BUG_ON(msm_pil_register(&pil_modem_desc));
+ BUG_ON(platform_device_register(&pil_playready));
+ BUG_ON(msm_pil_register(&pil_playready_desc));
+
+ if (machine_is_msm8x60_fluid())
+ pil_dsps_desc.name = "dsps_fluid";
+ BUG_ON(platform_device_register(&pil_dsps));
+ BUG_ON(msm_pil_register(&pil_dsps_desc));
return 0;
diff --git a/arch/arm/mach-msm/qdsp5v2/audio_lpa.c b/arch/arm/mach-msm/qdsp5v2/audio_lpa.c
index 9baf521..c38fefc 100644
--- a/arch/arm/mach-msm/qdsp5v2/audio_lpa.c
+++ b/arch/arm/mach-msm/qdsp5v2/audio_lpa.c
@@ -603,16 +603,14 @@
temp = audio->bytecount_head;
used_buf = list_first_entry(&audio->out_queue,
struct audlpa_buffer_node, list);
- if ((audio->bytecount_head + used_buf->buf.data_len) <
- audio->bytecount_consumed) {
- audio->bytecount_head += used_buf->buf.data_len;
- temp = audio->bytecount_head;
- list_del(&used_buf->list);
- evt_payload.aio_buf = used_buf->buf;
- audlpa_post_event(audio, AUDIO_EVENT_WRITE_DONE,
- evt_payload);
- kfree(used_buf);
- }
+
+ audio->bytecount_head += used_buf->buf.data_len;
+ temp = audio->bytecount_head;
+ list_del(&used_buf->list);
+ evt_payload.aio_buf = used_buf->buf;
+ audlpa_post_event(audio, AUDIO_EVENT_WRITE_DONE,
+ evt_payload);
+ kfree(used_buf);
audio->drv_status &= ~ADRV_STATUS_OBUF_GIVEN;
}
}
diff --git a/arch/arm/mach-msm/qdsp5v2/audio_pcm_in.c b/arch/arm/mach-msm/qdsp5v2/audio_pcm_in.c
index 7f68c03..43f3d26 100644
--- a/arch/arm/mach-msm/qdsp5v2/audio_pcm_in.c
+++ b/arch/arm/mach-msm/qdsp5v2/audio_pcm_in.c
@@ -638,30 +638,52 @@
rc = -EFAULT;
break;
}
- if (cfg.channel_count == 1) {
- cfg.channel_count = AUDREC_CMD_MODE_MONO;
- if ((cfg.buffer_size == MONO_DATA_SIZE_256) ||
- (cfg.buffer_size == MONO_DATA_SIZE_512) ||
- (cfg.buffer_size == MONO_DATA_SIZE_1024)) {
- audio->buffer_size = cfg.buffer_size;
+ MM_ERR("build_id[17] = %c\n", audio->build_id[17]);
+ if (audio->build_id[17] == '1') {
+ audio->enc_type = ENC_TYPE_EXT_WAV | audio->mode;
+ if (cfg.channel_count == 1) {
+ cfg.channel_count = AUDREC_CMD_MODE_MONO;
+ if ((cfg.buffer_size == MONO_DATA_SIZE_256) ||
+ (cfg.buffer_size ==
+ MONO_DATA_SIZE_512) ||
+ (cfg.buffer_size ==
+ MONO_DATA_SIZE_1024)) {
+ audio->buffer_size = cfg.buffer_size;
+ } else {
+ rc = -EINVAL;
+ break;
+ }
+ } else if (cfg.channel_count == 2) {
+ cfg.channel_count = AUDREC_CMD_MODE_STEREO;
+ if ((cfg.buffer_size ==
+ STEREO_DATA_SIZE_256) ||
+ (cfg.buffer_size ==
+ STEREO_DATA_SIZE_512) ||
+ (cfg.buffer_size ==
+ STEREO_DATA_SIZE_1024)) {
+ audio->buffer_size = cfg.buffer_size;
+ } else {
+ rc = -EINVAL;
+ break;
+ }
} else {
rc = -EINVAL;
break;
}
- } else if (cfg.channel_count == 2) {
- cfg.channel_count = AUDREC_CMD_MODE_STEREO;
- if ((cfg.buffer_size == STEREO_DATA_SIZE_256) ||
- (cfg.buffer_size == STEREO_DATA_SIZE_512) ||
- (cfg.buffer_size == STEREO_DATA_SIZE_1024)) {
- audio->buffer_size = cfg.buffer_size;
- } else {
- rc = -EINVAL;
- break;
+ } else if (audio->build_id[17] == '0') {
+ audio->enc_type = ENC_TYPE_WAV | audio->mode;
+ if (cfg.channel_count == 1) {
+ cfg.channel_count = AUDREC_CMD_MODE_MONO;
+ audio->buffer_size = MONO_DATA_SIZE_1024;
+ } else if (cfg.channel_count == 2) {
+ cfg.channel_count = AUDREC_CMD_MODE_STEREO;
+ audio->buffer_size = STEREO_DATA_SIZE_1024;
}
} else {
- rc = -EINVAL;
- break;
+ MM_ERR("wrong build_id = %s\n", audio->build_id);
+ return -ENODEV;
}
+ MM_ERR("buffer size configured is = %d\n", audio->buffer_size);
audio->samp_rate = cfg.sample_rate;
audio->channel_mode = cfg.channel_count;
break;
diff --git a/arch/arm/mach-msm/sysmon.h b/arch/arm/mach-msm/sysmon.h
index 5fb75bc..429a155 100644
--- a/arch/arm/mach-msm/sysmon.h
+++ b/arch/arm/mach-msm/sysmon.h
@@ -17,6 +17,9 @@
#include <mach/subsystem_notif.h>
+/**
+ * enum subsys_id - Destination subsystems for events.
+ */
enum subsys_id {
SYSMON_SS_MODEM,
SYSMON_SS_LPASS,
@@ -26,6 +29,20 @@
SYSMON_NUM_SS
};
+
+/**
+ * sysmon_send_event() - Notify a subsystem of another's state change.
+ * @dest_ss: ID of subsystem the notification should be sent to.
+ * @event_ss: String name of the subsystem that generated the notification.
+ * @notif: ID of the notification type (ex. SUBSYS_BEFORE_SHUTDOWN)
+ *
+ * Returns 0 for success, -EINVAL for invalid destination or notification IDs,
+ * -ENODEV if the SMD channel is not open, -ETIMEDOUT if the destination
+ * subsystem does not respond, and -ENOSYS if the destination subsystem
+ * responds, but with something other than an acknowledgement.
+ *
+ * If CONFIG_MSM_SYSMON_COMM is not defined, always return success (0).
+ */
#ifdef CONFIG_MSM_SYSMON_COMM
int sysmon_send_event(enum subsys_id dest_ss, const char *event_ss,
enum subsys_notif_type notif);
diff --git a/drivers/char/msm_rotator.c b/drivers/char/msm_rotator.c
index 555e4fa..bb31b6a 100644
--- a/drivers/char/msm_rotator.c
+++ b/drivers/char/msm_rotator.c
@@ -61,10 +61,6 @@
#define MSM_ROTATOR_MAX_H 0x1fff
#define MSM_ROTATOR_MAX_W 0x1fff
-#define IS_NONPLANAR 0x0
-#define IS_PLANAR 0x1
-#define IS_PLANAR_16ALIGNED 0x2
-
/* from lsb to msb */
#define GET_PACK_PATTERN(a, x, y, z, bit) \
(((a)<<((bit)*3))|((x)<<((bit)*2))|((y)<<(bit))|(z))
@@ -94,6 +90,15 @@
unsigned int row_tile_h; /* tiles per row's height */
};
+struct msm_rotator_mem_planes {
+ unsigned int num_planes;
+ unsigned int plane_size[4];
+ unsigned int total_size;
+};
+
+#define checkoffset(offset, size, max_size) \
+ ((size) > (max_size) || (offset) > ((max_size) - (size)))
+
struct msm_rotator_dev {
void __iomem *io_base;
int irq;
@@ -120,8 +125,6 @@
wait_queue_head_t wq;
};
-#define chroma_addr(start, w, h, bpp) ((start) + ((h) * (w) * (bpp)))
-
#define COMPONENT_5BITS 1
#define COMPONENT_6BITS 2
#define COMPONENT_8BITS 3
@@ -246,6 +249,19 @@
return IRQ_HANDLED;
}
+static unsigned int tile_size(unsigned int src_width,
+ unsigned int src_height,
+ const struct tile_parm *tp)
+{
+ unsigned int tile_w, tile_h;
+ unsigned int row_num_w, row_num_h;
+ tile_w = tp->width * tp->row_tile_w;
+ tile_h = tp->height * tp->row_tile_h;
+ row_num_w = (src_width + tile_w - 1) / tile_w;
+ row_num_h = (src_height + tile_h - 1) / tile_h;
+ return ((row_num_w * row_num_h * tile_w * tile_h) + 8191) & ~8191;
+}
+
static int get_bpp(int format)
{
switch (format) {
@@ -285,6 +301,81 @@
}
+static int msm_rotator_get_plane_sizes(uint32_t format, uint32_t w, uint32_t h,
+ struct msm_rotator_mem_planes *p)
+{
+ /*
+ * each row of samsung tile consists of two tiles in height
+ * and two tiles in width which means width should align to
+ * 64 x 2 bytes and height should align to 32 x 2 bytes.
+ * video decoder generate two tiles in width and one tile
+ * in height which ends up height align to 32 X 1 bytes.
+ */
+ const struct tile_parm tile = {64, 32, 2, 1};
+ int i;
+
+ if (p == NULL)
+ return -EINVAL;
+
+ if ((w > MSM_ROTATOR_MAX_W) || (h > MSM_ROTATOR_MAX_H))
+ return -ERANGE;
+
+ memset(p, 0, sizeof(*p));
+
+ switch (format) {
+ case MDP_XRGB_8888:
+ case MDP_ARGB_8888:
+ case MDP_RGBA_8888:
+ case MDP_BGRA_8888:
+ case MDP_RGBX_8888:
+ case MDP_RGB_888:
+ case MDP_RGB_565:
+ case MDP_BGR_565:
+ case MDP_YCRYCB_H2V1:
+ p->num_planes = 1;
+ p->plane_size[0] = w * h * get_bpp(format);
+ break;
+ case MDP_Y_CRCB_H2V1:
+ case MDP_Y_CBCR_H2V1:
+ p->num_planes = 2;
+ p->plane_size[0] = w * h;
+ p->plane_size[1] = w * h;
+ break;
+ case MDP_Y_CBCR_H2V2:
+ case MDP_Y_CRCB_H2V2:
+ p->num_planes = 2;
+ p->plane_size[0] = w * h;
+ p->plane_size[1] = w * h / 2;
+ break;
+ case MDP_Y_CRCB_H2V2_TILE:
+ case MDP_Y_CBCR_H2V2_TILE:
+ p->num_planes = 2;
+ p->plane_size[0] = tile_size(w, h, &tile);
+ p->plane_size[1] = tile_size(w, h/2, &tile);
+ break;
+ case MDP_Y_CB_CR_H2V2:
+ case MDP_Y_CR_CB_H2V2:
+ p->num_planes = 3;
+ p->plane_size[0] = w * h;
+ p->plane_size[1] = (w / 2) * (h / 2);
+ p->plane_size[2] = (w / 2) * (h / 2);
+ break;
+ case MDP_Y_CR_CB_GH2V2:
+ p->num_planes = 3;
+ p->plane_size[0] = ALIGN(w, 16) * h;
+ p->plane_size[1] = ALIGN(w / 2, 16) * (h / 2);
+ p->plane_size[2] = ALIGN(w / 2, 16) * (h / 2);
+ break;
+ default:
+ return -EINVAL;
+ }
+
+ for (i = 0; i < p->num_planes; i++)
+ p->total_size += p->plane_size[i];
+
+ return 0;
+}
+
static int msm_rotator_ycxcx_h2v1(struct msm_rotator_img_info *info,
unsigned int in_paddr,
unsigned int out_paddr,
@@ -294,7 +385,6 @@
unsigned int out_chroma_paddr)
{
int bpp;
- unsigned int in_chr_addr, out_chr_addr;
if (info->src.format != info->dst.format)
return -EINVAL;
@@ -303,28 +393,12 @@
if (bpp < 0)
return -ENOTTY;
- if (!in_chroma_paddr) {
- in_chr_addr = chroma_addr(in_paddr, info->src.width,
- info->src.height,
- bpp);
- } else
- in_chr_addr = in_chroma_paddr;
-
- if (!out_chroma_paddr) {
- out_chr_addr = chroma_addr(out_paddr, info->dst.width,
- info->dst.height,
- bpp);
- } else
- out_chr_addr = out_chroma_paddr;
-
iowrite32(in_paddr, MSM_ROTATOR_SRCP0_ADDR);
-
- iowrite32(in_paddr, MSM_ROTATOR_SRCP0_ADDR);
- iowrite32(in_chr_addr, MSM_ROTATOR_SRCP1_ADDR);
+ iowrite32(in_chroma_paddr, MSM_ROTATOR_SRCP1_ADDR);
iowrite32(out_paddr +
((info->dst_y * info->dst.width) + info->dst_x),
MSM_ROTATOR_OUTP0_ADDR);
- iowrite32(out_chr_addr +
+ iowrite32(out_chroma_paddr +
((info->dst_y * info->dst.width) + info->dst_x),
MSM_ROTATOR_OUTP1_ADDR);
@@ -380,60 +454,45 @@
int new_session,
unsigned int in_chroma_paddr,
unsigned int out_chroma_paddr,
- int planar_mode)
+ unsigned int in_chroma2_paddr)
{
- int bpp;
- unsigned int in_chr_addr, out_chr_addr;
+ uint32_t dst_format;
+ int is_tile = 0;
- bpp = get_bpp(info->src.format);
- if (bpp < 0)
- return -ENOTTY;
-
- if (!in_chroma_paddr) {
- if (planar_mode & IS_PLANAR_16ALIGNED)
- in_chr_addr = chroma_addr(in_paddr,
- ALIGN(info->src.width, 16),
- info->src.height,
- bpp);
- else
- in_chr_addr = chroma_addr(in_paddr, info->src.width,
- info->src.height,
- bpp);
- } else
- in_chr_addr = in_chroma_paddr;
-
- if (!out_chroma_paddr) {
- out_chr_addr = chroma_addr(out_paddr, info->dst.width,
- info->dst.height,
- bpp);
- } else
- out_chr_addr = out_chroma_paddr;
+ switch (info->src.format) {
+ case MDP_Y_CRCB_H2V2_TILE:
+ is_tile = 1;
+ case MDP_Y_CR_CB_H2V2:
+ case MDP_Y_CR_CB_GH2V2:
+ case MDP_Y_CRCB_H2V2:
+ dst_format = MDP_Y_CRCB_H2V2;
+ break;
+ case MDP_Y_CBCR_H2V2_TILE:
+ is_tile = 1;
+ case MDP_Y_CB_CR_H2V2:
+ case MDP_Y_CBCR_H2V2:
+ dst_format = MDP_Y_CBCR_H2V2;
+ break;
+ default:
+ return -EINVAL;
+ }
+ if (info->dst.format != dst_format)
+ return -EINVAL;
iowrite32(in_paddr, MSM_ROTATOR_SRCP0_ADDR);
- iowrite32(in_chr_addr,
- MSM_ROTATOR_SRCP1_ADDR);
+ iowrite32(in_chroma_paddr, MSM_ROTATOR_SRCP1_ADDR);
+ iowrite32(in_chroma2_paddr, MSM_ROTATOR_SRCP2_ADDR);
+
iowrite32(out_paddr +
((info->dst_y * info->dst.width) + info->dst_x),
MSM_ROTATOR_OUTP0_ADDR);
- iowrite32(out_chr_addr +
+ iowrite32(out_chroma_paddr +
((info->dst_y * info->dst.width)/2 + info->dst_x),
MSM_ROTATOR_OUTP1_ADDR);
- if (planar_mode & IS_PLANAR) {
- if (planar_mode & IS_PLANAR_16ALIGNED)
- iowrite32(in_chr_addr +
- ALIGN((info->src.width / 2), 16) *
- (info->src.height / 2),
- MSM_ROTATOR_SRCP2_ADDR);
- else
- iowrite32(in_chr_addr +
- (info->src.width / 2) * (info->src.height / 2),
- MSM_ROTATOR_SRCP2_ADDR);
- }
-
if (new_session) {
- if (planar_mode & IS_PLANAR) {
- if (planar_mode & IS_PLANAR_16ALIGNED) {
+ if (in_chroma2_paddr) {
+ if (info->src.format == MDP_Y_CR_CB_GH2V2) {
iowrite32(ALIGN(info->src.width, 16) |
ALIGN((info->src.width / 2), 16) << 16,
MSM_ROTATOR_SRC_YSTRIDE1);
@@ -455,8 +514,7 @@
info->dst.width << 16,
MSM_ROTATOR_OUT_YSTRIDE1);
- if ((info->src.format == MDP_Y_CBCR_H2V2) ||
- (info->src.format == MDP_Y_CB_CR_H2V2)) {
+ if (dst_format == MDP_Y_CBCR_H2V2) {
iowrite32(GET_PACK_PATTERN(0, 0, CLR_CB, CLR_CR, 8),
MSM_ROTATOR_SRC_UNPACK_PATTERN1);
iowrite32(GET_PACK_PATTERN(0, 0, CLR_CB, CLR_CR, 8),
@@ -471,118 +529,14 @@
(ROTATIONS_TO_BITMASK(info->rotations) << 9) |
1 << 8, /* ROT_EN */
MSM_ROTATOR_SUB_BLOCK_CFG);
- iowrite32(0 << 29 | /* frame format 0 = linear */
+
+ iowrite32((is_tile ? 2 : 0) << 29 | /* frame format */
(use_imem ? 0 : 1) << 22 | /* tile size */
- ((planar_mode & IS_PLANAR) ?
- 1 : 2) << 19 | /* fetch planes */
+ (in_chroma2_paddr ? 1 : 2) << 19 | /* fetch planes */
0 << 18 | /* unpack align */
1 << 17 | /* unpack tight */
1 << 13 | /* unpack count 0=1 component */
- (bpp-1) << 9 | /* src Bpp 0=1 byte ... */
- 0 << 8 | /* has alpha */
- 0 << 6 | /* alpha bits 3=8bits */
- 3 << 4 | /* R/Cr bits 1=5 2=6 3=8 */
- 3 << 2 | /* B/Cb bits 1=5 2=6 3=8 */
- 3 << 0, /* G/Y bits 1=5 2=6 3=8 */
- MSM_ROTATOR_SRC_FORMAT);
- }
- return 0;
-}
-
-static unsigned int tile_size(unsigned int src_width,
- unsigned int src_height,
- const struct tile_parm *tp)
-{
- unsigned int tile_w, tile_h;
- unsigned int row_num_w, row_num_h;
- tile_w = tp->width * tp->row_tile_w;
- tile_h = tp->height * tp->row_tile_h;
- row_num_w = (src_width + tile_w - 1) / tile_w;
- row_num_h = (src_height + tile_h - 1) / tile_h;
- return ((row_num_w * row_num_h * tile_w * tile_h) + 8191) & ~8191;
-}
-
-static int msm_rotator_ycxcx_h2v2_tile(struct msm_rotator_img_info *info,
- unsigned int in_paddr,
- unsigned int out_paddr,
- unsigned int use_imem,
- int new_session,
- unsigned in_chroma_paddr,
- unsigned out_chroma_paddr)
-{
- int bpp;
- unsigned int offset = 0;
- unsigned int in_chr_addr, out_chr_addr;
- /*
- * each row of samsung tile consists of two tiles in height
- * and two tiles in width which means width should align to
- * 64 x 2 bytes and height should align to 32 x 2 bytes.
- * video decoder generate two tiles in width and one tile
- * in height which ends up height align to 32 X 1 bytes.
- */
- const struct tile_parm tile = {64, 32, 2, 1};
- if ((info->src.format == MDP_Y_CRCB_H2V2_TILE &&
- info->dst.format != MDP_Y_CRCB_H2V2) ||
- (info->src.format == MDP_Y_CBCR_H2V2_TILE &&
- info->dst.format != MDP_Y_CBCR_H2V2))
- return -EINVAL;
-
- bpp = get_bpp(info->src.format);
- if (bpp < 0)
- return -ENOTTY;
-
- offset = tile_size(info->src.width, info->src.height, &tile);
- if (!in_chroma_paddr)
- in_chr_addr = in_paddr + offset;
- else
- in_chr_addr = in_chroma_paddr;
-
- if (!out_chroma_paddr) {
- out_chr_addr = chroma_addr(out_paddr, info->dst.width,
- info->dst.height,
- bpp);
- } else
- out_chr_addr = out_chroma_paddr;
-
- iowrite32(in_paddr, MSM_ROTATOR_SRCP0_ADDR);
- iowrite32(in_paddr + offset, MSM_ROTATOR_SRCP1_ADDR);
- iowrite32(out_paddr +
- ((info->dst_y * info->dst.width) + info->dst_x),
- MSM_ROTATOR_OUTP0_ADDR);
- iowrite32(out_chr_addr +
- ((info->dst_y * info->dst.width)/2 + info->dst_x),
- MSM_ROTATOR_OUTP1_ADDR);
-
- if (new_session) {
- iowrite32(info->src.width |
- info->src.width << 16,
- MSM_ROTATOR_SRC_YSTRIDE1);
-
- iowrite32(info->dst.width |
- info->dst.width << 16,
- MSM_ROTATOR_OUT_YSTRIDE1);
- if (info->src.format == MDP_Y_CBCR_H2V2_TILE) {
- iowrite32(GET_PACK_PATTERN(0, 0, CLR_CB, CLR_CR, 8),
- MSM_ROTATOR_SRC_UNPACK_PATTERN1);
- iowrite32(GET_PACK_PATTERN(0, 0, CLR_CB, CLR_CR, 8),
- MSM_ROTATOR_OUT_PACK_PATTERN1);
- } else {
- iowrite32(GET_PACK_PATTERN(0, 0, CLR_CR, CLR_CB, 8),
- MSM_ROTATOR_SRC_UNPACK_PATTERN1);
- iowrite32(GET_PACK_PATTERN(0, 0, CLR_CR, CLR_CB, 8),
- MSM_ROTATOR_OUT_PACK_PATTERN1);
- }
- iowrite32((3 << 18) | /* chroma sampling 3=4:2:0 */
- (ROTATIONS_TO_BITMASK(info->rotations) << 9) |
- 1 << 8, /* ROT_EN */
- MSM_ROTATOR_SUB_BLOCK_CFG);
- iowrite32(2 << 29 | /* frame format 2 = supertile */
- (use_imem ? 0 : 1) << 22 | /* tile size */
- 2 << 19 | /* fetch planes 2 = pseudo */
- 0 << 18 | /* unpack align */
- 1 << 17 | /* unpack tight */
- 1 << 13 | /* unpack count 0=1 component */
- (bpp-1) << 9 | /* src Bpp 0=1 byte ... */
+ 0 << 9 | /* src Bpp 0=1 byte ... */
0 << 8 | /* has alpha */
0 << 6 | /* alpha bits 3=8bits */
3 << 4 | /* R/Cr bits 1=5 2=6 3=8 */
@@ -796,7 +750,7 @@
unsigned int status;
struct msm_rotator_data_info info;
unsigned int in_paddr, out_paddr;
- unsigned long len;
+ unsigned long src_len, dst_len;
struct file *src_file = 0;
struct file *dst_file = 0;
int use_imem = 0;
@@ -804,29 +758,14 @@
struct file *src_chroma_file = 0;
struct file *dst_chroma_file = 0;
unsigned int in_chroma_paddr = 0, out_chroma_paddr = 0;
+ unsigned int in_chroma2_paddr = 0;
uint32_t format;
+ struct msm_rotator_img_info *img_info;
+ struct msm_rotator_mem_planes src_planes, dst_planes;
if (copy_from_user(&info, (void __user *)arg, sizeof(info)))
return -EFAULT;
- rc = get_img(info.src.memory_id, (unsigned long *)&in_paddr,
- (unsigned long *)&len, &src_file);
- if (rc) {
- printk(KERN_ERR "%s: in get_img() failed id=0x%08x\n",
- DRIVER_NAME, info.src.memory_id);
- return rc;
- }
- in_paddr += info.src.offset;
-
- rc = get_img(info.dst.memory_id, (unsigned long *)&out_paddr,
- (unsigned long *)&len, &dst_file);
- if (rc) {
- printk(KERN_ERR "%s: out get_img() failed id=0x%08x\n",
- DRIVER_NAME, info.dst.memory_id);
- goto do_rotate_fail_dst_img;
- }
- out_paddr += info.dst.offset;
-
mutex_lock(&msm_rotator_dev->rotator_lock);
for (s = 0; s < MAX_SESSIONS; s++)
if ((msm_rotator_dev->img_info[s] != NULL) &&
@@ -851,36 +790,128 @@
goto do_rotate_unlock_mutex;
}
+ img_info = msm_rotator_dev->img_info[s];
+ if (msm_rotator_get_plane_sizes(img_info->src.format,
+ img_info->src.width,
+ img_info->src.height,
+ &src_planes)) {
+ pr_err("%s: invalid src format\n", __func__);
+ rc = -EINVAL;
+ goto do_rotate_unlock_mutex;
+ }
+ if (msm_rotator_get_plane_sizes(img_info->dst.format,
+ img_info->dst.width,
+ img_info->dst.height,
+ &dst_planes)) {
+ pr_err("%s: invalid dst format\n", __func__);
+ rc = -EINVAL;
+ goto do_rotate_unlock_mutex;
+ }
+
+ rc = get_img(info.src.memory_id, (unsigned long *)&in_paddr,
+ (unsigned long *)&src_len, &src_file);
+ if (rc) {
+ pr_err("%s: in get_img() failed id=0x%08x\n",
+ DRIVER_NAME, info.src.memory_id);
+ goto do_rotate_unlock_mutex;
+ }
+
+ rc = get_img(info.dst.memory_id, (unsigned long *)&out_paddr,
+ (unsigned long *)&dst_len, &dst_file);
+ if (rc) {
+ pr_err("%s: out get_img() failed id=0x%08x\n",
+ DRIVER_NAME, info.dst.memory_id);
+ goto do_rotate_unlock_mutex;
+ }
+
format = msm_rotator_dev->img_info[s]->src.format;
if (((info.version_key & VERSION_KEY_MASK) == 0xA5B4C300) &&
- ((info.version_key & ~VERSION_KEY_MASK) > 0) &&
- (format == MDP_Y_CBCR_H2V2 ||
- format == MDP_Y_CRCB_H2V2 ||
- format == MDP_Y_CRCB_H2V2_TILE ||
- format == MDP_Y_CBCR_H2V2_TILE ||
- format == MDP_Y_CBCR_H2V1 ||
- format == MDP_Y_CRCB_H2V1)) {
+ ((info.version_key & ~VERSION_KEY_MASK) > 0) &&
+ (src_planes.num_planes == 2)) {
+ if (checkoffset(info.src.offset,
+ src_planes.plane_size[0],
+ src_len)) {
+ pr_err("%s: invalid src buffer (len=%lu offset=%x)\n",
+ __func__, src_len, info.src.offset);
+ rc = -ERANGE;
+ goto do_rotate_unlock_mutex;
+ }
+ if (checkoffset(info.dst.offset,
+ dst_planes.plane_size[0],
+ dst_len)) {
+ pr_err("%s: invalid dst buffer (len=%lu offset=%x)\n",
+ __func__, dst_len, info.dst.offset);
+ rc = -ERANGE;
+ goto do_rotate_unlock_mutex;
+ }
+
rc = get_img(info.src_chroma.memory_id,
(unsigned long *)&in_chroma_paddr,
- (unsigned long *)&len, &src_chroma_file);
+ (unsigned long *)&src_len, &src_chroma_file);
if (rc) {
- printk(KERN_ERR "%s: in chroma get_img() failed id=0x%08x\n",
+ pr_err("%s: in chroma get_img() failed id=0x%08x\n",
DRIVER_NAME, info.src_chroma.memory_id);
goto do_rotate_unlock_mutex;
}
- in_chroma_paddr += info.src_chroma.offset;
rc = get_img(info.dst_chroma.memory_id,
(unsigned long *)&out_chroma_paddr,
- (unsigned long *)&len, &dst_chroma_file);
+ (unsigned long *)&dst_len, &dst_chroma_file);
if (rc) {
- printk(KERN_ERR "%s: out chroma get_img() failed id=0x%08x\n",
+ pr_err("%s: out chroma get_img() failed id=0x%08x\n",
DRIVER_NAME, info.dst_chroma.memory_id);
- goto do_rotate_fail_dst_chr_img;
+ goto do_rotate_unlock_mutex;
}
+
+ if (checkoffset(info.src_chroma.offset,
+ src_planes.plane_size[1],
+ src_len)) {
+ pr_err("%s: invalid chr src buf len=%lu offset=%x\n",
+ __func__, src_len, info.src_chroma.offset);
+ rc = -ERANGE;
+ goto do_rotate_unlock_mutex;
+ }
+
+ if (checkoffset(info.dst_chroma.offset,
+ src_planes.plane_size[1],
+ dst_len)) {
+ pr_err("%s: invalid chr dst buf len=%lu offset=%x\n",
+ __func__, dst_len, info.dst_chroma.offset);
+ rc = -ERANGE;
+ goto do_rotate_unlock_mutex;
+ }
+
+ in_chroma_paddr += info.src_chroma.offset;
out_chroma_paddr += info.dst_chroma.offset;
+ } else {
+ if (checkoffset(info.src.offset,
+ src_planes.total_size,
+ src_len)) {
+ pr_err("%s: invalid src buffer (len=%lu offset=%x)\n",
+ __func__, src_len, info.src.offset);
+ rc = -ERANGE;
+ goto do_rotate_unlock_mutex;
+ }
+ if (checkoffset(info.dst.offset,
+ dst_planes.total_size,
+ dst_len)) {
+ pr_err("%s: invalid dst buffer (len=%lu offset=%x)\n",
+ __func__, dst_len, info.dst.offset);
+ rc = -ERANGE;
+ goto do_rotate_unlock_mutex;
+ }
}
+ in_paddr += info.src.offset;
+ out_paddr += info.dst.offset;
+
+ if (!in_chroma_paddr && src_planes.num_planes >= 2)
+ in_chroma_paddr = in_paddr + src_planes.plane_size[0];
+ if (!out_chroma_paddr && dst_planes.num_planes >= 2)
+ out_chroma_paddr = out_paddr + dst_planes.plane_size[0];
+ if (src_planes.num_planes >= 3)
+ in_chroma2_paddr = in_chroma_paddr + src_planes.plane_size[1];
+
cancel_delayed_work(&msm_rotator_dev->rot_clk_work);
if (msm_rotator_dev->rot_clk_state != CLK_EN) {
enable_rot_clks();
@@ -931,43 +962,19 @@
break;
case MDP_Y_CBCR_H2V2:
case MDP_Y_CRCB_H2V2:
- rc = msm_rotator_ycxcx_h2v2(msm_rotator_dev->img_info[s],
- in_paddr, out_paddr, use_imem,
- msm_rotator_dev->last_session_idx
- != s,
- in_chroma_paddr,
- out_chroma_paddr,
- IS_NONPLANAR);
- break;
case MDP_Y_CB_CR_H2V2:
case MDP_Y_CR_CB_H2V2:
- rc = msm_rotator_ycxcx_h2v2(msm_rotator_dev->img_info[s],
- in_paddr, out_paddr, use_imem,
- msm_rotator_dev->last_session_idx
- != s,
- in_chroma_paddr,
- out_chroma_paddr,
- IS_PLANAR);
- break;
case MDP_Y_CR_CB_GH2V2:
- rc = msm_rotator_ycxcx_h2v2(msm_rotator_dev->img_info[s],
- in_paddr, out_paddr, use_imem,
- msm_rotator_dev->last_session_idx
- != s,
- in_chroma_paddr,
- out_chroma_paddr,
- IS_PLANAR | IS_PLANAR_16ALIGNED);
- break;
case MDP_Y_CRCB_H2V2_TILE:
case MDP_Y_CBCR_H2V2_TILE:
- rc = msm_rotator_ycxcx_h2v2_tile(msm_rotator_dev->img_info[s],
- in_paddr, out_paddr, use_imem,
- msm_rotator_dev->last_session_idx
- != s,
- in_chroma_paddr,
- out_chroma_paddr);
- break;
-
+ rc = msm_rotator_ycxcx_h2v2(msm_rotator_dev->img_info[s],
+ in_paddr, out_paddr, use_imem,
+ msm_rotator_dev->last_session_idx
+ != s,
+ in_chroma_paddr,
+ out_chroma_paddr,
+ in_chroma2_paddr);
+ break;
case MDP_Y_CBCR_H2V1:
case MDP_Y_CRCB_H2V1:
rc = msm_rotator_ycxcx_h2v1(msm_rotator_dev->img_info[s],
@@ -1011,18 +1018,16 @@
msm_rotator_imem_free(ROTATOR_REQUEST);
#endif
schedule_delayed_work(&msm_rotator_dev->rot_clk_work, HZ);
+do_rotate_unlock_mutex:
if (dst_chroma_file)
put_pmem_file(dst_chroma_file);
-do_rotate_fail_dst_chr_img:
if (src_chroma_file)
put_pmem_file(src_chroma_file);
-do_rotate_unlock_mutex:
- mutex_unlock(&msm_rotator_dev->rotator_lock);
if (dst_file)
put_pmem_file(dst_file);
-do_rotate_fail_dst_img:
if (src_file)
put_pmem_file(src_file);
+ mutex_unlock(&msm_rotator_dev->rotator_lock);
dev_dbg(msm_rotator_dev->device, "%s() returning rc = %d\n",
__func__, rc);
return rc;
@@ -1034,25 +1039,28 @@
int rc = 0;
int s;
int first_free_index = INVALID_SESSION;
+ unsigned int dst_w, dst_h;
if (copy_from_user(&info, (void __user *)arg, sizeof(info)))
return -EFAULT;
+ if (info.rotations & MDP_ROT_90) {
+ dst_w = info.src_rect.h;
+ dst_h = info.src_rect.w;
+ } else {
+ dst_w = info.src_rect.w;
+ dst_h = info.src_rect.h;
+ }
+
if ((info.rotations > MSM_ROTATOR_MAX_ROT) ||
(info.src.height > MSM_ROTATOR_MAX_H) ||
(info.src.width > MSM_ROTATOR_MAX_W) ||
(info.dst.height > MSM_ROTATOR_MAX_H) ||
(info.dst.width > MSM_ROTATOR_MAX_W) ||
- ((info.src_rect.x + info.src_rect.w) > info.src.width) ||
- ((info.src_rect.y + info.src_rect.h) > info.src.height) ||
- ((info.rotations & MDP_ROT_90) &&
- ((info.dst_x + info.src_rect.h) > info.dst.width)) ||
- ((info.rotations & MDP_ROT_90) &&
- ((info.dst_y + info.src_rect.w) > info.dst.height)) ||
- (!(info.rotations & MDP_ROT_90) &&
- ((info.dst_x + info.src_rect.w) > info.dst.width)) ||
- (!(info.rotations & MDP_ROT_90) &&
- ((info.dst_y + info.src_rect.h) > info.dst.height)))
+ checkoffset(info.src_rect.x, info.src_rect.w, info.src.width) ||
+ checkoffset(info.src_rect.y, info.src_rect.h, info.src.height) ||
+ checkoffset(info.dst_x, dst_w, info.dst.width) ||
+ checkoffset(info.dst_y, dst_h, info.dst.height))
return -EINVAL;
switch (info.src.format) {
diff --git a/drivers/gpu/msm/adreno.h b/drivers/gpu/msm/adreno.h
index 0098045..51ee31a 100644
--- a/drivers/gpu/msm/adreno.h
+++ b/drivers/gpu/msm/adreno.h
@@ -54,7 +54,6 @@
enum adreno_gpurev gpurev;
struct kgsl_memregion gmemspace;
struct adreno_context *drawctxt_active;
- wait_queue_head_t ib1_wq;
const char *pfp_fwfile;
unsigned int *pfp_fw;
size_t pfp_fw_size;
diff --git a/drivers/input/keyboard/pmic8xxx-keypad.c b/drivers/input/keyboard/pmic8xxx-keypad.c
index f0629ce..0866332 100644
--- a/drivers/input/keyboard/pmic8xxx-keypad.c
+++ b/drivers/input/keyboard/pmic8xxx-keypad.c
@@ -710,9 +710,9 @@
return 0;
err_pmic_reg_read:
- free_irq(kp->key_stuck_irq, NULL);
+ free_irq(kp->key_stuck_irq, kp);
err_req_stuck_irq:
- free_irq(kp->key_sense_irq, NULL);
+ free_irq(kp->key_sense_irq, kp);
err_gpio_config:
err_get_irq:
input_free_device(kp->input);
@@ -727,8 +727,8 @@
struct pmic8xxx_kp *kp = platform_get_drvdata(pdev);
device_init_wakeup(&pdev->dev, 0);
- free_irq(kp->key_stuck_irq, NULL);
- free_irq(kp->key_sense_irq, NULL);
+ free_irq(kp->key_stuck_irq, kp);
+ free_irq(kp->key_sense_irq, kp);
input_unregister_device(kp->input);
kfree(kp);
diff --git a/drivers/media/video/msm/msm_mctl_pp.c b/drivers/media/video/msm/msm_mctl_pp.c
index 4f82d32..a09514b 100644
--- a/drivers/media/video/msm/msm_mctl_pp.c
+++ b/drivers/media/video/msm/msm_mctl_pp.c
@@ -57,9 +57,8 @@
/* Copy the divert frame struct into event ctrl struct. */
isp_event->isp_data.div_frame = *div;
- D("%s inst=%p, img_mode=%d, frame_id=%d,phy=0x%x,len=%d\n",
- __func__, pcam_inst, pcam_inst->image_mode, div->frame_id,
- (uint32_t)div->phy_addr, div->length);
+ D("%s inst=%p, img_mode=%d, frame_id=%d\n", __func__,
+ pcam_inst, pcam_inst->image_mode, div->frame.frame_id);
v4l2_event_queue(
pmctl->config_device->config_stat_event_queue.pvdev,
&v4l2_evt);
@@ -119,7 +118,7 @@
uint32_t frame_id, int pp_type)
{
struct msm_cam_v4l2_dev_inst *pcam_inst;
- int idx, rc = 0;
+ int idx, rc = 0, i, buf_idx;
int del_buf = 0; /* delete from free queue */
struct msm_cam_evt_divert_frame div;
struct msm_frame_buffer *vb = NULL;
@@ -132,32 +131,61 @@
del_buf, msg_type, fbuf);
if (!vb)
return -EINVAL;
+
vb->vidbuf.v4l2_buf.sequence = frame_id;
- mem = vb2_plane_cookie(&vb->vidbuf, 0);
+ buf_idx = vb->vidbuf.v4l2_buf.index;
div.image_mode = pcam_inst->image_mode;
div.op_mode = pcam_inst->pcam->op_mode;
div.inst_idx = pcam_inst->my_index;
div.node_idx = pcam_inst->pcam->vnode_id;
- div.phy_addr =
- videobuf2_to_pmem_contig(&vb->vidbuf, 0);
- div.phy_offset = mem->addr_offset;
- div.y_off = 0;
- div.cbcr_off = mem->offset.sp_off.cbcr_off;
- div.fd = (int)mem->vaddr;
- div.vb = (uint32_t)vb;
p_mctl->pp_info.cur_frame_id[pcam_inst->image_mode]++;
if (p_mctl->pp_info.cur_frame_id[pcam_inst->image_mode] == 0)
p_mctl->pp_info.cur_frame_id[pcam_inst->image_mode]++;
- div.frame_id =
+ div.frame.frame_id =
p_mctl->pp_info.cur_frame_id[pcam_inst->image_mode];
- div.path = mem->path;
- div.length = mem->size;
- msm_mctl_gettimeofday(&div.timestamp);
- vb->vidbuf.v4l2_buf.timestamp = div.timestamp;
+ div.frame.handle = (uint32_t)vb;
+ msm_mctl_gettimeofday(&div.frame.timestamp);
+ vb->vidbuf.v4l2_buf.timestamp = div.frame.timestamp;
div.do_pp = pp_type;
- if (!pp_type) {
- p_mctl->pp_info.div_frame[pcam_inst->image_mode].ch_paddr[0] =
- div.phy_addr;
+ /* Get the cookie for 1st plane and store the path.
+ * Also use this to check the number of planes in
+ * this buffer.*/
+ mem = vb2_plane_cookie(&vb->vidbuf, 0);
+ div.frame.path = mem->path;
+ if (mem->buffer_type == VIDEOBUF2_SINGLE_PLANE) {
+ /* This buffer contains only 1 plane. Use the
+ * single planar structure to store the info.*/
+ div.frame.num_planes = 1;
+ div.frame.sp.phy_addr =
+ videobuf2_to_pmem_contig(&vb->vidbuf, 0);
+ div.frame.sp.addr_offset = mem->addr_offset;
+ div.frame.sp.y_off = 0;
+ div.frame.sp.cbcr_off = mem->offset.sp_off.cbcr_off;
+ div.frame.sp.fd = (int)mem->vaddr;
+ div.frame.sp.length = mem->size;
+ if (!pp_type)
+ p_mctl->pp_info.div_frame[pcam_inst->image_mode].
+ ch_paddr[0] = div.frame.sp.phy_addr;
+ } else {
+ /* This buffer contains multiple planes. Use the mutliplanar
+ * structure to store the info. */
+ div.frame.num_planes = pcam_inst->plane_info.num_planes;
+ /* Now traverse through all the planes of the buffer to
+ * fill out the plane info. */
+ for (i = 0; i < div.frame.num_planes; i++) {
+ mem = vb2_plane_cookie(&vb->vidbuf, i);
+ div.frame.mp[i].phy_addr =
+ videobuf2_to_pmem_contig(&vb->vidbuf, i);
+ div.frame.mp[i].data_offset =
+ pcam_inst->buf_offset[buf_idx][i].data_offset;
+ div.frame.mp[i].addr_offset =
+ mem->addr_offset;
+ div.frame.mp[i].fd = (int)mem->vaddr;
+ div.frame.mp[i].length = mem->size;
+ }
+ if (!pp_type)
+ p_mctl->pp_info.div_frame[pcam_inst->image_mode].
+ ch_paddr[0] = div.frame.mp[0].phy_addr;
}
rc = msm_mctl_pp_buf_divert(p_mctl, pcam_inst, &div);
return rc;
@@ -622,7 +650,7 @@
if (copy_from_user(&frame, arg,
sizeof(struct msm_cam_evt_divert_frame)))
return -EFAULT;
- switch (frame.path) {
+ switch (frame.frame.path) {
case OUTPUT_TYPE_P:
msg_type = VFE_MSG_OUTPUT_P;
image_mode = MSM_V4L2_EXT_CAPTURE_MODE_PREVIEW;
@@ -642,8 +670,8 @@
}
rc = msm_mctl_reserve_free_buf(p_mctl, msg_type, &free_buf);
if (rc == 0) {
- frame.phy_addr = free_buf.ch_paddr[0];
- frame.vb = free_buf.vb;
+ frame.frame.sp.phy_addr = free_buf.ch_paddr[0];
+ frame.frame.handle = free_buf.vb;
if (copy_to_user((void *)arg,
&frame,
sizeof(frame))) {
@@ -667,7 +695,7 @@
if (copy_from_user(&frame, arg,
sizeof(struct msm_cam_evt_divert_frame)))
return -EFAULT;
- switch (frame.path) {
+ switch (frame.frame.path) {
case OUTPUT_TYPE_P:
msg_type = VFE_MSG_OUTPUT_P;
image_mode = MSM_V4L2_EXT_CAPTURE_MODE_PREVIEW;
@@ -685,7 +713,7 @@
rc = -EFAULT;
return rc;
}
- free_buf.ch_paddr[0] = frame.phy_addr;
+ free_buf.ch_paddr[0] = frame.frame.sp.phy_addr;
rc = msm_mctl_release_free_buf(p_mctl, msg_type, &free_buf);
D("%s: release free buf, rc = %d, phy = 0x%x",
__func__, rc, free_buf.ch_paddr[0]);
@@ -713,7 +741,7 @@
struct msm_cam_media_controller *p_mctl,
void __user *arg)
{
- struct msm_frame frame;
+ struct msm_pp_frame frame;
int msg_type, image_mode, rc = 0;
int dirty = 0;
struct msm_free_buf buf;
@@ -721,6 +749,7 @@
if (copy_from_user(&frame, arg, sizeof(frame)))
return -EFAULT;
+
spin_lock_irqsave(&p_mctl->pp_info.lock, flags);
switch (frame.path) {
case OUTPUT_TYPE_P:
@@ -751,8 +780,12 @@
/* dirty frame. should not pass to app */
dirty = 1;
}
- } else
- buf.ch_paddr[0] = frame.buffer;
+ } else {
+ if (frame.num_planes > 1)
+ buf.ch_paddr[0] = frame.mp[0].phy_addr;
+ else
+ buf.ch_paddr[0] = frame.sp.phy_addr;
+ }
spin_unlock_irqrestore(&p_mctl->pp_info.lock, flags);
/* here buf.addr is phy_addr */
rc = msm_mctl_buf_done_pp(p_mctl, msg_type, &buf, dirty);
diff --git a/drivers/mfd/pm8018-core.c b/drivers/mfd/pm8018-core.c
index 1567c5b..528f232 100644
--- a/drivers/mfd/pm8018-core.c
+++ b/drivers/mfd/pm8018-core.c
@@ -21,6 +21,7 @@
#include <linux/mfd/core.h>
#include <linux/mfd/pm8xxx/pm8018.h>
#include <linux/mfd/pm8xxx/core.h>
+#include <linux/leds-pm8xxx.h>
/* PMIC PM8018 SSBI Addresses */
@@ -215,6 +216,16 @@
.pdata_size = sizeof("pm8018-dbg"),
};
+static struct mfd_cell pwm_cell __devinitdata = {
+ .name = PM8XXX_PWM_DEV_NAME,
+ .id = -1,
+};
+
+static struct mfd_cell leds_cell __devinitdata = {
+ .name = PM8XXX_LEDS_DEV_NAME,
+ .id = -1,
+};
+
static int __devinit
pm8018_add_subdevices(const struct pm8018_platform_data *pdata,
struct pm8018 *pmic)
@@ -303,6 +314,15 @@
irq_base);
if (ret) {
pr_err("Failed to add adc subdevice ret=%d\n", ret);
+ }
+ }
+
+ if (pdata->leds_pdata) {
+ leds_cell.platform_data = pdata->leds_pdata;
+ leds_cell.pdata_size = sizeof(struct pm8xxx_led_platform_data);
+ ret = mfd_add_devices(pmic->dev, 0, &leds_cell, 1, NULL, 0);
+ if (ret) {
+ pr_err("Failed to add leds subdevice ret=%d\n", ret);
goto bail;
}
}
@@ -313,6 +333,12 @@
goto bail;
}
+ ret = mfd_add_devices(pmic->dev, 0, &pwm_cell, 1, NULL, 0);
+ if (ret) {
+ pr_err("Failed to add pwm subdevice ret=%d\n", ret);
+ goto bail;
+ }
+
/* Add one device for each regulator used by the board. */
if (pdata->num_regulators > 0 && pdata->regulator_pdatas) {
mfd_regulators = kzalloc(sizeof(struct mfd_cell)
diff --git a/drivers/usb/gadget/android.c b/drivers/usb/gadget/android.c
index a86e049..8d58833 100644
--- a/drivers/usb/gadget/android.c
+++ b/drivers/usb/gadget/android.c
@@ -320,7 +320,7 @@
struct device *device, struct device_attribute *attr,
const char *buff, size_t size)
{
- strncpy(diag_clients, buff, sizeof(diag_clients));
+ strlcpy(diag_clients, buff, sizeof(diag_clients));
return size;
}
@@ -348,7 +348,7 @@
int once = 0, err = -1;
int (*notify)(uint32_t, const char *) = NULL;
- strncpy(buf, diag_clients, sizeof(buf));
+ strlcpy(buf, diag_clients, sizeof(buf));
b = strim(buf);
while (b) {
@@ -381,7 +381,7 @@
struct device *device, struct device_attribute *attr,
const char *buff, size_t size)
{
- strncpy(serial_transports, buff, sizeof(serial_transports));
+ strlcpy(serial_transports, buff, sizeof(serial_transports));
return size;
}
@@ -407,7 +407,7 @@
goto bind_config;
serial_initialized = 1;
- strncpy(buf, serial_transports, sizeof(buf));
+ strlcpy(buf, serial_transports, sizeof(buf));
b = strim(buf);
while (b) {
@@ -673,7 +673,7 @@
{
struct android_usb_function *f = dev_get_drvdata(dev);
struct rndis_function_config *config = f->config;
- return sprintf(buf, "%s\n", config->manufacturer);
+ return snprintf(buf, PAGE_SIZE, "%s\n", config->manufacturer);
}
static ssize_t rndis_manufacturer_store(struct device *dev,
@@ -684,7 +684,7 @@
if (size >= sizeof(config->manufacturer))
return -EINVAL;
- if (sscanf(buf, "%s", config->manufacturer) == 1)
+ if (sscanf(buf, "%255s", config->manufacturer) == 1)
return size;
return -1;
}
@@ -697,7 +697,7 @@
{
struct android_usb_function *f = dev_get_drvdata(dev);
struct rndis_function_config *config = f->config;
- return sprintf(buf, "%d\n", config->wceis);
+ return snprintf(buf, PAGE_SIZE, "%d\n", config->wceis);
}
static ssize_t rndis_wceis_store(struct device *dev,
@@ -722,7 +722,7 @@
{
struct android_usb_function *f = dev_get_drvdata(dev);
struct rndis_function_config *rndis = f->config;
- return sprintf(buf, "%02x:%02x:%02x:%02x:%02x:%02x\n",
+ return snprintf(buf, PAGE_SIZE, "%02x:%02x:%02x:%02x:%02x:%02x\n",
rndis->ethaddr[0], rndis->ethaddr[1], rndis->ethaddr[2],
rndis->ethaddr[3], rndis->ethaddr[4], rndis->ethaddr[5]);
}
@@ -749,7 +749,7 @@
{
struct android_usb_function *f = dev_get_drvdata(dev);
struct rndis_function_config *config = f->config;
- return sprintf(buf, "%04x\n", config->vendorID);
+ return snprintf(buf, PAGE_SIZE, "%04x\n", config->vendorID);
}
static ssize_t rndis_vendorID_store(struct device *dev,
@@ -844,7 +844,7 @@
{
struct android_usb_function *f = dev_get_drvdata(dev);
struct mass_storage_function_config *config = f->config;
- return sprintf(buf, "%s\n", config->common->inquiry_string);
+ return snprintf(buf, PAGE_SIZE, "%s\n", config->common->inquiry_string);
}
static ssize_t mass_storage_inquiry_store(struct device *dev,
@@ -854,7 +854,7 @@
struct mass_storage_function_config *config = f->config;
if (size >= sizeof(config->common->inquiry_string))
return -EINVAL;
- if (sscanf(buf, "%s", config->common->inquiry_string) != 1)
+ if (sscanf(buf, "%28s", config->common->inquiry_string) != 1)
return -EINVAL;
return size;
}
@@ -935,7 +935,7 @@
struct android_usb_function *f;
struct device_attribute **attrs;
struct device_attribute *attr;
- int err;
+ int err = 0;
int index = 0;
for (; (f = *functions++); index++) {
@@ -1048,7 +1048,7 @@
char *buff = buf;
list_for_each_entry(f, &dev->enabled_functions, enabled_list)
- buff += sprintf(buff, "%s,", f->name);
+ buff += snprintf(buff, PAGE_SIZE, "%s,", f->name);
if (buff != buf)
*(buff-1) = '\n';
return buff - buf;
@@ -1065,7 +1065,7 @@
INIT_LIST_HEAD(&dev->enabled_functions);
- strncpy(buf, buff, sizeof(buf));
+ strlcpy(buf, buff, sizeof(buf));
b = strim(buf);
while (b) {
@@ -1084,7 +1084,7 @@
char *buf)
{
struct android_dev *dev = dev_get_drvdata(pdev);
- return sprintf(buf, "%d\n", dev->enabled);
+ return snprintf(buf, PAGE_SIZE, "%d\n", dev->enabled);
}
static ssize_t enable_store(struct device *pdev, struct device_attribute *attr,
@@ -1138,7 +1138,7 @@
state = "CONNECTED";
spin_unlock_irqrestore(&cdev->lock, flags);
out:
- return sprintf(buf, "%s\n", state);
+ return snprintf(buf, PAGE_SIZE, "%s\n", state);
}
#define DESCRIPTOR_ATTR(field, format_string) \
@@ -1146,7 +1146,8 @@
field ## _show(struct device *dev, struct device_attribute *attr, \
char *buf) \
{ \
- return sprintf(buf, format_string, device_desc.field); \
+ return snprintf(buf, PAGE_SIZE, \
+ format_string, device_desc.field); \
} \
static ssize_t \
field ## _store(struct device *dev, struct device_attribute *attr, \
@@ -1166,14 +1167,14 @@
field ## _show(struct device *dev, struct device_attribute *attr, \
char *buf) \
{ \
- return sprintf(buf, "%s", buffer); \
+ return snprintf(buf, PAGE_SIZE, "%s", buffer); \
} \
static ssize_t \
field ## _store(struct device *dev, struct device_attribute *attr, \
const char *buf, size_t size) \
{ \
if (size >= sizeof(buffer)) return -EINVAL; \
- if (sscanf(buf, "%s", buffer) == 1) { \
+ if (sscanf(buf, "%255s", buffer) == 1) { \
return size; \
} \
return -1; \
@@ -1261,9 +1262,10 @@
device_desc.iProduct = id;
/* Default strings - should be updated by userspace */
- strncpy(manufacturer_string, "Android", sizeof(manufacturer_string) - 1);
- strncpy(product_string, "Android", sizeof(product_string) - 1);
- strncpy(serial_string, "0123456789ABCDEF", sizeof(serial_string) - 1);
+ strlcpy(manufacturer_string, "Android",
+ sizeof(manufacturer_string) - 1);
+ strlcpy(product_string, "Android", sizeof(product_string) - 1);
+ strlcpy(serial_string, "0123456789ABCDEF", sizeof(serial_string) - 1);
id = usb_string_id(cdev);
if (id < 0)
diff --git a/drivers/usb/gadget/f_rmnet.c b/drivers/usb/gadget/f_rmnet.c
index ebbd1d8..69f158a 100644
--- a/drivers/usb/gadget/f_rmnet.c
+++ b/drivers/usb/gadget/f_rmnet.c
@@ -701,6 +701,9 @@
f->descriptors = usb_copy_descriptors(rmnet_fs_function);
+ if (!f->descriptors)
+ goto fail;
+
dev->fs.in = usb_find_endpoint(rmnet_fs_function,
f->descriptors,
&rmnet_fs_in_desc);
@@ -722,6 +725,9 @@
/* copy descriptors, and track endpoint copies */
f->hs_descriptors = usb_copy_descriptors(rmnet_hs_function);
+ if (!f->hs_descriptors)
+ goto fail;
+
dev->hs.in = usb_find_endpoint(rmnet_hs_function,
f->hs_descriptors, &rmnet_hs_in_desc);
dev->hs.out = usb_find_endpoint(rmnet_hs_function,
@@ -737,6 +743,9 @@
return 0;
+fail:
+ if (f->descriptors)
+ usb_free_descriptors(f->descriptors);
ep_notify_alloc_fail:
dev->notify->driver_data = NULL;
dev->notify = NULL;
diff --git a/drivers/video/msm/mdp.c b/drivers/video/msm/mdp.c
index c522b0f..936b5d4 100644
--- a/drivers/video/msm/mdp.c
+++ b/drivers/video/msm/mdp.c
@@ -1632,6 +1632,9 @@
static void mdp_early_suspend(struct early_suspend *h)
{
mdp_suspend_sub();
+#ifdef CONFIG_FB_MSM_DTV
+ mdp4_dtv_set_black_screen();
+#endif
if (footswitch && mdp_rev > MDP_REV_42)
regulator_disable(footswitch);
}
diff --git a/drivers/video/msm/mdp4.h b/drivers/video/msm/mdp4.h
index fd2f13e..ef3092b 100644
--- a/drivers/video/msm/mdp4.h
+++ b/drivers/video/msm/mdp4.h
@@ -389,6 +389,16 @@
/* empty */
}
#endif
+
+#ifdef CONFIG_FB_MSM_HDMI_AS_PRIMARY
+void mdp4_dtv_set_black_screen(void);
+#else
+static inline void mdp4_dtv_set_black_screen(void)
+{
+ /* empty */
+}
+#endif
+
void mdp4_dtv_overlay(struct msm_fb_data_type *mfd);
int mdp4_dtv_on(struct platform_device *pdev);
int mdp4_dtv_off(struct platform_device *pdev);
diff --git a/drivers/video/msm/mdp4_overlay_dtv.c b/drivers/video/msm/mdp4_overlay_dtv.c
index 82bce01..a8ace6b 100644
--- a/drivers/video/msm/mdp4_overlay_dtv.c
+++ b/drivers/video/msm/mdp4_overlay_dtv.c
@@ -378,6 +378,36 @@
complete(&dtv_pipe->comp);
}
+#ifdef CONFIG_FB_MSM_HDMI_AS_PRIMARY
+void mdp4_dtv_set_black_screen(void)
+{
+ char *rgb_base;
+ /*Black color*/
+ uint32 color = 0x00000000;
+ uint32 temp_src_format;
+
+ if (!dtv_pipe) {
+ pr_err("dtv_pipe is not configured yet\n");
+ return;
+ }
+ rgb_base = MDP_BASE + MDP4_RGB_BASE;
+ rgb_base += (MDP4_RGB_OFF * dtv_pipe->pipe_num);
+
+ mdp_pipe_ctrl(MDP_CMD_BLOCK, MDP_BLOCK_POWER_ON, FALSE);
+ /*
+ * RGB Constant Color
+ */
+ MDP_OUTP(rgb_base + 0x1008, color);
+ /*
+ * MDP_RGB_SRC_FORMAT
+ */
+ temp_src_format = inpdw(rgb_base + 0x0050);
+ MDP_OUTP(rgb_base + 0x0050, temp_src_format | BIT(22));
+ mdp4_overlay_reg_flush(dtv_pipe, 1);
+ mdp_pipe_ctrl(MDP_CMD_BLOCK, MDP_BLOCK_POWER_OFF, FALSE);
+}
+#endif
+
void mdp4_dtv_overlay(struct msm_fb_data_type *mfd)
{
struct fb_info *fbi = mfd->fbi;
diff --git a/drivers/video/msm/mipi_tc358764_dsi2lvds.c b/drivers/video/msm/mipi_tc358764_dsi2lvds.c
index b1cdf78..2594c1d 100644
--- a/drivers/video/msm/mipi_tc358764_dsi2lvds.c
+++ b/drivers/video/msm/mipi_tc358764_dsi2lvds.c
@@ -186,7 +186,7 @@
#define DEBUG01 0x05A4 /* LVDS Data */
/* PWM */
-#define PWM_FREQ_HZ 210
+#define PWM_FREQ_HZ (66*1000) /* 66 KHZ */
#define PWM_LEVEL 15
#define PWM_PERIOD_USEC (USEC_PER_SEC / PWM_FREQ_HZ)
#define PWM_DUTY_LEVEL (PWM_PERIOD_USEC / PWM_LEVEL)
diff --git a/include/linux/irq.h b/include/linux/irq.h
index 243d8e9..d03bc09 100644
--- a/include/linux/irq.h
+++ b/include/linux/irq.h
@@ -113,14 +113,18 @@
};
struct msi_desc;
+struct irq_domain;
/**
* struct irq_data - per irq and irq chip data passed down to chip functions
* @irq: interrupt number
+ * @hwirq: hardware interrupt number, local to the interrupt domain
* @node: node index useful for balancing
* @state_use_accessors: status information for irq chip functions.
* Use accessor functions to deal with it
* @chip: low level interrupt hardware access
+ * @domain: Interrupt translation domain; responsible for mapping
+ * between hwirq number and linux irq number.
* @handler_data: per-IRQ data for the irq_chip methods
* @chip_data: platform-specific per-chip private data for the chip
* methods, to allow shared chip implementations
@@ -133,9 +137,11 @@
*/
struct irq_data {
unsigned int irq;
+ unsigned long hwirq;
unsigned int node;
unsigned int state_use_accessors;
struct irq_chip *chip;
+ struct irq_domain *domain;
void *handler_data;
void *chip_data;
struct msi_desc *msi_desc;
diff --git a/include/linux/irqdomain.h b/include/linux/irqdomain.h
new file mode 100644
index 0000000..e807ad6
--- /dev/null
+++ b/include/linux/irqdomain.h
@@ -0,0 +1,91 @@
+/*
+ * irq_domain - IRQ translation domains
+ *
+ * Translation infrastructure between hw and linux irq numbers. This is
+ * helpful for interrupt controllers to implement mapping between hardware
+ * irq numbers and the Linux irq number space.
+ *
+ * irq_domains also have a hook for translating device tree interrupt
+ * representation into a hardware irq number that can be mapped back to a
+ * Linux irq number without any extra platform support code.
+ *
+ * irq_domain is expected to be embedded in an interrupt controller's private
+ * data structure.
+ */
+#ifndef _LINUX_IRQDOMAIN_H
+#define _LINUX_IRQDOMAIN_H
+
+#include <linux/irq.h>
+#include <linux/mod_devicetable.h>
+
+#ifdef CONFIG_IRQ_DOMAIN
+struct device_node;
+struct irq_domain;
+
+/**
+ * struct irq_domain_ops - Methods for irq_domain objects
+ * @to_irq: (optional) given a local hardware irq number, return the linux
+ * irq number. If to_irq is not implemented, then the irq_domain
+ * will use this translation: irq = (domain->irq_base + hwirq)
+ * @dt_translate: Given a device tree node and interrupt specifier, decode
+ * the hardware irq number and linux irq type value.
+ */
+struct irq_domain_ops {
+ unsigned int (*to_irq)(struct irq_domain *d, unsigned long hwirq);
+
+#ifdef CONFIG_OF
+ int (*dt_translate)(struct irq_domain *d, struct device_node *node,
+ const u32 *intspec, unsigned int intsize,
+ unsigned long *out_hwirq, unsigned int *out_type);
+#endif /* CONFIG_OF */
+};
+
+/**
+ * struct irq_domain - Hardware interrupt number translation object
+ * @list: Element in global irq_domain list.
+ * @irq_base: Start of irq_desc range assigned to the irq_domain. The creator
+ * of the irq_domain is responsible for allocating the array of
+ * irq_desc structures.
+ * @nr_irq: Number of irqs managed by the irq domain
+ * @ops: pointer to irq_domain methods
+ * @priv: private data pointer for use by owner. Not touched by irq_domain
+ * core code.
+ * @of_node: (optional) Pointer to device tree nodes associated with the
+ * irq_domain. Used when decoding device tree interrupt specifiers.
+ */
+struct irq_domain {
+ struct list_head list;
+ unsigned int irq_base;
+ unsigned int nr_irq;
+ const struct irq_domain_ops *ops;
+ void *priv;
+ struct device_node *of_node;
+};
+
+/**
+ * irq_domain_to_irq() - Translate from a hardware irq to a linux irq number
+ *
+ * Returns the linux irq number associated with a hardware irq. By default,
+ * the mapping is irq == domain->irq_base + hwirq, but this mapping can
+ * be overridden if the irq_domain implements a .to_irq() hook.
+ */
+static inline unsigned int irq_domain_to_irq(struct irq_domain *d,
+ unsigned long hwirq)
+{
+ return d->ops->to_irq ? d->ops->to_irq(d, hwirq) : d->irq_base + hwirq;
+}
+
+extern void irq_domain_add(struct irq_domain *domain);
+extern void irq_domain_del(struct irq_domain *domain);
+#endif /* CONFIG_IRQ_DOMAIN */
+
+#if defined(CONFIG_IRQ_DOMAIN) && defined(CONFIG_OF_IRQ)
+extern void irq_domain_add_simple(struct device_node *controller, int irq_base);
+extern void irq_domain_generate_simple(const struct of_device_id *match,
+ u64 phys_base, unsigned int irq_start);
+#else /* CONFIG_IRQ_DOMAIN && CONFIG_OF_IRQ */
+static inline void irq_domain_generate_simple(const struct of_device_id *match,
+ u64 phys_base, unsigned int irq_start) { }
+#endif /* CONFIG_IRQ_DOMAIN && CONFIG_OF_IRQ */
+
+#endif /* _LINUX_IRQDOMAIN_H */
diff --git a/include/linux/mfd/pm8xxx/pm8018.h b/include/linux/mfd/pm8xxx/pm8018.h
index 69e781c..1093409 100644
--- a/include/linux/mfd/pm8xxx/pm8018.h
+++ b/include/linux/mfd/pm8xxx/pm8018.h
@@ -27,6 +27,8 @@
#include <linux/mfd/pm8xxx/misc.h>
#include <linux/regulator/pm8018-regulator.h>
#include <linux/mfd/pm8xxx/pm8xxx-adc.h>
+#include <linux/mfd/pm8xxx/pwm.h>
+#include <linux/leds-pm8xxx.h>
#define PM8018_CORE_DEV_NAME "pm8018-core"
@@ -65,6 +67,7 @@
struct pm8018_regulator_platform_data *regulator_pdatas;
struct pm8xxx_adc_platform_data *adc_pdata;
int num_regulators;
+ struct pm8xxx_led_platform_data *leds_pdata;
};
#endif
diff --git a/include/linux/of_irq.h b/include/linux/of_irq.h
index e6955f5..cd2e61c 100644
--- a/include/linux/of_irq.h
+++ b/include/linux/of_irq.h
@@ -63,6 +63,9 @@
extern unsigned int irq_create_of_mapping(struct device_node *controller,
const u32 *intspec,
unsigned int intsize);
+#ifdef CONFIG_IRQ_DOMAIN
+extern void irq_dispose_mapping(unsigned int irq);
+#endif
extern int of_irq_to_resource(struct device_node *dev, int index,
struct resource *r);
extern int of_irq_count(struct device_node *dev);
@@ -70,6 +73,7 @@
struct resource *res, int nr_irqs);
extern struct device_node *of_irq_find_parent(struct device_node *child);
+
#endif /* CONFIG_OF_IRQ */
#endif /* CONFIG_OF */
#endif /* __OF_IRQ_H */
diff --git a/include/media/msm_camera.h b/include/media/msm_camera.h
index befd768..1ebbf88 100644
--- a/include/media/msm_camera.h
+++ b/include/media/msm_camera.h
@@ -221,22 +221,52 @@
void *data;
};
+struct msm_pp_frame_sp {
+ /* phy addr of the buffer */
+ unsigned long phy_addr;
+ uint32_t y_off;
+ uint32_t cbcr_off;
+ /* buffer length */
+ uint32_t length;
+ int32_t fd;
+ uint32_t addr_offset;
+ /* mapped addr */
+ unsigned long vaddr;
+};
+
+struct msm_pp_frame_mp {
+ /* phy addr of the plane */
+ unsigned long phy_addr;
+ /* offset of plane data */
+ uint32_t data_offset;
+ /* plane length */
+ uint32_t length;
+ int32_t fd;
+ uint32_t addr_offset;
+ /* mapped addr */
+ unsigned long vaddr;
+};
+
+struct msm_pp_frame {
+ uint32_t handle; /* stores vb cookie */
+ uint32_t frame_id;
+ int path;
+ unsigned short image_type;
+ unsigned short num_planes; /* 1 for sp */
+ struct timeval timestamp;
+ union {
+ struct msm_pp_frame_sp sp;
+ struct msm_pp_frame_mp mp[MAX_PLANES];
+ };
+};
+
struct msm_cam_evt_divert_frame {
unsigned short image_mode;
unsigned short op_mode;
unsigned short inst_idx;
unsigned short node_idx;
- unsigned long phy_addr;
- uint32_t phy_offset;
- uint32_t y_off;
- uint32_t cbcr_off;
- int32_t fd;
- uint32_t frame_id;
- int path;
- uint32_t length;
- struct timeval timestamp;
+ struct msm_pp_frame frame;
int do_pp;
- uint32_t vb;
};
struct msm_mctl_pp_cmd_ack_event {
@@ -471,25 +501,6 @@
#define MSM_PLANE_Y 0
#define MSM_PLANE_UV 1
-struct msm_buffer_plane {
- int type;
- uint32_t offset;
- uint32_t length;
- uint32_t error;
- unsigned long buffer;
- unsigned long addr;
- uint32_t addr_offset;
- int fd;
-};
-struct msm_buffer {
- struct timeval timestamp;
- int memory_type;
- uint32_t frame_id;
- int path;
- int num;
- struct msm_buffer_plane planes[MSM_PLANE_MAX];
-};
-
struct msm_frame {
struct timespec ts;
int path;
diff --git a/include/media/msm_isp.h b/include/media/msm_isp.h
index f6668ef..b7fd30f 100644
--- a/include/media/msm_isp.h
+++ b/include/media/msm_isp.h
@@ -273,33 +273,5 @@
/* TBD: 3D related */
};
-struct msm_pp_frame_sp {
- unsigned long phy_addr;
- uint32_t y_off;
- uint32_t cbcr_off;
- uint32_t length;
- int32_t fd;
- uint32_t addr_offset;
-};
-
-struct msm_pp_frame_mp {
- unsigned long phy_addr;
- uint32_t data_offset;
- uint32_t length;
- int32_t fd;
- uint32_t addr_offset;
-};
-
-struct msm_pp_frame {
- uint32_t handle;
- uint32_t frame_id;
- unsigned short image_type;
- unsigned short num_planes; /* 1 for sp */
- struct timeval timestamp;
- union {
- struct msm_pp_frame_sp sp;
- };
-};
-
#endif /*__MSM_ISP_H__*/
diff --git a/kernel/irq/Kconfig b/kernel/irq/Kconfig
index d1d051b3..5a38bf4 100644
--- a/kernel/irq/Kconfig
+++ b/kernel/irq/Kconfig
@@ -52,6 +52,10 @@
config GENERIC_IRQ_CHIP
bool
+# Generic irq_domain hw <--> linux irq number translation
+config IRQ_DOMAIN
+ bool
+
# Support forced irq threading
config IRQ_FORCED_THREADING
bool
diff --git a/kernel/irq/Makefile b/kernel/irq/Makefile
index 7329005..fff1738 100644
--- a/kernel/irq/Makefile
+++ b/kernel/irq/Makefile
@@ -2,6 +2,7 @@
obj-y := irqdesc.o handle.o manage.o spurious.o resend.o chip.o dummychip.o devres.o
obj-$(CONFIG_GENERIC_IRQ_CHIP) += generic-chip.o
obj-$(CONFIG_GENERIC_IRQ_PROBE) += autoprobe.o
+obj-$(CONFIG_IRQ_DOMAIN) += irqdomain.o
obj-$(CONFIG_PROC_FS) += proc.o
obj-$(CONFIG_GENERIC_PENDING_IRQ) += migration.o
obj-$(CONFIG_PM_SLEEP) += pm.o
diff --git a/kernel/irq/chip.c b/kernel/irq/chip.c
index dc154f2..45e149c 100644
--- a/kernel/irq/chip.c
+++ b/kernel/irq/chip.c
@@ -396,7 +396,8 @@
* then mask it and get out of here:
*/
if (unlikely(!desc->action || irqd_irq_disabled(&desc->irq_data))) {
- desc->istate |= IRQS_PENDING;
+ if (!irq_settings_is_level(desc))
+ desc->istate |= IRQS_PENDING;
mask_irq(desc);
goto out;
}
diff --git a/kernel/irq/irqdomain.c b/kernel/irq/irqdomain.c
new file mode 100644
index 0000000..d5828da
--- /dev/null
+++ b/kernel/irq/irqdomain.c
@@ -0,0 +1,180 @@
+#include <linux/irq.h>
+#include <linux/irqdomain.h>
+#include <linux/module.h>
+#include <linux/mutex.h>
+#include <linux/of.h>
+#include <linux/of_address.h>
+#include <linux/slab.h>
+
+static LIST_HEAD(irq_domain_list);
+static DEFINE_MUTEX(irq_domain_mutex);
+
+/**
+ * irq_domain_add() - Register an irq_domain
+ * @domain: ptr to initialized irq_domain structure
+ *
+ * Registers an irq_domain structure. The irq_domain must at a minimum be
+ * initialized with an ops structure pointer, and either a ->to_irq hook or
+ * a valid irq_base value. Everything else is optional.
+ */
+void irq_domain_add(struct irq_domain *domain)
+{
+ struct irq_data *d;
+ int hwirq;
+
+ /*
+ * This assumes that the irq_domain owner has already allocated
+ * the irq_descs. This block will be removed when support for dynamic
+ * allocation of irq_descs is added to irq_domain.
+ */
+ for (hwirq = 0; hwirq < domain->nr_irq; hwirq++) {
+ d = irq_get_irq_data(irq_domain_to_irq(domain, hwirq));
+ if (d || d->domain) {
+ /* things are broken; just report, don't clean up */
+ WARN(1, "error: irq_desc already assigned to a domain");
+ return;
+ }
+ d->domain = domain;
+ d->hwirq = hwirq;
+ }
+
+ mutex_lock(&irq_domain_mutex);
+ list_add(&domain->list, &irq_domain_list);
+ mutex_unlock(&irq_domain_mutex);
+}
+
+/**
+ * irq_domain_del() - Unregister an irq_domain
+ * @domain: ptr to registered irq_domain.
+ */
+void irq_domain_del(struct irq_domain *domain)
+{
+ struct irq_data *d;
+ int hwirq;
+
+ mutex_lock(&irq_domain_mutex);
+ list_del(&domain->list);
+ mutex_unlock(&irq_domain_mutex);
+
+ /* Clear the irq_domain assignments */
+ for (hwirq = 0; hwirq < domain->nr_irq; hwirq++) {
+ d = irq_get_irq_data(irq_domain_to_irq(domain, hwirq));
+ d->domain = NULL;
+ }
+}
+
+#if defined(CONFIG_OF_IRQ)
+/**
+ * irq_create_of_mapping() - Map a linux irq number from a DT interrupt spec
+ *
+ * Used by the device tree interrupt mapping code to translate a device tree
+ * interrupt specifier to a valid linux irq number. Returns either a valid
+ * linux IRQ number or 0.
+ *
+ * When the caller no longer need the irq number returned by this function it
+ * should arrange to call irq_dispose_mapping().
+ */
+unsigned int irq_create_of_mapping(struct device_node *controller,
+ const u32 *intspec, unsigned int intsize)
+{
+ struct irq_domain *domain;
+ unsigned long hwirq;
+ unsigned int irq, type;
+ int rc = -EINVAL;
+
+ /* Find a domain which can translate the irq spec */
+ mutex_lock(&irq_domain_mutex);
+ list_for_each_entry(domain, &irq_domain_list, list) {
+ if (!domain->ops->dt_translate)
+ continue;
+ rc = domain->ops->dt_translate(domain, controller,
+ intspec, intsize, &hwirq, &type);
+ if (rc == 0)
+ break;
+ }
+ mutex_unlock(&irq_domain_mutex);
+
+ if (rc != 0)
+ return 0;
+
+ irq = irq_domain_to_irq(domain, hwirq);
+ if (type != IRQ_TYPE_NONE)
+ irq_set_irq_type(irq, type);
+ pr_debug("%s: mapped hwirq=%i to irq=%i, flags=%x\n",
+ controller->full_name, (int)hwirq, irq, type);
+ return irq;
+}
+EXPORT_SYMBOL_GPL(irq_create_of_mapping);
+
+/**
+ * irq_dispose_mapping() - Discard a mapping created by irq_create_of_mapping()
+ * @irq: linux irq number to be discarded
+ *
+ * Calling this function indicates the caller no longer needs a reference to
+ * the linux irq number returned by a prior call to irq_create_of_mapping().
+ */
+void irq_dispose_mapping(unsigned int irq)
+{
+ /*
+ * nothing yet; will be filled when support for dynamic allocation of
+ * irq_descs is added to irq_domain
+ */
+}
+EXPORT_SYMBOL_GPL(irq_dispose_mapping);
+
+int irq_domain_simple_dt_translate(struct irq_domain *d,
+ struct device_node *controller,
+ const u32 *intspec, unsigned int intsize,
+ unsigned long *out_hwirq, unsigned int *out_type)
+{
+ if (d->of_node != controller)
+ return -EINVAL;
+ if (intsize < 1)
+ return -EINVAL;
+
+ *out_hwirq = intspec[0];
+ *out_type = IRQ_TYPE_NONE;
+ if (intsize > 1)
+ *out_type = intspec[1] & IRQ_TYPE_SENSE_MASK;
+ return 0;
+}
+
+struct irq_domain_ops irq_domain_simple_ops = {
+ .dt_translate = irq_domain_simple_dt_translate,
+};
+EXPORT_SYMBOL_GPL(irq_domain_simple_ops);
+
+/**
+ * irq_domain_create_simple() - Set up a 'simple' translation range
+ */
+void irq_domain_add_simple(struct device_node *controller, int irq_base)
+{
+ struct irq_domain *domain;
+
+ domain = kzalloc(sizeof(*domain), GFP_KERNEL);
+ if (!domain) {
+ WARN_ON(1);
+ return;
+ }
+
+ domain->irq_base = irq_base;
+ domain->of_node = of_node_get(controller);
+ domain->ops = &irq_domain_simple_ops;
+ irq_domain_add(domain);
+}
+EXPORT_SYMBOL_GPL(irq_domain_add_simple);
+
+void irq_domain_generate_simple(const struct of_device_id *match,
+ u64 phys_base, unsigned int irq_start)
+{
+ struct device_node *node;
+ pr_info("looking for phys_base=%llx, irq_start=%i\n",
+ (unsigned long long) phys_base, (int) irq_start);
+ node = of_find_matching_node_by_address(NULL, match, phys_base);
+ if (node)
+ irq_domain_add_simple(node, irq_start);
+ else
+ pr_info("no node found\n");
+}
+EXPORT_SYMBOL_GPL(irq_domain_generate_simple);
+#endif /* CONFIG_OF_IRQ */