msm: pm-8x60: Decrement L2 reset counter on failed power collapses
The L2 reset counter must be decremented to prevent TZ from invalidating
L2 when Power collapse fails because of a pending interrupt.
Signed-off-by: Maheshkumar Sivasubramanian <msivasub@codeaurora.org>
diff --git a/arch/arm/mach-msm/rpm_resources.h b/arch/arm/mach-msm/rpm_resources.h
index db6249e..d90aa4c 100644
--- a/arch/arm/mach-msm/rpm_resources.h
+++ b/arch/arm/mach-msm/rpm_resources.h
@@ -102,8 +102,8 @@
int msm_rpmrs_enter_sleep(uint32_t sclk_count, struct msm_rpmrs_limits *limits,
bool from_idle, bool notify_rpm);
-void msm_rpmrs_exit_sleep(struct msm_rpmrs_limits *limits,
- bool from_idle, bool notify_rpm);
+void msm_rpmrs_exit_sleep(struct msm_rpmrs_limits *limits, bool from_idle,
+ bool notify_rpm, bool collapsed);
int msm_rpmrs_levels_init(struct msm_rpmrs_level *levels, int size);