msm: copper: Register non-secure timer interrupts
Register for both secure and non-secure timer interrupts so
as to allow for timer interrupts to be received when operating
in both secure and non-secure modes.
Change-Id: I9f0686be9314f1ea86790110c9821d1b2a2b4895
Signed-off-by: Sathish Ambley <sambley@codeaurora.org>
diff --git a/arch/arm/boot/dts/msmcopper.dtsi b/arch/arm/boot/dts/msmcopper.dtsi
index 7dfa4df..8406299 100644
--- a/arch/arm/boot/dts/msmcopper.dtsi
+++ b/arch/arm/boot/dts/msmcopper.dtsi
@@ -39,7 +39,7 @@
timer {
compatible = "qcom,msm-qtimer", "arm,armv7-timer";
- interrupts = <1 2 0>;
+ interrupts = <1 2 0 1 3 0>;
clock-frequency = <19200000>;
};