Merge changes If9c6d64e,Ice2ac474,I38bcd9d6,I167d09c1 into msm-3.0
* changes:
msm: bam_dmux: remove obsolete mutex
msm: bam_dmux: change mutex to spinlock
msm: bam_dmux: change kmalloc() while in atomic context to GFP_ATOMIC
msm: bam_dmux: release read lock in error scenarios
diff --git a/Documentation/devicetree/bindings/tty/serial/msm_serial.txt b/Documentation/devicetree/bindings/tty/serial/msm_serial.txt
new file mode 100644
index 0000000..943c846
--- /dev/null
+++ b/Documentation/devicetree/bindings/tty/serial/msm_serial.txt
@@ -0,0 +1,15 @@
+* Qualcomm MSM HSUART
+
+Required properties:
+- compatible : one of:
+ - "qcom,msm-lsuart-v14"
+- reg : offset and length of the register set for the device.
+- interrupts : should contain the uart interrupt.
+
+Example:
+
+ serial@19c400000 {
+ compatible = "qcom,msm-lsuart-v14"
+ reg = <0x19c40000 0x1000">;
+ interrupts = <195>;
+ };
diff --git a/arch/arm/Kconfig b/arch/arm/Kconfig
index 4690de3..f34719f 100644
--- a/arch/arm/Kconfig
+++ b/arch/arm/Kconfig
@@ -1606,6 +1606,10 @@
def_bool n
depends on MEMORY_HOTPLUG
+config FIX_MOVABLE_ZONE
+ def_bool n
+ depends on MEMORY_HOTPLUG
+
config DONT_MAP_HOLE_AFTER_MEMBANK0
def_bool n
depends on SPARSEMEM
diff --git a/arch/arm/boot/dts/msmcopper.dts b/arch/arm/boot/dts/msmcopper.dts
index 4e3d66d..52c0b66 100644
--- a/arch/arm/boot/dts/msmcopper.dts
+++ b/arch/arm/boot/dts/msmcopper.dts
@@ -14,4 +14,10 @@
reg = <0xF9000000 0x1000>,
<0xF9002000 0x1000>;
};
+
+ serial@F9684000 {
+ compatible = "qcom,msm-lsuart-v14";
+ reg = <0xF9684000 0x1000>;
+ interrupts = <109>;
+ };
};
diff --git a/arch/arm/configs/msm8660-perf_defconfig b/arch/arm/configs/msm8660-perf_defconfig
index c9082f0..d377460 100644
--- a/arch/arm/configs/msm8660-perf_defconfig
+++ b/arch/arm/configs/msm8660-perf_defconfig
@@ -315,6 +315,8 @@
CONFIG_MT9E013=y
CONFIG_MSM_GEMINI=y
CONFIG_RADIO_TAVARUA=y
+CONFIG_ION=y
+CONFIG_ION_MSM=y
CONFIG_MSM_KGSL=y
CONFIG_KGSL_PER_PROCESS_PAGE_TABLE=y
CONFIG_VIDEO_OUTPUT_CONTROL=y
diff --git a/arch/arm/configs/msm8960_defconfig b/arch/arm/configs/msm8960_defconfig
index 2045ff8..76ac964 100755
--- a/arch/arm/configs/msm8960_defconfig
+++ b/arch/arm/configs/msm8960_defconfig
@@ -388,11 +388,18 @@
CONFIG_MAGIC_SYSRQ=y
CONFIG_DEBUG_FS=y
CONFIG_DEBUG_KERNEL=y
+CONFIG_LOCKUP_DETECTOR=y
# CONFIG_SCHED_DEBUG is not set
CONFIG_TIMER_STATS=y
+CONFIG_SLUB_DEBUG_ON=y
# CONFIG_DEBUG_PREEMPT is not set
+CONFIG_DEBUG_SPINLOCK=y
+CONFIG_DEBUG_MUTEXES=y
+CONFIG_DEBUG_SPINLOCK_SLEEP=y
CONFIG_DEBUG_INFO=y
CONFIG_DEBUG_MEMORY_INIT=y
+CONFIG_DEBUG_LIST=y
+CONFIG_DEBUG_PAGEALLOC=y
CONFIG_DYNAMIC_DEBUG=y
CONFIG_DEBUG_USER=y
CONFIG_CRYPTO_SHA256=y
diff --git a/arch/arm/configs/msm9615_defconfig b/arch/arm/configs/msm9615_defconfig
index fa6475b..714e630 100644
--- a/arch/arm/configs/msm9615_defconfig
+++ b/arch/arm/configs/msm9615_defconfig
@@ -221,7 +221,9 @@
CONFIG_LIB80211=m
CONFIG_NETDEVICES=y
CONFIG_WLAN=y
-CONFIG_MSM_RMNET=y
+# CONFIG_MSM_RMNET is not set
+CONFIG_MSM_BAM_DMUX=y
+CONFIG_MSM_RMNET_BAM=y
CONFIG_HOSTAP=m
CONFIG_WIRELESS_EXT=y
CONFIG_WEXT_SPY=y
diff --git a/arch/arm/include/asm/mach/mmc.h b/arch/arm/include/asm/mach/mmc.h
index f138df1..6e55bf3 100644
--- a/arch/arm/include/asm/mach/mmc.h
+++ b/arch/arm/include/asm/mach/mmc.h
@@ -37,6 +37,11 @@
* is set voltage supported for this regulator?
* false => set voltage is not supported
* true => set voltage is supported
+ *
+ * Some regulators (like gpio-regulators, LVS (low voltage swtiches)
+ * PMIC regulators) dont have the capability to call
+ * regulator_set_voltage or regulator_set_optimum_mode
+ * Use this variable to indicate if its a such regulator or not
*/
bool set_voltage_sup;
/* is this regulator enabled? */
diff --git a/arch/arm/mach-msm/Kconfig b/arch/arm/mach-msm/Kconfig
index 756603e..486d80e 100644
--- a/arch/arm/mach-msm/Kconfig
+++ b/arch/arm/mach-msm/Kconfig
@@ -1573,6 +1573,16 @@
This bug is not applicable to any ScorpionMP or Scorpion Uni 65nm(SC65U) cores.
+config MSM_BUSPM_DEV
+ tristate "MSM Bus Performance Monitor Kernel Module"
+ depends on (ARCH_MSM8X60 || ARCH_MSM8960)
+ default m
+ help
+ This kernel module is used to mmap() hardware registers for the
+ performance monitors, counters, etc. The module can also be used to
+ allocate physical memory which is used by bus performance hardware to
+ dump performance data.
+
config MSM_RPM_LOG
tristate "MSM Resource Power Manager Log Driver"
depends on DEBUG_FS
diff --git a/arch/arm/mach-msm/Makefile b/arch/arm/mach-msm/Makefile
index 8693875..292cee2 100644
--- a/arch/arm/mach-msm/Makefile
+++ b/arch/arm/mach-msm/Makefile
@@ -254,6 +254,7 @@
obj-$(CONFIG_MSM_RPM_LOG) += rpm_log.o
obj-$(CONFIG_MSM_XO) += msm_xo.o
obj-$(CONFIG_MSM_BUS_SCALING) += msm_bus/
+obj-$(CONFIG_MSM_BUSPM_DEV) += msm-buspm-dev.o
obj-$(CONFIG_MSM_IOMMU) += iommu.o iommu_dev.o devices-iommu.o iommu_domains.o
diff --git a/arch/arm/mach-msm/acpuclock-8960.c b/arch/arm/mach-msm/acpuclock-8960.c
index 93629d1..659c292 100644
--- a/arch/arm/mach-msm/acpuclock-8960.c
+++ b/arch/arm/mach-msm/acpuclock-8960.c
@@ -33,6 +33,7 @@
#include <mach/msm_bus_board.h>
#include <mach/socinfo.h>
#include <mach/msm-krait-l2-accessors.h>
+#include <mach/rpm-regulator.h>
#include "acpuclock.h"
@@ -50,6 +51,7 @@
#define PRI_SRC_SEL_HFPLL 1
#define PRI_SRC_SEL_HFPLL_DIV2 2
#define SEC_SRC_SEL_QSB 0
+#define SEC_SRC_SEL_AUX 2
/* HFPLL registers offsets. */
#define HFPLL_MODE 0x00
@@ -87,6 +89,8 @@
VREG_CORE,
VREG_MEM,
VREG_DIG,
+ VREG_HFPLL_A,
+ VREG_HFPLL_B,
NUM_VREG
};
@@ -143,6 +147,12 @@
.vreg[VREG_DIG] = { "krait0_dig", 1150000,
RPM_VREG_VOTER1,
RPM_VREG_ID_PM8921_S3 },
+ .vreg[VREG_HFPLL_A] = { "hfpll", 2200000,
+ RPM_VREG_VOTER1,
+ RPM_VREG_ID_PM8921_S8 },
+ .vreg[VREG_HFPLL_B] = { "hfpll", 1800000,
+ RPM_VREG_VOTER1,
+ RPM_VREG_ID_PM8921_L23 },
},
[CPU1] = {
.hfpll_base = MSM_HFPLL_BASE + 0x300,
@@ -155,11 +165,23 @@
.vreg[VREG_DIG] = { "krait0_dig", 1150000,
RPM_VREG_VOTER2,
RPM_VREG_ID_PM8921_S3 },
+ .vreg[VREG_HFPLL_A] = { "hfpll", 2200000,
+ RPM_VREG_VOTER2,
+ RPM_VREG_ID_PM8921_S8 },
+ .vreg[VREG_HFPLL_B] = { "hfpll", 1800000,
+ RPM_VREG_VOTER2,
+ RPM_VREG_ID_PM8921_L23 },
},
[L2] = {
.hfpll_base = MSM_HFPLL_BASE + 0x400,
.aux_clk_sel = MSM_APCS_GCC_BASE + 0x028,
.l2cpmr_iaddr = L2CPMR_IADDR,
+ .vreg[VREG_HFPLL_A] = { "hfpll", 2200000,
+ RPM_VREG_VOTER6,
+ RPM_VREG_ID_PM8921_S8 },
+ .vreg[VREG_HFPLL_B] = { "hfpll", 1800000,
+ RPM_VREG_VOTER6,
+ RPM_VREG_ID_PM8921_L23 },
},
};
@@ -410,6 +432,23 @@
/* Enable an already-configured HFPLL. */
static void hfpll_enable(struct scalable *sc)
{
+ int rc;
+
+ if (cpu_is_msm8960()) {
+ rc = rpm_vreg_set_voltage(sc->vreg[VREG_HFPLL_A].rpm_vreg_id,
+ sc->vreg[VREG_HFPLL_A].rpm_vreg_voter, 2200000,
+ 2200000, 0);
+ if (rc)
+ pr_err("%s regulator enable failed (%d)\n",
+ sc->vreg[VREG_HFPLL_A].name, rc);
+ rc = rpm_vreg_set_voltage(sc->vreg[VREG_HFPLL_B].rpm_vreg_id,
+ sc->vreg[VREG_HFPLL_B].rpm_vreg_voter, 1800000,
+ 1800000, 0);
+ if (rc)
+ pr_err("%s regulator enable failed (%d)\n",
+ sc->vreg[VREG_HFPLL_B].name, rc);
+ }
+
/* Disable PLL bypass mode. */
writel_relaxed(0x2, sc->hfpll_base + HFPLL_MODE);
@@ -434,11 +473,28 @@
/* Disable a HFPLL for power-savings or while its being reprogrammed. */
static void hfpll_disable(struct scalable *sc)
{
+ int rc;
+
/*
* Disable the PLL output, disable test mode, enable
* the bypass mode, and assert the reset.
*/
writel_relaxed(0, sc->hfpll_base + HFPLL_MODE);
+
+ if (cpu_is_msm8960()) {
+ rc = rpm_vreg_set_voltage(sc->vreg[VREG_HFPLL_B].rpm_vreg_id,
+ sc->vreg[VREG_HFPLL_B].rpm_vreg_voter, 0,
+ 0, 0);
+ if (rc)
+ pr_err("%s regulator enable failed (%d)\n",
+ sc->vreg[VREG_HFPLL_B].name, rc);
+ rc = rpm_vreg_set_voltage(sc->vreg[VREG_HFPLL_A].rpm_vreg_id,
+ sc->vreg[VREG_HFPLL_A].rpm_vreg_voter, 0,
+ 0, 0);
+ if (rc)
+ pr_err("%s regulator enable failed (%d)\n",
+ sc->vreg[VREG_HFPLL_A].name, rc);
+ }
}
/* Program the HFPLL rate. Assumes HFPLL is already disabled. */
@@ -493,12 +549,11 @@
return;
if (strt_s->src == HFPLL && tgt_s->src == HFPLL) {
- /* Move CPU to QSB source. */
/*
- * TODO: If using QSB here requires elevating voltages,
- * consider using PLL8 instead.
+ * Move to an always-on source running at a frequency that does
+ * not require an elevated CPU voltage. PLL8 is used here.
*/
- set_sec_clk_src(sc, SEC_SRC_SEL_QSB);
+ set_sec_clk_src(sc, SEC_SRC_SEL_AUX);
set_pri_clk_src(sc, PRI_SRC_SEL_SEC_SRC);
/* Program CPU HFPLL. */
@@ -817,24 +872,18 @@
}
}
-#define INIT_QSB_ID 0
-#define INIT_HFPLL_ID 1
/* Set initial rate for a given core. */
static void __init init_clock_sources(struct scalable *sc,
struct core_speed *tgt_s)
{
- uint32_t pri_src, regval;
+ uint32_t regval;
- /*
- * If the HFPLL is in use, program AUX source for QSB, switch to it,
- * re-initialize the HFPLL, and switch back to the HFPLL. Otherwise,
- * the HFPLL is not in use, so we can switch directly to it.
- */
- pri_src = get_pri_clk_src(scalable);
- if (pri_src == PRI_SRC_SEL_HFPLL || pri_src == PRI_SRC_SEL_HFPLL_DIV2) {
- set_sec_clk_src(sc, SEC_SRC_SEL_QSB);
- set_pri_clk_src(sc, PRI_SRC_SEL_SEC_SRC);
- }
+ /* Select PLL8 as AUX source input to the secondary MUX. */
+ writel_relaxed(0x3, sc->aux_clk_sel);
+
+ /* Switch away from the HFPLL while it's re-initialized. */
+ set_sec_clk_src(sc, SEC_SRC_SEL_AUX);
+ set_pri_clk_src(sc, PRI_SRC_SEL_SEC_SRC);
hfpll_init(sc, tgt_s);
/* Set PRI_SRC_SEL_HFPLL_DIV2 divider to div-2. */
@@ -842,9 +891,8 @@
regval &= ~(0x3 << 6);
set_l2_indirect_reg(sc->l2cpmr_iaddr, regval);
- /* Select PLL8 as AUX source input to the secondary MUX. */
- writel_relaxed(0x3, sc->aux_clk_sel);
-
+ /* Switch to the target clock source. */
+ set_sec_clk_src(sc, tgt_s->sec_src_sel);
set_pri_clk_src(sc, tgt_s->pri_src_sel);
sc->current_speed = tgt_s;
diff --git a/arch/arm/mach-msm/board-9615-regulator.c b/arch/arm/mach-msm/board-9615-regulator.c
index 6568bef..c4b7c5a 100644
--- a/arch/arm/mach-msm/board-9615-regulator.c
+++ b/arch/arm/mach-msm/board-9615-regulator.c
@@ -61,6 +61,7 @@
};
VREG_CONSUMERS(L13) = {
REGULATOR_SUPPLY("8018_l13", NULL),
+ REGULATOR_SUPPLY("sdc_vddp", "msm_sdcc.1"),
};
VREG_CONSUMERS(L14) = {
REGULATOR_SUPPLY("8018_l14", NULL),
@@ -86,6 +87,7 @@
};
VREG_CONSUMERS(EXT_2P95V) = {
REGULATOR_SUPPLY("ext_2p95v", NULL),
+ REGULATOR_SUPPLY("sdc_vdd", "msm_sdcc.1"),
};
#define PM8018_VREG_INIT(_id, _min_uV, _max_uV, _modes, _ops, _apply_uV, \
@@ -288,7 +290,7 @@
RPM_LDO(L10, 0, 1, 0, 1050000, 1050000, "8018_s5", 0, 0),
RPM_LDO(L11, 0, 1, 0, 1050000, 1050000, "8018_s5", 0, 0),
RPM_LDO(L12, 0, 1, 0, 1050000, 1050000, "8018_s5", 0, 0),
- RPM_LDO(L13, 0, 1, 0, 2950000, 2950000, NULL, 0, 0),
+ RPM_LDO(L13, 0, 1, 0, 1850000, 2950000, NULL, 0, 0),
RPM_LDO(L14, 0, 1, 0, 2850000, 2850000, NULL, 0, 0),
/* ID a_on pd ss supply */
diff --git a/arch/arm/mach-msm/board-9615.c b/arch/arm/mach-msm/board-9615.c
index 701464a..312ea46 100644
--- a/arch/arm/mach-msm/board-9615.c
+++ b/arch/arm/mach-msm/board-9615.c
@@ -281,7 +281,6 @@
#if (defined(CONFIG_MMC_MSM_SDC1_SUPPORT)\
|| defined(CONFIG_MMC_MSM_SDC2_SUPPORT))
-#define GPIO_SDCARD_PWR_EN 18
#define GPIO_SDC1_HW_DET 80
#define GPIO_SDC2_DAT1_WAKEUP 26
@@ -293,6 +292,51 @@
};
#ifdef CONFIG_MMC_MSM_SDC1_SUPPORT
+/* All SDCC controllers requires VDD/VCC voltage */
+static struct msm_mmc_reg_data mmc_vdd_reg_data[MAX_SDCC_CONTROLLER] = {
+ /* SDCC1 : External card slot connected */
+ [SDCC1] = {
+ .name = "sdc_vdd",
+ /*
+ * This is a gpio-regulator and does not support
+ * regulator_set_voltage and regulator_set_optimum_mode
+ */
+ .set_voltage_sup = false,
+ .high_vol_level = 2950000,
+ .low_vol_level = 2950000,
+ .hpm_uA = 600000, /* 600mA */
+ }
+};
+
+/* All SDCC controllers may require voting for VDD PAD voltage */
+static struct msm_mmc_reg_data mmc_vddp_reg_data[MAX_SDCC_CONTROLLER] = {
+ /* SDCC1 : External card slot connected */
+ [SDCC1] = {
+ .name = "sdc_vddp",
+ .set_voltage_sup = true,
+ .high_vol_level = 2950000,
+ .low_vol_level = 1850000,
+ .always_on = true,
+ .lpm_sup = true,
+ /* Max. Active current required is 16 mA */
+ .hpm_uA = 16000,
+ /*
+ * Sleep current required is ~300 uA. But min. vote can be
+ * in terms of mA (min. 1 mA). So let's vote for 2 mA
+ * during sleep.
+ */
+ .lpm_uA = 2000,
+ }
+};
+
+static struct msm_mmc_slot_reg_data mmc_slot_vreg_data[MAX_SDCC_CONTROLLER] = {
+ /* SDCC1 : External card slot connected */
+ [SDCC1] = {
+ .vdd_data = &mmc_vdd_reg_data[SDCC1],
+ .vddp_data = &mmc_vddp_reg_data[SDCC1],
+ }
+};
+
/* SDC1 pad data */
static struct msm_mmc_pad_drv sdc1_pad_drv_on_cfg[] = {
{TLMM_HDRV_SDC1_CLK, GPIO_CFG_16MA},
@@ -456,8 +500,9 @@
.mmc_bus_width = MMC_CAP_4_BIT_DATA,
.sup_clk_table = sdc1_sup_clk_rates,
.sup_clk_cnt = ARRAY_SIZE(sdc1_sup_clk_rates),
- .pclk_src_dfab = 1,
+ .pclk_src_dfab = true,
.sdcc_v4_sup = true,
+ .vreg_data = &mmc_slot_vreg_data[SDCC1],
.pin_data = &mmc_slot_pin_data[SDCC1],
#ifdef CONFIG_MMC_MSM_CARD_HW_DETECTION
.status_gpio = GPIO_SDC1_HW_DET,
@@ -494,32 +539,16 @@
static void __init msm9615_init_mmc(void)
{
- int ret;
-
if (msm9615_sdc1_pdata) {
- ret = gpio_request(GPIO_SDCARD_PWR_EN, "SDCARD_PWR_EN");
-
- if (ret) {
- pr_err("%s: sdcc1: Error requesting GPIO "
- "SDCARD_PWR_EN:%d\n", __func__, ret);
- } else {
- ret = gpio_direction_output(GPIO_SDCARD_PWR_EN, 1);
- if (ret) {
- pr_err("%s: sdcc1: Error setting o/p direction"
- " for GPIO SDCARD_PWR_EN:%d\n",
- __func__, ret);
- gpio_free(GPIO_SDCARD_PWR_EN);
- } else {
- msm_add_sdcc(1, msm9615_sdc1_pdata);
- }
- }
+ /* SDC1: External card slot for SD/MMC cards */
+ msm_add_sdcc(1, msm9615_sdc1_pdata);
}
if (msm9615_sdc2_pdata) {
msm_gpiomux_install(msm9615_sdcc2_configs,
ARRAY_SIZE(msm9615_sdcc2_configs));
- /* SDC2: External card slot */
+ /* SDC2: External card slot used for WLAN */
msm_add_sdcc(2, msm9615_sdc2_pdata);
}
}
diff --git a/arch/arm/mach-msm/board-copper.c b/arch/arm/mach-msm/board-copper.c
index 496e1f4..f35d493 100644
--- a/arch/arm/mach-msm/board-copper.c
+++ b/arch/arm/mach-msm/board-copper.c
@@ -74,6 +74,8 @@
}
static struct clk_lookup msm_clocks_dummy[] = {
+ CLK_DUMMY("core_clk", BLSP2_UART_CLK, "msm_serial_hsl.0", OFF),
+ CLK_DUMMY("iface_clk", BLSP2_UART_CLK, "msm_serial_hsl.0", OFF),
};
struct clock_init_data msm_dummy_clock_init_data __initdata = {
@@ -82,6 +84,8 @@
};
static struct of_dev_auxdata msm_copper_auxdata_lookup[] __initdata = {
+ OF_DEV_AUXDATA("qcom,msm-lsuart-v14", 0xF9684000, \
+ "msm_serial_hsl.0", NULL),
{}
};
diff --git a/arch/arm/mach-msm/board-msm7x30.c b/arch/arm/mach-msm/board-msm7x30.c
index 03307f0..9fb9fb6 100644
--- a/arch/arm/mach-msm/board-msm7x30.c
+++ b/arch/arm/mach-msm/board-msm7x30.c
@@ -389,6 +389,14 @@
return rc;
}
+/* TODO: Put the regulator to LPM / HPM in suspend/resume*/
+static int cyttsp_platform_suspend(struct i2c_client *client)
+{
+ msleep(20);
+
+ return CY_OK;
+}
+
static int cyttsp_platform_resume(struct i2c_client *client)
{
/* add any special code to strobe a wakeup pin or chip reset */
@@ -432,6 +440,7 @@
*/
.lp_intrvl = CY_LP_INTRVL_DFLT,
.resume = cyttsp_platform_resume,
+ .suspend = cyttsp_platform_suspend,
.init = cyttsp_platform_init,
.sleep_gpio = -1,
.resout_gpio = -1,
diff --git a/arch/arm/mach-msm/board-msm8960-regulator.c b/arch/arm/mach-msm/board-msm8960-regulator.c
index 4aba197..e98f364 100644
--- a/arch/arm/mach-msm/board-msm8960-regulator.c
+++ b/arch/arm/mach-msm/board-msm8960-regulator.c
@@ -484,7 +484,7 @@
RPM_SMPS(S3, 0, 1, 1, 500000, 1150000, NULL, 100000, 4p80),
RPM_SMPS(S4, 1, 1, 0, 1800000, 1800000, NULL, 100000, 3p20),
RPM_SMPS(S7, 0, 1, 0, 1150000, 1150000, NULL, 100000, 3p20),
- RPM_SMPS(S8, 1, 1, 0, 2200000, 2200000, NULL, 100000, 1p60),
+ RPM_SMPS(S8, 1, 1, 1, 2200000, 2200000, NULL, 100000, 1p60),
/* ID a_on pd ss min_uV max_uV supply sys_uA init_ip */
RPM_LDO(L1, 1, 1, 0, 1050000, 1050000, "8921_s4", 0, 10000),
@@ -506,7 +506,7 @@
RPM_LDO(L18, 0, 1, 0, 1300000, 1300000, "8921_s4", 0, 0),
RPM_LDO(L21, 0, 1, 0, 1900000, 1900000, "8921_s8", 0, 0),
RPM_LDO(L22, 0, 1, 0, 2750000, 2750000, NULL, 0, 0),
- RPM_LDO(L23, 1, 1, 0, 1800000, 1800000, "8921_s8", 10000, 10000),
+ RPM_LDO(L23, 1, 1, 1, 1800000, 1800000, "8921_s8", 10000, 10000),
RPM_LDO(L24, 0, 1, 1, 750000, 1150000, "8921_s1", 10000, 10000),
RPM_LDO(L25, 1, 1, 0, 1225000, 1225000, "8921_s1", 10000, 10000),
diff --git a/arch/arm/mach-msm/board-msm8960.c b/arch/arm/mach-msm/board-msm8960.c
index b06bb53..26de3e6 100644
--- a/arch/arm/mach-msm/board-msm8960.c
+++ b/arch/arm/mach-msm/board-msm8960.c
@@ -2647,11 +2647,6 @@
msm_gpiomux_install(wcnss_5wire_interface,
ARRAY_SIZE(wcnss_5wire_interface));
-#ifdef CONFIG_USB_EHCI_MSM_HSIC
- msm_gpiomux_install(msm8960_hsic_configs,
- ARRAY_SIZE(msm8960_hsic_configs));
-#endif
-
return 0;
}
@@ -3341,14 +3336,16 @@
.name = "vdd",
.min_uV = CY_TMA300_VTG_MIN_UV,
.max_uV = CY_TMA300_VTG_MAX_UV,
- .load_uA = CY_TMA300_CURR_24HZ_UA,
+ .hpm_load_uA = CY_TMA300_CURR_24HZ_UA,
+ .lpm_load_uA = CY_TMA300_SLEEP_CURR_UA,
},
/* TODO: Remove after runtime PM is enabled in I2C driver */
{
.name = "vcc_i2c",
.min_uV = CY_I2C_VTG_MIN_UV,
.max_uV = CY_I2C_VTG_MAX_UV,
- .load_uA = CY_I2C_CURR_UA,
+ .hpm_load_uA = CY_I2C_CURR_UA,
+ .lpm_load_uA = CY_I2C_SLEEP_CURR_UA,
},
};
@@ -3797,7 +3794,6 @@
&msm8960_device_otg,
&msm8960_device_gadget_peripheral,
&msm_device_hsusb_host,
- &msm_device_hsic_host,
&android_usb_device,
&msm_pcm,
&msm_pcm_routing,
@@ -4407,6 +4403,28 @@
#endif /* CONFIG_MSM_DSPS */
}
+static void __init msm8960_init_hsic(void)
+{
+#ifdef CONFIG_USB_EHCI_MSM_HSIC
+ uint32_t version = socinfo_get_version();
+
+ pr_info("%s: version:%d mtp:%d\n", __func__,
+ SOCINFO_VERSION_MAJOR(version),
+ machine_is_msm8960_mtp());
+
+ if ((SOCINFO_VERSION_MAJOR(version) == 1) ||
+ machine_is_msm8960_mtp() ||
+ machine_is_msm8960_fluid())
+ return;
+
+ msm_gpiomux_install(msm8960_hsic_configs,
+ ARRAY_SIZE(msm8960_hsic_configs));
+
+ platform_device_register(&msm_device_hsic_host);
+#endif
+}
+
+
#ifdef CONFIG_ISL9519_CHARGER
static struct isl_platform_data isl_data __initdata = {
.valid_n_gpio = 0, /* Not required when notify-by-pmic */
@@ -4610,6 +4628,7 @@
platform_add_devices(common_devices, ARRAY_SIZE(common_devices));
pm8921_gpio_mpp_init();
platform_add_devices(cdp_devices, ARRAY_SIZE(cdp_devices));
+ msm8960_init_hsic();
msm8960_init_cam();
msm8960_init_mmc();
acpuclk_init(&acpuclk_8960_soc_data);
diff --git a/arch/arm/mach-msm/board-msm8x60.c b/arch/arm/mach-msm/board-msm8x60.c
index 916645c..d891fdf 100644
--- a/arch/arm/mach-msm/board-msm8x60.c
+++ b/arch/arm/mach-msm/board-msm8x60.c
@@ -3209,6 +3209,14 @@
return rc;
}
+/* TODO: Put the regulator to LPM / HPM in suspend/resume*/
+static int cyttsp_platform_suspend(struct i2c_client *client)
+{
+ msleep(20);
+
+ return CY_OK;
+}
+
static int cyttsp_platform_resume(struct i2c_client *client)
{
/* add any special code to strobe a wakeup pin or chip reset */
@@ -3248,6 +3256,7 @@
.resout_gpio = -1,
.irq_gpio = CYTTSP_TS_GPIO_IRQ,
.resume = cyttsp_platform_resume,
+ .suspend = cyttsp_platform_suspend,
.init = cyttsp_platform_init,
};
@@ -3290,6 +3299,7 @@
.resout_gpio = -1,
.irq_gpio = CYTTSP_TS_GPIO_IRQ,
.resume = cyttsp_platform_resume,
+ .suspend = cyttsp_platform_suspend,
.init = cyttsp_platform_init,
.disable_ghost_det = true,
};
diff --git a/arch/arm/mach-msm/clock-8960.c b/arch/arm/mach-msm/clock-8960.c
index a0c6878..6762601 100644
--- a/arch/arm/mach-msm/clock-8960.c
+++ b/arch/arm/mach-msm/clock-8960.c
@@ -5660,10 +5660,10 @@
/* Check if PLL8 is active */
is_pll_enabled = readl_relaxed(BB_PLL8_STATUS_REG) & BIT(16);
if (!is_pll_enabled) {
- /* Ref clk = 24.5MHz and program pll8 to 384MHz */
- writel_relaxed(0xF, BB_PLL8_L_VAL_REG);
- writel_relaxed(0x21, BB_PLL8_M_VAL_REG);
- writel_relaxed(0x31, BB_PLL8_N_VAL_REG);
+ /* Ref clk = 27MHz and program pll8 to 384MHz */
+ writel_relaxed(0xE, BB_PLL8_L_VAL_REG);
+ writel_relaxed(0x2, BB_PLL8_M_VAL_REG);
+ writel_relaxed(0x9, BB_PLL8_N_VAL_REG);
regval = readl_relaxed(BB_PLL8_CONFIG_REG);
@@ -5689,10 +5689,10 @@
/* Check if PLL3 is active */
is_pll_enabled = readl_relaxed(GPLL1_STATUS_REG) & BIT(16);
if (!is_pll_enabled) {
- /* Ref clk = 24.5MHz and program pll3 to 1200MHz */
- writel_relaxed(0x30, GPLL1_L_VAL_REG);
- writel_relaxed(0x30, GPLL1_M_VAL_REG);
- writel_relaxed(0x31, GPLL1_N_VAL_REG);
+ /* Ref clk = 27MHz and program pll3 to 1200MHz */
+ writel_relaxed(0x2C, GPLL1_L_VAL_REG);
+ writel_relaxed(0x4, GPLL1_M_VAL_REG);
+ writel_relaxed(0x9, GPLL1_N_VAL_REG);
regval = readl_relaxed(GPLL1_CONFIG_REG);
@@ -5708,10 +5708,10 @@
/* Check if PLL14 is active */
is_pll_enabled = readl_relaxed(BB_PLL14_STATUS_REG) & BIT(16);
if (!is_pll_enabled) {
- /* Ref clk = 24.5MHz and program pll14 to 480MHz */
- writel_relaxed(0x13, BB_PLL14_L_VAL_REG);
- writel_relaxed(0x1D, BB_PLL14_M_VAL_REG);
- writel_relaxed(0x31, BB_PLL14_N_VAL_REG);
+ /* Ref clk = 27MHz and program pll14 to 480MHz */
+ writel_relaxed(0x11, BB_PLL14_L_VAL_REG);
+ writel_relaxed(0x7, BB_PLL14_M_VAL_REG);
+ writel_relaxed(0x9, BB_PLL14_N_VAL_REG);
regval = readl_relaxed(BB_PLL14_CONFIG_REG);
@@ -5775,10 +5775,10 @@
/* Check if PLL4 is active */
is_pll_enabled = readl_relaxed(LCC_PLL0_STATUS_REG) & BIT(16);
if (!is_pll_enabled) {
- /* Ref clk = 24.5MHz and program pll4 to 393.2160MHz */
- writel_relaxed(0x10, LCC_PLL0_L_VAL_REG);
- writel_relaxed(0x130, LCC_PLL0_M_VAL_REG);
- writel_relaxed(0x17ED, LCC_PLL0_N_VAL_REG);
+ /* Ref clk = 27MHz and program pll4 to 393.2160MHz */
+ writel_relaxed(0xE, LCC_PLL0_L_VAL_REG);
+ writel_relaxed(0x27A, LCC_PLL0_M_VAL_REG);
+ writel_relaxed(0x465, LCC_PLL0_N_VAL_REG);
regval = readl_relaxed(LCC_PLL0_CONFIG_REG);
diff --git a/arch/arm/mach-msm/clock-debug.c b/arch/arm/mach-msm/clock-debug.c
index 63fc70f..ab4d8c1 100644
--- a/arch/arm/mach-msm/clock-debug.c
+++ b/arch/arm/mach-msm/clock-debug.c
@@ -174,7 +174,7 @@
/* Find max frequency supported within voltage constraints. */
if (!clock->vdd_class) {
- fmax = ULONG_MAX;
+ fmax = INT_MAX;
} else {
for (level = 0; level < ARRAY_SIZE(clock->fmax); level++)
if (clock->fmax[level])
diff --git a/arch/arm/mach-msm/devices-9615.c b/arch/arm/mach-msm/devices-9615.c
index 74e7871..13772ce 100644
--- a/arch/arm/mach-msm/devices-9615.c
+++ b/arch/arm/mach-msm/devices-9615.c
@@ -721,20 +721,19 @@
};
static uint8_t spm_wfi_cmd_sequence[] __initdata = {
- 0x00, 0x03, 0x0B, 0x00,
- 0x0f,
+ 0x00, 0x03, 0x00, 0x0f,
};
static uint8_t spm_power_collapse_without_rpm[] __initdata = {
- 0x30, 0x20, 0x10, 0x00,
- 0x50, 0x03, 0x50, 0x00,
- 0x10, 0x20, 0x30, 0x0f,
+ 0x34, 0x24, 0x14, 0x04,
+ 0x54, 0x03, 0x54, 0x04,
+ 0x14, 0x24, 0x3e, 0x0f,
};
static uint8_t spm_power_collapse_with_rpm[] __initdata = {
- 0x30, 0x20, 0x10, 0x00,
- 0x50, 0x07, 0x50, 0x00,
- 0x10, 0x20, 0x30, 0x0f,
+ 0x34, 0x24, 0x14, 0x04,
+ 0x54, 0x07, 0x54, 0x04,
+ 0x14, 0x24, 0x3e, 0x0f,
};
static struct msm_spm_seq_entry msm_spm_seq_list[] __initdata = {
@@ -759,7 +758,7 @@
[0] = {
.reg_base_addr = MSM_SAW0_BASE,
.reg_init_values[MSM_SPM_REG_SAW2_SPM_CTL] = 0x01,
- .reg_init_values[MSM_SPM_REG_SAW2_CFG] = 0x1F,
+ .reg_init_values[MSM_SPM_REG_SAW2_CFG] = 0x1001,
.num_modes = ARRAY_SIZE(msm_spm_seq_list),
.modes = msm_spm_seq_list,
},
diff --git a/arch/arm/mach-msm/include/mach/rpm-regulator.h b/arch/arm/mach-msm/include/mach/rpm-regulator.h
index 7ffa2985..f857ab8 100644
--- a/arch/arm/mach-msm/include/mach/rpm-regulator.h
+++ b/arch/arm/mach-msm/include/mach/rpm-regulator.h
@@ -132,6 +132,7 @@
RPM_VREG_VOTER3, /* for use by other drivers */
RPM_VREG_VOTER4, /* for use by the acpu-clock driver */
RPM_VREG_VOTER5, /* for use by the acpu-clock driver */
+ RPM_VREG_VOTER6, /* for use by the acpu-clock driver */
RPM_VREG_VOTER_COUNT,
};
diff --git a/arch/arm/mach-msm/msm-buspm-dev.c b/arch/arm/mach-msm/msm-buspm-dev.c
new file mode 100644
index 0000000..296418d
--- /dev/null
+++ b/arch/arm/mach-msm/msm-buspm-dev.c
@@ -0,0 +1,256 @@
+/* Copyright (c) 2011, Code Aurora Forum. All rights reserved.
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License version 2 and
+ * only version 2 as published by the Free Software Foundation.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ */
+
+/* #define DEBUG */
+
+#include <linux/module.h>
+#include <linux/fs.h>
+#include <linux/mm.h>
+#include <linux/err.h>
+#include <linux/slab.h>
+#include <linux/errno.h>
+#include <linux/device.h>
+#include <linux/uaccess.h>
+#include <linux/miscdevice.h>
+#include <linux/memory_alloc.h>
+#include "msm-buspm-dev.h"
+
+#define MSM_BUSPM_DRV_NAME "msm-buspm-dev"
+
+/*
+ * Allocate kernel buffer.
+ * Currently limited to one buffer per file descriptor. If alloc() is
+ * called twice for the same descriptor, the original buffer is freed.
+ * There is also no locking protection so the same descriptor can not be shared.
+ */
+
+static inline void *msm_buspm_dev_get_vaddr(struct file *filp)
+{
+ struct msm_buspm_map_dev *dev = filp->private_data;
+
+ return (dev) ? dev->vaddr : NULL;
+}
+
+static inline unsigned long msm_buspm_dev_get_paddr(struct file *filp)
+{
+ struct msm_buspm_map_dev *dev = filp->private_data;
+
+ return (dev) ? dev->paddr : 0L;
+}
+
+static void msm_buspm_dev_free(struct file *filp)
+{
+ struct msm_buspm_map_dev *dev = filp->private_data;
+
+ if (dev) {
+ pr_debug("freeing memory at 0x%p\n", dev->vaddr);
+ free_contiguous_memory(dev->vaddr);
+ dev->paddr = 0L;
+ dev->vaddr = NULL;
+ }
+}
+
+static int msm_buspm_dev_open(struct inode *inode, struct file *filp)
+{
+ struct msm_buspm_map_dev *dev;
+
+ if (capable(CAP_SYS_ADMIN)) {
+ dev = kzalloc(sizeof(*dev), GFP_KERNEL);
+ if (dev)
+ filp->private_data = dev;
+ else
+ return -ENOMEM;
+ } else {
+ return -EPERM;
+ }
+
+ return 0;
+}
+
+static int
+msm_buspm_dev_alloc(struct file *filp, struct buspm_alloc_params data)
+{
+ unsigned long paddr;
+ void *vaddr;
+ struct msm_buspm_map_dev *dev = filp->private_data;
+
+ /* If buffer already allocated, then free it */
+ if (dev->vaddr)
+ msm_buspm_dev_free(filp);
+
+ /* Allocate uncached memory */
+ vaddr = allocate_contiguous_ebi(data.size, PAGE_SIZE, 0);
+ paddr = (vaddr) ? memory_pool_node_paddr(vaddr) : 0L;
+
+ if (vaddr == NULL) {
+ pr_err("allocation of 0x%x bytes failed", data.size);
+ return -ENOMEM;
+ }
+
+ dev->vaddr = vaddr;
+ dev->paddr = paddr;
+ dev->buflen = data.size;
+ filp->f_pos = 0;
+ pr_debug("virt addr = 0x%p\n", dev->vaddr);
+ pr_debug("phys addr = 0x%lx\n", dev->paddr);
+
+ return 0;
+}
+
+static long
+msm_buspm_dev_ioctl(struct file *filp, unsigned int cmd, unsigned long arg)
+{
+ struct buspm_xfer_req xfer;
+ struct buspm_alloc_params alloc_data;
+ unsigned long paddr;
+ int retval = 0;
+ void *buf = msm_buspm_dev_get_vaddr(filp);
+ unsigned char *dbgbuf = buf;
+
+ switch (cmd) {
+ case MSM_BUSPM_IOC_FREE:
+ pr_debug("cmd = 0x%x (FREE)\n", cmd);
+ msm_buspm_dev_free(filp);
+ break;
+
+ case MSM_BUSPM_IOC_ALLOC:
+ pr_debug("cmd = 0x%x (ALLOC)\n", cmd);
+ retval = __get_user(alloc_data.size, (size_t __user *)arg);
+
+ if (retval == 0)
+ retval = msm_buspm_dev_alloc(filp, alloc_data);
+ break;
+
+ case MSM_BUSPM_IOC_RD_PHYS_ADDR:
+ pr_debug("Read Physical Address\n");
+ paddr = msm_buspm_dev_get_paddr(filp);
+ if (paddr == 0L) {
+ retval = -EINVAL;
+ } else {
+ pr_debug("phys addr = 0x%lx\n", paddr);
+ retval = __put_user(paddr,
+ (unsigned long __user *)arg);
+ }
+ break;
+
+ case MSM_BUSPM_IOC_RDBUF:
+ pr_debug("Read Buffer: 0x%x%x%x%x\n",
+ dbgbuf[0], dbgbuf[1], dbgbuf[2], dbgbuf[3]);
+
+ if (!buf) {
+ retval = -EINVAL;
+ break;
+ }
+
+ if (copy_from_user(&xfer, (void __user *)arg, sizeof(xfer))) {
+ retval = -EFAULT;
+ break;
+ }
+
+ if ((xfer.size <= sizeof(buf)) &&
+ (copy_to_user((void __user *)xfer.data, buf,
+ xfer.size))) {
+ retval = -EFAULT;
+ break;
+ }
+ break;
+
+ case MSM_BUSPM_IOC_WRBUF:
+ pr_debug("Write Buffer\n");
+
+ if (!buf) {
+ retval = -EINVAL;
+ break;
+ }
+
+ if (copy_from_user(&xfer, (void __user *)arg, sizeof(xfer))) {
+ retval = -EFAULT;
+ break;
+ }
+
+ if ((sizeof(buf) <= xfer.size) &&
+ (copy_from_user(buf, (void __user *)xfer.data,
+ xfer.size))) {
+ retval = -EFAULT;
+ break;
+ }
+ break;
+
+ default:
+ pr_debug("Unknown command 0x%x\n", cmd);
+ retval = -EINVAL;
+ break;
+ }
+
+ return retval;
+}
+
+static int msm_buspm_dev_release(struct inode *inode, struct file *filp)
+{
+ struct msm_buspm_map_dev *dev = filp->private_data;
+
+ msm_buspm_dev_free(filp);
+ kfree(dev);
+ filp->private_data = NULL;
+
+ return 0;
+}
+
+static int msm_buspm_dev_mmap(struct file *filp, struct vm_area_struct *vma)
+{
+ pr_debug("vma = 0x%p\n", vma);
+
+ /* Mappings are uncached */
+ vma->vm_page_prot = pgprot_noncached(vma->vm_page_prot);
+ if (remap_pfn_range(vma, vma->vm_start, vma->vm_pgoff,
+ vma->vm_end - vma->vm_start, vma->vm_page_prot))
+ return -EFAULT;
+
+ return 0;
+}
+
+static const struct file_operations msm_buspm_dev_fops = {
+ .owner = THIS_MODULE,
+ .mmap = msm_buspm_dev_mmap,
+ .open = msm_buspm_dev_open,
+ .unlocked_ioctl = msm_buspm_dev_ioctl,
+ .llseek = noop_llseek,
+ .release = msm_buspm_dev_release,
+};
+
+struct miscdevice msm_buspm_misc = {
+ .minor = MISC_DYNAMIC_MINOR,
+ .name = MSM_BUSPM_DRV_NAME,
+ .fops = &msm_buspm_dev_fops,
+};
+
+static int __init msm_buspm_dev_init(void)
+{
+ int ret = 0;
+
+ ret = misc_register(&msm_buspm_misc);
+ if (ret < 0)
+ pr_err("%s: Cannot register misc device\n", __func__);
+
+ return ret;
+}
+
+static void __exit msm_buspm_dev_exit(void)
+{
+ misc_deregister(&msm_buspm_misc);
+}
+module_init(msm_buspm_dev_init);
+module_exit(msm_buspm_dev_exit);
+
+MODULE_LICENSE("GPL v2");
+MODULE_VERSION("1.0");
+MODULE_ALIAS("platform:"MSM_BUSPM_DRV_NAME);
diff --git a/arch/arm/mach-msm/msm-buspm-dev.h b/arch/arm/mach-msm/msm-buspm-dev.h
new file mode 100644
index 0000000..5839087
--- /dev/null
+++ b/arch/arm/mach-msm/msm-buspm-dev.h
@@ -0,0 +1,50 @@
+/* Copyright (c) 2011, Code Aurora Forum. All rights reserved.
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License version 2 and
+ * only version 2 as published by the Free Software Foundation.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ */
+
+#ifndef __MSM_BUSPM_DEV_H__
+#define __MSM_BUSPM_DEV_H__
+
+#include <linux/ioctl.h>
+
+struct msm_buspm_map_dev {
+ void *vaddr;
+ unsigned long paddr;
+ size_t buflen;
+};
+
+/* Read/write data into kernel buffer */
+struct buspm_xfer_req {
+ int size; /* Size of this request, in bytes */
+ void *data; /* Data buffer to transfer data to/from */
+};
+
+struct buspm_alloc_params {
+ int size;
+};
+
+#define MSM_BUSPM_IOC_MAGIC 'p'
+
+#define MSM_BUSPM_IOC_FREE \
+ _IOW(MSM_BUSPM_IOC_MAGIC, 0, void *)
+
+#define MSM_BUSPM_IOC_ALLOC \
+ _IOW(MSM_BUSPM_IOC_MAGIC, 1, size_t)
+
+#define MSM_BUSPM_IOC_RDBUF \
+ _IOW(MSM_BUSPM_IOC_MAGIC, 2, struct buspm_xfer_req)
+
+#define MSM_BUSPM_IOC_WRBUF \
+ _IOW(MSM_BUSPM_IOC_MAGIC, 3, struct buspm_xfer_req)
+
+#define MSM_BUSPM_IOC_RD_PHYS_ADDR \
+ _IOR(MSM_BUSPM_IOC_MAGIC, 4, unsigned long)
+#endif
diff --git a/arch/arm/mach-msm/msm_rq_stats.c b/arch/arm/mach-msm/msm_rq_stats.c
index 83d5e96..425000d 100644
--- a/arch/arm/mach-msm/msm_rq_stats.c
+++ b/arch/arm/mach-msm/msm_rq_stats.c
@@ -55,7 +55,7 @@
rq_info.rq_avg = 0;
spin_unlock_irqrestore(&rq_lock, flags);
- return sprintf(buf, "%d.%d\n", val/10, val%10);
+ return snprintf(buf, PAGE_SIZE, "%d.%d\n", val/10, val%10);
}
static ssize_t show_run_queue_poll_ms(struct kobject *kobj,
diff --git a/arch/arm/mach-msm/pm-8x60.c b/arch/arm/mach-msm/pm-8x60.c
index 6a78597..ad6da6a 100644
--- a/arch/arm/mach-msm/pm-8x60.c
+++ b/arch/arm/mach-msm/pm-8x60.c
@@ -162,7 +162,7 @@
}
if (ret > 0) {
- strcat(buf, "\n");
+ strlcat(buf, "\n", PAGE_SIZE);
ret++;
}
@@ -216,7 +216,7 @@
{
char cpu_name[8];
struct kobject *cpu_kobj;
- struct msm_pm_sysfs_sleep_mode *mode;
+ struct msm_pm_sysfs_sleep_mode *mode = NULL;
int i, j, k;
int ret;
diff --git a/arch/arm/mach-msm/rpm_resources.c b/arch/arm/mach-msm/rpm_resources.c
index 6bbfee4..e6b91ee 100644
--- a/arch/arm/mach-msm/rpm_resources.c
+++ b/arch/arm/mach-msm/rpm_resources.c
@@ -683,7 +683,7 @@
rc = param_get_uint(buf, &kp);
if (rc > 0) {
- strcat(buf, "\n");
+ strlcat(buf, "\n", PAGE_SIZE);
rc++;
}
diff --git a/arch/arm/mach-msm/sdio_cmux.c b/arch/arm/mach-msm/sdio_cmux.c
index f7c25c3..0aa5423 100644
--- a/arch/arm/mach-msm/sdio_cmux.c
+++ b/arch/arm/mach-msm/sdio_cmux.c
@@ -336,10 +336,12 @@
ch = &logical_ch[id];
mutex_lock(&ch->lc_lock);
+ ch->receive_cb = NULL;
+ mutex_lock(&ch->tx_lock);
+ ch->write_done = NULL;
+ mutex_unlock(&ch->tx_lock);
ch->is_local_open = 0;
ch->priv = NULL;
- ch->receive_cb = NULL;
- ch->write_done = NULL;
mutex_unlock(&ch->lc_lock);
sdio_cmux_write_cmd(ch->lc_id, CLOSE);
return 0;
diff --git a/arch/arm/mach-msm/timer.c b/arch/arm/mach-msm/timer.c
index 1df3c23..d9488ec 100644
--- a/arch/arm/mach-msm/timer.c
+++ b/arch/arm/mach-msm/timer.c
@@ -49,6 +49,10 @@
#define DG_TIMER_RATING 300
#endif
+#ifndef MSM_TMR0_BASE
+#define MSM_TMR0_BASE MSM_TMR_BASE
+#endif
+
#define MSM_DGT_SHIFT (5)
#define TIMER_MATCH_VAL 0x0000
@@ -393,7 +397,6 @@
local_irq_restore(irq_flags);
}
-/* Call this after SMP init */
void __iomem *msm_timer_get_timer0_base(void)
{
return MSM_TMR_BASE + global_timer_offset;
@@ -993,10 +996,17 @@
else if (cpu_is_msm7x30() || cpu_is_msm8x55())
dgt->freq = 6144000;
else if (cpu_is_msm8x60()) {
+ global_timer_offset = MSM_TMR0_BASE - MSM_TMR_BASE;
dgt->freq = 6750000;
__raw_writel(DGT_CLK_CTL_DIV_4, MSM_TMR_BASE + DGT_CLK_CTL);
- } else if (cpu_is_msm8960() || cpu_is_apq8064() || cpu_is_msm8930()
- || cpu_is_msm9615()) {
+ } else if (cpu_is_msm9615()) {
+ dgt->freq = 6750000;
+ __raw_writel(DGT_CLK_CTL_DIV_4, MSM_TMR_BASE + DGT_CLK_CTL);
+ gpt->freq = 32765;
+ gpt_hz = 32765;
+ sclk_hz = 32765;
+ } else if (cpu_is_msm8960() || cpu_is_apq8064() || cpu_is_msm8930()) {
+ global_timer_offset = MSM_TMR0_BASE - MSM_TMR_BASE;
dgt->freq = 6750000;
__raw_writel(DGT_CLK_CTL_DIV_4, MSM_TMR_BASE + DGT_CLK_CTL);
gpt->freq = 32765;
@@ -1081,7 +1091,6 @@
if (!smp_processor_id())
return 0;
- global_timer_offset = MSM_TMR0_BASE - MSM_TMR_BASE;
if (cpu_is_msm8x60() || cpu_is_msm8960() || cpu_is_apq8064()
|| cpu_is_msm8930())
__raw_writel(DGT_CLK_CTL_DIV_4, MSM_TMR_BASE + DGT_CLK_CTL);
diff --git a/arch/arm/mm/mmu.c b/arch/arm/mm/mmu.c
index 350e5a9..aeaa173 100644
--- a/arch/arm/mm/mmu.c
+++ b/arch/arm/mm/mmu.c
@@ -791,6 +791,19 @@
{
int i, j, highmem = 0;
+#if (defined CONFIG_HIGHMEM) && (defined CONFIG_FIX_MOVABLE_ZONE)
+
+/* For now, we must ensure that a small highmem zone exists
+ * after most of it is transformed into the movable zone.
+ */
+#define MIN_HIGHMEM_SIZE (5 * SECTION_SIZE)
+ void *v_movable_start;
+
+ v_movable_start = __va(movable_reserved_start) - MIN_HIGHMEM_SIZE;
+
+ if (vmalloc_min > v_movable_start)
+ vmalloc_min = v_movable_start;
+#endif
for (i = 0, j = 0; i < meminfo.nr_banks; i++) {
struct membank *bank = &meminfo.bank[j];
*bank = meminfo.bank[i];
diff --git a/drivers/crypto/msm/qce40.c b/drivers/crypto/msm/qce40.c
index 4ef2e08..893933b 100644
--- a/drivers/crypto/msm/qce40.c
+++ b/drivers/crypto/msm/qce40.c
@@ -25,6 +25,7 @@
#include <linux/delay.h>
#include <linux/crypto.h>
#include <linux/qcedev.h>
+#include <linux/bitops.h>
#include <crypto/hash.h>
#include <crypto/sha.h>
#include <mach/dma.h>
@@ -168,23 +169,24 @@
return 0;
};
-#ifdef CONFIG_ARCH_MSM9615
static void config_ce_engine(struct qce_device *pce_dev)
{
unsigned int val = 0;
+ unsigned int ret = 0;
- val = (1 << CRYPTO_MASK_DOUT_INTR) | (1 << CRYPTO_MASK_DIN_INTR) |
- (1 << CRYPTO_MASK_OP_DONE_INTR) |
- (1 << CRYPTO_MASK_ERR_INTR);
+ /* Crypto config register returns a 0 when it is XPU protected. */
+ ret = readl_relaxed(pce_dev->iobase + CRYPTO_CONFIG_REG);
- writel_relaxed(val, pce_dev->iobase + CRYPTO_CONFIG_REG);
+ /* Configure the crypto register if it is not XPU protected. */
+ if (ret) {
+ val = BIT(CRYPTO_MASK_DOUT_INTR) |
+ BIT(CRYPTO_MASK_DIN_INTR) |
+ BIT(CRYPTO_MASK_OP_DONE_INTR) |
+ BIT(CRYPTO_MASK_ERR_INTR);
+
+ writel_relaxed(val, pce_dev->iobase + CRYPTO_CONFIG_REG);
+ }
}
-#else
-static void config_ce_engine(struct qce_device *pce_dev)
-{
-
-}
-#endif
static void _check_probe_done_call_back(struct msm_dmov_cmd *cmd_ptr,
unsigned int result, struct msm_dmov_errdata *err)
@@ -2569,4 +2571,4 @@
MODULE_LICENSE("GPL v2");
MODULE_AUTHOR("Mona Hossain <mhossain@codeaurora.org>");
MODULE_DESCRIPTION("Crypto Engine driver");
-MODULE_VERSION("2.12");
+MODULE_VERSION("2.13");
diff --git a/drivers/gpio/pm8xxx-gpio.c b/drivers/gpio/pm8xxx-gpio.c
index 026fd05..377510f 100644
--- a/drivers/gpio/pm8xxx-gpio.c
+++ b/drivers/gpio/pm8xxx-gpio.c
@@ -289,7 +289,8 @@
GFP_KERNEL);
if (!pm_gpio_chip->bank1) {
pr_err("Cannot allocate pm_gpio_chip->bank1\n");
- return -ENOMEM;
+ ret = -ENOMEM;
+ goto free_chip;
}
spin_lock_init(&pm_gpio_chip->pm_lock);
@@ -332,6 +333,8 @@
pr_err("failed to remove gpio chip\n");
reset_drvdata:
platform_set_drvdata(pdev, NULL);
+ kfree(pm_gpio_chip->bank1);
+free_chip:
kfree(pm_gpio_chip);
return ret;
}
diff --git a/drivers/gpu/ion/ion_carveout_heap.c b/drivers/gpu/ion/ion_carveout_heap.c
index f6097ac..71dea89 100644
--- a/drivers/gpu/ion/ion_carveout_heap.c
+++ b/drivers/gpu/ion/ion_carveout_heap.c
@@ -101,13 +101,27 @@
struct scatterlist *ion_carveout_heap_map_dma(struct ion_heap *heap,
struct ion_buffer *buffer)
{
- return ERR_PTR(-EINVAL);
+ struct scatterlist *sglist;
+ struct page *page = phys_to_page(buffer->priv_phys);
+
+ if (page == NULL)
+ return NULL;
+
+ sglist = vmalloc(sizeof(struct scatterlist));
+ if (!sglist)
+ return ERR_PTR(-ENOMEM);
+
+ sg_init_table(sglist, 1);
+ sg_set_page(sglist, page, buffer->size, 0);
+
+ return sglist;
}
void ion_carveout_heap_unmap_dma(struct ion_heap *heap,
struct ion_buffer *buffer)
{
- return;
+ if (buffer->sglist)
+ vfree(buffer->sglist);
}
void *ion_carveout_heap_map_kernel(struct ion_heap *heap,
@@ -192,6 +206,8 @@
.map_user = ion_carveout_heap_map_user,
.map_kernel = ion_carveout_heap_map_kernel,
.unmap_kernel = ion_carveout_heap_unmap_kernel,
+ .map_dma = ion_carveout_heap_map_dma,
+ .unmap_dma = ion_carveout_heap_unmap_dma,
.cache_op = ion_carveout_cache_ops,
.get_allocated = ion_carveout_get_allocated,
.get_total = ion_carveout_get_total,
diff --git a/drivers/gpu/msm/z180.c b/drivers/gpu/msm/z180.c
index 6cd57b3..9e14247 100644
--- a/drivers/gpu/msm/z180.c
+++ b/drivers/gpu/msm/z180.c
@@ -411,7 +411,7 @@
unsigned int sizedwords;
if (device->state & KGSL_STATE_HUNG) {
- return -EINVAL;
+ result = -EINVAL;
goto error;
}
if (numibs != 1) {
diff --git a/drivers/hwmon/msmproc_adc.c b/drivers/hwmon/msmproc_adc.c
index a0ee748..fa6949e 100644
--- a/drivers/hwmon/msmproc_adc.c
+++ b/drivers/hwmon/msmproc_adc.c
@@ -34,81 +34,89 @@
};
static const struct pm8921_adc_map_pt adcmap_btm_threshold[] = {
- {-30, 41001},
- {-20, 40017},
- {-10, 38721},
- {0, 37186},
- {10, 35554},
- {11, 35392},
- {12, 35230},
- {13, 35070},
- {14, 34910},
- {15, 34751},
- {16, 34594},
- {17, 34438},
- {18, 34284},
- {19, 34131},
- {20, 33980},
- {21, 33830},
- {22, 33683},
- {23, 33538},
- {24, 33394},
- {25, 33253},
- {26, 33114},
- {27, 32977},
- {28, 32842},
- {29, 32710},
- {30, 32580},
- {31, 32452},
- {32, 32327},
- {33, 32204},
- {34, 32084},
- {35, 31966},
- {36, 31850},
- {37, 31737},
- {38, 31627},
- {39, 31518},
- {40, 31412},
- {41, 31309},
- {42, 31208},
- {43, 31109},
- {44, 31013},
- {45, 30918},
- {46, 30827},
- {47, 30737},
- {48, 30649},
- {49, 30564},
- {50, 30481},
- {51, 30400},
- {52, 30321},
- {53, 30244},
- {54, 30169},
- {55, 30096},
- {56, 30025},
- {57, 29956},
- {58, 29889},
- {59, 29823},
- {60, 29759},
- {61, 29697},
- {62, 29637},
- {63, 29578},
- {64, 29521},
- {65, 29465},
- {66, 29411},
- {67, 29359},
- {68, 29308},
- {69, 29258},
- {70, 29209},
- {71, 29162},
- {72, 29117},
- {73, 29072},
- {74, 29029},
- {75, 28987},
- {76, 28946},
- {77, 28906},
- {78, 28868},
- {79, 28830},
- {80, 28794}
+ {-30, 1642},
+ {-20, 1544},
+ {-10, 1414},
+ {0, 1260},
+ {1, 1244},
+ {2, 1228},
+ {3, 1212},
+ {4, 1195},
+ {5, 1179},
+ {6, 1162},
+ {7, 1146},
+ {8, 1129},
+ {9, 1113},
+ {10, 1097},
+ {11, 1080},
+ {12, 1064},
+ {13, 1048},
+ {14, 1032},
+ {15, 1016},
+ {16, 1000},
+ {17, 985},
+ {18, 969},
+ {19, 954},
+ {20, 939},
+ {21, 924},
+ {22, 909},
+ {23, 894},
+ {24, 880},
+ {25, 866},
+ {26, 852},
+ {27, 838},
+ {28, 824},
+ {29, 811},
+ {30, 798},
+ {31, 785},
+ {32, 773},
+ {33, 760},
+ {34, 748},
+ {35, 736},
+ {36, 725},
+ {37, 713},
+ {38, 702},
+ {39, 691},
+ {40, 681},
+ {41, 670},
+ {42, 660},
+ {43, 650},
+ {44, 640},
+ {45, 631},
+ {46, 622},
+ {47, 613},
+ {48, 604},
+ {49, 595},
+ {50, 587},
+ {51, 579},
+ {52, 571},
+ {53, 563},
+ {54, 556},
+ {55, 548},
+ {56, 541},
+ {57, 534},
+ {58, 527},
+ {59, 521},
+ {60, 514},
+ {61, 508},
+ {62, 502},
+ {63, 496},
+ {64, 490},
+ {65, 485},
+ {66, 281},
+ {67, 274},
+ {68, 267},
+ {69, 260},
+ {70, 254},
+ {71, 247},
+ {72, 241},
+ {73, 235},
+ {74, 229},
+ {75, 224},
+ {76, 218},
+ {77, 213},
+ {78, 208},
+ {79, 203}
};
static const struct pm8921_adc_map_pt adcmap_pa_therm[] = {
@@ -591,7 +599,9 @@
}
EXPORT_SYMBOL_GPL(pm8921_adc_tdkntcg_therm);
-int32_t pm8921_adc_batt_scaler(struct pm8921_adc_arb_btm_param *btm_param)
+int32_t pm8921_adc_batt_scaler(struct pm8921_adc_arb_btm_param *btm_param,
+ const struct pm8921_adc_properties *adc_properties,
+ const struct pm8921_adc_chan_properties *chan_properties)
{
int rc;
@@ -600,14 +610,28 @@
ARRAY_SIZE(adcmap_btm_threshold),
btm_param->low_thr_temp,
&btm_param->low_thr_voltage);
+ if (rc)
+ return rc;
- if (!rc) {
- rc = pm8921_adc_map_linear(
+ btm_param->low_thr_voltage *=
+ chan_properties->adc_graph[ADC_CALIB_RATIOMETRIC].dy;
+ do_div(btm_param->low_thr_voltage, adc_properties->adc_vdd_reference);
+ btm_param->low_thr_voltage +=
+ chan_properties->adc_graph[ADC_CALIB_RATIOMETRIC].adc_gnd;
+
+ rc = pm8921_adc_map_linear(
adcmap_btm_threshold,
ARRAY_SIZE(adcmap_btm_threshold),
btm_param->high_thr_temp,
&btm_param->high_thr_voltage);
- }
+ if (rc)
+ return rc;
+
+ btm_param->high_thr_voltage *=
+ chan_properties->adc_graph[ADC_CALIB_RATIOMETRIC].dy;
+ do_div(btm_param->high_thr_voltage, adc_properties->adc_vdd_reference);
+ btm_param->high_thr_voltage +=
+ chan_properties->adc_graph[ADC_CALIB_RATIOMETRIC].adc_gnd;
return rc;
}
diff --git a/drivers/hwmon/pm8921-adc.c b/drivers/hwmon/pm8921-adc.c
index 33f4a3a..38e18de 100644
--- a/drivers/hwmon/pm8921-adc.c
+++ b/drivers/hwmon/pm8921-adc.c
@@ -644,13 +644,16 @@
offset_adc = calib_read_2 -
((slope_adc * adc_pmic->adc_prop->adc_vdd_reference)
>> PM8921_ADC_MUL);
-
adc_pmic->conv->chan_prop->adc_graph[ADC_CALIB_RATIOMETRIC].offset
= offset_adc;
adc_pmic->conv->chan_prop->adc_graph[ADC_CALIB_RATIOMETRIC].dy =
(calib_read_1 - calib_read_2);
adc_pmic->conv->chan_prop->adc_graph[ADC_CALIB_RATIOMETRIC].dx =
adc_pmic->adc_prop->adc_vdd_reference;
+ adc_pmic->conv->chan_prop->adc_graph[ADC_CALIB_RATIOMETRIC].adc_vref =
+ calib_read_1;
+ adc_pmic->conv->chan_prop->adc_graph[ADC_CALIB_RATIOMETRIC].adc_gnd =
+ calib_read_2;
calib_fail:
rc = pm8921_adc_arb_cntrl(0, CHANNEL_MUXOFF);
if (rc < 0) {
@@ -827,7 +830,8 @@
return -EINVAL;
}
- rc = pm8921_adc_batt_scaler(btm_param);
+ rc = pm8921_adc_batt_scaler(btm_param, adc_pmic->adc_prop,
+ adc_pmic->conv->chan_prop);
if (rc < 0) {
pr_err("Failed to lookup the BTM thresholds\n");
return rc;
diff --git a/drivers/input/touchscreen/cyttsp-i2c.c b/drivers/input/touchscreen/cyttsp-i2c.c
index a3446a3..aefce3e 100644
--- a/drivers/input/touchscreen/cyttsp-i2c.c
+++ b/drivers/input/touchscreen/cyttsp-i2c.c
@@ -2419,7 +2419,7 @@
}
rc = regulator_set_optimum_mode(ts->vdd[i],
- reg_info[i].load_uA);
+ reg_info[i].hpm_load_uA);
if (rc < 0) {
pr_err("%s: regulator_set_optimum_mode failed rc=%d\n",
__func__, rc);
@@ -2838,6 +2838,57 @@
}
#ifdef CONFIG_PM
+static int cyttsp_regulator_lpm(struct cyttsp *ts, bool on)
+{
+ int rc = 0, i;
+ const struct cyttsp_regulator *reg_info =
+ ts->platform_data->regulator_info;
+ u8 num_reg = ts->platform_data->num_regulators;
+
+ if (on == false)
+ goto regulator_hpm;
+
+ for (i = 0; i < num_reg; i++) {
+ rc = regulator_set_optimum_mode(ts->vdd[i],
+ reg_info[i].lpm_load_uA);
+ if (rc < 0) {
+ pr_err("%s: regulator_set_optimum failed rc = %d\n",
+ __func__, rc);
+ goto fail_regulator_lpm;
+ }
+
+ }
+
+ return 0;
+
+regulator_hpm:
+ for (i = 0; i < num_reg; i++) {
+ rc = regulator_set_optimum_mode(ts->vdd[i],
+ reg_info[i].hpm_load_uA);
+ if (rc < 0) {
+ pr_err("%s: regulator_set_optimum failed"
+ "rc = %d\n", __func__, rc);
+ goto fail_regulator_hpm;
+ }
+ }
+
+ return 0;
+
+fail_regulator_lpm:
+ while (i--)
+ regulator_set_optimum_mode(ts->vdd[i],
+ reg_info[i].hpm_load_uA);
+
+ return rc;
+
+fail_regulator_hpm:
+ while (i--)
+ regulator_set_optimum_mode(ts->vdd[i],
+ reg_info[i].lpm_load_uA);
+
+ return rc;
+}
+
/* Function to manage power-on resume */
static int cyttsp_resume(struct device *dev)
{
@@ -2865,6 +2916,8 @@
(ts->platform_data->power_state != CY_ACTIVE_STATE)) {
if (ts->platform_data->resume)
retval = ts->platform_data->resume(ts->client);
+ else
+ retval = cyttsp_regulator_lpm(ts, false);
/* take TTSP device out of bootloader mode;
* switch back to TrueTouch operational mode */
if (!(retval < CY_OK)) {
@@ -2948,14 +3001,23 @@
if (!(retval < CY_OK)) {
if (ts->platform_data->use_sleep &&
(ts->platform_data->power_state == CY_ACTIVE_STATE)) {
+ if (ts->platform_data->suspend) {
+ retval =
+ ts->platform_data->suspend(ts->client);
+ } else {
+ retval = cyttsp_regulator_lpm(ts, true);
+ }
if (ts->platform_data->use_sleep & CY_USE_DEEP_SLEEP_SEL)
sleep_mode = CY_DEEP_SLEEP_MODE;
else
sleep_mode = CY_LOW_PWR_MODE;
- retval = i2c_smbus_write_i2c_block_data(ts->client,
- CY_REG_BASE,
- sizeof(sleep_mode), &sleep_mode);
+ if (!(retval < CY_OK)) {
+ retval =
+ i2c_smbus_write_i2c_block_data(ts->client,
+ CY_REG_BASE,
+ sizeof(sleep_mode), &sleep_mode);
+ }
}
}
diff --git a/drivers/media/radio/radio-iris.c b/drivers/media/radio/radio-iris.c
index e8e9770..a256e51 100644
--- a/drivers/media/radio/radio-iris.c
+++ b/drivers/media/radio/radio-iris.c
@@ -84,11 +84,13 @@
struct hci_fm_trans_conf_req_struct trans_conf;
struct hci_fm_rds_grp_req rds_grp;
unsigned char g_search_mode;
+ unsigned char power_mode;
int search_on;
unsigned int tone_freq;
unsigned char g_scan_time;
unsigned int g_antenna;
unsigned int g_rds_grp_proc_ps;
+ unsigned char event_mask;
enum iris_region_t region;
struct hci_fm_dbg_param_rsp st_dbg_param;
struct hci_ev_srch_list_compl srch_st_result;
@@ -763,6 +765,17 @@
&sig_threshold);
}
+static int hci_fm_set_event_mask(struct radio_hci_dev *hdev,
+ unsigned long param)
+{
+ u16 opcode = 0;
+ u8 event_mask = param;
+
+ opcode = hci_opcode_pack(HCI_OGF_FM_RECV_CTRL_CMD_REQ,
+ HCI_OCF_FM_SET_EVENT_MASK);
+ return radio_hci_send_cmd(hdev, opcode, sizeof(event_mask),
+ &event_mask);
+}
static int hci_fm_get_sig_threshold_req(struct radio_hci_dev *hdev,
unsigned long param)
{
@@ -1095,6 +1108,13 @@
return ret;
}
+static inline int hci_conf_event_mask(__u8 *arg,
+ struct radio_hci_dev *hdev)
+{
+ u8 event_mask = *arg;
+ return radio_hci_request(hdev, hci_fm_set_event_mask,
+ event_mask, RADIO_HCI_TIMEOUT);
+}
static int hci_set_fm_recv_conf(struct hci_fm_recv_conf_req *arg,
struct radio_hci_dev *hdev)
{
@@ -1778,8 +1798,10 @@
case hci_diagnostic_cmd_op_pack(HCI_OCF_FM_POKE_DATA):
case hci_diagnostic_cmd_op_pack(HCI_FM_SET_INTERNAL_TONE_GENRATOR):
case hci_common_cmd_op_pack(HCI_OCF_FM_SET_CALIBRATION):
+ case hci_recv_ctrl_cmd_op_pack(HCI_OCF_FM_SET_EVENT_MASK):
hci_cc_rsp(hdev, skb);
break;
+
case hci_diagnostic_cmd_op_pack(HCI_OCF_FM_SSBI_PEEK_REG):
hci_cc_ssbi_peek_rsp(hdev, skb);
break;
@@ -2156,6 +2178,43 @@
return retval;
}
+static int set_low_power_mode(struct iris_device *radio, int power_mode)
+{
+
+ int rds_grps_proc = 0x00;
+ int retval = 0;
+ if (radio->power_mode != power_mode) {
+
+ if (power_mode) {
+ radio->event_mask = 0x00;
+ rds_grps_proc = 0x00 | AF_JUMP_ENABLE ;
+ retval = hci_fm_rds_grps_process(
+ &rds_grps_proc,
+ radio->fm_hdev);
+ if (retval < 0) {
+ FMDERR("Disable RDS failed");
+ return retval;
+ }
+ retval = hci_conf_event_mask(&radio->event_mask,
+ radio->fm_hdev);
+ } else {
+
+ radio->event_mask = SIG_LEVEL_INTR |
+ RDS_SYNC_INTR | AUDIO_CTRL_INTR;
+ retval = hci_conf_event_mask(&radio->event_mask,
+ radio->fm_hdev);
+ if (retval < 0) {
+ FMDERR("Enable Async events failed");
+ return retval;
+ }
+ retval = hci_fm_rds_grps_process(
+ &radio->g_rds_grp_proc_ps,
+ radio->fm_hdev);
+ }
+ radio->power_mode = power_mode;
+ }
+ return retval;
+}
static int iris_recv_set_region(struct iris_device *radio, int req_region)
{
int retval;
@@ -2401,6 +2460,7 @@
ctrl->value = radio->rds_grp.rds_buf_size;
break;
case V4L2_CID_PRIVATE_IRIS_LP_MODE:
+ ctrl->value = radio->power_mode;
break;
case V4L2_CID_PRIVATE_IRIS_ANTENNA:
ctrl->value = radio->g_antenna;
@@ -2770,6 +2830,7 @@
radio->fm_hdev);
break;
case V4L2_CID_PRIVATE_IRIS_LP_MODE:
+ set_low_power_mode(radio, ctrl->value);
break;
case V4L2_CID_PRIVATE_IRIS_ANTENNA:
temp_val = ctrl->value;
diff --git a/drivers/media/video/msm/gemini/msm_gemini_core.c b/drivers/media/video/msm/gemini/msm_gemini_core.c
index db0f505..480500b 100644
--- a/drivers/media/video/msm/gemini/msm_gemini_core.c
+++ b/drivers/media/video/msm/gemini/msm_gemini_core.c
@@ -71,7 +71,8 @@
for (i = 0; i < 2; i++) {
if (we_pingpong_buf.buf_status[i] && release_buf)
msm_gemini_platform_p2v(we_pingpong_buf.buf[i].file,
- &we_pingpong_buf.buf[i].msm_buffer);
+ &we_pingpong_buf.buf[i].msm_buffer,
+ &we_pingpong_buf.buf[i].handle);
we_pingpong_buf.buf_status[i] = 0;
}
}
diff --git a/drivers/media/video/msm/gemini/msm_gemini_hw.h b/drivers/media/video/msm/gemini/msm_gemini_hw.h
index f91a135..3c2fc6a 100644
--- a/drivers/media/video/msm/gemini/msm_gemini_hw.h
+++ b/drivers/media/video/msm/gemini/msm_gemini_hw.h
@@ -16,6 +16,7 @@
#include <media/msm_gemini.h>
#include "msm_gemini_hw_reg.h"
#include <mach/msm_subsystem_map.h>
+#include <linux/ion.h>
struct msm_gemini_hw_buf {
struct msm_gemini_buf vbuf;
@@ -28,6 +29,7 @@
uint32_t num_of_mcu_rows;
struct msm_mapped_buffer *msm_buffer;
int *subsystem_id;
+ struct ion_handle *handle;
};
struct msm_gemini_hw_pingpong {
diff --git a/drivers/media/video/msm/gemini/msm_gemini_platform.c b/drivers/media/video/msm/gemini/msm_gemini_platform.c
index 9f5ec16..e81215e 100644
--- a/drivers/media/video/msm/gemini/msm_gemini_platform.c
+++ b/drivers/media/video/msm/gemini/msm_gemini_platform.c
@@ -25,29 +25,38 @@
/* AXI rate in KHz */
#define MSM_SYSTEM_BUS_RATE 160000
+struct ion_client *gemini_client;
void msm_gemini_platform_p2v(struct file *file,
- struct msm_mapped_buffer **msm_buffer)
+ struct msm_mapped_buffer **msm_buffer,
+ struct ion_handle **ionhandle)
{
-
if (msm_subsystem_unmap_buffer(
(struct msm_mapped_buffer *)*msm_buffer) < 0)
pr_err("%s: umapped stat memory\n", __func__);
*msm_buffer = NULL;
-#ifdef CONFIG_ANDROID_PMEM
+#ifdef CONFIG_MSM_MULTIMEDIA_USE_ION
+ ion_free(gemini_client, *ionhandle);
+ *ionhandle = NULL;
+#elif CONFIG_ANDROID_PMEM
put_pmem_file(file);
#endif
}
uint32_t msm_gemini_platform_v2p(int fd, uint32_t len, struct file **file_p,
- struct msm_mapped_buffer **msm_buffer,
- int *subsys_id)
+ struct msm_mapped_buffer **msm_buffer,
+ int *subsys_id, struct ion_handle **ionhandle)
{
unsigned long paddr;
unsigned long size;
int rc;
int flags;
-#ifdef CONFIG_ANDROID_PMEM
+#ifdef CONFIG_MSM_MULTIMEDIA_USE_ION
+ *ionhandle = ion_import_fd(gemini_client, fd);
+ if (IS_ERR_OR_NULL(*ionhandle))
+ return 0;
+ rc = ion_phys(gemini_client, *ionhandle, &paddr, (size_t *)&size);
+#elif CONFIG_ANDROID_PMEM
unsigned long kvstart;
rc = get_pmem_file(fd, &paddr, &kvstart, &size, file_p);
#else
@@ -73,6 +82,12 @@
flags, subsys_id, 1);
if (IS_ERR((void *)*msm_buffer)) {
pr_err("%s: msm_subsystem_map_buffer failed\n", __func__);
+#ifdef CONFIG_MSM_MULTIMEDIA_USE_ION
+ ion_free(gemini_client, *ionhandle);
+ *ionhandle = NULL;
+#elif CONFIG_ANDROID_PMEM
+ put_pmem_file(*file_p);
+#endif
return 0;
}
paddr = ((struct msm_mapped_buffer *)*msm_buffer)->iova[0];
@@ -136,6 +151,10 @@
*mem = gemini_mem;
*base = gemini_base;
*irq = gemini_irq;
+
+#ifdef CONFIG_MSM_MULTIMEDIA_USE_ION
+ gemini_client = msm_ion_client_create(-1, "camera/gemini");
+#endif
GMN_DBG("%s:%d] success\n", __func__, __LINE__);
return rc;
@@ -159,7 +178,9 @@
result = msm_camio_jpeg_clk_disable();
iounmap(base);
release_mem_region(mem->start, resource_size(mem));
-
+#ifdef CONFIG_MSM_MULTIMEDIA_USE_ION
+ ion_client_destroy(gemini_client);
+#endif
GMN_DBG("%s:%d] success\n", __func__, __LINE__);
return result;
}
diff --git a/drivers/media/video/msm/gemini/msm_gemini_platform.h b/drivers/media/video/msm/gemini/msm_gemini_platform.h
index cd897b0..c54d7df 100644
--- a/drivers/media/video/msm/gemini/msm_gemini_platform.h
+++ b/drivers/media/video/msm/gemini/msm_gemini_platform.h
@@ -15,12 +15,13 @@
#include <linux/interrupt.h>
#include <linux/platform_device.h>
-
+#include <linux/ion.h>
void msm_gemini_platform_p2v(struct file *file,
- struct msm_mapped_buffer **msm_buffer);
+ struct msm_mapped_buffer **msm_buffer,
+ struct ion_handle **ionhandle);
uint32_t msm_gemini_platform_v2p(int fd, uint32_t len, struct file **file,
struct msm_mapped_buffer **msm_buffer,
- int *subsys_id);
+ int *subsys_id, struct ion_handle **ionhandle);
int msm_gemini_platform_clk_enable(void);
int msm_gemini_platform_clk_disable(void);
diff --git a/drivers/media/video/msm/gemini/msm_gemini_sync.c b/drivers/media/video/msm/gemini/msm_gemini_sync.c
index c8d4fa0..0f0bd67 100644
--- a/drivers/media/video/msm/gemini/msm_gemini_sync.c
+++ b/drivers/media/video/msm/gemini/msm_gemini_sync.c
@@ -151,7 +151,7 @@
buf_p = msm_gemini_q_out(q_p);
if (buf_p) {
msm_gemini_platform_p2v(buf_p->file,
- &buf_p->msm_buffer);
+ &buf_p->msm_buffer, &buf_p->handle);
GMN_DBG("%s:%d] %s\n", __func__, __LINE__, q_p->name);
kfree(buf_p->subsystem_id);
kfree(buf_p);
@@ -317,7 +317,8 @@
}
buf_cmd = buf_p->vbuf;
- msm_gemini_platform_p2v(buf_p->file, &buf_p->msm_buffer);
+ msm_gemini_platform_p2v(buf_p->file, &buf_p->msm_buffer,
+ &buf_p->handle);
kfree(buf_p->subsystem_id);
kfree(buf_p);
@@ -368,7 +369,7 @@
}
buf_p->y_buffer_addr = msm_gemini_platform_v2p(buf_cmd.fd,
buf_cmd.y_len, &buf_p->file, &buf_p->msm_buffer,
- buf_p->subsystem_id);
+ buf_p->subsystem_id, &buf_p->handle);
if (!buf_p->y_buffer_addr) {
GMN_PR_ERR("%s:%d] v2p wrong\n", __func__, __LINE__);
kfree(buf_p->subsystem_id);
@@ -434,7 +435,8 @@
}
buf_cmd = buf_p->vbuf;
- msm_gemini_platform_p2v(buf_p->file, &buf_p->msm_buffer);
+ msm_gemini_platform_p2v(buf_p->file, &buf_p->msm_buffer,
+ &buf_p->handle);
kfree(buf_p->subsystem_id);
kfree(buf_p);
@@ -484,7 +486,7 @@
}
buf_p->y_buffer_addr = msm_gemini_platform_v2p(buf_cmd.fd,
buf_cmd.y_len + buf_cmd.cbcr_len, &buf_p->file,
- &buf_p->msm_buffer, buf_p->subsystem_id)
+ &buf_p->msm_buffer, buf_p->subsystem_id, &buf_p->handle)
+ buf_cmd.offset;
buf_p->y_len = buf_cmd.y_len;
diff --git a/drivers/media/video/msm/msm_camera.c b/drivers/media/video/msm/msm_camera.c
index 6bc7d8e..565c724 100644
--- a/drivers/media/video/msm/msm_camera.c
+++ b/drivers/media/video/msm/msm_camera.c
@@ -2516,20 +2516,17 @@
} else {
enable &= PP_MASK;
if (enable & (enable - 1)) {
- pr_err("%s: error: more than one PP request!\n",
+ CDBG("%s: more than one PP request!\n",
__func__);
- return -EINVAL;
}
if (sync->pp_mask) {
if (enable) {
- pr_err("%s: postproc %x is already enabled\n",
+ CDBG("%s: postproc %x is already enabled\n",
__func__, sync->pp_mask & enable);
- return -EINVAL;
} else {
sync->pp_mask &= enable;
CDBG("%s: sync->pp_mask %d enable %d\n",
__func__, sync->pp_mask, enable);
- return 0;
}
}
diff --git a/drivers/media/video/msm/msm_isp.c b/drivers/media/video/msm/msm_isp.c
index 56fbc41..e12d6b1 100644
--- a/drivers/media/video/msm/msm_isp.c
+++ b/drivers/media/video/msm/msm_isp.c
@@ -522,6 +522,8 @@
case CMD_AXI_CFG_PREVIEW:
case CMD_AXI_CFG_SNAP:
case CMD_AXI_CFG_ZSL:
+ case CMD_AXI_CFG_VIDEO_ALL_CHNLS:
+ case CMD_AXI_CFG_ZSL_ALL_CHNLS:
case CMD_RAW_PICT_AXI_CFG:
/* Dont need to pass buffer information.
* subdev will get the buffer from media
diff --git a/drivers/media/video/msm/msm_mctl.c b/drivers/media/video/msm/msm_mctl.c
index 4ee6117..a7fe8a2 100644
--- a/drivers/media/video/msm/msm_mctl.c
+++ b/drivers/media/video/msm/msm_mctl.c
@@ -73,6 +73,14 @@
.colorspace = V4L2_COLORSPACE_JPEG,
},
{
+ .name = "YU12BAYER",
+ .depth = 8,
+ .bitsperpxl = 8,
+ .fourcc = V4L2_PIX_FMT_YUV420M,
+ .pxlcode = V4L2_MBUS_FMT_SBGGR10_1X10, /* Bayer sensor */
+ .colorspace = V4L2_COLORSPACE_JPEG,
+ },
+ {
.name = "RAWBAYER",
.depth = 10,
.bitsperpxl = 10,
diff --git a/drivers/media/video/msm/msm_vfe32.c b/drivers/media/video/msm/msm_vfe32.c
index 51b7a90..691516f 100644
--- a/drivers/media/video/msm/msm_vfe32.c
+++ b/drivers/media/video/msm/msm_vfe32.c
@@ -454,7 +454,7 @@
break;
case OUTPUT_1_2_AND_3:
- CDBG("%s: OUTPUT_1_2_AND_3", __func__);
+ CDBG("%s: OUTPUT_ZSL", __func__);
/* use wm0& 4 for postview, wm1&5 for preview.*/
/* use wm2& 6 for main img */
vfe32_ctrl->outpath.output_mode |=
@@ -478,6 +478,23 @@
vfe32_ctrl->outpath.out1.ch0 = 0; /* raw */
vfe32_ctrl->outpath.output_mode |= VFE32_OUTPUT_MODE_S;
break;
+ case OUTPUT_ALL_CHNLS:
+ /* YV12 preview */
+ vfe32_ctrl->outpath.output_mode |=
+ VFE32_OUTPUT_MODE_P_ALL_CHNLS;
+ /* video */
+ vfe32_ctrl->outpath.output_mode |=
+ VFE32_OUTPUT_MODE_V;
+ break;
+ case OUTPUT_ZSL_ALL_CHNLS:
+ CDBG("%s: OUTPUT_ZSL_ALL_CHNLS", __func__);
+ vfe32_ctrl->outpath.output_mode |=
+ VFE32_OUTPUT_MODE_S; /* main image.*/
+ vfe32_ctrl->outpath.output_mode |=
+ VFE32_OUTPUT_MODE_P_ALL_CHNLS; /* preview. */
+ vfe32_ctrl->outpath.output_mode |=
+ VFE32_OUTPUT_MODE_T; /* thumbnail. */
+ break;
default:
break;
}
@@ -725,6 +742,12 @@
irq_comp_mask |=
((0x1 << (vfe32_ctrl->outpath.out0.ch0)) |
(0x1 << (vfe32_ctrl->outpath.out0.ch1)));
+ } else if (vfe32_ctrl->outpath.output_mode &
+ VFE32_OUTPUT_MODE_P_ALL_CHNLS) {
+ pr_debug("%s Enabling all channels ", __func__);
+ irq_comp_mask |= (0x1 << vfe32_ctrl->outpath.out0.ch0 |
+ 0x1 << vfe32_ctrl->outpath.out0.ch1 |
+ 0x1 << vfe32_ctrl->outpath.out0.ch2);
}
if (vfe32_ctrl->outpath.output_mode & VFE32_OUTPUT_MODE_T) {
irq_comp_mask |=
@@ -741,6 +764,14 @@
vfe32_AXI_WM_CFG[vfe32_ctrl->outpath.out0.ch0]);
msm_io_w(1, vfe32_ctrl->vfebase +
vfe32_AXI_WM_CFG[vfe32_ctrl->outpath.out0.ch1]);
+ } else if (vfe32_ctrl->outpath.output_mode &
+ VFE32_OUTPUT_MODE_P_ALL_CHNLS) {
+ msm_io_w(1, vfe32_ctrl->vfebase +
+ vfe32_AXI_WM_CFG[vfe32_ctrl->outpath.out0.ch0]);
+ msm_io_w(1, vfe32_ctrl->vfebase +
+ vfe32_AXI_WM_CFG[vfe32_ctrl->outpath.out0.ch1]);
+ msm_io_w(1, vfe32_ctrl->vfebase +
+ vfe32_AXI_WM_CFG[vfe32_ctrl->outpath.out0.ch2]);
}
if (vfe32_ctrl->outpath.output_mode & VFE32_OUTPUT_MODE_T) {
msm_io_w(1, vfe32_ctrl->vfebase +
@@ -839,6 +870,12 @@
if (vfe32_ctrl->outpath.output_mode & VFE32_OUTPUT_MODE_PT) {
irq_comp_mask |= (0x1 << vfe32_ctrl->outpath.out0.ch0 |
0x1 << vfe32_ctrl->outpath.out0.ch1);
+ } else if (vfe32_ctrl->outpath.output_mode &
+ VFE32_OUTPUT_MODE_P_ALL_CHNLS) {
+ pr_debug("%s Enabling all channels ", __func__);
+ irq_comp_mask |= (0x1 << vfe32_ctrl->outpath.out0.ch0 |
+ 0x1 << vfe32_ctrl->outpath.out0.ch1 |
+ 0x1 << vfe32_ctrl->outpath.out0.ch2);
}
if (vfe32_ctrl->outpath.output_mode & VFE32_OUTPUT_MODE_V) {
@@ -853,6 +890,14 @@
vfe32_AXI_WM_CFG[vfe32_ctrl->outpath.out0.ch0]);
msm_io_w(1, vfe32_ctrl->vfebase +
vfe32_AXI_WM_CFG[vfe32_ctrl->outpath.out0.ch1]);
+ } else if (vfe32_ctrl->outpath.output_mode &
+ VFE32_OUTPUT_MODE_P_ALL_CHNLS) {
+ msm_io_w(1, vfe32_ctrl->vfebase +
+ vfe32_AXI_WM_CFG[vfe32_ctrl->outpath.out0.ch0]);
+ msm_io_w(1, vfe32_ctrl->vfebase +
+ vfe32_AXI_WM_CFG[vfe32_ctrl->outpath.out0.ch1]);
+ msm_io_w(1, vfe32_ctrl->vfebase +
+ vfe32_AXI_WM_CFG[vfe32_ctrl->outpath.out0.ch2]);
}
msm_camio_set_perf_lvl(S_PREVIEW);
vfe32_start_common();
@@ -1681,6 +1726,39 @@
cmdp_local, V32_DEMOSAICV3_1_LEN);
break;
+ case VFE_CMD_DEMOSAICV3_UPDATE:
+ if (cmd->length !=
+ V32_DEMOSAICV3_0_LEN * V32_DEMOSAICV3_UP_REG_CNT) {
+ rc = -EFAULT;
+ goto proc_general_done;
+ }
+ cmdp = kmalloc(cmd->length, GFP_ATOMIC);
+ if (!cmdp) {
+ rc = -ENOMEM;
+ goto proc_general_done;
+ }
+ if (copy_from_user(cmdp,
+ (void __user *)(cmd->value),
+ cmd->length)) {
+ rc = -EFAULT;
+ goto proc_general_done;
+ }
+ cmdp_local = cmdp;
+
+ msm_io_memcpy(vfe32_ctrl->vfebase + V32_DEMOSAICV3_0_OFF,
+ cmdp_local, V32_DEMOSAICV3_0_LEN);
+ /* As the address space is not contiguous increment by 2
+ * before copying to next address space */
+ cmdp_local += 1;
+ msm_io_memcpy(vfe32_ctrl->vfebase + V32_DEMOSAICV3_1_OFF,
+ cmdp_local, 2 * V32_DEMOSAICV3_0_LEN);
+ /* As the address space is not contiguous increment by 2
+ * before copying to next address space */
+ cmdp_local += 2;
+ msm_io_memcpy(vfe32_ctrl->vfebase + V32_DEMOSAICV3_2_OFF,
+ cmdp_local, 2 * V32_DEMOSAICV3_0_LEN);
+ break;
+
case VFE_CMD_DEMOSAICV3_ABCC_CFG:
rc = -EFAULT;
break;
@@ -3499,6 +3577,27 @@
}
break;
+ case CMD_AXI_CFG_ZSL_ALL_CHNLS: {
+ uint32_t *axio = NULL;
+ CDBG("%s, CMD_AXI_CFG_ZSL\n", __func__);
+ axio = kmalloc(vfe32_cmd[VFE_CMD_AXI_OUT_CFG].length,
+ GFP_ATOMIC);
+ if (!axio) {
+ rc = -ENOMEM;
+ break;
+ }
+
+ if (copy_from_user(axio, (void __user *)(vfecmd.value),
+ vfe32_cmd[VFE_CMD_AXI_OUT_CFG].length)) {
+ kfree(axio);
+ rc = -EFAULT;
+ break;
+ }
+ vfe32_config_axi(OUTPUT_ZSL_ALL_CHNLS, axio);
+ kfree(axio);
+ }
+ break;
+
case CMD_AXI_CFG_VIDEO: {
uint32_t *axio = NULL;
axio = kmalloc(vfe32_cmd[VFE_CMD_AXI_OUT_CFG].length,
@@ -3518,6 +3617,26 @@
kfree(axio);
}
break;
+
+ case CMD_AXI_CFG_VIDEO_ALL_CHNLS: {
+ uint32_t *axio = NULL;
+ axio = kmalloc(vfe32_cmd[VFE_CMD_AXI_OUT_CFG].length,
+ GFP_ATOMIC);
+ if (!axio) {
+ rc = -ENOMEM;
+ break;
+ }
+
+ if (copy_from_user(axio, (void __user *)(vfecmd.value),
+ vfe32_cmd[VFE_CMD_AXI_OUT_CFG].length)) {
+ kfree(axio);
+ rc = -EFAULT;
+ break;
+ }
+ vfe32_config_axi(OUTPUT_ALL_CHNLS, axio);
+ kfree(axio);
+ }
+ break;
default:
break;
}
diff --git a/drivers/media/video/msm/msm_vfe32.h b/drivers/media/video/msm/msm_vfe32.h
index 30b77d7..596db48 100644
--- a/drivers/media/video/msm/msm_vfe32.h
+++ b/drivers/media/video/msm/msm_vfe32.h
@@ -211,6 +211,8 @@
#define V32_DEMOSAICV3_0_LEN 4
#define V32_DEMOSAICV3_1_OFF 0x0000061C
#define V32_DEMOSAICV3_1_LEN 88
+#define V32_DEMOSAICV3_2_OFF 0x0000066C
+#define V32_DEMOSAICV3_UP_REG_CNT 5
/* BPC */
#define V32_DEMOSAIC_2_OFF 0x0000029C
#define V32_DEMOSAIC_2_LEN 8
@@ -871,6 +873,7 @@
#define VFE32_OUTPUT_MODE_V (0x1 << 2)
#define VFE32_OUTPUT_MODE_P (0x1 << 3)
#define VFE32_OUTPUT_MODE_T (0x1 << 4)
+#define VFE32_OUTPUT_MODE_P_ALL_CHNLS (0x1 << 5)
struct vfe_stats_control {
uint8_t ackPending;
diff --git a/drivers/mfd/pm8921-core.c b/drivers/mfd/pm8921-core.c
index f05fb8e..742d8dd 100644
--- a/drivers/mfd/pm8921-core.c
+++ b/drivers/mfd/pm8921-core.c
@@ -270,6 +270,7 @@
SINGLE_IRQ_RESOURCE("PM8921_BMS_OCV_FOR_R", PM8921_BMS_OCV_FOR_R),
SINGLE_IRQ_RESOURCE("PM8921_BMS_GOOD_OCV", PM8921_BMS_GOOD_OCV),
SINGLE_IRQ_RESOURCE("PM8921_BMS_VSENSE_AVG", PM8921_BMS_VSENSE_AVG),
+ SINGLE_IRQ_RESOURCE("PM8921_BMS_CCADC_EOC", PM8921_BMS_CCADC_EOC),
};
static struct mfd_cell charger_cell __devinitdata = {
diff --git a/drivers/mfd/pm8xxx-batt-alarm.c b/drivers/mfd/pm8xxx-batt-alarm.c
index 92ade1c..1d30db9 100644
--- a/drivers/mfd/pm8xxx-batt-alarm.c
+++ b/drivers/mfd/pm8xxx-batt-alarm.c
@@ -502,15 +502,16 @@
= container_of(work, struct pm8xxx_batt_alarm_chip, irq_work);
int status;
- if (chip) {
- status = pm8xxx_batt_alarm_status_read();
+ if (!chip)
+ return;
- if (status < 0)
- pr_err("failed to read status, rc=%d\n", status);
- else
- srcu_notifier_call_chain(&chip->irq_notifier_list,
- status, NULL);
- }
+ status = pm8xxx_batt_alarm_status_read();
+
+ if (status < 0)
+ pr_err("failed to read status, rc=%d\n", status);
+ else
+ srcu_notifier_call_chain(&chip->irq_notifier_list,
+ status, NULL);
enable_irq(chip->irq);
}
diff --git a/drivers/mfd/wcd9310-core.c b/drivers/mfd/wcd9310-core.c
index aef0754..8eca7aa 100644
--- a/drivers/mfd/wcd9310-core.c
+++ b/drivers/mfd/wcd9310-core.c
@@ -573,6 +573,7 @@
int ret = 0;
int sgla_retry_cnt;
+ dev_info(&slim->dev, "Initialized slim device %s\n", slim->name);
pdata = slim->dev.platform_data;
if (!pdata) {
@@ -727,17 +728,35 @@
.remove = tabla_slim_remove,
.id_table = slimtest_id,
};
+
+static const struct slim_device_id slimtest2x_id[] = {
+ {"tabla2x-slim", 0},
+ {}
+};
+
+static struct slim_driver tabla2x_slim_driver = {
+ .driver = {
+ .name = "tabla2x-slim",
+ .owner = THIS_MODULE,
+ },
+ .probe = tabla_slim_probe,
+ .remove = tabla_slim_remove,
+ .id_table = slimtest2x_id,
+};
+
static int __init tabla_init(void)
{
- int ret;
+ int ret1, ret2;
- ret = slim_driver_register(&tabla_slim_driver);
- if (ret != 0) {
- pr_err("Failed to register tabla SB driver: %d\n", ret);
- goto err;
- }
-err:
- return ret;
+ ret1 = slim_driver_register(&tabla_slim_driver);
+ if (ret1 != 0)
+ pr_err("Failed to register tabla SB driver: %d\n", ret1);
+
+ ret2 = slim_driver_register(&tabla2x_slim_driver);
+ if (ret2 != 0)
+ pr_err("Failed to register tabla2x SB driver: %d\n", ret2);
+
+ return (ret1 && ret2) ? -1 : 0;
}
module_init(tabla_init);
diff --git a/drivers/mmc/host/msm_sdcc.c b/drivers/mmc/host/msm_sdcc.c
index ab252c9..6181758 100644
--- a/drivers/mmc/host/msm_sdcc.c
+++ b/drivers/mmc/host/msm_sdcc.c
@@ -617,6 +617,7 @@
host->dummy_52_sent = 1;
msmsdcc_start_command(host, &dummy52cmd,
MCI_CPSM_PROGENA);
+ spin_unlock_irqrestore(&host->lock, flags);
return;
}
msmsdcc_stop_data(host);
@@ -1681,16 +1682,20 @@
{
int rc = 0;
- rc = regulator_set_optimum_mode(vreg->reg, uA_load);
- if (rc < 0)
- pr_err("%s: regulator_set_optimum_mode(reg=%s, uA_load=%d)"
- " failed. rc=%d\n", __func__, vreg->name,
- uA_load, rc);
- else
- /* regulator_set_optimum_mode() can return non zero value
- * even for success case.
- */
- rc = 0;
+ /* regulators that do not support regulator_set_voltage also
+ do not support regulator_set_optimum_mode */
+ if (vreg->set_voltage_sup) {
+ rc = regulator_set_optimum_mode(vreg->reg, uA_load);
+ if (rc < 0)
+ pr_err("%s: regulator_set_optimum_mode(reg=%s, "
+ "uA_load=%d) failed. rc=%d\n", __func__,
+ vreg->name, uA_load, rc);
+ else
+ /* regulator_set_optimum_mode() can return non zero
+ * value even for success case.
+ */
+ rc = 0;
+ }
return rc;
}
diff --git a/drivers/power/pm8921-bms.c b/drivers/power/pm8921-bms.c
index 751c6fc..2d0f7cd 100644
--- a/drivers/power/pm8921-bms.c
+++ b/drivers/power/pm8921-bms.c
@@ -57,6 +57,7 @@
PM8921_BMS_OCV_FOR_R,
PM8921_BMS_GOOD_OCV,
PM8921_BMS_VSENSE_AVG,
+ PM8921_BMS_CCADC_EOC,
PM_BMS_MAX_INTS,
};
@@ -75,6 +76,7 @@
struct delayed_work calib_ccadc_work;
unsigned int calib_delay_ms;
int ccadc_gain_uv;
+ u16 ccadc_result_offset;
unsigned int revision;
unsigned int xoadc_v0625;
unsigned int xoadc_v125;
@@ -1318,21 +1320,24 @@
return gain;
}
-#define CCADC_PROGRAM_TRIM_COUNT 10
+#define CCADC_PROGRAM_TRIM_COUNT 2
#define ADC_ARB_BMS_CNTRL_CCADC_SHIFT 4
#define ADC_ARB_BMS_CNTRL_CONV_MASK 0x03
#define BMS_CONV_IN_PROGRESS 0x2
static int calib_ccadc_program_trim(struct pm8921_bms_chip *chip,
- int addr, u8 data_msb, u8 data_lsb)
+ int addr, u8 data_msb, u8 data_lsb,
+ int wait)
{
- int rc, i;
+ int i, rc, loop;
u8 cntrl, sbi_config;
- bool in_progress;
+ bool in_progress = 0;
+
+ loop = wait ? CCADC_PROGRAM_TRIM_COUNT : 0;
calib_ccadc_enable_trim_access(chip, &sbi_config);
- for (i = 0; i < CCADC_PROGRAM_TRIM_COUNT; i++) {
+ for (i = 0; i < loop; i++) {
rc = pm8xxx_readb(chip->dev->parent, ADC_ARB_BMS_CNTRL, &cntrl);
if (rc < 0) {
pr_err("error = %d reading ADC_ARB_BMS_CNTRL\n", rc);
@@ -1348,7 +1353,7 @@
}
if (in_progress) {
- pr_err("conv in progress cannot write trim,returing EBUSY\n");
+ pr_debug("conv in progress cannot write trim,returing EBUSY\n");
return -EBUSY;
}
@@ -1428,7 +1433,7 @@
voltage_offset = ccadc_reading_to_microvolt(chip,
((s64)result_offset - CCADC_INTRINSIC_OFFSET));
- pr_err("offset result_offset = 0x%x, voltage = %d microVolts\n",
+ pr_debug("offset result_offset = 0x%x, voltage = %d microVolts\n",
result_offset, voltage_offset);
/* Sanity Check */
@@ -1444,14 +1449,17 @@
+ microvolt_to_ccadc_reading(chip, (s64)CCADC_MIN_0UV);
}
- data_msb = result_offset >> 8;
- data_lsb = result_offset;
+ chip->ccadc_result_offset = result_offset;
+ data_msb = chip->ccadc_result_offset >> 8;
+ data_lsb = chip->ccadc_result_offset;
rc = calib_ccadc_program_trim(chip, CCADC_OFFSET_TRIM1,
- data_msb, data_lsb);
+ data_msb, data_lsb, 1);
if (rc) {
- pr_err("error = %d programming offset trim\n", rc);
- goto bail;
+ pr_debug("error = %d programming offset trim 0x%02x 0x%02x\n",
+ rc, data_msb, data_lsb);
+ /* enable the interrupt and write it when it fires */
+ pm8921_bms_enable_irq(chip, PM8921_BMS_CCADC_EOC);
}
rc = calib_ccadc_enable_arbiter(chip);
@@ -1527,9 +1535,9 @@
data_msb = result_gain >> 8;
data_lsb = result_gain;
rc = calib_ccadc_program_trim(chip, CCADC_FULLSCALE_TRIM1,
- data_msb, data_lsb);
+ data_msb, data_lsb, 0);
if (rc)
- pr_err("error = %d programming gain trim\n", rc);
+ pr_debug("error = %d programming gain trim\n", rc);
bail:
pm8xxx_writeb(chip->dev->parent, ADC_ARB_SECP_CNTRL, sec_cntrl);
}
@@ -1732,6 +1740,23 @@
return IRQ_HANDLED;
}
+static irqreturn_t pm8921_bms_ccadc_eoc_handler(int irq, void *data)
+{
+ u8 data_msb, data_lsb;
+ struct pm8921_bms_chip *chip = data;
+ int rc;
+
+ pr_debug("irq = %d triggered\n", irq);
+ data_msb = chip->ccadc_result_offset >> 8;
+ data_lsb = chip->ccadc_result_offset;
+
+ rc = calib_ccadc_program_trim(chip, CCADC_OFFSET_TRIM1,
+ data_msb, data_lsb, 0);
+ pm8921_bms_disable_irq(chip, PM8921_BMS_CCADC_EOC);
+
+ return IRQ_HANDLED;
+}
+
struct pm_bms_irq_init_data {
unsigned int irq_id;
char *name;
@@ -1762,6 +1787,8 @@
pm8921_bms_good_ocv_handler),
BMS_IRQ(PM8921_BMS_VSENSE_AVG, IRQF_TRIGGER_RISING,
pm8921_bms_vsense_avg_handler),
+ BMS_IRQ(PM8921_BMS_CCADC_EOC, IRQF_TRIGGER_RISING,
+ pm8921_bms_ccadc_eoc_handler),
};
static void free_irqs(struct pm8921_bms_chip *chip)
diff --git a/drivers/power/pm8921-charger.c b/drivers/power/pm8921-charger.c
index 82582c4..303dd99 100644
--- a/drivers/power/pm8921-charger.c
+++ b/drivers/power/pm8921-charger.c
@@ -2229,7 +2229,7 @@
}
if (chip->ttrkl_time != 0) {
- rc = pm_chg_ttrkl_max_set(chip, chip->safety_time);
+ rc = pm_chg_ttrkl_max_set(chip, chip->ttrkl_time);
if (rc) {
pr_err("Failed to set trkl time to %d minutes rc=%d\n",
chip->safety_time, rc);
diff --git a/drivers/slimbus/slim-msm-ctrl.c b/drivers/slimbus/slim-msm-ctrl.c
index 4a2ad3f..1e4302b 100644
--- a/drivers/slimbus/slim-msm-ctrl.c
+++ b/drivers/slimbus/slim-msm-ctrl.c
@@ -21,7 +21,6 @@
#include <linux/delay.h>
#include <linux/kthread.h>
#include <linux/clk.h>
-#include <linux/pm_runtime.h>
#include <mach/sps.h>
/* Per spec.max 40 bytes per received message */
@@ -45,7 +44,6 @@
#define MSM_SLIM_PERF_SUMM_THRESHOLD 0x8000
#define MSM_SLIM_NCHANS 32
#define MSM_SLIM_NPORTS 24
-#define MSM_SLIM_AUTOSUSPEND MSEC_PER_SEC
/*
* Need enough descriptors to receive present messages from slaves
@@ -82,7 +80,6 @@
#define QC_DEVID_SAT1 0x3
#define QC_DEVID_SAT2 0x4
#define QC_DEVID_PGD 0x5
-#define QC_MSM_DEVS 5
/* Component registers */
enum comp_reg {
@@ -187,12 +184,6 @@
REF_CLK_GEAR = 15,
};
-enum msm_ctrl_state {
- MSM_CTRL_AWAKE,
- MSM_CTRL_SLEEPING,
- MSM_CTRL_ASLEEP,
-};
-
struct msm_slim_sps_bam {
u32 hdl;
void __iomem *base;
@@ -235,12 +226,10 @@
struct mutex tx_lock;
u8 pgdla;
bool use_rx_msgqs;
+ int suspended;
int pipe_b;
struct completion reconf;
bool reconf_busy;
- bool chan_active;
- enum msm_ctrl_state state;
- int numdevs;
};
struct msm_slim_sat {
@@ -461,11 +450,6 @@
* before exiting ISR
*/
mb();
- if (dev->ctrl.sched.usedslots == 0 &&
- dev->state != MSM_CTRL_SLEEPING) {
- dev->chan_active = false;
- pm_runtime_put(dev->dev);
- }
complete(&dev->reconf);
}
pstat = readl_relaxed(dev->base + PGD_PORT_INT_ST_EEn + (16 * dev->ee));
@@ -665,37 +649,17 @@
u8 *puc;
int timeout;
u8 la = txn->la;
- /*
- * Voting for runtime PM: Slimbus has 2 possible use cases:
- * 1. messaging
- * 2. Data channels
- * Messaging case goes through messaging slots and data channels
- * use their own slots
- * This "get" votes for messaging bandwidth
- */
- if (txn->mc < SLIM_MSG_MC_BEGIN_RECONFIGURATION ||
- txn->mc > SLIM_MSG_MC_RECONFIGURE_NOW ||
- dev->state != MSM_CTRL_SLEEPING)
- pm_runtime_get_sync(dev->dev);
mutex_lock(&dev->tx_lock);
- if (dev->state == MSM_CTRL_ASLEEP) {
- dev_err(dev->dev, "runtime or system PM suspended state");
- mutex_unlock(&dev->tx_lock);
- pm_runtime_put(dev->dev);
- return -EBUSY;
- }
if (txn->mt == SLIM_MSG_MT_CORE &&
- txn->mc == SLIM_MSG_MC_BEGIN_RECONFIGURATION) {
- if (dev->reconf_busy) {
+ txn->mc == SLIM_MSG_MC_BEGIN_RECONFIGURATION &&
+ dev->reconf_busy) {
wait_for_completion(&dev->reconf);
dev->reconf_busy = false;
- }
- /* This "get" votes for data channels */
- if (dev->ctrl.sched.usedslots != 0 &&
- !dev->chan_active) {
- dev->chan_active = true;
- pm_runtime_get(dev->dev);
- }
+ }
+ if (dev->suspended) {
+ dev_err(dev->dev, "No transaction in suspended state");
+ mutex_unlock(&dev->tx_lock);
+ return -EBUSY;
}
txn->rl--;
pbuf = msm_get_msg_buf(ctrl, txn->rl);
@@ -704,10 +668,6 @@
if (txn->dt == SLIM_MSG_DEST_ENUMADDR) {
mutex_unlock(&dev->tx_lock);
- if (txn->mc < SLIM_MSG_MC_BEGIN_RECONFIGURATION ||
- txn->mc > SLIM_MSG_MC_RECONFIGURE_NOW ||
- dev->state != MSM_CTRL_SLEEPING)
- pm_runtime_put(dev->dev);
return -EPROTONOSUPPORT;
}
if (txn->mt == SLIM_MSG_MT_CORE && txn->la == 0xFF &&
@@ -755,15 +715,11 @@
*/
dev->pipes[*puc].connected = false;
mutex_unlock(&dev->tx_lock);
- if (dev->state != MSM_CTRL_SLEEPING)
- pm_runtime_put(dev->dev);
return 0;
}
if (dev->err) {
dev_err(dev->dev, "pipe-port connect err:%d", dev->err);
mutex_unlock(&dev->tx_lock);
- if (dev->state != MSM_CTRL_SLEEPING)
- pm_runtime_put(dev->dev);
return dev->err;
}
*(puc) = *(puc) + dev->pipe_b;
@@ -774,37 +730,10 @@
dev->wr_comp = &done;
msm_send_msg_buf(ctrl, pbuf, txn->rl);
timeout = wait_for_completion_timeout(&done, HZ);
-
- if (dev->state == MSM_CTRL_SLEEPING &&
- txn->mc == SLIM_MSG_MC_RECONFIGURE_NOW &&
- txn->mt == SLIM_MSG_MT_CORE && timeout) {
- timeout = wait_for_completion_timeout(&dev->reconf, HZ);
- dev->reconf_busy = false;
- if (timeout) {
- clk_disable(dev->rclk);
- disable_irq(dev->irq);
- dev->state = MSM_CTRL_ASLEEP;
- }
- }
- if (!timeout && dev->state == MSM_CTRL_SLEEPING &&
- txn->mc >= SLIM_MSG_MC_BEGIN_RECONFIGURATION &&
- txn->mc <= SLIM_MSG_MC_RECONFIGURE_NOW &&
- txn->mt == SLIM_MSG_MT_CORE) {
- dev->reconf_busy = false;
- dev->state = MSM_CTRL_AWAKE;
- dev_err(dev->dev, "clock pause failed");
- mutex_unlock(&dev->tx_lock);
- return -ETIMEDOUT;
- }
-
- mutex_unlock(&dev->tx_lock);
- if (!txn->rbuf && dev->state == MSM_CTRL_AWAKE)
- pm_runtime_put(dev->dev);
-
if (!timeout)
dev_err(dev->dev, "TX timed out:MC:0x%x,mt:0x%x", txn->mc,
txn->mt);
-
+ mutex_unlock(&dev->tx_lock);
return timeout ? dev->err : -ETIMEDOUT;
}
@@ -834,7 +763,6 @@
static int msm_clk_pause_wakeup(struct slim_controller *ctrl)
{
struct msm_slim_ctrl *dev = slim_get_ctrldata(ctrl);
- enable_irq(dev->irq);
clk_enable(dev->rclk);
writel_relaxed(1, dev->base + FRM_WAKEUP);
/* Make sure framer wakeup write goes through before exiting function */
@@ -849,7 +777,6 @@
* we get the message
*/
usleep_range(5000, 5000);
- dev->state = MSM_CTRL_AWAKE;
return 0;
}
@@ -994,9 +921,6 @@
e_addr[1] == QC_DEVID_PGD &&
e_addr[2] != QC_CHIPID_SL)
dev->pgdla = laddr;
- dev->numdevs++;
- if (!ret && dev->numdevs == QC_MSM_DEVS)
- pm_runtime_enable(dev->dev);
} else if (mc == SLIM_MSG_MC_REPLY_INFORMATION ||
mc == SLIM_MSG_MC_REPLY_VALUE) {
@@ -1004,7 +928,6 @@
dev_dbg(dev->dev, "tid:%d, len:%d\n", tid, len - 4);
slim_msg_response(&dev->ctrl, &buf[4], tid,
len - 4);
- pm_runtime_put(dev->dev);
} else if (mc == SLIM_MSG_MC_REPORT_INFORMATION) {
u8 l_addr = buf[2];
u16 ele = (u16)buf[4] << 4;
@@ -1057,19 +980,11 @@
for (i = 0; i < 6; i++)
e_addr[i] = buf[7-i];
- pm_runtime_get_sync(dev->dev);
slim_assign_laddr(&dev->ctrl, e_addr, 6, &laddr);
sat->satcl.laddr = laddr;
- } else if (mt != SLIM_MSG_MT_CORE &&
- mc != SLIM_MSG_MC_REPORT_PRESENT)
- pm_runtime_get_sync(dev->dev);
+ }
switch (mc) {
case SLIM_MSG_MC_REPORT_PRESENT:
- /* Remove runtime_pm vote once satellite acks */
- if (mt != SLIM_MSG_MT_CORE) {
- pm_runtime_put(dev->dev);
- continue;
- }
/* send a Manager capability msg */
if (sat->sent_capability)
continue;
@@ -1170,11 +1085,8 @@
default:
break;
}
- if (!gen_ack) {
- if (mc != SLIM_MSG_MC_REPORT_PRESENT)
- pm_runtime_put(dev->dev);
+ if (!gen_ack)
continue;
- }
wbuf[0] = tid;
if (!ret)
wbuf[1] = MSM_SAT_SUCCSS;
@@ -1187,7 +1099,6 @@
txn.wbuf = wbuf;
txn.mt = SLIM_MSG_MT_SRC_REFERRED_USER;
msm_xfer_msg(&dev->ctrl, &txn);
- pm_runtime_put(dev->dev);
}
}
@@ -1791,9 +1702,6 @@
* function
*/
mb();
- pm_runtime_use_autosuspend(&pdev->dev);
- pm_runtime_set_autosuspend_delay(&pdev->dev, MSM_SLIM_AUTOSUSPEND);
- pm_runtime_set_active(&pdev->dev);
dev_dbg(dev->dev, "MSM SB controller is up!\n");
return 0;
@@ -1827,13 +1735,12 @@
struct resource *slew_mem = dev->slew_mem;
struct msm_slim_sat *sat = dev->satd;
slim_remove_device(&sat->satcl);
- pm_runtime_disable(&pdev->dev);
- pm_runtime_set_suspended(&pdev->dev);
kfree(sat->satch);
destroy_workqueue(sat->wq);
kfree(sat);
free_irq(dev->irq, dev);
slim_del_controller(&dev->ctrl);
+ clk_disable(dev->rclk);
clk_put(dev->rclk);
msm_slim_sps_exit(dev);
kthread_stop(dev->rx_msgq_thread);
@@ -1853,78 +1760,79 @@
return 0;
}
-#ifdef CONFIG_PM_RUNTIME
-static int msm_slim_runtime_idle(struct device *device)
+#ifdef CONFIG_PM
+static int msm_slim_suspend(struct device *device)
{
struct platform_device *pdev = to_platform_device(device);
struct msm_slim_ctrl *dev = platform_get_drvdata(pdev);
- dev_dbg(device, "pm_runtime: idle...\n");
- pm_runtime_mark_last_busy(dev->dev);
- pm_request_autosuspend(device);
- return -EAGAIN;
-}
-#endif
-
-/*
- * If PM_RUNTIME is not defined, these 2 functions become helper
- * functions to be called from system suspend/resume. So they are not
- * inside ifdef CONFIG_PM_RUNTIME
- */
-static int msm_slim_runtime_suspend(struct device *device)
-{
- struct platform_device *pdev = to_platform_device(device);
- struct msm_slim_ctrl *dev = platform_get_drvdata(pdev);
- dev_dbg(device, "pm_runtime: suspending...\n");
- dev->state = MSM_CTRL_SLEEPING;
- return slim_ctrl_clk_pause(&dev->ctrl, false, SLIM_CLK_UNSPECIFIED);
-}
-
-static int msm_slim_runtime_resume(struct device *device)
-{
- struct platform_device *pdev = to_platform_device(device);
- struct msm_slim_ctrl *dev = platform_get_drvdata(pdev);
- dev_dbg(device, "pm_runtime: resuming...\n");
+ int ret = slim_ctrl_clk_pause(&dev->ctrl, false, SLIM_CLK_UNSPECIFIED);
+ /* Make sure clock pause goes through */
mutex_lock(&dev->tx_lock);
- if (dev->state == MSM_CTRL_ASLEEP) {
- mutex_unlock(&dev->tx_lock);
- return slim_ctrl_clk_pause(&dev->ctrl, true, 0);
+ if (!ret && dev->reconf_busy) {
+ wait_for_completion(&dev->reconf);
+ dev->reconf_busy = false;
}
mutex_unlock(&dev->tx_lock);
- return 0;
-}
-
-#ifdef CONFIG_PM_SLEEP
-static int msm_slim_suspend(struct device *dev)
-{
- int ret = 0;
- if (!pm_runtime_enabled(dev) || !pm_runtime_suspended(dev)) {
- dev_dbg(dev, "system suspend");
- ret = msm_slim_runtime_suspend(dev);
- }
- if (ret == -EBUSY) {
+ if (!ret) {
+ clk_disable(dev->rclk);
+ disable_irq(dev->irq);
+ dev->suspended = 1;
+ } else if (ret == -EBUSY) {
/*
- * If the clock pause failed due to active channels, there is
- * a possibility that some audio stream is active during suspend
- * We dont want to return suspend failure in that case so that
- * display and relevant components can still go to suspend.
- * If there is some other error, then it should be passed-on
- * to system level suspend
- */
+ * If the clock pause failed due to active channels, there is
+ * a possibility that some audio stream is active during suspend
+ * We dont want to return suspend failure in that case so that
+ * display and relevant components can still go to suspend.
+ * If there is some other error, then it should be passed-on
+ * to system level suspend
+ */
ret = 0;
}
return ret;
}
-static int msm_slim_resume(struct device *dev)
+static int msm_slim_resume(struct device *device)
{
- /* If runtime_pm is enabled, this resume shouldn't do anything */
- if (!pm_runtime_enabled(dev) || !pm_runtime_suspended(dev)) {
- dev_dbg(dev, "system resume");
- return msm_slim_runtime_resume(dev);
+ struct platform_device *pdev = to_platform_device(device);
+ struct msm_slim_ctrl *dev = platform_get_drvdata(pdev);
+ mutex_lock(&dev->tx_lock);
+ if (dev->suspended) {
+ dev->suspended = 0;
+ mutex_unlock(&dev->tx_lock);
+ enable_irq(dev->irq);
+ return slim_ctrl_clk_pause(&dev->ctrl, true, 0);
}
+ mutex_unlock(&dev->tx_lock);
return 0;
}
-#endif /* CONFIG_PM_SLEEP */
+#else
+#define msm_slim_suspend NULL
+#define msm_slim_resume NULL
+#endif /* CONFIG_PM */
+
+#ifdef CONFIG_PM_RUNTIME
+static int msm_slim_runtime_idle(struct device *dev)
+{
+ dev_dbg(dev, "pm_runtime: idle...\n");
+ return 0;
+}
+
+static int msm_slim_runtime_suspend(struct device *dev)
+{
+ dev_dbg(dev, "pm_runtime: suspending...\n");
+ return 0;
+}
+
+static int msm_slim_runtime_resume(struct device *dev)
+{
+ dev_dbg(dev, "pm_runtime: resuming...\n");
+ return 0;
+}
+#else
+#define msm_slim_runtime_idle NULL
+#define msm_slim_runtime_suspend NULL
+#define msm_slim_runtime_resume NULL
+#endif
static const struct dev_pm_ops msm_slim_dev_pm_ops = {
SET_SYSTEM_SLEEP_PM_OPS(
diff --git a/drivers/slimbus/slimbus.c b/drivers/slimbus/slimbus.c
index bb30570..3b79129 100644
--- a/drivers/slimbus/slimbus.c
+++ b/drivers/slimbus/slimbus.c
@@ -892,6 +892,10 @@
cur = slim_slicecodefromsize(sl);
ec = ((sl | (1 << 3)) | ((msg->start_offset & 0xFFF) << 4));
+ ret = slim_ctrl_clk_pause(ctrl, true, 0);
+ if (ret)
+ return ret;
+
if (wbuf)
mlen += len;
if (rbuf) {
@@ -1123,6 +1127,10 @@
u8 chan = (u8)(chanh & 0xFF);
struct slim_ich *slc = &ctrl->chans[chan];
+ ret = slim_ctrl_clk_pause(ctrl, true, 0);
+ if (ret)
+ return ret;
+
mutex_lock(&ctrl->m_ctrl);
/* Make sure the channel is not already pending reconf. or active */
if (slc->state >= SLIM_CH_PENDING_ACTIVE) {
@@ -1185,8 +1193,11 @@
int slim_disconnect_ports(struct slim_device *sb, u32 *ph, int nph)
{
struct slim_controller *ctrl = sb->ctrl;
- int i;
+ int i, ret;
+ ret = slim_ctrl_clk_pause(ctrl, true, 0);
+ if (ret)
+ return ret;
mutex_lock(&ctrl->m_ctrl);
for (i = 0; i < nph; i++)
@@ -2378,6 +2389,10 @@
u32 segdist;
struct slim_pending_ch *pch;
+ ret = slim_ctrl_clk_pause(ctrl, true, 0);
+ if (ret)
+ return ret;
+
mutex_lock(&ctrl->sched.m_reconf);
mutex_lock(&ctrl->m_ctrl);
ctrl->sched.pending_msgsl += sb->pending_msgsl - sb->cur_msgsl;
diff --git a/drivers/tty/serial/msm_serial_hs_hwreg.h b/drivers/tty/serial/msm_serial_hs_hwreg.h
index 001d555..fa7d518 100644
--- a/drivers/tty/serial/msm_serial_hs_hwreg.h
+++ b/drivers/tty/serial/msm_serial_hs_hwreg.h
@@ -32,6 +32,28 @@
#define ADM1_CRCI_GSBI6_RX_SEL 0x800
#define ADM1_CRCI_GSBI6_TX_SEL 0x400
+enum msm_hsl_regs {
+ UARTDM_MR1,
+ UARTDM_MR2,
+ UARTDM_IMR,
+ UARTDM_SR,
+ UARTDM_CR,
+ UARTDM_CSR,
+ UARTDM_IPR,
+ UARTDM_ISR,
+ UARTDM_RX_TOTAL_SNAP,
+ UARTDM_RFWR,
+ UARTDM_TFWR,
+ UARTDM_RF,
+ UARTDM_TF,
+ UARTDM_MISR,
+ UARTDM_DMRX,
+ UARTDM_NCF_TX,
+ UARTDM_DMEN,
+ UARTDM_BCR,
+ UARTDM_LAST
+};
+
#define UARTDM_MR1_ADDR 0x0
#define UARTDM_MR2_ADDR 0x4
diff --git a/drivers/tty/serial/msm_serial_hs_lite.c b/drivers/tty/serial/msm_serial_hs_lite.c
index a7b53e4..9ba7d2f 100644
--- a/drivers/tty/serial/msm_serial_hs_lite.c
+++ b/drivers/tty/serial/msm_serial_hs_lite.c
@@ -22,6 +22,7 @@
#define SUPPORT_SYSRQ
#endif
+#include <linux/atomic.h>
#include <linux/hrtimer.h>
#include <linux/module.h>
#include <linux/io.h>
@@ -40,6 +41,8 @@
#include <linux/pm_runtime.h>
#include <linux/gpio.h>
#include <linux/debugfs.h>
+#include <linux/of.h>
+#include <linux/of_device.h>
#include <mach/board.h>
#include <mach/msm_serial_hs_lite.h>
#include <asm/mach-types.h>
@@ -57,11 +60,63 @@
unsigned int *mapped_gsbi;
int is_uartdm;
unsigned int old_snap_state;
+ unsigned int ver_id;
};
+#define UARTDM_VERSION_11_13 0
+#define UARTDM_VERSION_14 1
+
#define UART_TO_MSM(uart_port) ((struct msm_hsl_port *) uart_port)
#define is_console(port) ((port)->cons && \
(port)->cons->index == (port)->line)
+
+static const unsigned int regmap[][UARTDM_LAST] = {
+ [UARTDM_VERSION_11_13] = {
+ [UARTDM_MR1] = UARTDM_MR1_ADDR,
+ [UARTDM_MR2] = UARTDM_MR2_ADDR,
+ [UARTDM_IMR] = UARTDM_IMR_ADDR,
+ [UARTDM_SR] = UARTDM_SR_ADDR,
+ [UARTDM_CR] = UARTDM_CR_ADDR,
+ [UARTDM_CSR] = UARTDM_CSR_ADDR,
+ [UARTDM_IPR] = UARTDM_IPR_ADDR,
+ [UARTDM_ISR] = UARTDM_ISR_ADDR,
+ [UARTDM_RX_TOTAL_SNAP] = UARTDM_RX_TOTAL_SNAP_ADDR,
+ [UARTDM_TFWR] = UARTDM_TFWR_ADDR,
+ [UARTDM_RFWR] = UARTDM_RFWR_ADDR,
+ [UARTDM_RF] = UARTDM_RF_ADDR,
+ [UARTDM_TF] = UARTDM_TF_ADDR,
+ [UARTDM_MISR] = UARTDM_MISR_ADDR,
+ [UARTDM_DMRX] = UARTDM_DMRX_ADDR,
+ [UARTDM_NCF_TX] = UARTDM_NCF_TX_ADDR,
+ [UARTDM_DMEN] = UARTDM_DMEN_ADDR,
+ },
+ [UARTDM_VERSION_14] = {
+ [UARTDM_MR1] = 0x0,
+ [UARTDM_MR2] = 0x4,
+ [UARTDM_IMR] = 0xb0,
+ [UARTDM_SR] = 0xa4,
+ [UARTDM_CR] = 0xa8,
+ [UARTDM_CSR] = 0xa0,
+ [UARTDM_IPR] = 0x18,
+ [UARTDM_ISR] = 0xb4,
+ [UARTDM_RX_TOTAL_SNAP] = 0xbc,
+ [UARTDM_TFWR] = 0x1c,
+ [UARTDM_RFWR] = 0x20,
+ [UARTDM_RF] = 0x140,
+ [UARTDM_TF] = 0x100,
+ [UARTDM_MISR] = 0xac,
+ [UARTDM_DMRX] = 0x34,
+ [UARTDM_NCF_TX] = 0x40,
+ [UARTDM_DMEN] = 0x3c,
+ },
+};
+
+static struct of_device_id msm_hsl_match_table[] = {
+ { .compatible = "qcom,msm-lsuart-v14",
+ .data = (void *)UARTDM_VERSION_14
+ },
+ {}
+};
static struct dentry *debug_base;
static inline void wait_for_xmitr(struct uart_port *port, int bits);
static inline void msm_hsl_write(struct uart_port *port,
@@ -109,6 +164,7 @@
{
struct msm_hsl_port *msm_hsl_port = data;
struct uart_port *port = &(msm_hsl_port->uart);
+ unsigned int vid;
unsigned long flags;
int ret = 0;
@@ -120,17 +176,18 @@
return -EINVAL;
}
+ vid = msm_hsl_port->ver_id;
if (val) {
spin_lock_irqsave(&port->lock, flags);
- ret = msm_hsl_read(port, UARTDM_MR2_ADDR);
+ ret = msm_hsl_read(port, regmap[vid][UARTDM_MR2]);
ret |= UARTDM_MR2_LOOP_MODE_BMSK;
- msm_hsl_write(port, ret, UARTDM_MR2_ADDR);
+ msm_hsl_write(port, ret, regmap[vid][UARTDM_MR2]);
spin_unlock_irqrestore(&port->lock, flags);
} else {
spin_lock_irqsave(&port->lock, flags);
- ret = msm_hsl_read(port, UARTDM_MR2_ADDR);
+ ret = msm_hsl_read(port, regmap[vid][UARTDM_MR2]);
ret &= ~UARTDM_MR2_LOOP_MODE_BMSK;
- msm_hsl_write(port, ret, UARTDM_MR2_ADDR);
+ msm_hsl_write(port, ret, regmap[vid][UARTDM_MR2]);
spin_unlock_irqrestore(&port->lock, flags);
}
@@ -153,7 +210,7 @@
}
spin_lock_irqsave(&port->lock, flags);
- ret = msm_hsl_read(port, UARTDM_MR2_ADDR);
+ ret = msm_hsl_read(port, regmap[msm_hsl_port->ver_id][UARTDM_MR2]);
spin_unlock_irqrestore(&port->lock, flags);
clk_en(port, 0);
@@ -191,7 +248,8 @@
clk_en(port, 1);
msm_hsl_port->imr &= ~UARTDM_ISR_TXLEV_BMSK;
- msm_hsl_write(port, msm_hsl_port->imr, UARTDM_IMR_ADDR);
+ msm_hsl_write(port, msm_hsl_port->imr,
+ regmap[msm_hsl_port->ver_id][UARTDM_IMR]);
clk_en(port, 0);
}
@@ -203,7 +261,8 @@
clk_en(port, 1);
msm_hsl_port->imr |= UARTDM_ISR_TXLEV_BMSK;
- msm_hsl_write(port, msm_hsl_port->imr, UARTDM_IMR_ADDR);
+ msm_hsl_write(port, msm_hsl_port->imr,
+ regmap[msm_hsl_port->ver_id][UARTDM_IMR]);
clk_en(port, 0);
}
@@ -216,7 +275,8 @@
msm_hsl_port->imr &= ~(UARTDM_ISR_RXLEV_BMSK |
UARTDM_ISR_RXSTALE_BMSK);
- msm_hsl_write(port, msm_hsl_port->imr, UARTDM_IMR_ADDR);
+ msm_hsl_write(port, msm_hsl_port->imr,
+ regmap[msm_hsl_port->ver_id][UARTDM_IMR]);
clk_en(port, 0);
}
@@ -228,7 +288,8 @@
clk_en(port, 1);
msm_hsl_port->imr |= UARTDM_ISR_DELTA_CTS_BMSK;
- msm_hsl_write(port, msm_hsl_port->imr, UARTDM_IMR_ADDR);
+ msm_hsl_write(port, msm_hsl_port->imr,
+ regmap[msm_hsl_port->ver_id][UARTDM_IMR]);
clk_en(port, 0);
}
@@ -236,26 +297,31 @@
static void handle_rx(struct uart_port *port, unsigned int misr)
{
struct tty_struct *tty = port->state->port.tty;
+ unsigned int vid;
unsigned int sr;
int count = 0;
struct msm_hsl_port *msm_hsl_port = UART_TO_MSM(port);
+ vid = msm_hsl_port->ver_id;
/*
* Handle overrun. My understanding of the hardware is that overrun
* is not tied to the RX buffer, so we handle the case out of band.
*/
- if ((msm_hsl_read(port, UARTDM_SR_ADDR) & UARTDM_SR_OVERRUN_BMSK)) {
+ if ((msm_hsl_read(port, regmap[vid][UARTDM_SR]) &
+ UARTDM_SR_OVERRUN_BMSK)) {
port->icount.overrun++;
tty_insert_flip_char(tty, 0, TTY_OVERRUN);
- msm_hsl_write(port, RESET_ERROR_STATUS, UARTDM_CR_ADDR);
+ msm_hsl_write(port, RESET_ERROR_STATUS,
+ regmap[vid][UARTDM_CR]);
}
if (misr & UARTDM_ISR_RXSTALE_BMSK) {
- count = msm_hsl_read(port, UARTDM_RX_TOTAL_SNAP_ADDR) -
+ count = msm_hsl_read(port,
+ regmap[vid][UARTDM_RX_TOTAL_SNAP]) -
msm_hsl_port->old_snap_state;
msm_hsl_port->old_snap_state = 0;
} else {
- count = 4 * (msm_hsl_read(port, UARTDM_RFWR_ADDR));
+ count = 4 * (msm_hsl_read(port, regmap[vid][UARTDM_RFWR]));
msm_hsl_port->old_snap_state += count;
}
@@ -264,13 +330,12 @@
unsigned int c;
char flag = TTY_NORMAL;
- sr = msm_hsl_read(port, UARTDM_SR_ADDR);
- if ((sr &
- UARTDM_SR_RXRDY_BMSK) == 0) {
+ sr = msm_hsl_read(port, regmap[vid][UARTDM_SR]);
+ if ((sr & UARTDM_SR_RXRDY_BMSK) == 0) {
msm_hsl_port->old_snap_state -= count;
break;
}
- c = msm_hsl_read(port, UARTDM_RF_ADDR);
+ c = msm_hsl_read(port, regmap[vid][UARTDM_RF]);
if (sr & UARTDM_SR_RX_BREAK_BMSK) {
port->icount.brk++;
if (uart_handle_break(port))
@@ -305,7 +370,9 @@
int tx_count;
int x;
unsigned int tf_pointer = 0;
+ unsigned int vid;
+ vid = UART_TO_MSM(port)->ver_id;
tx_count = uart_circ_chars_pending(xmit);
if (tx_count > (UART_XMIT_SIZE - xmit->tail))
@@ -316,13 +383,14 @@
/* Handle x_char */
if (port->x_char) {
wait_for_xmitr(port, UARTDM_ISR_TX_READY_BMSK);
- msm_hsl_write(port, tx_count + 1, UARTDM_NCF_TX_ADDR);
- msm_hsl_write(port, port->x_char, UARTDM_TF_ADDR);
+ msm_hsl_write(port, tx_count + 1,
+ regmap[vid][UARTDM_NCF_TX]);
+ msm_hsl_write(port, port->x_char, regmap[vid][UARTDM_TF]);
port->icount.tx++;
port->x_char = 0;
} else if (tx_count) {
wait_for_xmitr(port, UARTDM_ISR_TX_READY_BMSK);
- msm_hsl_write(port, tx_count, UARTDM_NCF_TX_ADDR);
+ msm_hsl_write(port, tx_count, regmap[vid][UARTDM_NCF_TX]);
}
if (!tx_count) {
msm_hsl_stop_tx(port);
@@ -330,7 +398,7 @@
}
while (tf_pointer < tx_count) {
- if (unlikely(!(msm_hsl_read(port, UARTDM_SR_ADDR) &
+ if (unlikely(!(msm_hsl_read(port, regmap[vid][UARTDM_SR]) &
UARTDM_SR_TXRDY_BMSK)))
continue;
switch (tx_count - tf_pointer) {
@@ -358,7 +426,7 @@
break;
}
}
- msm_hsl_write(port, x, UARTDM_TF_ADDR);
+ msm_hsl_write(port, x, regmap[vid][UARTDM_TF]);
xmit->tail = ((tx_count - tf_pointer < 4) ?
(tx_count - tf_pointer + xmit->tail) :
(xmit->tail + 4)) & (UART_XMIT_SIZE - 1);
@@ -376,7 +444,9 @@
static void handle_delta_cts(struct uart_port *port)
{
- msm_hsl_write(port, RESET_CTS, UARTDM_CR_ADDR);
+ unsigned int vid = UART_TO_MSM(port)->ver_id;
+
+ msm_hsl_write(port, RESET_CTS, regmap[vid][UARTDM_CR]);
port->icount.cts++;
wake_up_interruptible(&port->state->port.delta_msr_wait);
}
@@ -385,20 +455,24 @@
{
struct uart_port *port = dev_id;
struct msm_hsl_port *msm_hsl_port = UART_TO_MSM(port);
+ unsigned int vid;
unsigned int misr;
unsigned long flags;
spin_lock_irqsave(&port->lock, flags);
clk_en(port, 1);
- misr = msm_hsl_read(port, UARTDM_MISR_ADDR);
- msm_hsl_write(port, 0, UARTDM_IMR_ADDR); /* disable interrupt */
+ vid = msm_hsl_port->ver_id;
+ misr = msm_hsl_read(port, regmap[vid][UARTDM_MISR]);
+ /* disable interrupt */
+ msm_hsl_write(port, 0, regmap[vid][UARTDM_IMR]);
if (misr & (UARTDM_ISR_RXSTALE_BMSK | UARTDM_ISR_RXLEV_BMSK)) {
handle_rx(port, misr);
if (misr & (UARTDM_ISR_RXSTALE_BMSK))
- msm_hsl_write(port, RESET_STALE_INT, UARTDM_CR_ADDR);
- msm_hsl_write(port, 6500, UARTDM_DMRX_ADDR);
- msm_hsl_write(port, STALE_EVENT_ENABLE, UARTDM_CR_ADDR);
+ msm_hsl_write(port, RESET_STALE_INT,
+ regmap[vid][UARTDM_CR]);
+ msm_hsl_write(port, 6500, regmap[vid][UARTDM_DMRX]);
+ msm_hsl_write(port, STALE_EVENT_ENABLE, regmap[vid][UARTDM_CR]);
}
if (misr & UARTDM_ISR_TXLEV_BMSK)
handle_tx(port);
@@ -407,7 +481,7 @@
handle_delta_cts(port);
/* restore interrupt */
- msm_hsl_write(port, msm_hsl_port->imr, UARTDM_IMR_ADDR);
+ msm_hsl_write(port, msm_hsl_port->imr, regmap[vid][UARTDM_IMR]);
clk_en(port, 0);
spin_unlock_irqrestore(&port->lock, flags);
@@ -416,10 +490,11 @@
static unsigned int msm_hsl_tx_empty(struct uart_port *port)
{
+ unsigned int vid = UART_TO_MSM(port)->ver_id;
unsigned int ret;
clk_en(port, 1);
- ret = (msm_hsl_read(port, UARTDM_SR_ADDR) &
+ ret = (msm_hsl_read(port, regmap[vid][UARTDM_SR]) &
UARTDM_SR_TXEMT_BMSK) ? TIOCSER_TEMT : 0;
clk_en(port, 0);
@@ -428,13 +503,15 @@
static void msm_hsl_reset(struct uart_port *port)
{
+ unsigned int vid = UART_TO_MSM(port)->ver_id;
+
/* reset everything */
- msm_hsl_write(port, RESET_RX, UARTDM_CR_ADDR);
- msm_hsl_write(port, RESET_TX, UARTDM_CR_ADDR);
- msm_hsl_write(port, RESET_ERROR_STATUS, UARTDM_CR_ADDR);
- msm_hsl_write(port, RESET_BREAK_INT, UARTDM_CR_ADDR);
- msm_hsl_write(port, RESET_CTS, UARTDM_CR_ADDR);
- msm_hsl_write(port, RFR_LOW, UARTDM_CR_ADDR);
+ msm_hsl_write(port, RESET_RX, regmap[vid][UARTDM_CR]);
+ msm_hsl_write(port, RESET_TX, regmap[vid][UARTDM_CR]);
+ msm_hsl_write(port, RESET_ERROR_STATUS, regmap[vid][UARTDM_CR]);
+ msm_hsl_write(port, RESET_BREAK_INT, regmap[vid][UARTDM_CR]);
+ msm_hsl_write(port, RESET_CTS, regmap[vid][UARTDM_CR]);
+ msm_hsl_write(port, RFR_LOW, regmap[vid][UARTDM_CR]);
}
static unsigned int msm_hsl_get_mctrl(struct uart_port *port)
@@ -444,34 +521,35 @@
static void msm_hsl_set_mctrl(struct uart_port *port, unsigned int mctrl)
{
+ unsigned int vid = UART_TO_MSM(port)->ver_id;
unsigned int mr;
unsigned int loop_mode;
clk_en(port, 1);
- mr = msm_hsl_read(port, UARTDM_MR1_ADDR);
+ mr = msm_hsl_read(port, regmap[vid][UARTDM_MR1]);
if (!(mctrl & TIOCM_RTS)) {
mr &= ~UARTDM_MR1_RX_RDY_CTL_BMSK;
- msm_hsl_write(port, mr, UARTDM_MR1_ADDR);
- msm_hsl_write(port, RFR_HIGH, UARTDM_CR_ADDR);
+ msm_hsl_write(port, mr, regmap[vid][UARTDM_MR1]);
+ msm_hsl_write(port, RFR_HIGH, regmap[vid][UARTDM_CR]);
} else {
mr |= UARTDM_MR1_RX_RDY_CTL_BMSK;
- msm_hsl_write(port, mr, UARTDM_MR1_ADDR);
+ msm_hsl_write(port, mr, regmap[vid][UARTDM_MR1]);
}
loop_mode = TIOCM_LOOP & mctrl;
if (loop_mode) {
- mr = msm_hsl_read(port, UARTDM_MR2_ADDR);
+ mr = msm_hsl_read(port, regmap[vid][UARTDM_MR2]);
mr |= UARTDM_MR2_LOOP_MODE_BMSK;
- msm_hsl_write(port, mr, UARTDM_MR2_ADDR);
+ msm_hsl_write(port, mr, regmap[vid][UARTDM_MR2]);
/* Reset TX */
msm_hsl_reset(port);
/* Turn on Uart Receiver & Transmitter*/
msm_hsl_write(port, UARTDM_CR_RX_EN_BMSK
- | UARTDM_CR_TX_EN_BMSK, UARTDM_CR_ADDR);
+ | UARTDM_CR_TX_EN_BMSK, regmap[vid][UARTDM_CR]);
}
clk_en(port, 0);
@@ -479,12 +557,14 @@
static void msm_hsl_break_ctl(struct uart_port *port, int break_ctl)
{
+ unsigned int vid = UART_TO_MSM(port)->ver_id;
+
clk_en(port, 1);
if (break_ctl)
- msm_hsl_write(port, START_BREAK, UARTDM_CR_ADDR);
+ msm_hsl_write(port, START_BREAK, regmap[vid][UARTDM_CR]);
else
- msm_hsl_write(port, STOP_BREAK, UARTDM_CR_ADDR);
+ msm_hsl_write(port, STOP_BREAK, regmap[vid][UARTDM_CR]);
clk_en(port, 0);
}
@@ -493,6 +573,7 @@
{
unsigned int baud_code, rxstale, watermark;
unsigned int data;
+ unsigned int vid;
struct msm_hsl_port *msm_hsl_port = UART_TO_MSM(port);
switch (baud) {
@@ -558,12 +639,16 @@
break;
}
- msm_hsl_write(port, baud_code, UARTDM_CSR_ADDR);
+ vid = msm_hsl_port->ver_id;
+ msm_hsl_write(port, baud_code, regmap[vid][UARTDM_CSR]);
+
+ if (vid == UARTDM_VERSION_14)
+ rxstale = 5000;
/* RX stale watermark */
watermark = UARTDM_IPR_STALE_LSB_BMSK & rxstale;
watermark |= UARTDM_IPR_STALE_TIMEOUT_MSB_BMSK & (rxstale << 2);
- msm_hsl_write(port, watermark, UARTDM_IPR_ADDR);
+ msm_hsl_write(port, watermark, regmap[vid][UARTDM_IPR]);
/* Set RX watermark
* Configure Rx Watermark as 3/4 size of Rx FIFO.
@@ -572,26 +657,26 @@
* Hence configuring Rx Watermark as 12 Words.
*/
watermark = (port->fifosize * 3) / (4*4);
- msm_hsl_write(port, watermark, UARTDM_RFWR_ADDR);
+ msm_hsl_write(port, watermark, regmap[vid][UARTDM_RFWR]);
/* set TX watermark */
- msm_hsl_write(port, 0, UARTDM_TFWR_ADDR);
+ msm_hsl_write(port, 0, regmap[vid][UARTDM_TFWR]);
- msm_hsl_write(port, CR_PROTECTION_EN, UARTDM_CR_ADDR);
+ msm_hsl_write(port, CR_PROTECTION_EN, regmap[vid][UARTDM_CR]);
msm_hsl_reset(port);
data = UARTDM_CR_TX_EN_BMSK;
data |= UARTDM_CR_RX_EN_BMSK;
/* enable TX & RX */
- msm_hsl_write(port, data, UARTDM_CR_ADDR);
+ msm_hsl_write(port, data, regmap[vid][UARTDM_CR]);
msm_hsl_write(port, RESET_STALE_INT, UARTDM_CR_ADDR);
/* turn on RX and CTS interrupts */
msm_hsl_port->imr = UARTDM_ISR_RXSTALE_BMSK
| UARTDM_ISR_DELTA_CTS_BMSK | UARTDM_ISR_RXLEV_BMSK;
- msm_hsl_write(port, msm_hsl_port->imr, UARTDM_IMR_ADDR);
- msm_hsl_write(port, 6500, UARTDM_DMRX_ADDR);
- msm_hsl_write(port, STALE_EVENT_ENABLE, UARTDM_CR_ADDR);
+ msm_hsl_write(port, msm_hsl_port->imr, regmap[vid][UARTDM_IMR]);
+ msm_hsl_write(port, 6500, regmap[vid][UARTDM_DMRX]);
+ msm_hsl_write(port, STALE_EVENT_ENABLE, regmap[vid][UARTDM_CR]);
}
static void msm_hsl_init_clock(struct uart_port *port)
@@ -611,6 +696,7 @@
const struct msm_serial_hslite_platform_data *pdata =
pdev->dev.platform_data;
unsigned int data, rfr_level;
+ unsigned int vid;
int ret;
unsigned long flags;
@@ -665,13 +751,14 @@
spin_lock_irqsave(&port->lock, flags);
+ vid = msm_hsl_port->ver_id;
/* set automatic RFR level */
- data = msm_hsl_read(port, UARTDM_MR1_ADDR);
+ data = msm_hsl_read(port, regmap[vid][UARTDM_MR1]);
data &= ~UARTDM_MR1_AUTO_RFR_LEVEL1_BMSK;
data &= ~UARTDM_MR1_AUTO_RFR_LEVEL0_BMSK;
data |= UARTDM_MR1_AUTO_RFR_LEVEL1_BMSK & (rfr_level << 2);
data |= UARTDM_MR1_AUTO_RFR_LEVEL0_BMSK & rfr_level;
- msm_hsl_write(port, data, UARTDM_MR1_ADDR);
+ msm_hsl_write(port, data, regmap[vid][UARTDM_MR1]);
spin_unlock_irqrestore(&port->lock, flags);
ret = request_irq(port->irq, msm_hsl_irq, IRQF_TRIGGER_HIGH,
@@ -693,7 +780,8 @@
clk_en(port, 1);
msm_hsl_port->imr = 0;
- msm_hsl_write(port, 0, UARTDM_IMR_ADDR); /* disable interrupts */
+ /* disable interrupts */
+ msm_hsl_write(port, 0, regmap[msm_hsl_port->ver_id][UARTDM_IMR]);
clk_en(port, 0);
@@ -718,6 +806,7 @@
{
unsigned long flags;
unsigned int baud, mr;
+ unsigned int vid;
spin_lock_irqsave(&port->lock, flags);
clk_en(port, 1);
@@ -727,8 +816,9 @@
msm_hsl_set_baud_rate(port, baud);
+ vid = UART_TO_MSM(port)->ver_id;
/* calculate parity */
- mr = msm_hsl_read(port, UARTDM_MR2_ADDR);
+ mr = msm_hsl_read(port, regmap[vid][UARTDM_MR2]);
mr &= ~UARTDM_MR2_PARITY_MODE_BMSK;
if (termios->c_cflag & PARENB) {
if (termios->c_cflag & PARODD)
@@ -765,16 +855,16 @@
mr |= STOP_BIT_ONE;
/* set parity, bits per char, and stop bit */
- msm_hsl_write(port, mr, UARTDM_MR2_ADDR);
+ msm_hsl_write(port, mr, regmap[vid][UARTDM_MR2]);
/* calculate and set hardware flow control */
- mr = msm_hsl_read(port, UARTDM_MR1_ADDR);
+ mr = msm_hsl_read(port, regmap[vid][UARTDM_MR1]);
mr &= ~(UARTDM_MR1_CTS_CTL_BMSK | UARTDM_MR1_RX_RDY_CTL_BMSK);
if (termios->c_cflag & CRTSCTS) {
mr |= UARTDM_MR1_CTS_CTL_BMSK;
mr |= UARTDM_MR1_RX_RDY_CTL_BMSK;
}
- msm_hsl_write(port, mr, UARTDM_MR1_ADDR);
+ msm_hsl_write(port, mr, regmap[vid][UARTDM_MR1]);
/* Configure status bits to ignore based on termio flags. */
port->read_status_mask = 0;
@@ -803,6 +893,8 @@
uart_resource = platform_get_resource_byname(pdev, IORESOURCE_MEM,
"uartdm_resource");
+ if (!uart_resource)
+ uart_resource = platform_get_resource(pdev, IORESOURCE_MEM, 0);
if (unlikely(!uart_resource))
return;
size = uart_resource->end - uart_resource->start + 1;
@@ -829,6 +921,8 @@
uart_resource = platform_get_resource_byname(pdev, IORESOURCE_MEM,
"uartdm_resource");
+ if (!uart_resource)
+ uart_resource = platform_get_resource(pdev, IORESOURCE_MEM, 0);
if (unlikely(!uart_resource)) {
pr_err("%s: can't get uartdm resource\n", __func__);
return -ENXIO;
@@ -851,6 +945,9 @@
gsbi_resource = platform_get_resource_byname(pdev,
IORESOURCE_MEM,
"gsbi_resource");
+ if (!gsbi_resource)
+ gsbi_resource = platform_get_resource(pdev,
+ IORESOURCE_MEM, 1);
if (unlikely(!gsbi_resource)) {
pr_err("%s: can't get gsbi resource\n", __func__);
return -ENXIO;
@@ -982,28 +1079,35 @@
* Derived from wait_for_xmitr in 8250 serial driver by Russell King */
void wait_for_xmitr(struct uart_port *port, int bits)
{
- if (!(msm_hsl_read(port, UARTDM_SR_ADDR) & UARTDM_SR_TXEMT_BMSK)) {
- while ((msm_hsl_read(port, UARTDM_ISR_ADDR) & bits) != bits) {
+ unsigned int vid = UART_TO_MSM(port)->ver_id;
+
+ if (!(msm_hsl_read(port, regmap[vid][UARTDM_SR]) &
+ UARTDM_SR_TXEMT_BMSK)) {
+ while ((msm_hsl_read(port, regmap[vid][UARTDM_ISR]) &
+ bits) != bits) {
udelay(1);
touch_nmi_watchdog();
cpu_relax();
}
- msm_hsl_write(port, CLEAR_TX_READY, UARTDM_CR_ADDR);
+ msm_hsl_write(port, CLEAR_TX_READY, regmap[vid][UARTDM_CR]);
}
}
#ifdef CONFIG_SERIAL_MSM_HSL_CONSOLE
static void msm_hsl_console_putchar(struct uart_port *port, int ch)
{
- wait_for_xmitr(port, UARTDM_ISR_TX_READY_BMSK);
- msm_hsl_write(port, 1, UARTDM_NCF_TX_ADDR);
+ unsigned int vid = UART_TO_MSM(port)->ver_id;
- while (!(msm_hsl_read(port, UARTDM_SR_ADDR) & UARTDM_SR_TXRDY_BMSK)) {
+ wait_for_xmitr(port, UARTDM_ISR_TX_READY_BMSK);
+ msm_hsl_write(port, 1, regmap[vid][UARTDM_NCF_TX]);
+
+ while (!(msm_hsl_read(port, regmap[vid][UARTDM_SR]) &
+ UARTDM_SR_TXRDY_BMSK)) {
udelay(1);
touch_nmi_watchdog();
}
- msm_hsl_write(port, ch, UARTDM_TF_ADDR);
+ msm_hsl_write(port, ch, regmap[vid][UARTDM_TF]);
}
static void msm_hsl_console_write(struct console *co, const char *s,
@@ -1011,12 +1115,14 @@
{
struct uart_port *port;
struct msm_hsl_port *msm_hsl_port;
+ unsigned int vid;
int locked;
BUG_ON(co->index < 0 || co->index >= UART_NR);
port = get_port_from_line(co->index);
msm_hsl_port = UART_TO_MSM(port);
+ vid = msm_hsl_port->ver_id;
/* not pretty, but we can end up here via various convoluted paths */
if (port->sysrq || oops_in_progress)
@@ -1025,9 +1131,9 @@
locked = 1;
spin_lock(&port->lock);
}
- msm_hsl_write(port, 0, UARTDM_IMR_ADDR);
+ msm_hsl_write(port, 0, regmap[vid][UARTDM_IMR]);
uart_console_write(port, s, count, msm_hsl_console_putchar);
- msm_hsl_write(port, msm_hsl_port->imr, UARTDM_IMR_ADDR);
+ msm_hsl_write(port, msm_hsl_port->imr, regmap[vid][UARTDM_IMR]);
if (locked == 1)
spin_unlock(&port->lock);
}
@@ -1035,6 +1141,7 @@
static int __init msm_hsl_console_setup(struct console *co, char *options)
{
struct uart_port *port;
+ unsigned int vid;
int baud = 0, flow, bits, parity;
int ret;
@@ -1042,6 +1149,7 @@
return -ENXIO;
port = get_port_from_line(co->index);
+ vid = UART_TO_MSM(port)->ver_id;
if (unlikely(!port->membase))
return -ENXIO;
@@ -1062,7 +1170,7 @@
parity = 'n';
flow = 'n';
msm_hsl_write(port, UARTDM_MR2_BITS_PER_CHAR_8 | STOP_BIT_ONE,
- UARTDM_MR2_ADDR); /* 8N1 */
+ regmap[vid][UARTDM_MR2]); /* 8N1 */
if (baud < 300 || baud > 115200)
baud = 115200;
@@ -1071,8 +1179,8 @@
ret = uart_set_options(port, co, baud, parity, bits, flow);
msm_hsl_reset(port);
/* Enable transmitter */
- msm_hsl_write(port, CR_PROTECTION_EN, UARTDM_CR_ADDR);
- msm_hsl_write(port, UARTDM_CR_TX_EN_BMSK, UARTDM_CR_ADDR);
+ msm_hsl_write(port, CR_PROTECTION_EN, regmap[vid][UARTDM_CR]);
+ msm_hsl_write(port, UARTDM_CR_TX_EN_BMSK, regmap[vid][UARTDM_CR]);
printk(KERN_INFO "msm_serial_hsl: console setup on port #%d\n",
port->line);
@@ -1106,14 +1214,20 @@
.cons = MSM_HSL_CONSOLE,
};
+static atomic_t msm_serial_hsl_next_id = ATOMIC_INIT(0);
+
static int __devinit msm_serial_hsl_probe(struct platform_device *pdev)
{
struct msm_hsl_port *msm_hsl_port;
struct resource *uart_resource;
struct resource *gsbi_resource;
struct uart_port *port;
+ const struct of_device_id *match;
int ret;
+ if (pdev->id == -1)
+ pdev->id = atomic_inc_return(&msm_serial_hsl_next_id) - 1;
+
if (unlikely(pdev->id < 0 || pdev->id >= UART_NR))
return -ENXIO;
@@ -1123,9 +1237,17 @@
port->dev = &pdev->dev;
msm_hsl_port = UART_TO_MSM(port);
+ match = of_match_device(msm_hsl_match_table, &pdev->dev);
+ if (!match)
+ msm_hsl_port->ver_id = UARTDM_VERSION_11_13;
+ else
+ msm_hsl_port->ver_id = (unsigned int)match->data;
+
gsbi_resource = platform_get_resource_byname(pdev,
IORESOURCE_MEM,
"gsbi_resource");
+ if (!gsbi_resource)
+ gsbi_resource = platform_get_resource(pdev, IORESOURCE_MEM, 1);
msm_hsl_port->clk = clk_get(&pdev->dev, "core_clk");
if (gsbi_resource) {
msm_hsl_port->is_uartdm = 1;
@@ -1144,10 +1266,11 @@
return PTR_ERR(msm_hsl_port->pclk);
}
-
uart_resource = platform_get_resource_byname(pdev,
IORESOURCE_MEM,
"uartdm_resource");
+ if (!uart_resource)
+ uart_resource = platform_get_resource(pdev, IORESOURCE_MEM, 0);
if (unlikely(!uart_resource)) {
printk(KERN_ERR "getting uartdm_resource failed\n");
return -ENXIO;
@@ -1275,6 +1398,7 @@
.name = "msm_serial_hsl",
.owner = THIS_MODULE,
.pm = &msm_hsl_dev_pm_ops,
+ .of_match_table = msm_hsl_match_table,
},
};
diff --git a/drivers/usb/gadget/android.c b/drivers/usb/gadget/android.c
index 8d58833..fdd0ba8 100644
--- a/drivers/usb/gadget/android.c
+++ b/drivers/usb/gadget/android.c
@@ -817,6 +817,7 @@
&common->luns[0].dev.kobj,
"lun");
if (err) {
+ fsg_common_release(&common->ref);
kfree(config);
return err;
}
diff --git a/drivers/usb/gadget/f_rmnet_smd_sdio.c b/drivers/usb/gadget/f_rmnet_smd_sdio.c
index eda547a..2ddbd7c 100644
--- a/drivers/usb/gadget/f_rmnet_smd_sdio.c
+++ b/drivers/usb/gadget/f_rmnet_smd_sdio.c
@@ -1071,7 +1071,7 @@
spin_lock(&dev->lock);
if (!ctrl_dev->opened) {
spin_unlock(&dev->lock);
- kfree(cpkt);
+ rmnet_mux_free_ctrl_pkt(cpkt);
dev->cpkts_drp_cnt++;
pr_err_ratelimited(
"%s: ctrl pkts dropped: cpkts_drp_cnt: %lu\n",
diff --git a/drivers/usb/gadget/u_sdio.c b/drivers/usb/gadget/u_sdio.c
index fd01dbf..6ba7543 100644
--- a/drivers/usb/gadget/u_sdio.c
+++ b/drivers/usb/gadget/u_sdio.c
@@ -1107,7 +1107,6 @@
struct usb_cdc_line_coding coding;
int i;
int ret = 0;
- struct sdio_port_info *port_info;
pr_debug("%s: gadget:(%p) count:%d\n", __func__, g, count);
@@ -1139,7 +1138,6 @@
__func__);
goto free_sdio_ports;
}
- port_info++;
#ifdef DEBUG
/* REVISIT: create one file per port
diff --git a/include/linux/cyttsp.h b/include/linux/cyttsp.h
index 8d69031..0e5cac7 100644
--- a/include/linux/cyttsp.h
+++ b/include/linux/cyttsp.h
@@ -87,9 +87,11 @@
#define CY_TMA300_VTG_MAX_UV 5500000
#define CY_TMA300_VTG_MIN_UV 1710000
#define CY_TMA300_CURR_24HZ_UA 17500
+#define CY_TMA300_SLEEP_CURR_UA 10
#define CY_I2C_VTG_MAX_UV 1800000
#define CY_I2C_VTG_MIN_UV 1800000
#define CY_I2C_CURR_UA 9630
+#define CY_I2C_SLEEP_CURR_UA 10
/* define for inclusion of TTSP App Update Load File
@@ -445,9 +447,10 @@
struct cyttsp_regulator {
const char *name;
- u32 min_uV;
u32 max_uV;
- u32 load_uA;
+ u32 min_uV;
+ u32 hpm_load_uA;
+ u32 lpm_load_uA;
};
struct cyttsp_platform_data {
@@ -484,6 +487,7 @@
#ifdef CY_USE_I2C_DRIVER
s32 (*init)(struct i2c_client *client);
s32 (*resume)(struct i2c_client *client);
+ s32 (*suspend)(struct i2c_client *client);
#endif
#ifdef CY_USE_SPI_DRIVER
s32 (*init)(struct spi_device *spi);
diff --git a/include/linux/mfd/pm8xxx/pm8921-adc.h b/include/linux/mfd/pm8xxx/pm8921-adc.h
index 2d81134..c66ae84 100644
--- a/include/linux/mfd/pm8xxx/pm8921-adc.h
+++ b/include/linux/mfd/pm8xxx/pm8921-adc.h
@@ -221,6 +221,8 @@
* @offset: Offset with respect to the actual curve
* @dy: Numerator slope to calculate the gain
* @dx: Denominator slope to calculate the gain
+ * @adc_vref: A/D word of the Voltage reference used for the channel
+ * @adc_gnd: A/D word of the Ground reference used for the channel
*
* Each ADC device has different offset and gain parameters which are computed
* to calibrate the device.
@@ -229,6 +231,8 @@
int32_t offset;
int32_t dy;
int32_t dx;
+ int32_t adc_vref;
+ int32_t adc_gnd;
};
/**
@@ -453,8 +457,8 @@
* levels once the thresholds are reached
*/
struct pm8921_adc_arb_btm_param {
- uint32_t low_thr_temp;
- uint32_t high_thr_temp;
+ int32_t low_thr_temp;
+ int32_t high_thr_temp;
uint64_t low_thr_voltage;
uint64_t high_thr_voltage;
int32_t interval;
@@ -462,8 +466,9 @@
void (*btm_cool_fn) (bool);
};
-int32_t pm8921_adc_batt_scaler(struct pm8921_adc_arb_btm_param *);
-
+int32_t pm8921_adc_batt_scaler(struct pm8921_adc_arb_btm_param *,
+ const struct pm8921_adc_properties *adc_prop,
+ const struct pm8921_adc_chan_properties *chan_prop);
/**
* struct pm8921_adc_platform_data - PM8921 ADC platform data
* @adc_prop: ADC specific parameters, voltage and channel setup
diff --git a/include/linux/mfd/pm8xxx/pm8921-charger.h b/include/linux/mfd/pm8xxx/pm8921-charger.h
index aeb88b2..73067b7 100644
--- a/include/linux/mfd/pm8xxx/pm8921-charger.h
+++ b/include/linux/mfd/pm8xxx/pm8921-charger.h
@@ -35,8 +35,10 @@
/**
* struct pm8921_charger_platform_data -
- * @safety_time: max charging time in minutes
+ * @safety_time: max charging time in minutes incl. fast and trkl
+ * valid range 4 to 512 min. PON default 120 min
* @ttrkl_time: max trckl charging time in minutes
+ * valid range 1 to 64 mins. PON default 15 min
* @update_time: how often the userland be updated of the charging (msec)
* @max_voltage: the max voltage (mV) the battery should be charged up to
* @min_voltage: the voltage (mV) where charging method switches from
diff --git a/include/linux/mfd/wcd9310/pdata.h b/include/linux/mfd/wcd9310/pdata.h
index 13d52fb..9ca6a8c 100644
--- a/include/linux/mfd/wcd9310/pdata.h
+++ b/include/linux/mfd/wcd9310/pdata.h
@@ -25,6 +25,23 @@
#define TABLA_CFILT2_SEL 0x1
#define TABLA_CFILT3_SEL 0x2
+#define MAX_AMIC_CHANNEL 7
+
+struct tabla_amic {
+ /*legacy mode, txfe_enable and txfe_buff take 7 input
+ * each bit represent the channel / TXFE number
+ * and numbered as below
+ * bit 0 = channel 1 / TXFE1_ENABLE / TXFE1_BUFF
+ * bit 1 = channel 2 / TXFE2_ENABLE / TXFE2_BUFF
+ * ...
+ * bit 7 = channel 7 / TXFE7_ENABLE / TXFE7_BUFF
+ */
+ u8 legacy_mode:MAX_AMIC_CHANNEL;
+ u8 txfe_enable:MAX_AMIC_CHANNEL;
+ u8 txfe_buff:MAX_AMIC_CHANNEL;
+ u8 use_pdata:MAX_AMIC_CHANNEL;
+};
+
/* Each micbias can be assigned to one of three cfilters
* Vbatt_min >= .15V + ldoh_v
* ldoh_v >= .15v + cfiltx_mv
@@ -50,6 +67,7 @@
int irq_base;
int num_irqs;
int reset_gpio;
+ struct tabla_amic amic_settings;
struct slim_device slimbus_slave_device;
struct tabla_micbias_setting micbias;
};
diff --git a/include/media/msm_camera.h b/include/media/msm_camera.h
index 327aee4..fa19613 100644
--- a/include/media/msm_camera.h
+++ b/include/media/msm_camera.h
@@ -381,9 +381,11 @@
#define CMD_AXI_CFG_ZSL 43
#define CMD_AXI_CFG_SNAP_VPE 44
#define CMD_AXI_CFG_SNAP_THUMB_VPE 45
-#define CMD_CONFIG_PING_ADDR 46
-#define CMD_CONFIG_PONG_ADDR 47
-#define CMD_CONFIG_FREE_BUF_ADDR 48
+#define CMD_AXI_CFG_VIDEO_ALL_CHNLS 46
+#define CMD_AXI_CFG_ZSL_ALL_CHNLS 47
+#define CMD_CONFIG_PING_ADDR 48
+#define CMD_CONFIG_PONG_ADDR 49
+#define CMD_CONFIG_FREE_BUF_ADDR 50
/* vfe config command: config command(from config thread)*/
struct msm_vfe_cfg_cmd {
@@ -469,7 +471,9 @@
#define OUTPUT_1_AND_CAMIF_TO_AXI_VIA_OUTPUT_2 5
#define OUTPUT_2_AND_CAMIF_TO_AXI_VIA_OUTPUT_1 6
#define OUTPUT_1_2_AND_3 7
-#define LAST_AXI_OUTPUT_MODE_ENUM = OUTPUT_1_2_AND_3 7
+#define OUTPUT_ALL_CHNLS 8
+#define OUTPUT_ZSL_ALL_CHNLS 9
+#define LAST_AXI_OUTPUT_MODE_ENUM OUTPUT_ZSL_ALL_CHNLS
#define MSM_FRAME_PREV_1 0
#define MSM_FRAME_PREV_2 1
diff --git a/include/media/msm_isp.h b/include/media/msm_isp.h
index d4fe4ca..b4e1981 100644
--- a/include/media/msm_isp.h
+++ b/include/media/msm_isp.h
@@ -171,6 +171,7 @@
#define VFE_CMD_GET_PCA_ROLLOFF_TABLE 125
#define VFE_CMD_GET_RGB_G_TABLE 126
#define VFE_CMD_GET_LA_TABLE 127
+#define VFE_CMD_DEMOSAICV3_UPDATE 128
struct msm_isp_cmd {
int32_t id;
diff --git a/include/media/radio-iris.h b/include/media/radio-iris.h
index e96d513..d9687ba 100644
--- a/include/media/radio-iris.h
+++ b/include/media/radio-iris.h
@@ -128,6 +128,7 @@
#define HCI_OCF_FM_RDS_GRP_PROCESS 0x0013
#define HCI_OCF_FM_EN_WAN_AVD_CTRL 0x0014
#define HCI_OCF_FM_EN_NOTCH_CTRL 0x0015
+#define HCI_OCF_FM_SET_EVENT_MASK 0x0016
/* HCI trans control commans opcode*/
#define HCI_OCF_FM_ENABLE_TRANS_REQ 0x0001
@@ -738,6 +739,12 @@
__u8 mode;
__u8 data[MAX_CALIB_SIZE];
} __packed;
+
+/* Low Power mode*/
+#define SIG_LEVEL_INTR (1 << 0)
+#define RDS_SYNC_INTR (1 << 1)
+#define AUDIO_CTRL_INTR (1 << 2)
+#define AF_JUMP_ENABLE (1 << 4)
int hci_def_data_read(struct hci_fm_def_data_rd_req *arg,
struct radio_hci_dev *hdev);
int hci_def_data_write(struct hci_fm_def_data_wr_req *arg,
diff --git a/include/net/bluetooth/hci.h b/include/net/bluetooth/hci.h
index b67803a..744eb72 100644
--- a/include/net/bluetooth/hci.h
+++ b/include/net/bluetooth/hci.h
@@ -124,7 +124,7 @@
#define HCI_PAIRING_TIMEOUT (60000) /* 60 seconds */
#define HCI_IDLE_TIMEOUT (6000) /* 6 seconds */
#define HCI_INIT_TIMEOUT (10000) /* 10 seconds */
-#define HCI_CMD_TIMEOUT (1000) /* 1 seconds */
+#define HCI_CMD_TIMEOUT (5000) /* 5 seconds */
/* HCI data types */
#define HCI_COMMAND_PKT 0x01
diff --git a/include/net/bluetooth/mgmt.h b/include/net/bluetooth/mgmt.h
index 127c7ca..ce7ecf1 100644
--- a/include/net/bluetooth/mgmt.h
+++ b/include/net/bluetooth/mgmt.h
@@ -219,6 +219,15 @@
#define MGMT_OP_SET_LIMIT_DISCOVERABLE 0x001F
+#define MGMT_OP_SET_CONNECTION_PARAMS 0x0020
+struct mgmt_cp_set_connection_params {
+ bdaddr_t bdaddr;
+ __le16 interval_min;
+ __le16 interval_max;
+ __le16 slave_latency;
+ __le16 timeout_multiplier;
+} __packed;
+
#define MGMT_EV_CMD_COMPLETE 0x0001
struct mgmt_ev_cmd_complete {
__le16 opcode;
diff --git a/mm/page_alloc.c b/mm/page_alloc.c
index fef8dc3..18f239c 100644
--- a/mm/page_alloc.c
+++ b/mm/page_alloc.c
@@ -4652,6 +4652,9 @@
unsigned long totalpages = early_calculate_totalpages();
int usable_nodes = nodes_weight(node_states[N_HIGH_MEMORY]);
+#ifdef CONFIG_FIX_MOVABLE_ZONE
+ required_movablecore = movable_reserved_size >> PAGE_SHIFT;
+#endif
/*
* If movablecore was specified, calculate what size of
* kernelcore that corresponds so that memory usable for
diff --git a/net/bluetooth/hci_core.c b/net/bluetooth/hci_core.c
index 0fa1262..b7bbe02 100644
--- a/net/bluetooth/hci_core.c
+++ b/net/bluetooth/hci_core.c
@@ -193,6 +193,7 @@
/* Reset device */
set_bit(HCI_RESET, &hdev->flags);
+ memset(&hdev->features, 0, sizeof(hdev->features));
hci_send_cmd(hdev, HCI_OP_RESET, 0, NULL);
}
diff --git a/net/bluetooth/mgmt.c b/net/bluetooth/mgmt.c
index 77845f2..094bfdb 100644
--- a/net/bluetooth/mgmt.c
+++ b/net/bluetooth/mgmt.c
@@ -1699,6 +1699,48 @@
return err;
}
+static int set_connection_params(struct sock *sk, u16 index,
+ unsigned char *data, u16 len)
+{
+ struct mgmt_cp_set_connection_params *cp = (void *) data;
+ struct hci_dev *hdev;
+ struct hci_conn *conn;
+ int err;
+
+ BT_DBG("");
+
+ if (len != sizeof(*cp))
+ return cmd_status(sk, index, MGMT_OP_SET_CONNECTION_PARAMS,
+ EINVAL);
+
+ hdev = hci_dev_get(index);
+ if (!hdev)
+ return cmd_status(sk, index, MGMT_OP_SET_CONNECTION_PARAMS,
+ ENODEV);
+
+ hci_dev_lock(hdev);
+
+ conn = hci_conn_hash_lookup_ba(hdev, LE_LINK, &cp->bdaddr);
+ if (!conn) {
+ err = cmd_status(sk, index, MGMT_OP_SET_CONNECTION_PARAMS,
+ ENOTCONN);
+ goto failed;
+ }
+
+ hci_le_conn_update(conn, le16_to_cpu(cp->interval_min),
+ le16_to_cpu(cp->interval_max),
+ le16_to_cpu(cp->slave_latency),
+ le16_to_cpu(cp->timeout_multiplier));
+
+ err = cmd_status(sk, index, MGMT_OP_SET_CONNECTION_PARAMS, 0);
+
+failed:
+ hci_dev_unlock(hdev);
+ hci_dev_put(hdev);
+
+ return err;
+}
+
static int set_local_name(struct sock *sk, u16 index, unsigned char *data,
u16 len)
{
@@ -2262,6 +2304,9 @@
case MGMT_OP_RESOLVE_NAME:
err = resolve_name(sk, index, buf + sizeof(*hdr), len);
break;
+ case MGMT_OP_SET_CONNECTION_PARAMS:
+ err = set_connection_params(sk, index, buf + sizeof(*hdr), len);
+ break;
case MGMT_OP_READ_LOCAL_OOB_DATA:
err = read_local_oob_data(sk, index);
break;
diff --git a/net/bluetooth/smp.c b/net/bluetooth/smp.c
index e725148..a88f4a5 100644
--- a/net/bluetooth/smp.c
+++ b/net/bluetooth/smp.c
@@ -31,6 +31,11 @@
#define SMP_TIMEOUT 30000 /* 30 seconds */
+#define SMP_MIN_CONN_INTERVAL 40 /* 50ms (40 * 1.25ms) */
+#define SMP_MAX_CONN_INTERVAL 56 /* 70ms (56 * 1.25ms) */
+#define SMP_MAX_CONN_LATENCY 0 /* 0ms (0 * 1.25ms) */
+#define SMP_SUPERVISION_TIMEOUT 500 /* 5 seconds (500 * 10ms) */
+
#ifndef FALSE
#define FALSE 0
#define TRUE (!FALSE)
@@ -696,6 +701,10 @@
invalid_key:
hcon->sec_req = FALSE;
+ /* Switch to Pairing Connection Parameters */
+ hci_le_conn_update(hcon, SMP_MIN_CONN_INTERVAL, SMP_MAX_CONN_INTERVAL,
+ SMP_MAX_CONN_LATENCY, SMP_SUPERVISION_TIMEOUT);
+
skb_pull(skb, sizeof(*rp));
memset(&cp, 0, sizeof(cp));
@@ -763,6 +772,11 @@
if (hcon->link_mode & HCI_LM_MASTER) {
struct smp_cmd_pairing cp;
+ /* Switch to Pairing Connection Parameters */
+ hci_le_conn_update(hcon, SMP_MIN_CONN_INTERVAL,
+ SMP_MAX_CONN_INTERVAL, SMP_MAX_CONN_LATENCY,
+ SMP_SUPERVISION_TIMEOUT);
+
build_pairing_cmd(conn, &cp, NULL, authreq);
hcon->preq[0] = SMP_CMD_PAIRING_REQ;
memcpy(&hcon->preq[1], &cp, sizeof(cp));
diff --git a/sound/soc/codecs/wcd9310.c b/sound/soc/codecs/wcd9310.c
index 620822c..ad8190c 100644
--- a/sound/soc/codecs/wcd9310.c
+++ b/sound/soc/codecs/wcd9310.c
@@ -2801,6 +2801,12 @@
struct snd_soc_codec *codec = tabla->codec;
struct tabla_pdata *pdata = tabla->pdata;
int k1, k2, k3, rc = 0;
+ u8 leg_mode = pdata->amic_settings.legacy_mode;
+ u8 txfe_bypass = pdata->amic_settings.txfe_enable;
+ u8 txfe_buff = pdata->amic_settings.txfe_buff;
+ u8 flag = pdata->amic_settings.use_pdata;
+ u8 i = 0, j = 0;
+ u8 val_txfe = 0, value = 0;
if (!pdata) {
rc = -ENODEV;
@@ -2850,6 +2856,38 @@
snd_soc_update_bits(codec, TABLA_A_MICB_4_CTL, 0x60,
(pdata->micbias.bias4_cfilt_sel << 5));
+ for (i = 0; i < 6; j++, i += 2) {
+ if (flag & (0x01 << i)) {
+ value = (leg_mode & (0x01 << i)) ? 0x10 : 0x00;
+ val_txfe = (txfe_bypass & (0x01 << i)) ? 0x20 : 0x00;
+ val_txfe = val_txfe |
+ ((txfe_buff & (0x01 << i)) ? 0x10 : 0x00);
+ snd_soc_update_bits(codec, TABLA_A_TX_1_2_EN + j * 10,
+ 0x10, value);
+ snd_soc_update_bits(codec,
+ TABLA_A_TX_1_2_TEST_EN + j * 10,
+ 0x30, val_txfe);
+ }
+ if (flag & (0x01 << (i + 1))) {
+ value = (leg_mode & (0x01 << (i + 1))) ? 0x01 : 0x00;
+ val_txfe = (txfe_bypass &
+ (0x01 << (i + 1))) ? 0x02 : 0x00;
+ val_txfe |= (txfe_buff &
+ (0x01 << (i + 1))) ? 0x01 : 0x00;
+ snd_soc_update_bits(codec, TABLA_A_TX_1_2_EN + j * 10,
+ 0x01, value);
+ snd_soc_update_bits(codec,
+ TABLA_A_TX_1_2_TEST_EN + j * 10,
+ 0x03, val_txfe);
+ }
+ }
+ if (flag & 0x40) {
+ value = (leg_mode & 0x40) ? 0x10 : 0x00;
+ value = value | ((txfe_bypass & 0x40) ? 0x02 : 0x00);
+ value = value | ((txfe_buff & 0x40) ? 0x01 : 0x00);
+ snd_soc_update_bits(codec, TABLA_A_TX_7_MBHC_EN,
+ 0x13, value);
+ }
done:
return rc;
}
@@ -2919,6 +2957,8 @@
static const struct tabla_reg_mask_val tabla_codec_reg_init_val[] = {
+ {TABLA_A_QFUSE_CTL, 0xFF, 0x03},
+
/* Initialize gain registers to use register gain */
{TABLA_A_RX_HPH_L_GAIN, 0x10, 0x10},
{TABLA_A_RX_HPH_R_GAIN, 0x10, 0x10},
@@ -3010,16 +3050,15 @@
tabla->codec = codec;
tabla->pdata = dev_get_platdata(codec->dev->parent);
- ret = tabla_handle_pdata(tabla);
+ tabla_update_reg_defaults(codec);
+ tabla_codec_init_reg(codec);
+ ret = tabla_handle_pdata(tabla);
if (IS_ERR_VALUE(ret)) {
pr_err("%s: bad pdata\n", __func__);
goto err_pdata;
}
- tabla_update_reg_defaults(codec);
- tabla_codec_init_reg(codec);
-
/* TODO only enable bandgap when necessary in order to save power */
tabla_codec_enable_bandgap(codec, TABLA_BANDGAP_AUDIO_MODE);
tabla_codec_enable_clock_block(codec, 0);
diff --git a/sound/soc/msm/msm8960.c b/sound/soc/msm/msm8960.c
index 0f08682..f5f5893 100644
--- a/sound/soc/msm/msm8960.c
+++ b/sound/soc/msm/msm8960.c
@@ -577,6 +577,8 @@
pr_debug("%s()\n", __func__);
+ rtd->pmdown_time = 0;
+
err = snd_soc_add_controls(codec, tabla_msm8960_controls,
ARRAY_SIZE(tabla_msm8960_controls));
if (err < 0)
diff --git a/sound/soc/soc-core.c b/sound/soc/soc-core.c
index fa709a7..ee66479 100644
--- a/sound/soc/soc-core.c
+++ b/sound/soc/soc-core.c
@@ -794,9 +794,15 @@
if (substream->stream == SNDRV_PCM_STREAM_PLAYBACK) {
/* start delayed pop wq here for playback streams */
- codec_dai->pop_wait = 1;
- schedule_delayed_work(&rtd->delayed_work,
+ if (rtd->pmdown_time) {
+ codec_dai->pop_wait = 1;
+ schedule_delayed_work(&rtd->delayed_work,
msecs_to_jiffies(rtd->pmdown_time));
+ } else {
+ snd_soc_dapm_stream_event(rtd,
+ codec_dai->driver->playback.stream_name,
+ SND_SOC_DAPM_STREAM_STOP);
+ }
} else {
/* capture streams can be powered down now */
snd_soc_dapm_stream_event(rtd,