msm: acpuclock-7x30: Use clk_set_rate() to set ebi1_clk's rate
Use of the proprietary clk_set_min_rate() is being phased out globally.
Use clk_set_rate() instead, which now does the same thing.
Change-Id: I96dff98978433c392614c50cdf32cdcab5218fce
Signed-off-by: Matt Wagantall <mattw@codeaurora.org>
diff --git a/arch/arm/mach-msm/acpuclock-7x30.c b/arch/arm/mach-msm/acpuclock-7x30.c
index 24c910e..7ee4e5b 100644
--- a/arch/arm/mach-msm/acpuclock-7x30.c
+++ b/arch/arm/mach-msm/acpuclock-7x30.c
@@ -231,8 +231,7 @@
* increasing the ACPU frequency, since voting for high AXI rates
* implicitly takes care of increasing the MSMC1 voltage, as needed. */
if (tgt_s->axi_clk_hz > strt_s->axi_clk_hz) {
- rc = clk_set_min_rate(drv_state.ebi1_clk,
- tgt_s->axi_clk_hz);
+ rc = clk_set_rate(drv_state.ebi1_clk, tgt_s->axi_clk_hz);
if (rc < 0) {
pr_err("Setting AXI min rate failed (%d)\n", rc);
goto out;
@@ -277,8 +276,7 @@
/* Decrease the AXI bus frequency if we can. */
if (tgt_s->axi_clk_hz < strt_s->axi_clk_hz) {
- res = clk_set_min_rate(drv_state.ebi1_clk,
- tgt_s->axi_clk_hz);
+ res = clk_set_rate(drv_state.ebi1_clk, tgt_s->axi_clk_hz);
if (res < 0)
pr_warning("Setting AXI min rate failed (%d)\n", res);
}
@@ -385,7 +383,7 @@
if (s->src >= 0)
clk_enable(acpuclk_sources[s->src]);
- res = clk_set_min_rate(drv_state.ebi1_clk, s->axi_clk_hz);
+ res = clk_set_rate(drv_state.ebi1_clk, s->axi_clk_hz);
if (res < 0)
pr_warning("Setting AXI min rate failed!\n");