Merge changes If9753611,Ic7c6bb6f into msm-3.4
* changes:
msm: mdss: refactor mdp driver probe
msm: mdss: refactor mdss color formats
diff --git a/drivers/video/msm/mdss/mdss.h b/drivers/video/msm/mdss/mdss.h
index 6145d67..7480c5b 100644
--- a/drivers/video/msm/mdss/mdss.h
+++ b/drivers/video/msm/mdss/mdss.h
@@ -18,10 +18,9 @@
#include <linux/types.h>
#include <linux/workqueue.h>
-#define MDSS_REG_WRITE(addr, val) writel_relaxed(val, mdss_reg_base + addr)
-#define MDSS_REG_READ(addr) readl_relaxed(mdss_reg_base + addr)
+#define MDSS_REG_WRITE(addr, val) writel_relaxed(val, mdss_res->mdp_base + addr)
+#define MDSS_REG_READ(addr) readl_relaxed(mdss_res->mdp_base + addr)
-extern unsigned char *mdss_reg_base;
extern spinlock_t dsi_clk_lock;
enum mdss_mdp_clk_type {
@@ -34,7 +33,7 @@
MDSS_MAX_CLK
};
-struct mdss_res_type {
+struct mdss_data_type {
u32 rev;
u32 mdp_rev;
struct clk *mdp_clk[MDSS_MAX_CLK];
@@ -42,6 +41,9 @@
struct workqueue_struct *clk_ctrl_wq;
struct delayed_work clk_ctrl_worker;
+ char __iomem *mdp_base;
+
+ struct platform_device *pdev;
u32 irq;
u32 irq_mask;
@@ -69,7 +71,7 @@
u32 *pipe_type_map;
u32 *mixer_type_map;
};
-extern struct mdss_res_type *mdss_res;
+extern struct mdss_data_type *mdss_res;
enum mdss_hw_index {
MDSS_HW_MDP,
diff --git a/drivers/video/msm/mdss/mdss_mdp.c b/drivers/video/msm/mdss/mdss_mdp.c
index a10bac3..89f1549 100644
--- a/drivers/video/msm/mdss/mdss_mdp.c
+++ b/drivers/video/msm/mdss/mdss_mdp.c
@@ -46,10 +46,7 @@
#include "mdss_fb.h"
#include "mdss_mdp.h"
-unsigned char *mdss_reg_base;
-
-struct mdss_res_type *mdss_res;
-static struct msm_panel_common_pdata *mdp_pdata;
+struct mdss_data_type *mdss_res;
static DEFINE_SPINLOCK(mdp_lock);
static DEFINE_MUTEX(mdp_clk_lock);
@@ -117,9 +114,13 @@
static irqreturn_t mdss_irq_handler(int irq, void *ptr)
{
+ struct mdss_data_type *mdata = ptr;
u32 intr = MDSS_MDP_REG_READ(MDSS_REG_HW_INTR_STATUS);
- mdss_res->irq_buzy = true;
+ if (!mdata)
+ return IRQ_NONE;
+
+ mdata->irq_buzy = true;
if (intr & MDSS_INTR_MDP)
mdss_irq_dispatch(MDSS_HW_MDP, irq, ptr);
@@ -136,7 +137,7 @@
if (intr & MDSS_INTR_HDMI)
mdss_irq_dispatch(MDSS_HW_HDMI, irq, ptr);
- mdss_res->irq_buzy = false;
+ mdata->irq_buzy = false;
return IRQ_HANDLED;
}
@@ -228,9 +229,9 @@
}
EXPORT_SYMBOL(mdss_disable_irq_nosync);
-static int mdss_mdp_bus_scale_register(void)
+static int mdss_mdp_bus_scale_register(struct mdss_data_type *mdata)
{
- if (!mdss_res->bus_hdl) {
+ if (!mdata->bus_hdl) {
struct msm_bus_scale_pdata *bus_pdata = &mdp_bus_scale_table;
int i;
@@ -239,23 +240,23 @@
mdp_bus_usecases[i].vectors = &mdp_bus_vectors[i];
}
- mdss_res->bus_hdl = msm_bus_scale_register_client(bus_pdata);
- if (!mdss_res->bus_hdl) {
+ mdata->bus_hdl = msm_bus_scale_register_client(bus_pdata);
+ if (!mdata->bus_hdl) {
pr_err("not able to get bus scale\n");
return -ENOMEM;
}
- pr_debug("register bus_hdl=%x\n", mdss_res->bus_hdl);
+ pr_debug("register bus_hdl=%x\n", mdata->bus_hdl);
}
return 0;
}
-static void mdss_mdp_bus_scale_unregister(void)
+static void mdss_mdp_bus_scale_unregister(struct mdss_data_type *mdata)
{
- pr_debug("unregister bus_hdl=%x\n", mdss_res->bus_hdl);
+ pr_debug("unregister bus_hdl=%x\n", mdata->bus_hdl);
- if (mdss_res->bus_hdl)
- msm_bus_scale_unregister_client(mdss_res->bus_hdl);
+ if (mdata->bus_hdl)
+ msm_bus_scale_unregister_client(mdata->bus_hdl);
}
int mdss_mdp_bus_scale_set_quota(u32 ab_quota, u32 ib_quota)
@@ -525,7 +526,7 @@
}
}
-static inline int mdss_mdp_irq_clk_register(struct platform_device *pdev,
+static inline int mdss_mdp_irq_clk_register(struct mdss_data_type *mdata,
char *clk_name, int clk_idx)
{
struct clk *tmp;
@@ -534,182 +535,149 @@
return -EINVAL;
}
-
- tmp = clk_get(&pdev->dev, clk_name);
+ tmp = devm_clk_get(&mdata->pdev->dev, clk_name);
if (IS_ERR(tmp)) {
pr_err("unable to get clk: %s\n", clk_name);
return PTR_ERR(tmp);
}
- mdss_res->mdp_clk[clk_idx] = tmp;
+ mdata->mdp_clk[clk_idx] = tmp;
return 0;
}
-static int mdss_mdp_irq_clk_setup(struct platform_device *pdev)
+static int mdss_mdp_irq_clk_setup(struct mdss_data_type *mdata)
{
int ret;
- int i;
- ret = request_irq(mdss_res->irq, mdss_irq_handler, IRQF_DISABLED,
- "MDSS", 0);
+ ret = devm_request_irq(&mdata->pdev->dev, mdata->irq, mdss_irq_handler,
+ IRQF_DISABLED, "MDSS", mdata);
if (ret) {
pr_err("mdp request_irq() failed!\n");
return ret;
}
- disable_irq(mdss_res->irq);
+ disable_irq(mdata->irq);
- mdss_res->fs = regulator_get(&pdev->dev, "vdd");
- if (IS_ERR_OR_NULL(mdss_res->fs)) {
- mdss_res->fs = NULL;
+ mdata->fs = devm_regulator_get(&mdata->pdev->dev, "vdd");
+ if (IS_ERR_OR_NULL(mdata->fs)) {
+ mdata->fs = NULL;
pr_err("unable to get gdsc regulator\n");
- goto error;
+ return -EINVAL;
}
- regulator_enable(mdss_res->fs);
- mdss_res->fs_ena = true;
+ regulator_enable(mdata->fs);
+ mdata->fs_ena = true;
- if (mdss_mdp_irq_clk_register(pdev, "bus_clk", MDSS_CLK_AXI) ||
- mdss_mdp_irq_clk_register(pdev, "iface_clk", MDSS_CLK_AHB) ||
- mdss_mdp_irq_clk_register(pdev, "core_clk_src", MDSS_CLK_MDP_SRC) ||
- mdss_mdp_irq_clk_register(pdev, "core_clk", MDSS_CLK_MDP_CORE) ||
- mdss_mdp_irq_clk_register(pdev, "lut_clk", MDSS_CLK_MDP_LUT) ||
- mdss_mdp_irq_clk_register(pdev, "vsync_clk", MDSS_CLK_MDP_VSYNC))
- goto error;
+ if (mdss_mdp_irq_clk_register(mdata, "bus_clk", MDSS_CLK_AXI) ||
+ mdss_mdp_irq_clk_register(mdata, "iface_clk", MDSS_CLK_AHB) ||
+ mdss_mdp_irq_clk_register(mdata, "core_clk_src",
+ MDSS_CLK_MDP_SRC) ||
+ mdss_mdp_irq_clk_register(mdata, "core_clk",
+ MDSS_CLK_MDP_CORE) ||
+ mdss_mdp_irq_clk_register(mdata, "lut_clk", MDSS_CLK_MDP_LUT) ||
+ mdss_mdp_irq_clk_register(mdata, "vsync_clk", MDSS_CLK_MDP_VSYNC))
+ return -EINVAL;
mdss_mdp_set_clk_rate(MDP_CLK_DEFAULT_RATE);
pr_debug("mdp clk rate=%ld\n", mdss_mdp_get_clk_rate(MDSS_CLK_MDP_SRC));
return 0;
-error:
- for (i = 0; i < MDSS_MAX_CLK; i++) {
- if (mdss_res->mdp_clk[i])
- clk_put(mdss_res->mdp_clk[i]);
- }
- if (mdss_res->fs)
- regulator_put(mdss_res->fs);
- if (mdss_res->irq)
- free_irq(mdss_res->irq, 0);
-
- return -EINVAL;
-
}
-static struct msm_panel_common_pdata *mdss_mdp_populate_pdata(
- struct device *dev)
-{
- struct msm_panel_common_pdata *pdata;
-
- pdata = devm_kzalloc(dev, sizeof(*pdata), GFP_KERNEL);
- if (!pdata)
- dev_err(dev, "could not allocate memory for pdata\n");
- return pdata;
-}
-
-static u32 mdss_mdp_res_init(struct platform_device *pdev)
+static u32 mdss_mdp_res_init(struct mdss_data_type *mdata)
{
u32 rc;
- rc = mdss_mdp_irq_clk_setup(pdev);
+ rc = mdss_mdp_irq_clk_setup(mdata);
if (rc)
return rc;
- mdss_res->clk_ctrl_wq = create_singlethread_workqueue("mdp_clk_wq");
- INIT_DELAYED_WORK(&mdss_res->clk_ctrl_worker,
+ mdata->clk_ctrl_wq = create_singlethread_workqueue("mdp_clk_wq");
+ INIT_DELAYED_WORK(&mdata->clk_ctrl_worker,
mdss_mdp_clk_ctrl_workqueue_handler);
mdss_mdp_clk_ctrl(MDP_BLOCK_POWER_ON, false);
- mdss_res->rev = MDSS_MDP_REG_READ(MDSS_REG_HW_VERSION);
- mdss_res->mdp_rev = MDSS_MDP_REG_READ(MDSS_MDP_REG_HW_VERSION);
+ mdata->rev = MDSS_MDP_REG_READ(MDSS_REG_HW_VERSION);
+ mdata->mdp_rev = MDSS_MDP_REG_READ(MDSS_MDP_REG_HW_VERSION);
mdss_mdp_clk_ctrl(MDP_BLOCK_POWER_OFF, false);
- mdss_res->smp_mb_cnt = MDSS_MDP_SMP_MMB_BLOCKS;
- mdss_res->smp_mb_size = MDSS_MDP_SMP_MMB_SIZE;
- mdss_res->pipe_type_map = mdss_mdp_pipe_type_map;
- mdss_res->mixer_type_map = mdss_mdp_mixer_type_map;
+ mdata->smp_mb_cnt = MDSS_MDP_SMP_MMB_BLOCKS;
+ mdata->smp_mb_size = MDSS_MDP_SMP_MMB_SIZE;
+ mdata->pipe_type_map = mdss_mdp_pipe_type_map;
+ mdata->mixer_type_map = mdss_mdp_mixer_type_map;
- pr_info("mdss_revision=%x\n", mdss_res->rev);
- pr_info("mdp_hw_revision=%x\n", mdss_res->mdp_rev);
+ pr_info("mdss_revision=%x\n", mdata->rev);
+ pr_info("mdp_hw_revision=%x\n", mdata->mdp_rev);
- mdss_res->res_init = true;
- mdss_res->timeout = HZ/20;
- mdss_res->clk_ena = false;
- mdss_res->irq_mask = MDSS_MDP_DEFAULT_INTR_MASK;
- mdss_res->suspend = false;
- mdss_res->prim_ptype = NO_PANEL;
- mdss_res->irq_ena = false;
+ mdata->res_init = true;
+ mdata->timeout = HZ/20;
+ mdata->clk_ena = false;
+ mdata->irq_mask = MDSS_MDP_DEFAULT_INTR_MASK;
+ mdata->suspend = false;
+ mdata->prim_ptype = NO_PANEL;
+ mdata->irq_ena = false;
return 0;
}
static int mdss_mdp_probe(struct platform_device *pdev)
{
- struct resource *mdss_mdp_mres;
- struct resource *mdss_mdp_ires;
- resource_size_t size;
+ struct resource *res;
int rc;
+ struct mdss_data_type *mdata;
- if (!mdss_res) {
- mdss_res = devm_kzalloc(&pdev->dev, sizeof(*mdss_res),
- GFP_KERNEL);
- if (mdss_res == NULL)
- return -ENOMEM;
+ if (!pdev->dev.of_node) {
+ pr_err("MDP driver only supports device tree probe\n");
+ return -ENOTSUPP;
}
- if (pdev->dev.of_node) {
- pdev->id = 0;
- mdp_pdata = mdss_mdp_populate_pdata(&pdev->dev);
- mdss_mdp_mres = platform_get_resource(pdev,
- IORESOURCE_MEM, 0);
- mdss_mdp_ires = platform_get_resource(pdev,
- IORESOURCE_IRQ, 0);
- if (!mdss_mdp_mres || !mdss_mdp_ires) {
- pr_err("unable to get the MDSS resources");
- rc = -ENOMEM;
- goto probe_done;
- }
- mdss_reg_base = ioremap(mdss_mdp_mres->start,
- resource_size(mdss_mdp_mres));
-
- pr_info("MDP HW Base phy_Address=0x%x virt=0x%x\n",
- (int) mdss_mdp_mres->start,
- (int) mdss_reg_base);
-
- mdss_res->irq = mdss_mdp_ires->start;
- } else if ((pdev->id == 0) && (pdev->num_resources > 0)) {
- mdp_pdata = pdev->dev.platform_data;
-
- size = resource_size(&pdev->resource[0]);
- mdss_reg_base = ioremap(pdev->resource[0].start, size);
-
- pr_info("MDP HW Base phy_Address=0x%x virt=0x%x\n",
- (int) pdev->resource[0].start,
- (int) mdss_reg_base);
-
- mdss_res->irq = platform_get_irq(pdev, 0);
- if (mdss_res->irq < 0) {
- pr_err("can not get mdp irq\n");
- rc = -ENOMEM;
- goto probe_done;
- }
+ if (mdss_res) {
+ pr_err("MDP already initialized\n");
+ return -EINVAL;
}
- if (unlikely(!mdss_reg_base)) {
+ mdata = devm_kzalloc(&pdev->dev, sizeof(*mdata), GFP_KERNEL);
+ if (mdata == NULL)
+ return -ENOMEM;
+
+ pdev->id = 0;
+ mdata->pdev = pdev;
+ platform_set_drvdata(pdev, mdata);
+ mdss_res = mdata;
+
+ res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
+ if (!res) {
+ pr_err("unable to get MDP base address\n");
rc = -ENOMEM;
goto probe_done;
}
- rc = mdss_mdp_res_init(pdev);
+ mdata->mdp_base = devm_ioremap(&pdev->dev, res->start,
+ resource_size(res));
+ if (unlikely(!mdata->mdp_base)) {
+ pr_err("unable to map MDP base\n");
+ rc = -ENOMEM;
+ goto probe_done;
+ }
+ pr_info("MDP HW Base phy_Address=0x%x virt=0x%x\n",
+ (int) res->start,
+ (int) mdata->mdp_base);
+
+ res = platform_get_resource(pdev, IORESOURCE_IRQ, 0);
+ if (!res) {
+ pr_err("unable to get MDSS irq\n");
+ rc = -ENOMEM;
+ goto probe_done;
+ }
+ mdata->irq = res->start;
+
+ rc = mdss_mdp_res_init(mdata);
if (rc) {
pr_err("unable to initialize mdss mdp resources\n");
goto probe_done;
}
- rc = mdss_mdp_bus_scale_register();
+ rc = mdss_mdp_bus_scale_register(mdata);
probe_done:
- if (IS_ERR_VALUE(rc)) {
- if (mdss_res) {
- devm_kfree(&pdev->dev, mdss_res);
- mdss_res = NULL;
- }
- }
+ if (IS_ERR_VALUE(rc))
+ mdss_res = NULL;
return rc;
}
@@ -790,11 +758,11 @@
static int mdss_mdp_remove(struct platform_device *pdev)
{
- if (mdss_res->fs != NULL)
- regulator_put(mdss_res->fs);
- iounmap(mdss_reg_base);
+ struct mdss_data_type *mdata = platform_get_drvdata(pdev);
+ if (!mdata)
+ return -ENODEV;
pm_runtime_disable(&pdev->dev);
- mdss_mdp_bus_scale_unregister();
+ mdss_mdp_bus_scale_unregister(mdata);
return 0;
}
diff --git a/drivers/video/msm/mdss/mdss_mdp.h b/drivers/video/msm/mdss/mdss_mdp.h
index 776bf8b..17281d5 100644
--- a/drivers/video/msm/mdss/mdss_mdp.h
+++ b/drivers/video/msm/mdss/mdss_mdp.h
@@ -40,6 +40,11 @@
#define MAX_DOWNSCALE_RATIO 4
#define MAX_UPSCALE_RATIO 20
+#define C3_ALPHA 3 /* alpha */
+#define C2_R_Cr 2 /* R/Cr */
+#define C1_B_Cb 1 /* B/Cb */
+#define C0_G_Y 0 /* G/luma */
+
#ifdef MDSS_MDP_DEBUG_REG
static inline void mdss_mdp_reg_write(u32 addr, u32 val)
{
@@ -173,23 +178,8 @@
u8 bpp;
u8 alpha_enable; /* source has alpha */
- /*
- * number of bits for source component,
- * 0 = 1 bit, 1 = 2 bits, 2 = 6 bits, 3 = 8 bits
- */
- u8 a_bit; /* component 3, alpha */
- u8 r_bit; /* component 2, R_Cr */
- u8 b_bit; /* component 1, B_Cb */
- u8 g_bit; /* component 0, G_lumz */
-
- /*
- * unpack pattern
- * A = C3, R = C2, B = C1, G = C0
- */
- u8 element3;
- u8 element2;
- u8 element1;
- u8 element0;
+ u8 bits[MAX_PLANES];
+ u8 element[MAX_PLANES];
};
struct mdss_mdp_plane_sizes {
diff --git a/drivers/video/msm/mdss/mdss_mdp_formats.h b/drivers/video/msm/mdss/mdss_mdp_formats.h
index 07eefc1..d8ae531 100644
--- a/drivers/video/msm/mdss/mdss_mdp_formats.h
+++ b/drivers/video/msm/mdss/mdss_mdp_formats.h
@@ -18,311 +18,147 @@
#include "mdss_mdp.h"
-#define C3_ALPHA 3 /* alpha */
-#define C2_R_Cr 2 /* R/Cr */
-#define C1_B_Cb 1 /* B/Cb */
-#define C0_G_Y 0 /* G/luma */
+ /*
+ * number of bits for source component,
+ * 0 = 1 bit, 1 = 2 bits, 2 = 6 bits, 3 = 8 bits
+ */
+enum {
+ COLOR_4BIT,
+ COLOR_5BIT,
+ COLOR_6BIT,
+ COLOR_8BIT,
+};
-static struct mdss_mdp_format_params mdss_mdp_format_map[MDP_IMGTYPE_LIMIT] = {
- [MDP_RGB_565] = {
- .format = MDP_RGB_565,
+#define FMT_RGB_565(fmt, e0, e1, e2) \
+ { \
+ .format = (fmt), \
+ .fetch_planes = MDSS_MDP_PLANE_INTERLEAVED, \
+ .unpack_tight = 1, \
+ .unpack_align_msb = 0, \
+ .alpha_enable = 0, \
+ .unpack_count = 3, \
+ .bpp = 2, \
+ .element = { (e0), (e1), (e2) }, \
+ .bits = { \
+ [C2_R_Cr] = COLOR_5BIT, \
+ [C0_G_Y] = COLOR_6BIT, \
+ [C1_B_Cb] = COLOR_5BIT, \
+ }, \
+ }
+
+#define FMT_RGB_888(fmt, e0, e1, e2) \
+ { \
+ .format = (fmt), \
+ .fetch_planes = MDSS_MDP_PLANE_INTERLEAVED, \
+ .unpack_tight = 1, \
+ .unpack_align_msb = 0, \
+ .alpha_enable = 0, \
+ .unpack_count = 3, \
+ .bpp = 3, \
+ .element = { (e0), (e1), (e2) }, \
+ .bits = { \
+ [C2_R_Cr] = COLOR_8BIT, \
+ [C0_G_Y] = COLOR_8BIT, \
+ [C1_B_Cb] = COLOR_8BIT, \
+ }, \
+ }
+
+#define FMT_RGB_8888(fmt, alpha_en, e0, e1, e2, e3) \
+ { \
+ .format = (fmt), \
+ .fetch_planes = MDSS_MDP_PLANE_INTERLEAVED, \
+ .unpack_tight = 1, \
+ .unpack_align_msb = 0, \
+ .alpha_enable = (alpha_en), \
+ .unpack_count = 4, \
+ .bpp = 4, \
+ .element = { (e0), (e1), (e2), (e3) }, \
+ .bits = { \
+ [C3_ALPHA] = COLOR_8BIT, \
+ [C2_R_Cr] = COLOR_8BIT, \
+ [C0_G_Y] = COLOR_8BIT, \
+ [C1_B_Cb] = COLOR_8BIT, \
+ }, \
+ }
+
+#define FMT_YUV_COMMON(fmt) \
+ .format = (fmt), \
+ .is_yuv = 1, \
+ .bits = { \
+ [C2_R_Cr] = COLOR_8BIT, \
+ [C0_G_Y] = COLOR_8BIT, \
+ [C1_B_Cb] = COLOR_8BIT, \
+ }, \
+ .alpha_enable = 0, \
+ .unpack_tight = 1, \
+ .unpack_align_msb = 0
+
+#define FMT_YUV_PSEUDO(fmt, samp, e0, e1) \
+ { \
+ FMT_YUV_COMMON(fmt), \
+ .fetch_planes = MDSS_MDP_PLANE_PSEUDO_PLANAR, \
+ .chroma_sample = samp, \
+ .unpack_count = 2, \
+ .bpp = 2, \
+ .element = { (e0), (e1) }, \
+ }
+
+#define FMT_YUV_PLANR(fmt, samp, e0, e1) \
+ { \
+ FMT_YUV_COMMON(fmt), \
+ .fetch_planes = MDSS_MDP_PLANE_PLANAR, \
+ .chroma_sample = samp, \
+ .element = { (e0), (e1) } \
+ }
+
+static struct mdss_mdp_format_params mdss_mdp_format_map[] = {
+ FMT_RGB_565(MDP_RGB_565, C1_B_Cb, C0_G_Y, C2_R_Cr),
+ FMT_RGB_565(MDP_BGR_565, C2_R_Cr, C0_G_Y, C1_B_Cb),
+ FMT_RGB_888(MDP_RGB_888, C2_R_Cr, C0_G_Y, C1_B_Cb),
+ FMT_RGB_888(MDP_BGR_888, C1_B_Cb, C0_G_Y, C2_R_Cr),
+
+ FMT_RGB_8888(MDP_XRGB_8888, 0, C3_ALPHA, C2_R_Cr, C0_G_Y, C1_B_Cb),
+ FMT_RGB_8888(MDP_ARGB_8888, 1, C3_ALPHA, C2_R_Cr, C0_G_Y, C1_B_Cb),
+ FMT_RGB_8888(MDP_RGBA_8888, 1, C2_R_Cr, C0_G_Y, C1_B_Cb, C3_ALPHA),
+ FMT_RGB_8888(MDP_RGBX_8888, 0, C2_R_Cr, C0_G_Y, C1_B_Cb, C3_ALPHA),
+ FMT_RGB_8888(MDP_BGRA_8888, 1, C1_B_Cb, C0_G_Y, C2_R_Cr, C3_ALPHA),
+
+ FMT_YUV_PSEUDO(MDP_Y_CRCB_H1V1, MDSS_MDP_CHROMA_RGB, C2_R_Cr, C1_B_Cb),
+ FMT_YUV_PSEUDO(MDP_Y_CBCR_H1V1, MDSS_MDP_CHROMA_RGB, C1_B_Cb, C2_R_Cr),
+ FMT_YUV_PSEUDO(MDP_Y_CRCB_H2V1, MDSS_MDP_CHROMA_H2V1, C2_R_Cr, C1_B_Cb),
+ FMT_YUV_PSEUDO(MDP_Y_CBCR_H2V1, MDSS_MDP_CHROMA_H2V1, C1_B_Cb, C2_R_Cr),
+ FMT_YUV_PSEUDO(MDP_Y_CRCB_H1V2, MDSS_MDP_CHROMA_H1V2, C2_R_Cr, C1_B_Cb),
+ FMT_YUV_PSEUDO(MDP_Y_CBCR_H1V2, MDSS_MDP_CHROMA_H1V2, C1_B_Cb, C2_R_Cr),
+ FMT_YUV_PSEUDO(MDP_Y_CRCB_H2V2, MDSS_MDP_CHROMA_420, C2_R_Cr, C1_B_Cb),
+ FMT_YUV_PSEUDO(MDP_Y_CBCR_H2V2, MDSS_MDP_CHROMA_420, C1_B_Cb, C2_R_Cr),
+
+ FMT_YUV_PLANR(MDP_Y_CR_CB_H2V2, MDSS_MDP_CHROMA_420, C2_R_Cr, C1_B_Cb),
+ FMT_YUV_PLANR(MDP_Y_CB_CR_H2V2, MDSS_MDP_CHROMA_420, C1_B_Cb, C2_R_Cr),
+ FMT_YUV_PLANR(MDP_Y_CR_CB_GH2V2, MDSS_MDP_CHROMA_420, C2_R_Cr, C1_B_Cb),
+
+ {
+ FMT_YUV_COMMON(MDP_YCBCR_H1V1),
.fetch_planes = MDSS_MDP_PLANE_INTERLEAVED,
- .a_bit = 0,
- .r_bit = 1, /* R, 5 bits */
- .b_bit = 1, /* B, 5 bits */
- .g_bit = 2, /* G, 6 bits */
- .alpha_enable = 0,
- .unpack_tight = 1,
- .unpack_align_msb = 0,
- .unpack_count = 2,
- .element2 = C2_R_Cr,
- .element1 = C0_G_Y,
- .element0 = C1_B_Cb,
- .bpp = 1, /* 2 bpp */
- },
- [MDP_BGR_565] = {
- .format = MDP_BGR_565,
- .fetch_planes = MDSS_MDP_PLANE_INTERLEAVED,
- .a_bit = 0,
- .r_bit = 1, /* R, 5 bits */
- .b_bit = 1, /* B, 5 bits */
- .g_bit = 2, /* G, 6 bits */
- .alpha_enable = 0,
- .unpack_tight = 1,
- .unpack_align_msb = 0,
- .unpack_count = 2,
- .element2 = C1_B_Cb,
- .element1 = C0_G_Y,
- .element0 = C2_R_Cr,
- .bpp = 1, /* 2 bpp */
- },
- [MDP_RGB_888] = {
- .format = MDP_RGB_888,
- .fetch_planes = MDSS_MDP_PLANE_INTERLEAVED,
- .a_bit = 0,
- .r_bit = 3, /* R, 8 bits */
- .b_bit = 3, /* B, 8 bits */
- .g_bit = 3, /* G, 8 bits */
- .alpha_enable = 0,
- .unpack_tight = 1,
- .unpack_align_msb = 0,
- .unpack_count = 2,
- .element2 = C1_B_Cb,
- .element1 = C0_G_Y,
- .element0 = C2_R_Cr,
- .bpp = 2, /* 3 bpp */
- },
- [MDP_XRGB_8888] = {
- .format = MDP_XRGB_8888,
- .fetch_planes = MDSS_MDP_PLANE_INTERLEAVED,
- .a_bit = 3, /* alpha, 4 bits */
- .r_bit = 3, /* R, 8 bits */
- .b_bit = 3, /* B, 8 bits */
- .g_bit = 3, /* G, 8 bits */
- .alpha_enable = 0,
- .unpack_tight = 1,
- .unpack_align_msb = 0,
+ .chroma_sample = MDSS_MDP_CHROMA_RGB,
.unpack_count = 3,
- .element3 = C1_B_Cb,
- .element2 = C0_G_Y,
- .element1 = C2_R_Cr,
- .element0 = C3_ALPHA,
- .bpp = 3, /* 4 bpp */
+ .bpp = 3,
+ .element = { C2_R_Cr, C1_B_Cb, C0_G_Y },
},
- [MDP_ARGB_8888] = {
- .format = MDP_ARGB_8888,
+ {
+ FMT_YUV_COMMON(MDP_YCRCB_H1V1),
.fetch_planes = MDSS_MDP_PLANE_INTERLEAVED,
- .a_bit = 3, /* alpha, 4 bits */
- .r_bit = 3, /* R, 8 bits */
- .b_bit = 3, /* B, 8 bits */
- .g_bit = 3, /* G, 8 bits */
- .alpha_enable = 1,
- .unpack_tight = 1,
- .unpack_align_msb = 0,
+ .chroma_sample = MDSS_MDP_CHROMA_RGB,
.unpack_count = 3,
- .element3 = C1_B_Cb,
- .element2 = C0_G_Y,
- .element1 = C2_R_Cr,
- .element0 = C3_ALPHA,
- .bpp = 3, /* 4 bpp */
+ .bpp = 3,
+ .element = { C1_B_Cb, C2_R_Cr, C0_G_Y },
},
- [MDP_RGBA_8888] = {
- .format = MDP_RGBA_8888,
- .fetch_planes = MDSS_MDP_PLANE_INTERLEAVED,
- .a_bit = 3, /* alpha, 4 bits */
- .r_bit = 3, /* R, 8 bits */
- .b_bit = 3, /* B, 8 bits */
- .g_bit = 3, /* G, 8 bits */
- .alpha_enable = 1,
- .unpack_tight = 1,
- .unpack_align_msb = 0,
- .unpack_count = 3,
- .element3 = C3_ALPHA,
- .element2 = C1_B_Cb,
- .element1 = C0_G_Y,
- .element0 = C2_R_Cr,
- .bpp = 3, /* 4 bpp */
- },
- [MDP_RGBX_8888] = {
- .format = MDP_RGBX_8888,
- .fetch_planes = MDSS_MDP_PLANE_INTERLEAVED,
- .a_bit = 3,
- .r_bit = 3, /* R, 8 bits */
- .b_bit = 3, /* B, 8 bits */
- .g_bit = 3, /* G, 8 bits */
- .alpha_enable = 0,
- .unpack_tight = 1,
- .unpack_align_msb = 0,
- .unpack_count = 3,
- .element3 = C3_ALPHA,
- .element2 = C1_B_Cb,
- .element1 = C0_G_Y,
- .element0 = C2_R_Cr,
- .bpp = 3, /* 4 bpp */
- },
- [MDP_BGRA_8888] = {
- .format = MDP_BGRA_8888,
- .fetch_planes = MDSS_MDP_PLANE_INTERLEAVED,
- .a_bit = 3, /* alpha, 4 bits */
- .r_bit = 3, /* R, 8 bits */
- .b_bit = 3, /* B, 8 bits */
- .g_bit = 3, /* G, 8 bits */
- .alpha_enable = 1,
- .unpack_tight = 1,
- .unpack_align_msb = 0,
- .unpack_count = 3,
- .element3 = C3_ALPHA,
- .element2 = C2_R_Cr,
- .element1 = C0_G_Y,
- .element0 = C1_B_Cb,
- .bpp = 3, /* 4 bpp */
- },
- [MDP_YCRYCB_H2V1] = {
- .format = MDP_YCRYCB_H2V1,
- .is_yuv = 1,
- .a_bit = 0,
- .r_bit = 3, /* R, 8 bits */
- .b_bit = 3, /* B, 8 bits */
- .g_bit = 3, /* G, 8 bits */
- .alpha_enable = 0,
- .unpack_tight = 1,
- .unpack_align_msb = 0,
- .unpack_count = 1, /* 2 */
- .bpp = 1, /* 2 bpp */
+ {
+ FMT_YUV_COMMON(MDP_YCRYCB_H2V1),
.fetch_planes = MDSS_MDP_PLANE_INTERLEAVED,
.chroma_sample = MDSS_MDP_CHROMA_H2V1,
- .unpack_count = 3,
- .element3 = C0_G_Y,
- .element2 = C2_R_Cr,
- .element1 = C0_G_Y,
- .element0 = C1_B_Cb,
- },
- [MDP_Y_CRCB_H2V1] = {
- .format = MDP_Y_CRCB_H2V1,
- .is_yuv = 1,
- .a_bit = 0,
- .r_bit = 3, /* R, 8 bits */
- .b_bit = 3, /* B, 8 bits */
- .g_bit = 3, /* G, 8 bits */
- .alpha_enable = 0,
- .unpack_tight = 1,
- .unpack_align_msb = 0,
- .unpack_count = 1, /* 2 */
- .bpp = 1, /* 2 bpp */
- .fetch_planes = MDSS_MDP_PLANE_PSEUDO_PLANAR,
- .chroma_sample = MDSS_MDP_CHROMA_H2V1,
- .element1 = C1_B_Cb,
- .element0 = C2_R_Cr,
- },
- [MDP_Y_CBCR_H2V1] = {
- .format = MDP_Y_CBCR_H2V1,
- .is_yuv = 1,
- .a_bit = 0,
- .r_bit = 3, /* R, 8 bits */
- .b_bit = 3, /* B, 8 bits */
- .g_bit = 3, /* G, 8 bits */
- .alpha_enable = 0,
- .unpack_tight = 1,
- .unpack_align_msb = 0,
- .unpack_count = 1, /* 2 */
- .bpp = 1, /* 2 bpp */
- .fetch_planes = MDSS_MDP_PLANE_PSEUDO_PLANAR,
- .chroma_sample = MDSS_MDP_CHROMA_H2V1,
- .element1 = C2_R_Cr,
- .element0 = C1_B_Cb,
- },
- [MDP_Y_CRCB_H1V2] = {
- .format = MDP_Y_CRCB_H1V2,
- .is_yuv = 1,
- .a_bit = 0,
- .r_bit = 3, /* R, 8 bits */
- .b_bit = 3, /* B, 8 bits */
- .g_bit = 3, /* G, 8 bits */
- .alpha_enable = 0,
- .unpack_tight = 1,
- .unpack_align_msb = 0,
- .unpack_count = 1, /* 2 */
- .bpp = 1, /* 2 bpp */
- .fetch_planes = MDSS_MDP_PLANE_PSEUDO_PLANAR,
- .chroma_sample = MDSS_MDP_CHROMA_H1V2,
- .element1 = C1_B_Cb,
- .element0 = C2_R_Cr,
- },
- [MDP_Y_CBCR_H1V2] = {
- .format = MDP_Y_CBCR_H1V2,
- .is_yuv = 1,
- .a_bit = 0,
- .r_bit = 3, /* R, 8 bits */
- .b_bit = 3, /* B, 8 bits */
- .g_bit = 3, /* G, 8 bits */
- .alpha_enable = 0,
- .unpack_tight = 1,
- .unpack_align_msb = 0,
- .unpack_count = 1, /* 2 */
- .bpp = 1, /* 2 bpp */
- .fetch_planes = MDSS_MDP_PLANE_PSEUDO_PLANAR,
- .chroma_sample = MDSS_MDP_CHROMA_H1V2,
- .element1 = C2_R_Cr,
- .element0 = C1_B_Cb,
- },
- [MDP_Y_CRCB_H2V2] = {
- .format = MDP_Y_CRCB_H2V2,
- .is_yuv = 1,
- .a_bit = 0,
- .r_bit = 3, /* R, 8 bits */
- .b_bit = 3, /* B, 8 bits */
- .g_bit = 3, /* G, 8 bits */
- .alpha_enable = 0,
- .unpack_tight = 1,
- .unpack_align_msb = 0,
- .unpack_count = 1, /* 2 */
- .bpp = 1, /* 2 bpp */
- .fetch_planes = MDSS_MDP_PLANE_PSEUDO_PLANAR,
- .chroma_sample = MDSS_MDP_CHROMA_420,
- .element1 = C1_B_Cb,
- .element0 = C2_R_Cr,
- },
- [MDP_Y_CBCR_H2V2] = {
- .format = MDP_Y_CBCR_H2V2,
- .is_yuv = 1,
- .a_bit = 0,
- .r_bit = 3, /* R, 8 bits */
- .b_bit = 3, /* B, 8 bits */
- .g_bit = 3, /* G, 8 bits */
- .alpha_enable = 0,
- .unpack_tight = 1,
- .unpack_align_msb = 0,
- .unpack_count = 1, /* 2 */
- .bpp = 1, /* 2 bpp */
- .fetch_planes = MDSS_MDP_PLANE_PSEUDO_PLANAR,
- .chroma_sample = MDSS_MDP_CHROMA_420,
- .element1 = C2_R_Cr,
- .element0 = C1_B_Cb,
- },
- [MDP_Y_CR_CB_H2V2] = {
- .format = MDP_Y_CR_CB_H2V2,
- .is_yuv = 1,
- .a_bit = 0,
- .r_bit = 3, /* R, 8 bits */
- .b_bit = 3, /* B, 8 bits */
- .g_bit = 3, /* G, 8 bits */
- .alpha_enable = 0,
- .unpack_tight = 1,
- .unpack_align_msb = 0,
- .unpack_count = 1, /* 2 */
- .bpp = 1, /* 2 bpp */
- .fetch_planes = MDSS_MDP_PLANE_PLANAR,
- .chroma_sample = MDSS_MDP_CHROMA_420,
- },
- [MDP_Y_CB_CR_H2V2] = {
- .format = MDP_Y_CB_CR_H2V2,
- .is_yuv = 1,
- .a_bit = 0,
- .r_bit = 3, /* R, 8 bits */
- .b_bit = 3, /* B, 8 bits */
- .g_bit = 3, /* G, 8 bits */
- .alpha_enable = 0,
- .unpack_tight = 1,
- .unpack_align_msb = 0,
- .unpack_count = 1, /* 2 */
- .bpp = 1, /* 2 bpp */
- .fetch_planes = MDSS_MDP_PLANE_PLANAR,
- .chroma_sample = MDSS_MDP_CHROMA_420,
- },
- [MDP_Y_CR_CB_GH2V2] = {
- .format = MDP_Y_CR_CB_GH2V2,
- .is_yuv = 1,
- .a_bit = 0,
- .r_bit = 3, /* R, 8 bits */
- .b_bit = 3, /* B, 8 bits */
- .g_bit = 3, /* G, 8 bits */
- .alpha_enable = 0,
- .unpack_tight = 1,
- .unpack_align_msb = 0,
- .unpack_count = 1, /* 2 */
- .bpp = 1, /* 2 bpp */
- .fetch_planes = MDSS_MDP_PLANE_PLANAR,
- .chroma_sample = MDSS_MDP_CHROMA_420,
+ .unpack_count = 4,
+ .bpp = 2,
+ .element = { C1_B_Cb, C0_G_Y, C2_R_Cr, C0_G_Y },
},
};
#endif
diff --git a/drivers/video/msm/mdss/mdss_mdp_intf_writeback.c b/drivers/video/msm/mdss/mdss_mdp_intf_writeback.c
index af422b7..8b4434e 100644
--- a/drivers/video/msm/mdss/mdss_mdp_intf_writeback.c
+++ b/drivers/video/msm/mdss/mdss_mdp_intf_writeback.c
@@ -145,20 +145,24 @@
dst_format = (chroma_samp << 23) |
(fmt->fetch_planes << 19) |
- (fmt->unpack_align_msb << 18) |
- (fmt->unpack_tight << 17) |
- (fmt->unpack_count << 12) |
- (fmt->bpp << 9) |
- (fmt->alpha_enable << 8) |
- (fmt->a_bit << 6) |
- (fmt->r_bit << 4) |
- (fmt->b_bit << 2) |
- (fmt->g_bit << 0);
+ (fmt->bits[C3_ALPHA] << 6) |
+ (fmt->bits[C2_R_Cr] << 4) |
+ (fmt->bits[C1_B_Cb] << 2) |
+ (fmt->bits[C0_G_Y] << 0);
- pattern = (fmt->element3 << 24) |
- (fmt->element2 << 15) |
- (fmt->element1 << 8) |
- (fmt->element0 << 0);
+ if (fmt->alpha_enable)
+ dst_format |= BIT(8); /* DSTC3_EN */
+
+ if (fmt->fetch_planes != MDSS_MDP_PLANE_PLANAR) {
+ pattern = (fmt->element[3] << 24) | (fmt->element[2] << 15) |
+ (fmt->element[1] << 8) | (fmt->element[0] << 0);
+ dst_format |= (fmt->unpack_align_msb << 18) |
+ (fmt->unpack_tight << 17) |
+ ((fmt->unpack_count - 1) << 12) |
+ ((fmt->bpp - 1) << 9);
+ } else {
+ pattern = 0;
+ }
ystride0 = (ctx->dst_planes.ystride[0]) |
(ctx->dst_planes.ystride[1] << 16);
diff --git a/drivers/video/msm/mdss/mdss_mdp_pipe.c b/drivers/video/msm/mdss/mdss_mdp_pipe.c
index 9a8260f..2e45760 100644
--- a/drivers/video/msm/mdss/mdss_mdp_pipe.c
+++ b/drivers/video/msm/mdss/mdss_mdp_pipe.c
@@ -363,6 +363,12 @@
}
chroma_sample = pipe->src_fmt->chroma_sample;
+ if (pipe->flags & MDP_SOURCE_ROTATED_90) {
+ if (chroma_sample == MDSS_MDP_CHROMA_H1V2)
+ chroma_sample = MDSS_MDP_CHROMA_H2V1;
+ else if (chroma_sample == MDSS_MDP_CHROMA_H2V1)
+ chroma_sample = MDSS_MDP_CHROMA_H1V2;
+ }
if ((pipe->src.h != pipe->dst.h) ||
(chroma_sample == MDSS_MDP_CHROMA_420) ||
@@ -523,7 +529,7 @@
static int mdss_mdp_format_setup(struct mdss_mdp_pipe *pipe)
{
struct mdss_mdp_format_params *fmt;
- u32 rot90, opmode, chroma_samp;
+ u32 opmode, chroma_samp, unpack, src_format;
fmt = pipe->src_fmt;
@@ -536,8 +542,6 @@
pr_debug("pnum=%d format=%d opmode=%x\n", pipe->num, fmt->format,
opmode);
- rot90 = !!(pipe->flags & MDP_ROT_90);
-
chroma_samp = fmt->chroma_sample;
if (pipe->flags & MDP_SOURCE_ROTATED_90) {
if (chroma_samp == MDSS_MDP_CHROMA_H2V1)
@@ -546,26 +550,34 @@
chroma_samp = MDSS_MDP_CHROMA_H2V1;
}
- mdss_mdp_pipe_write(pipe, MDSS_MDP_REG_SSPP_SRC_FORMAT,
- (chroma_samp << 23) |
- (fmt->fetch_planes << 19) |
- (fmt->unpack_align_msb << 18) |
- (fmt->unpack_tight << 17) |
- (fmt->unpack_count << 12) |
- (rot90 << 11) |
- (fmt->bpp << 9) |
- (fmt->alpha_enable << 8) |
- (fmt->a_bit << 6) |
- (fmt->r_bit << 4) |
- (fmt->b_bit << 2) |
- (fmt->g_bit << 0));
+ src_format = (chroma_samp << 23) |
+ (fmt->fetch_planes << 19) |
+ (fmt->bits[C3_ALPHA] << 6) |
+ (fmt->bits[C2_R_Cr] << 4) |
+ (fmt->bits[C1_B_Cb] << 2) |
+ (fmt->bits[C0_G_Y] << 0);
- mdss_mdp_pipe_write(pipe, MDSS_MDP_REG_SSPP_SRC_UNPACK_PATTERN,
- (fmt->element3 << 24) |
- (fmt->element2 << 16) |
- (fmt->element1 << 8) |
- (fmt->element0 << 0));
+ if (pipe->flags & MDP_ROT_90)
+ src_format |= BIT(11); /* ROT90 */
+ if (fmt->alpha_enable &&
+ fmt->fetch_planes != MDSS_MDP_PLANE_INTERLEAVED)
+ src_format |= BIT(8); /* SRCC3_EN */
+
+ if (fmt->fetch_planes != MDSS_MDP_PLANE_PLANAR) {
+ unpack = (fmt->element[3] << 24) | (fmt->element[2] << 16) |
+ (fmt->element[1] << 8) | (fmt->element[0] << 0);
+
+ src_format |= ((fmt->unpack_count - 1) << 12) |
+ (fmt->unpack_tight << 17) |
+ (fmt->unpack_align_msb << 18) |
+ ((fmt->bpp - 1) << 9);
+ } else {
+ unpack = 0;
+ }
+
+ mdss_mdp_pipe_write(pipe, MDSS_MDP_REG_SSPP_SRC_FORMAT, src_format);
+ mdss_mdp_pipe_write(pipe, MDSS_MDP_REG_SSPP_SRC_UNPACK_PATTERN, unpack);
mdss_mdp_pipe_write(pipe, MDSS_MDP_REG_SSPP_SRC_OP_MODE, opmode);
return 0;
@@ -595,17 +607,23 @@
static int mdss_mdp_src_addr_setup(struct mdss_mdp_pipe *pipe,
struct mdss_mdp_data *data)
{
- int ret;
+ int is_rot = pipe->mixer->rotator_mode;
+ int ret = 0;
pr_debug("pnum=%d\n", pipe->num);
- if (pipe->type != MDSS_MDP_PIPE_TYPE_DMA)
+ if (!is_rot)
data->bwc_enabled = pipe->bwc_mode;
ret = mdss_mdp_data_check(data, &pipe->src_planes);
if (ret)
return ret;
+ /* planar format expects YCbCr, swap chroma planes if YCrCb */
+ if (!is_rot && (pipe->src_fmt->fetch_planes == MDSS_MDP_PLANE_PLANAR) &&
+ (pipe->src_fmt->element[0] == C2_R_Cr))
+ swap(data->p[1].addr, data->p[2].addr);
+
mdss_mdp_pipe_write(pipe, MDSS_MDP_REG_SSPP_SRC0_ADDR, data->p[0].addr);
mdss_mdp_pipe_write(pipe, MDSS_MDP_REG_SSPP_SRC1_ADDR, data->p[1].addr);
mdss_mdp_pipe_write(pipe, MDSS_MDP_REG_SSPP_SRC2_ADDR, data->p[2].addr);
diff --git a/drivers/video/msm/mdss/mdss_mdp_util.c b/drivers/video/msm/mdss/mdss_mdp_util.c
index f6b4fce..7f61a14 100644
--- a/drivers/video/msm/mdss/mdss_mdp_util.c
+++ b/drivers/video/msm/mdss/mdss_mdp_util.c
@@ -164,14 +164,16 @@
struct mdss_mdp_format_params *mdss_mdp_get_format_params(u32 format)
{
- struct mdss_mdp_format_params *fmt = NULL;
if (format < MDP_IMGTYPE_LIMIT) {
- fmt = &mdss_mdp_format_map[format];
- if (fmt->format != format)
- fmt = NULL;
+ struct mdss_mdp_format_params *fmt = NULL;
+ int i;
+ for (i = 0; i < ARRAY_SIZE(mdss_mdp_format_map); i++) {
+ fmt = &mdss_mdp_format_map[i];
+ if (format == fmt->format)
+ return fmt;
+ }
}
-
- return fmt;
+ return NULL;
}
int mdss_mdp_get_plane_sizes(u32 format, u32 w, u32 h,
@@ -193,7 +195,7 @@
memset(ps, 0, sizeof(struct mdss_mdp_plane_sizes));
if (fmt->fetch_planes == MDSS_MDP_PLANE_INTERLEAVED) {
- u32 bpp = fmt->bpp + 1;
+ u32 bpp = fmt->bpp;
ps->num_planes = 1;
ps->plane_size[0] = w * h * bpp;
ps->ystride[0] = w * bpp;
@@ -206,16 +208,14 @@
vert = vmap[fmt->chroma_sample];
if (format == MDP_Y_CR_CB_GH2V2) {
- ps->plane_size[0] = ALIGN(w, 16) * h;
- ps->plane_size[1] = ALIGN(w / horiz, 16) * (h / vert);
ps->ystride[0] = ALIGN(w, 16);
ps->ystride[1] = ALIGN(w / horiz, 16);
} else {
- ps->plane_size[0] = w * h;
- ps->plane_size[1] = (w / horiz) * (h / vert);
ps->ystride[0] = w;
ps->ystride[1] = (w / horiz);
}
+ ps->plane_size[0] = ps->ystride[0] * h;
+ ps->plane_size[1] = ps->ystride[1] * (h / vert);
if (fmt->fetch_planes == MDSS_MDP_PLANE_PSEUDO_PLANAR) {
ps->num_planes = 2;
diff --git a/include/linux/msm_mdp.h b/include/linux/msm_mdp.h
index 2519a6e..4dd6907 100644
--- a/include/linux/msm_mdp.h
+++ b/include/linux/msm_mdp.h
@@ -105,6 +105,7 @@
MDP_YCRCB_H1V1, /* YCrCb interleave */
MDP_YCBCR_H1V1, /* YCbCr interleave */
MDP_BGR_565, /* BGR 565 planer */
+ MDP_BGR_888, /* BGR 888 */
MDP_IMGTYPE_LIMIT,
MDP_RGB_BORDERFILL, /* border fill pipe */
MDP_FB_FORMAT = MDP_IMGTYPE2_START, /* framebuffer format */