Merge "tsens: msm8960: Split write ordering for TSENS Enable" into msm-3.0
diff --git a/Documentation/devicetree/bindings/tty/serial/msm_serial.txt b/Documentation/devicetree/bindings/tty/serial/msm_serial.txt
new file mode 100644
index 0000000..943c846
--- /dev/null
+++ b/Documentation/devicetree/bindings/tty/serial/msm_serial.txt
@@ -0,0 +1,15 @@
+* Qualcomm MSM HSUART
+
+Required properties:
+- compatible : one of:
+ - "qcom,msm-lsuart-v14"
+- reg : offset and length of the register set for the device.
+- interrupts : should contain the uart interrupt.
+
+Example:
+
+ serial@19c400000 {
+ compatible = "qcom,msm-lsuart-v14"
+ reg = <0x19c40000 0x1000">;
+ interrupts = <195>;
+ };
diff --git a/arch/arm/Kconfig b/arch/arm/Kconfig
index 4690de3..f34719f 100644
--- a/arch/arm/Kconfig
+++ b/arch/arm/Kconfig
@@ -1606,6 +1606,10 @@
def_bool n
depends on MEMORY_HOTPLUG
+config FIX_MOVABLE_ZONE
+ def_bool n
+ depends on MEMORY_HOTPLUG
+
config DONT_MAP_HOLE_AFTER_MEMBANK0
def_bool n
depends on SPARSEMEM
diff --git a/arch/arm/boot/dts/msmcopper.dts b/arch/arm/boot/dts/msmcopper.dts
index 4e3d66d..52c0b66 100644
--- a/arch/arm/boot/dts/msmcopper.dts
+++ b/arch/arm/boot/dts/msmcopper.dts
@@ -14,4 +14,10 @@
reg = <0xF9000000 0x1000>,
<0xF9002000 0x1000>;
};
+
+ serial@F9684000 {
+ compatible = "qcom,msm-lsuart-v14";
+ reg = <0xF9684000 0x1000>;
+ interrupts = <109>;
+ };
};
diff --git a/arch/arm/configs/msm8660-perf_defconfig b/arch/arm/configs/msm8660-perf_defconfig
index c9082f0..d377460 100644
--- a/arch/arm/configs/msm8660-perf_defconfig
+++ b/arch/arm/configs/msm8660-perf_defconfig
@@ -315,6 +315,8 @@
CONFIG_MT9E013=y
CONFIG_MSM_GEMINI=y
CONFIG_RADIO_TAVARUA=y
+CONFIG_ION=y
+CONFIG_ION_MSM=y
CONFIG_MSM_KGSL=y
CONFIG_KGSL_PER_PROCESS_PAGE_TABLE=y
CONFIG_VIDEO_OUTPUT_CONTROL=y
diff --git a/arch/arm/configs/msm8960_defconfig b/arch/arm/configs/msm8960_defconfig
index 2045ff8..c869beb 100755
--- a/arch/arm/configs/msm8960_defconfig
+++ b/arch/arm/configs/msm8960_defconfig
@@ -195,7 +195,7 @@
CONFIG_BT_BNEP_MC_FILTER=y
CONFIG_BT_BNEP_PROTO_FILTER=y
CONFIG_BT_HIDP=y
-CONFIG_BT_HCISMD=m
+CONFIG_BT_HCISMD=y
CONFIG_RFKILL=y
CONFIG_RFKILL_PM=y
CONFIG_BLK_DEV_LOOP=y
@@ -330,6 +330,8 @@
CONFIG_USB_STORAGE_ONETOUCH=y
CONFIG_USB_STORAGE_KARMA=y
CONFIG_USB_STORAGE_CYPRESS_ATACB=y
+CONFIG_USB_SERIAL=y
+CONFIG_USB_SERIAL_QUALCOMM=y
CONFIG_USB_EHSET_TEST_FIXTURE=y
CONFIG_USB_QCOM_DUN_BRIDGE=y
CONFIG_USB_GADGET=y
@@ -340,6 +342,7 @@
CONFIG_MMC=y
CONFIG_MMC_PERF_PROFILING=y
CONFIG_MMC_UNSAFE_RESUME=y
+CONFIG_MMC_CLKGATE=y
CONFIG_MMC_PARANOID_SD_INIT=y
CONFIG_MMC_BLOCK_MINORS=32
CONFIG_MMC_MSM=y
@@ -388,11 +391,18 @@
CONFIG_MAGIC_SYSRQ=y
CONFIG_DEBUG_FS=y
CONFIG_DEBUG_KERNEL=y
+CONFIG_LOCKUP_DETECTOR=y
# CONFIG_SCHED_DEBUG is not set
CONFIG_TIMER_STATS=y
+CONFIG_SLUB_DEBUG_ON=y
# CONFIG_DEBUG_PREEMPT is not set
+CONFIG_DEBUG_SPINLOCK=y
+CONFIG_DEBUG_MUTEXES=y
+CONFIG_DEBUG_SPINLOCK_SLEEP=y
CONFIG_DEBUG_INFO=y
CONFIG_DEBUG_MEMORY_INIT=y
+CONFIG_DEBUG_LIST=y
+CONFIG_DEBUG_PAGEALLOC=y
CONFIG_DYNAMIC_DEBUG=y
CONFIG_DEBUG_USER=y
CONFIG_CRYPTO_SHA256=y
diff --git a/arch/arm/configs/msm9615_defconfig b/arch/arm/configs/msm9615_defconfig
index ec0dc05..714e630 100644
--- a/arch/arm/configs/msm9615_defconfig
+++ b/arch/arm/configs/msm9615_defconfig
@@ -104,7 +104,11 @@
CONFIG_THERMAL=y
CONFIG_THERMAL_TSENS8960=y
CONFIG_MFD_PM8018_CORE=y
-# CONFIG_MFD_PM8XXX_PWM is not set
+CONFIG_MFD_PM8XXX_PWM=y
+CONFIG_NEW_LEDS=y
+CONFIG_LEDS_CLASS=y
+CONFIG_LEDS_PM8XXX=y
+# CONFIG_LEDS_MSM_PMIC is not set
CONFIG_REGULATOR=y
CONFIG_REGULATOR_GPIO=y
# CONFIG_HID_SUPPORT is not set
@@ -217,7 +221,9 @@
CONFIG_LIB80211=m
CONFIG_NETDEVICES=y
CONFIG_WLAN=y
-CONFIG_MSM_RMNET=y
+# CONFIG_MSM_RMNET is not set
+CONFIG_MSM_BAM_DMUX=y
+CONFIG_MSM_RMNET_BAM=y
CONFIG_HOSTAP=m
CONFIG_WIRELESS_EXT=y
CONFIG_WEXT_SPY=y
diff --git a/arch/arm/include/asm/mach/mmc.h b/arch/arm/include/asm/mach/mmc.h
index f138df1..6e55bf3 100644
--- a/arch/arm/include/asm/mach/mmc.h
+++ b/arch/arm/include/asm/mach/mmc.h
@@ -37,6 +37,11 @@
* is set voltage supported for this regulator?
* false => set voltage is not supported
* true => set voltage is supported
+ *
+ * Some regulators (like gpio-regulators, LVS (low voltage swtiches)
+ * PMIC regulators) dont have the capability to call
+ * regulator_set_voltage or regulator_set_optimum_mode
+ * Use this variable to indicate if its a such regulator or not
*/
bool set_voltage_sup;
/* is this regulator enabled? */
diff --git a/arch/arm/include/asm/mmu_writeable.h b/arch/arm/include/asm/mmu_writeable.h
new file mode 100644
index 0000000..b3ce39b
--- /dev/null
+++ b/arch/arm/include/asm/mmu_writeable.h
@@ -0,0 +1,29 @@
+/*
+ * Copyright (c) 2011, Code Aurora Forum. All rights reserved.
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License version 2 and
+ * only version 2 as published by the Free Software Foundation.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ *
+ */
+#ifndef _MMU_WRITEABLE_H
+#define _MMU_WRITEABLE_H
+
+#ifdef CONFIG_STRICT_MEMORY_RWX
+void mem_text_writeable_spinlock(unsigned long *flags);
+void mem_text_address_writeable(unsigned long);
+void mem_text_address_restore(void);
+void mem_text_writeable_spinunlock(unsigned long *flags);
+#else
+static inline void mem_text_writeable_spinlock(unsigned long *flags) {};
+static inline void mem_text_address_writeable(unsigned long addr) {};
+static inline void mem_text_address_restore(void) {};
+static inline void mem_text_writeable_spinunlock(unsigned long *flags) {};
+#endif
+
+#endif
diff --git a/arch/arm/kernel/kprobes.c b/arch/arm/kernel/kprobes.c
index 1656c87..cd5d2cc 100644
--- a/arch/arm/kernel/kprobes.c
+++ b/arch/arm/kernel/kprobes.c
@@ -27,6 +27,7 @@
#include <linux/stringify.h>
#include <asm/traps.h>
#include <asm/cacheflush.h>
+#include <asm/mmu_writeable.h>
#define MIN_STACK_SIZE(addr) \
min((unsigned long)MAX_STACK_SIZE, \
@@ -81,8 +82,14 @@
void __kprobes arch_arm_kprobe(struct kprobe *p)
{
+ unsigned long flags;
+
+ mem_text_writeable_spinlock(&flags);
+ mem_text_address_writeable((unsigned long)p->addr);
*p->addr = KPROBE_BREAKPOINT_INSTRUCTION;
flush_insns(p->addr, 1);
+ mem_text_address_restore();
+ mem_text_writeable_spinunlock(&flags);
}
/*
@@ -94,9 +101,14 @@
*/
int __kprobes __arch_disarm_kprobe(void *p)
{
+ unsigned long flags;
struct kprobe *kp = p;
+ mem_text_writeable_spinlock(&flags);
+ mem_text_address_writeable((unsigned long)kp->addr);
*kp->addr = kp->opcode;
flush_insns(kp->addr, 1);
+ mem_text_address_restore();
+ mem_text_writeable_spinunlock(&flags);
return 0;
}
diff --git a/arch/arm/mach-msm/Kconfig b/arch/arm/mach-msm/Kconfig
index 756603e..66d1044 100644
--- a/arch/arm/mach-msm/Kconfig
+++ b/arch/arm/mach-msm/Kconfig
@@ -29,6 +29,7 @@
select MSM_GPIOMUX
select REGULATOR
select MULTI_IRQ_HANDLER
+ select MSM_PROC_COMM_REGULATOR
config ARCH_MSM7X30
bool "MSM7x30"
@@ -1573,6 +1574,16 @@
This bug is not applicable to any ScorpionMP or Scorpion Uni 65nm(SC65U) cores.
+config MSM_BUSPM_DEV
+ tristate "MSM Bus Performance Monitor Kernel Module"
+ depends on (ARCH_MSM8X60 || ARCH_MSM8960)
+ default m
+ help
+ This kernel module is used to mmap() hardware registers for the
+ performance monitors, counters, etc. The module can also be used to
+ allocate physical memory which is used by bus performance hardware to
+ dump performance data.
+
config MSM_RPM_LOG
tristate "MSM Resource Power Manager Log Driver"
depends on DEBUG_FS
diff --git a/arch/arm/mach-msm/Makefile b/arch/arm/mach-msm/Makefile
index 8693875..74f312a 100644
--- a/arch/arm/mach-msm/Makefile
+++ b/arch/arm/mach-msm/Makefile
@@ -254,6 +254,7 @@
obj-$(CONFIG_MSM_RPM_LOG) += rpm_log.o
obj-$(CONFIG_MSM_XO) += msm_xo.o
obj-$(CONFIG_MSM_BUS_SCALING) += msm_bus/
+obj-$(CONFIG_MSM_BUSPM_DEV) += msm-buspm-dev.o
obj-$(CONFIG_MSM_IOMMU) += iommu.o iommu_dev.o devices-iommu.o iommu_domains.o
@@ -289,6 +290,8 @@
obj-$(CONFIG_MSM_PROC_COMM_REGULATOR) += proccomm-regulator.o
ifdef CONFIG_MSM_PROC_COMM_REGULATOR
+obj-$(CONFIG_MACH_MSM7X27_SURF) += board-msm7627-regulator.o
+obj-$(CONFIG_MACH_MSM7X27_FFA) += board-msm7627-regulator.o
obj-$(CONFIG_ARCH_MSM7X30) += board-msm7x30-regulator.o
obj-$(CONFIG_ARCH_MSM7X27A) += board-msm7x27a-regulator.o
endif
diff --git a/arch/arm/mach-msm/acpuclock-8960.c b/arch/arm/mach-msm/acpuclock-8960.c
index 93629d1..659c292 100644
--- a/arch/arm/mach-msm/acpuclock-8960.c
+++ b/arch/arm/mach-msm/acpuclock-8960.c
@@ -33,6 +33,7 @@
#include <mach/msm_bus_board.h>
#include <mach/socinfo.h>
#include <mach/msm-krait-l2-accessors.h>
+#include <mach/rpm-regulator.h>
#include "acpuclock.h"
@@ -50,6 +51,7 @@
#define PRI_SRC_SEL_HFPLL 1
#define PRI_SRC_SEL_HFPLL_DIV2 2
#define SEC_SRC_SEL_QSB 0
+#define SEC_SRC_SEL_AUX 2
/* HFPLL registers offsets. */
#define HFPLL_MODE 0x00
@@ -87,6 +89,8 @@
VREG_CORE,
VREG_MEM,
VREG_DIG,
+ VREG_HFPLL_A,
+ VREG_HFPLL_B,
NUM_VREG
};
@@ -143,6 +147,12 @@
.vreg[VREG_DIG] = { "krait0_dig", 1150000,
RPM_VREG_VOTER1,
RPM_VREG_ID_PM8921_S3 },
+ .vreg[VREG_HFPLL_A] = { "hfpll", 2200000,
+ RPM_VREG_VOTER1,
+ RPM_VREG_ID_PM8921_S8 },
+ .vreg[VREG_HFPLL_B] = { "hfpll", 1800000,
+ RPM_VREG_VOTER1,
+ RPM_VREG_ID_PM8921_L23 },
},
[CPU1] = {
.hfpll_base = MSM_HFPLL_BASE + 0x300,
@@ -155,11 +165,23 @@
.vreg[VREG_DIG] = { "krait0_dig", 1150000,
RPM_VREG_VOTER2,
RPM_VREG_ID_PM8921_S3 },
+ .vreg[VREG_HFPLL_A] = { "hfpll", 2200000,
+ RPM_VREG_VOTER2,
+ RPM_VREG_ID_PM8921_S8 },
+ .vreg[VREG_HFPLL_B] = { "hfpll", 1800000,
+ RPM_VREG_VOTER2,
+ RPM_VREG_ID_PM8921_L23 },
},
[L2] = {
.hfpll_base = MSM_HFPLL_BASE + 0x400,
.aux_clk_sel = MSM_APCS_GCC_BASE + 0x028,
.l2cpmr_iaddr = L2CPMR_IADDR,
+ .vreg[VREG_HFPLL_A] = { "hfpll", 2200000,
+ RPM_VREG_VOTER6,
+ RPM_VREG_ID_PM8921_S8 },
+ .vreg[VREG_HFPLL_B] = { "hfpll", 1800000,
+ RPM_VREG_VOTER6,
+ RPM_VREG_ID_PM8921_L23 },
},
};
@@ -410,6 +432,23 @@
/* Enable an already-configured HFPLL. */
static void hfpll_enable(struct scalable *sc)
{
+ int rc;
+
+ if (cpu_is_msm8960()) {
+ rc = rpm_vreg_set_voltage(sc->vreg[VREG_HFPLL_A].rpm_vreg_id,
+ sc->vreg[VREG_HFPLL_A].rpm_vreg_voter, 2200000,
+ 2200000, 0);
+ if (rc)
+ pr_err("%s regulator enable failed (%d)\n",
+ sc->vreg[VREG_HFPLL_A].name, rc);
+ rc = rpm_vreg_set_voltage(sc->vreg[VREG_HFPLL_B].rpm_vreg_id,
+ sc->vreg[VREG_HFPLL_B].rpm_vreg_voter, 1800000,
+ 1800000, 0);
+ if (rc)
+ pr_err("%s regulator enable failed (%d)\n",
+ sc->vreg[VREG_HFPLL_B].name, rc);
+ }
+
/* Disable PLL bypass mode. */
writel_relaxed(0x2, sc->hfpll_base + HFPLL_MODE);
@@ -434,11 +473,28 @@
/* Disable a HFPLL for power-savings or while its being reprogrammed. */
static void hfpll_disable(struct scalable *sc)
{
+ int rc;
+
/*
* Disable the PLL output, disable test mode, enable
* the bypass mode, and assert the reset.
*/
writel_relaxed(0, sc->hfpll_base + HFPLL_MODE);
+
+ if (cpu_is_msm8960()) {
+ rc = rpm_vreg_set_voltage(sc->vreg[VREG_HFPLL_B].rpm_vreg_id,
+ sc->vreg[VREG_HFPLL_B].rpm_vreg_voter, 0,
+ 0, 0);
+ if (rc)
+ pr_err("%s regulator enable failed (%d)\n",
+ sc->vreg[VREG_HFPLL_B].name, rc);
+ rc = rpm_vreg_set_voltage(sc->vreg[VREG_HFPLL_A].rpm_vreg_id,
+ sc->vreg[VREG_HFPLL_A].rpm_vreg_voter, 0,
+ 0, 0);
+ if (rc)
+ pr_err("%s regulator enable failed (%d)\n",
+ sc->vreg[VREG_HFPLL_A].name, rc);
+ }
}
/* Program the HFPLL rate. Assumes HFPLL is already disabled. */
@@ -493,12 +549,11 @@
return;
if (strt_s->src == HFPLL && tgt_s->src == HFPLL) {
- /* Move CPU to QSB source. */
/*
- * TODO: If using QSB here requires elevating voltages,
- * consider using PLL8 instead.
+ * Move to an always-on source running at a frequency that does
+ * not require an elevated CPU voltage. PLL8 is used here.
*/
- set_sec_clk_src(sc, SEC_SRC_SEL_QSB);
+ set_sec_clk_src(sc, SEC_SRC_SEL_AUX);
set_pri_clk_src(sc, PRI_SRC_SEL_SEC_SRC);
/* Program CPU HFPLL. */
@@ -817,24 +872,18 @@
}
}
-#define INIT_QSB_ID 0
-#define INIT_HFPLL_ID 1
/* Set initial rate for a given core. */
static void __init init_clock_sources(struct scalable *sc,
struct core_speed *tgt_s)
{
- uint32_t pri_src, regval;
+ uint32_t regval;
- /*
- * If the HFPLL is in use, program AUX source for QSB, switch to it,
- * re-initialize the HFPLL, and switch back to the HFPLL. Otherwise,
- * the HFPLL is not in use, so we can switch directly to it.
- */
- pri_src = get_pri_clk_src(scalable);
- if (pri_src == PRI_SRC_SEL_HFPLL || pri_src == PRI_SRC_SEL_HFPLL_DIV2) {
- set_sec_clk_src(sc, SEC_SRC_SEL_QSB);
- set_pri_clk_src(sc, PRI_SRC_SEL_SEC_SRC);
- }
+ /* Select PLL8 as AUX source input to the secondary MUX. */
+ writel_relaxed(0x3, sc->aux_clk_sel);
+
+ /* Switch away from the HFPLL while it's re-initialized. */
+ set_sec_clk_src(sc, SEC_SRC_SEL_AUX);
+ set_pri_clk_src(sc, PRI_SRC_SEL_SEC_SRC);
hfpll_init(sc, tgt_s);
/* Set PRI_SRC_SEL_HFPLL_DIV2 divider to div-2. */
@@ -842,9 +891,8 @@
regval &= ~(0x3 << 6);
set_l2_indirect_reg(sc->l2cpmr_iaddr, regval);
- /* Select PLL8 as AUX source input to the secondary MUX. */
- writel_relaxed(0x3, sc->aux_clk_sel);
-
+ /* Switch to the target clock source. */
+ set_sec_clk_src(sc, tgt_s->sec_src_sel);
set_pri_clk_src(sc, tgt_s->pri_src_sel);
sc->current_speed = tgt_s;
diff --git a/arch/arm/mach-msm/bam_dmux.c b/arch/arm/mach-msm/bam_dmux.c
index a9b1a77..0cd8a6e 100644
--- a/arch/arm/mach-msm/bam_dmux.c
+++ b/arch/arm/mach-msm/bam_dmux.c
@@ -139,9 +139,9 @@
static int polling_mode;
static LIST_HEAD(bam_rx_pool);
-static DEFINE_MUTEX(bam_rx_pool_lock);
+static DEFINE_MUTEX(bam_rx_pool_mutexlock);
static LIST_HEAD(bam_tx_pool);
-static DEFINE_MUTEX(bam_tx_pool_lock);
+static DEFINE_SPINLOCK(bam_tx_pool_spinlock);
struct bam_mux_hdr {
uint16_t magic_num;
@@ -157,7 +157,6 @@
static void handle_bam_mux_cmd(struct work_struct *work);
static void rx_timer_work_func(struct work_struct *work);
-static DEFINE_MUTEX(bam_mux_lock);
static DECLARE_WORK(rx_timer_work, rx_timer_work_func);
static struct workqueue_struct *bam_mux_rx_workqueue;
@@ -226,9 +225,9 @@
info->skb = __dev_alloc_skb(BUFFER_SIZE, GFP_KERNEL);
ptr = skb_put(info->skb, BUFFER_SIZE);
- mutex_lock(&bam_rx_pool_lock);
+ mutex_lock(&bam_rx_pool_mutexlock);
list_add_tail(&info->list_node, &bam_rx_pool);
- mutex_unlock(&bam_rx_pool_lock);
+ mutex_unlock(&bam_rx_pool_mutexlock);
/* need a way to handle error case */
info->dma_address = dma_map_single(NULL, ptr, BUFFER_SIZE,
@@ -302,25 +301,25 @@
spin_lock_irqsave(&bam_ch[rx_hdr->ch_id].lock, flags);
bam_ch[rx_hdr->ch_id].status |= BAM_CH_REMOTE_OPEN;
spin_unlock_irqrestore(&bam_ch[rx_hdr->ch_id].lock, flags);
- dev_kfree_skb_any(rx_skb);
queue_rx();
ret = platform_device_add(bam_ch[rx_hdr->ch_id].pdev);
if (ret)
pr_err("%s: platform_device_add() error: %d\n",
__func__, ret);
+ dev_kfree_skb_any(rx_skb);
break;
case BAM_MUX_HDR_CMD_CLOSE:
/* probably should drop pending write */
spin_lock_irqsave(&bam_ch[rx_hdr->ch_id].lock, flags);
bam_ch[rx_hdr->ch_id].status &= ~BAM_CH_REMOTE_OPEN;
spin_unlock_irqrestore(&bam_ch[rx_hdr->ch_id].lock, flags);
- dev_kfree_skb_any(rx_skb);
queue_rx();
platform_device_unregister(bam_ch[rx_hdr->ch_id].pdev);
bam_ch[rx_hdr->ch_id].pdev =
platform_device_alloc(bam_ch[rx_hdr->ch_id].name, 2);
if (!bam_ch[rx_hdr->ch_id].pdev)
pr_err("%s: platform_device_alloc failed\n", __func__);
+ dev_kfree_skb_any(rx_skb);
break;
default:
pr_err("%s: dropping invalid hdr. magic %x reserved %d cmd %d"
@@ -339,12 +338,10 @@
struct tx_pkt_info *pkt;
dma_addr_t dma_address;
- mutex_lock(&bam_mux_lock);
- pkt = kmalloc(sizeof(struct tx_pkt_info), GFP_KERNEL);
+ pkt = kmalloc(sizeof(struct tx_pkt_info), GFP_ATOMIC);
if (pkt == NULL) {
pr_err("%s: mem alloc for tx_pkt_info failed\n", __func__);
rc = -ENOMEM;
- mutex_unlock(&bam_mux_lock);
return rc;
}
@@ -353,7 +350,6 @@
if (!dma_address) {
pr_err("%s: dma_map_single() failed\n", __func__);
rc = -ENOMEM;
- mutex_unlock(&bam_mux_lock);
return rc;
}
pkt->skb = (struct sk_buff *)(data);
@@ -361,13 +357,19 @@
pkt->dma_address = dma_address;
pkt->is_cmd = 1;
INIT_WORK(&pkt->work, bam_mux_write_done);
- mutex_lock(&bam_tx_pool_lock);
+ spin_lock(&bam_tx_pool_spinlock);
list_add_tail(&pkt->list_node, &bam_tx_pool);
- mutex_unlock(&bam_tx_pool_lock);
+ spin_unlock(&bam_tx_pool_spinlock);
rc = sps_transfer_one(bam_tx_pipe, dma_address, len,
pkt, SPS_IOVEC_FLAG_INT | SPS_IOVEC_FLAG_EOT);
+ if (rc) {
+ DBG("%s sps_transfer_one failed rc=%d\n", __func__, rc);
+ spin_lock(&bam_tx_pool_spinlock);
+ list_del(&pkt->list_node);
+ spin_unlock(&bam_tx_pool_spinlock);
+ kfree(pkt);
+ }
- mutex_unlock(&bam_mux_lock);
ul_packet_written = 1;
return rc;
}
@@ -382,10 +384,10 @@
if (in_global_reset)
return;
- mutex_lock(&bam_tx_pool_lock);
+ spin_lock(&bam_tx_pool_spinlock);
node = bam_tx_pool.next;
list_del(node);
- mutex_unlock(&bam_tx_pool_lock);
+ spin_unlock(&bam_tx_pool_spinlock);
info = container_of(work, struct tx_pkt_info, work);
if (info->is_cmd) {
kfree(info->skb);
@@ -446,7 +448,7 @@
4 - (skb->len & 0x3), GFP_ATOMIC);
if (new_skb == NULL) {
pr_err("%s: cannot allocate skb\n", __func__);
- return -ENOMEM;
+ goto write_fail;
}
dev_kfree_skb_any(skb);
skb = new_skb;
@@ -474,32 +476,43 @@
pkt = kmalloc(sizeof(struct tx_pkt_info), GFP_ATOMIC);
if (pkt == NULL) {
pr_err("%s: mem alloc for tx_pkt_info failed\n", __func__);
- if (new_skb)
- dev_kfree_skb_any(new_skb);
- return -ENOMEM;
+ goto write_fail2;
}
dma_address = dma_map_single(NULL, skb->data, skb->len,
DMA_TO_DEVICE);
if (!dma_address) {
pr_err("%s: dma_map_single() failed\n", __func__);
- if (new_skb)
- dev_kfree_skb_any(new_skb);
- kfree(pkt);
- return -ENOMEM;
+ goto write_fail3;
}
pkt->skb = skb;
pkt->dma_address = dma_address;
pkt->is_cmd = 0;
INIT_WORK(&pkt->work, bam_mux_write_done);
- mutex_lock(&bam_tx_pool_lock);
+ spin_lock(&bam_tx_pool_spinlock);
list_add_tail(&pkt->list_node, &bam_tx_pool);
- mutex_unlock(&bam_tx_pool_lock);
+ spin_unlock(&bam_tx_pool_spinlock);
rc = sps_transfer_one(bam_tx_pipe, dma_address, skb->len,
pkt, SPS_IOVEC_FLAG_INT | SPS_IOVEC_FLAG_EOT);
+ if (rc) {
+ DBG("%s sps_transfer_one failed rc=%d\n", __func__, rc);
+ spin_lock(&bam_tx_pool_spinlock);
+ list_del(&pkt->list_node);
+ spin_unlock(&bam_tx_pool_spinlock);
+ kfree(pkt);
+ }
ul_packet_written = 1;
read_unlock(&ul_wakeup_lock);
return rc;
+
+write_fail3:
+ kfree(pkt);
+write_fail2:
+ if (new_skb)
+ dev_kfree_skb_any(new_skb);
+write_fail:
+ read_unlock(&ul_wakeup_lock);
+ return -ENOMEM;
}
int msm_bam_dmux_open(uint32_t id, void *priv,
@@ -597,9 +610,10 @@
return 0;
}
- hdr = kmalloc(sizeof(struct bam_mux_hdr), GFP_KERNEL);
+ hdr = kmalloc(sizeof(struct bam_mux_hdr), GFP_ATOMIC);
if (hdr == NULL) {
pr_err("%s: hdr kmalloc failed. ch: %d\n", __func__, id);
+ read_unlock(&ul_wakeup_lock);
return -ENOMEM;
}
hdr->magic_num = BAM_MUX_HDR_MAGIC_NO;
@@ -634,10 +648,10 @@
if (iov.addr == 0)
break;
inactive_cycles = 0;
- mutex_lock(&bam_rx_pool_lock);
+ mutex_lock(&bam_rx_pool_mutexlock);
node = bam_rx_pool.next;
list_del(node);
- mutex_unlock(&bam_rx_pool_lock);
+ mutex_unlock(&bam_rx_pool_mutexlock);
info = container_of(node, struct rx_pkt_info,
list_node);
handle_bam_mux_cmd(&info->work);
@@ -680,10 +694,10 @@
if (iov.addr == 0)
return;
inactive_cycles = 0;
- mutex_lock(&bam_rx_pool_lock);
+ mutex_lock(&bam_rx_pool_mutexlock);
node = bam_rx_pool.next;
list_del(node);
- mutex_unlock(&bam_rx_pool_lock);
+ mutex_unlock(&bam_rx_pool_mutexlock);
info = container_of(node, struct rx_pkt_info,
list_node);
handle_bam_mux_cmd(&info->work);
@@ -971,7 +985,7 @@
}
}
/*cleanup UL*/
- mutex_lock(&bam_tx_pool_lock);
+ spin_lock(&bam_tx_pool_spinlock);
while (!list_empty(&bam_tx_pool)) {
node = bam_tx_pool.next;
list_del(node);
@@ -990,7 +1004,7 @@
}
kfree(info);
}
- mutex_unlock(&bam_tx_pool_lock);
+ spin_unlock(&bam_tx_pool_spinlock);
smsm_change_state(SMSM_APPS_STATE, SMSM_A2_POWER_CONTROL, 0);
return NOTIFY_DONE;
diff --git a/arch/arm/mach-msm/board-9615-regulator.c b/arch/arm/mach-msm/board-9615-regulator.c
index 6568bef..c4b7c5a 100644
--- a/arch/arm/mach-msm/board-9615-regulator.c
+++ b/arch/arm/mach-msm/board-9615-regulator.c
@@ -61,6 +61,7 @@
};
VREG_CONSUMERS(L13) = {
REGULATOR_SUPPLY("8018_l13", NULL),
+ REGULATOR_SUPPLY("sdc_vddp", "msm_sdcc.1"),
};
VREG_CONSUMERS(L14) = {
REGULATOR_SUPPLY("8018_l14", NULL),
@@ -86,6 +87,7 @@
};
VREG_CONSUMERS(EXT_2P95V) = {
REGULATOR_SUPPLY("ext_2p95v", NULL),
+ REGULATOR_SUPPLY("sdc_vdd", "msm_sdcc.1"),
};
#define PM8018_VREG_INIT(_id, _min_uV, _max_uV, _modes, _ops, _apply_uV, \
@@ -288,7 +290,7 @@
RPM_LDO(L10, 0, 1, 0, 1050000, 1050000, "8018_s5", 0, 0),
RPM_LDO(L11, 0, 1, 0, 1050000, 1050000, "8018_s5", 0, 0),
RPM_LDO(L12, 0, 1, 0, 1050000, 1050000, "8018_s5", 0, 0),
- RPM_LDO(L13, 0, 1, 0, 2950000, 2950000, NULL, 0, 0),
+ RPM_LDO(L13, 0, 1, 0, 1850000, 2950000, NULL, 0, 0),
RPM_LDO(L14, 0, 1, 0, 2850000, 2850000, NULL, 0, 0),
/* ID a_on pd ss supply */
diff --git a/arch/arm/mach-msm/board-9615.c b/arch/arm/mach-msm/board-9615.c
index b0a3d0f..755132b 100644
--- a/arch/arm/mach-msm/board-9615.c
+++ b/arch/arm/mach-msm/board-9615.c
@@ -25,6 +25,8 @@
#include <linux/usb/android.h>
#include <linux/usb/msm_hsusb.h>
#include <linux/mfd/pm8xxx/pm8xxx-adc.h>
+#include <linux/leds.h>
+#include <linux/leds-pm8xxx.h>
#include "timer.h"
#include "devices.h"
#include "board-9615.h"
@@ -94,6 +96,42 @@
.priority = 0,
};
+#define PM8018_LED_KB_MAX_CURRENT 20 /* I = 20mA */
+#define PM8XXX_LED_PWM_PERIOD_US 1000
+
+/**
+ * PM8XXX_PWM_CHANNEL_NONE shall be used when LED shall not be
+ * driven using PWM feature.
+ */
+#define PM8XXX_PWM_CHANNEL_NONE -1
+
+static struct led_info pm8018_led_info[] = {
+ [0] = {
+ .name = "led:kb",
+ },
+};
+
+static struct led_platform_data pm8018_led_core_pdata = {
+ .num_leds = ARRAY_SIZE(pm8018_led_info),
+ .leds = pm8018_led_info,
+};
+
+static struct pm8xxx_led_config pm8018_led_configs[] = {
+ [0] = {
+ .id = PM8XXX_ID_LED_KB_LIGHT,
+ .mode = PM8XXX_LED_MODE_PWM3,
+ .max_current = PM8018_LED_KB_MAX_CURRENT,
+ .pwm_channel = 2,
+ .pwm_period_us = PM8XXX_LED_PWM_PERIOD_US,
+ },
+};
+
+static struct pm8xxx_led_platform_data pm8xxx_leds_pdata = {
+ .led_core = &pm8018_led_core_pdata,
+ .configs = pm8018_led_configs,
+ .num_configs = ARRAY_SIZE(pm8018_led_configs),
+};
+
static struct pm8018_platform_data pm8018_platform_data __devinitdata = {
.irq_pdata = &pm8xxx_irq_pdata,
.gpio_pdata = &pm8xxx_gpio_pdata,
@@ -103,6 +141,7 @@
.misc_pdata = &pm8xxx_misc_pdata,
.regulator_pdatas = msm_pm8018_regulator_pdata,
.adc_pdata = &pm8018_adc_pdata,
+ .leds_pdata = &pm8xxx_leds_pdata,
};
static struct msm_ssbi_platform_data msm9615_ssbi_pm8018_pdata __devinitdata = {
@@ -242,7 +281,6 @@
#if (defined(CONFIG_MMC_MSM_SDC1_SUPPORT)\
|| defined(CONFIG_MMC_MSM_SDC2_SUPPORT))
-#define GPIO_SDCARD_PWR_EN 18
#define GPIO_SDC1_HW_DET 80
#define GPIO_SDC2_DAT1_WAKEUP 26
@@ -254,6 +292,51 @@
};
#ifdef CONFIG_MMC_MSM_SDC1_SUPPORT
+/* All SDCC controllers requires VDD/VCC voltage */
+static struct msm_mmc_reg_data mmc_vdd_reg_data[MAX_SDCC_CONTROLLER] = {
+ /* SDCC1 : External card slot connected */
+ [SDCC1] = {
+ .name = "sdc_vdd",
+ /*
+ * This is a gpio-regulator and does not support
+ * regulator_set_voltage and regulator_set_optimum_mode
+ */
+ .set_voltage_sup = false,
+ .high_vol_level = 2950000,
+ .low_vol_level = 2950000,
+ .hpm_uA = 600000, /* 600mA */
+ }
+};
+
+/* All SDCC controllers may require voting for VDD PAD voltage */
+static struct msm_mmc_reg_data mmc_vddp_reg_data[MAX_SDCC_CONTROLLER] = {
+ /* SDCC1 : External card slot connected */
+ [SDCC1] = {
+ .name = "sdc_vddp",
+ .set_voltage_sup = true,
+ .high_vol_level = 2950000,
+ .low_vol_level = 1850000,
+ .always_on = true,
+ .lpm_sup = true,
+ /* Max. Active current required is 16 mA */
+ .hpm_uA = 16000,
+ /*
+ * Sleep current required is ~300 uA. But min. vote can be
+ * in terms of mA (min. 1 mA). So let's vote for 2 mA
+ * during sleep.
+ */
+ .lpm_uA = 2000,
+ }
+};
+
+static struct msm_mmc_slot_reg_data mmc_slot_vreg_data[MAX_SDCC_CONTROLLER] = {
+ /* SDCC1 : External card slot connected */
+ [SDCC1] = {
+ .vdd_data = &mmc_vdd_reg_data[SDCC1],
+ .vddp_data = &mmc_vddp_reg_data[SDCC1],
+ }
+};
+
/* SDC1 pad data */
static struct msm_mmc_pad_drv sdc1_pad_drv_on_cfg[] = {
{TLMM_HDRV_SDC1_CLK, GPIO_CFG_16MA},
@@ -417,8 +500,9 @@
.mmc_bus_width = MMC_CAP_4_BIT_DATA,
.sup_clk_table = sdc1_sup_clk_rates,
.sup_clk_cnt = ARRAY_SIZE(sdc1_sup_clk_rates),
- .pclk_src_dfab = 1,
+ .pclk_src_dfab = true,
.sdcc_v4_sup = true,
+ .vreg_data = &mmc_slot_vreg_data[SDCC1],
.pin_data = &mmc_slot_pin_data[SDCC1],
#ifdef CONFIG_MMC_MSM_CARD_HW_DETECTION
.status_gpio = GPIO_SDC1_HW_DET,
@@ -455,32 +539,16 @@
static void __init msm9615_init_mmc(void)
{
- int ret;
-
if (msm9615_sdc1_pdata) {
- ret = gpio_request(GPIO_SDCARD_PWR_EN, "SDCARD_PWR_EN");
-
- if (ret) {
- pr_err("%s: sdcc1: Error requesting GPIO "
- "SDCARD_PWR_EN:%d\n", __func__, ret);
- } else {
- ret = gpio_direction_output(GPIO_SDCARD_PWR_EN, 1);
- if (ret) {
- pr_err("%s: sdcc1: Error setting o/p direction"
- " for GPIO SDCARD_PWR_EN:%d\n",
- __func__, ret);
- gpio_free(GPIO_SDCARD_PWR_EN);
- } else {
- msm_add_sdcc(1, msm9615_sdc1_pdata);
- }
- }
+ /* SDC1: External card slot for SD/MMC cards */
+ msm_add_sdcc(1, msm9615_sdc1_pdata);
}
if (msm9615_sdc2_pdata) {
msm_gpiomux_install(msm9615_sdcc2_configs,
ARRAY_SIZE(msm9615_sdcc2_configs));
- /* SDC2: External card slot */
+ /* SDC2: External card slot used for WLAN */
msm_add_sdcc(2, msm9615_sdc2_pdata);
}
}
@@ -596,6 +664,7 @@
defined(CONFIG_CRYPTO_DEV_QCEDEV_MODULE)
&msm9615_qcedev_device,
#endif
+ &msm9615_device_watchdog,
};
static void __init msm9615_i2c_init(void)
diff --git a/arch/arm/mach-msm/board-apq8064.c b/arch/arm/mach-msm/board-apq8064.c
index 4aa6abe..88ce818 100644
--- a/arch/arm/mach-msm/board-apq8064.c
+++ b/arch/arm/mach-msm/board-apq8064.c
@@ -38,6 +38,7 @@
#include <linux/bootmem.h>
#include <asm/setup.h>
+#include "msm_watchdog.h"
#include "board-apq8064.h"
#define MSM_PMEM_KERNEL_EBI1_SIZE 0x600000
@@ -493,6 +494,7 @@
&android_pmem_device,
&android_pmem_adsp_device,
&android_pmem_audio_device,
+ &msm8064_device_watchdog,
};
static struct platform_device *sim_devices[] __initdata = {
@@ -733,6 +735,10 @@
static void __init apq8064_sim_init(void)
{
+ struct msm_watchdog_pdata *wdog_pdata = (struct msm_watchdog_pdata *)
+ &msm8064_device_watchdog.dev.platform_data;
+
+ wdog_pdata->bark_time = 15000;
apq8064_common_init();
platform_add_devices(sim_devices, ARRAY_SIZE(sim_devices));
}
diff --git a/arch/arm/mach-msm/board-copper.c b/arch/arm/mach-msm/board-copper.c
index 496e1f4..f35d493 100644
--- a/arch/arm/mach-msm/board-copper.c
+++ b/arch/arm/mach-msm/board-copper.c
@@ -74,6 +74,8 @@
}
static struct clk_lookup msm_clocks_dummy[] = {
+ CLK_DUMMY("core_clk", BLSP2_UART_CLK, "msm_serial_hsl.0", OFF),
+ CLK_DUMMY("iface_clk", BLSP2_UART_CLK, "msm_serial_hsl.0", OFF),
};
struct clock_init_data msm_dummy_clock_init_data __initdata = {
@@ -82,6 +84,8 @@
};
static struct of_dev_auxdata msm_copper_auxdata_lookup[] __initdata = {
+ OF_DEV_AUXDATA("qcom,msm-lsuart-v14", 0xF9684000, \
+ "msm_serial_hsl.0", NULL),
{}
};
diff --git a/arch/arm/mach-msm/board-msm7627-regulator.c b/arch/arm/mach-msm/board-msm7627-regulator.c
new file mode 100644
index 0000000..2ecda72c
--- /dev/null
+++ b/arch/arm/mach-msm/board-msm7627-regulator.c
@@ -0,0 +1,221 @@
+/*
+ * Copyright (c) 2011, Code Aurora Forum. All rights reserved.
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License version 2 and
+ * only version 2 as published by the Free Software Foundation.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ */
+
+#include "board-msm7627-regulator.h"
+
+#define PCOM_VREG_CONSUMERS(name) \
+ static struct regulator_consumer_supply __pcom_vreg_supply_##name[]
+
+#define PCOM_VREG_CONSTRAINT_LVSW(_name, _always_on, _boot_on, _supply_uV) \
+{ \
+ .name = #_name, \
+ .min_uV = 0, \
+ .max_uV = 0, \
+ .input_uV = _supply_uV, \
+ .valid_modes_mask = REGULATOR_MODE_NORMAL, \
+ .valid_ops_mask = REGULATOR_CHANGE_STATUS, \
+ .apply_uV = 0, \
+ .boot_on = _boot_on, \
+ .always_on = _always_on \
+}
+
+#define PCOM_VREG_CONSTRAINT_DYN(_name, _min_uV, _max_uV, _always_on, \
+ _boot_on, _apply_uV, _supply_uV) \
+{ \
+ .name = #_name, \
+ .min_uV = _min_uV, \
+ .max_uV = _max_uV, \
+ .valid_modes_mask = REGULATOR_MODE_NORMAL, \
+ .valid_ops_mask = REGULATOR_CHANGE_VOLTAGE | REGULATOR_CHANGE_STATUS, \
+ .input_uV = _supply_uV, \
+ .apply_uV = _apply_uV, \
+ .boot_on = _boot_on, \
+ .always_on = _always_on \
+}
+
+
+#define PCOM_VREG_INIT(_name, _supply, _constraints)\
+{ \
+ .supply_regulator = _supply, \
+ .consumer_supplies = __pcom_vreg_supply_##_name, \
+ .num_consumer_supplies = ARRAY_SIZE(__pcom_vreg_supply_##_name), \
+ .constraints = _constraints \
+}
+
+#define PCOM_VREG_SMP(_name, _id, _supply, _min_uV, _max_uV, _rise_time, \
+ _pulldown, _always_on, _boot_on, _apply_uV, _supply_uV) \
+{ \
+ .init_data = PCOM_VREG_INIT(_name, _supply, \
+ PCOM_VREG_CONSTRAINT_DYN(_name, _min_uV, _max_uV, _always_on, \
+ _boot_on, _apply_uV, _supply_uV)), \
+ .id = _id, \
+ .rise_time = _rise_time, \
+ .pulldown = _pulldown, \
+ .negative = 0, \
+}
+
+#define PCOM_VREG_LDO PCOM_VREG_SMP
+
+PCOM_VREG_CONSUMERS(smps0) = {
+ REGULATOR_SUPPLY("smps0", NULL),
+ REGULATOR_SUPPLY("msmc1", NULL),
+};
+
+PCOM_VREG_CONSUMERS(smps1) = {
+ REGULATOR_SUPPLY("smps1", NULL),
+ REGULATOR_SUPPLY("msmc2", NULL),
+};
+
+PCOM_VREG_CONSUMERS(smps2) = {
+ REGULATOR_SUPPLY("smps2", NULL),
+ REGULATOR_SUPPLY("pa", NULL),
+};
+
+PCOM_VREG_CONSUMERS(smps3) = {
+ REGULATOR_SUPPLY("smps3", NULL),
+ REGULATOR_SUPPLY("msme1", NULL),
+};
+
+PCOM_VREG_CONSUMERS(ldo00) = {
+ REGULATOR_SUPPLY("ldo00", NULL),
+ REGULATOR_SUPPLY("gp3", NULL),
+};
+
+PCOM_VREG_CONSUMERS(ldo01) = {
+ REGULATOR_SUPPLY("ldo01", NULL),
+ REGULATOR_SUPPLY("msma", NULL),
+};
+
+PCOM_VREG_CONSUMERS(ldo02) = {
+ REGULATOR_SUPPLY("ldo02", NULL),
+ REGULATOR_SUPPLY("msmp", NULL),
+};
+
+PCOM_VREG_CONSUMERS(ldo03) = {
+ REGULATOR_SUPPLY("ldo03", NULL),
+ REGULATOR_SUPPLY("ruim", NULL),
+};
+
+PCOM_VREG_CONSUMERS(ldo04) = {
+ REGULATOR_SUPPLY("ldo04", NULL),
+ REGULATOR_SUPPLY("tcxo", NULL),
+};
+
+PCOM_VREG_CONSUMERS(ldo05) = {
+ REGULATOR_SUPPLY("ldo05", NULL),
+ REGULATOR_SUPPLY("mmc", NULL),
+};
+
+PCOM_VREG_CONSUMERS(ldo06) = {
+ REGULATOR_SUPPLY("ldo06", NULL),
+ REGULATOR_SUPPLY("usb", NULL),
+};
+
+PCOM_VREG_CONSUMERS(ldo07) = {
+ REGULATOR_SUPPLY("ldo07", NULL),
+ REGULATOR_SUPPLY("rfrx1", NULL),
+};
+
+PCOM_VREG_CONSUMERS(ldo08) = {
+ REGULATOR_SUPPLY("ldo08", NULL),
+ REGULATOR_SUPPLY("synt", NULL),
+};
+
+PCOM_VREG_CONSUMERS(ldo09) = {
+ REGULATOR_SUPPLY("ldo09", NULL),
+ REGULATOR_SUPPLY("gp1", NULL),
+};
+
+PCOM_VREG_CONSUMERS(ldo10) = {
+ REGULATOR_SUPPLY("ldo10", NULL),
+ REGULATOR_SUPPLY("gp4", NULL),
+};
+
+PCOM_VREG_CONSUMERS(ldo11) = {
+ REGULATOR_SUPPLY("ldo11", NULL),
+ REGULATOR_SUPPLY("gp2", NULL),
+};
+
+PCOM_VREG_CONSUMERS(ldo12) = {
+ REGULATOR_SUPPLY("ldo12", NULL),
+ REGULATOR_SUPPLY("rftx", NULL),
+};
+
+PCOM_VREG_CONSUMERS(ldo13) = {
+ REGULATOR_SUPPLY("ldo13", NULL),
+ REGULATOR_SUPPLY("wlan", NULL),
+};
+
+PCOM_VREG_CONSUMERS(ldo14) = {
+ REGULATOR_SUPPLY("ldo14", NULL),
+ REGULATOR_SUPPLY("rf", NULL),
+};
+
+PCOM_VREG_CONSUMERS(ldo15) = {
+ REGULATOR_SUPPLY("ldo15", NULL),
+ REGULATOR_SUPPLY("gp6", NULL),
+};
+
+PCOM_VREG_CONSUMERS(ldo16) = {
+ REGULATOR_SUPPLY("ldo16", NULL),
+ REGULATOR_SUPPLY("gp5", NULL),
+};
+
+PCOM_VREG_CONSUMERS(ldo17) = {
+ REGULATOR_SUPPLY("ldo17", NULL),
+ REGULATOR_SUPPLY("msme2", NULL),
+};
+
+/**
+ * Minimum and Maximum range for the regulators is as per the
+ * device Datasheet. Actual value used by consumer is between
+ * the provided range.
+ */
+static struct proccomm_regulator_info msm7627_pcom_vreg_info[] = {
+ /* Standard regulators (SMPS and LDO)
+ * R = rise time (us)
+ * P = pulldown (1 = pull down, 0 = float, -1 = don't care)
+ * A = always on
+ * B = boot on
+ * V = automatic voltage set (meaningful for single-voltage regs only)
+ * S = supply voltage (uV)
+ * name id supp min uV max uV R P A B V S */
+ PCOM_VREG_SMP(smps0, 3, NULL, 750000, 3050000, 0, -1, 0, 0, 0, 0),
+ PCOM_VREG_SMP(smps1, 4, NULL, 750000, 3050000, 0, -1, 0, 0, 0, 0),
+ PCOM_VREG_SMP(smps2, 10, NULL, 750000, 3050000, 0, -1, 0, 0, 0, 0),
+ PCOM_VREG_SMP(smps3, 2, NULL, 750000, 3050000, 0, -1, 0, 0, 0, 0),
+ PCOM_VREG_LDO(ldo00, 5, NULL, 2850000, 2850000, 0, -1, 0, 0, 0, 0),
+ PCOM_VREG_LDO(ldo01, 0, NULL, 2600000, 2600000, 0, -1, 0, 0, 0, 0),
+ PCOM_VREG_LDO(ldo02, 1, NULL, 2600000, 2600000, 0, -1, 0, 0, 0, 0),
+ PCOM_VREG_LDO(ldo03, 19, NULL, 2850000, 2850000, 0, -1, 0, 0, 0, 0),
+ PCOM_VREG_LDO(ldo04, 9, NULL, 2850000, 2850000, 0, -1, 0, 0, 0, 0),
+ PCOM_VREG_LDO(ldo05, 18, NULL, 2850000, 2850000, 0, -1, 0, 0, 0, 0),
+ PCOM_VREG_LDO(ldo06, 16, NULL, 3300000, 3300000, 0, -1, 0, 0, 0, 0),
+ PCOM_VREG_LDO(ldo07, 12, NULL, 2700000, 2700000, 0, -1, 0, 0, 0, 0),
+ PCOM_VREG_LDO(ldo08, 14, NULL, 2700000, 2700000, 0, -1, 0, 0, 0, 0),
+ PCOM_VREG_LDO(ldo09, 8, NULL, 2900000, 2900000, 0, -1, 0, 0, 0, 0),
+ PCOM_VREG_LDO(ldo10, 7, NULL, 2600000, 2600000, 0, -1, 0, 0, 0, 0),
+ PCOM_VREG_LDO(ldo11, 21, NULL, 1800000, 1800000, 0, -1, 0, 0, 0, 0),
+ PCOM_VREG_LDO(ldo12, 11, NULL, 1800000, 1800000, 0, -1, 0, 0, 0, 0),
+ PCOM_VREG_LDO(ldo13, 15, NULL, 2850000, 2850000, 0, -1, 0, 0, 0, 0),
+ PCOM_VREG_LDO(ldo14, 24, NULL, 2700000, 2700000, 0, -1, 0, 0, 0, 0),
+ PCOM_VREG_LDO(ldo15, 23, NULL, 2600000, 2600000, 0, -1, 0, 0, 0, 0),
+ PCOM_VREG_LDO(ldo16, 22, NULL, 3000000, 3000000, 0, -1, 0, 0, 0, 0),
+ PCOM_VREG_LDO(ldo17, 6, NULL, 1300000, 1300000, 0, -1, 0, 0, 0, 0),
+
+};
+
+struct proccomm_regulator_platform_data msm7627_proccomm_regulator_data = {
+ .regs = msm7627_pcom_vreg_info,
+ .nregs = ARRAY_SIZE(msm7627_pcom_vreg_info)
+};
diff --git a/arch/arm/mach-msm/board-msm7627-regulator.h b/arch/arm/mach-msm/board-msm7627-regulator.h
new file mode 100644
index 0000000..d82c5c0
--- /dev/null
+++ b/arch/arm/mach-msm/board-msm7627-regulator.h
@@ -0,0 +1,21 @@
+/*
+ * Copyright (c) 2011, Code Aurora Forum. All rights reserved.
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License version 2 and
+ * only version 2 as published by the Free Software Foundation.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ */
+
+#ifndef __ARCH_ARM_MACH_MSM_BOARD_7627_REGULATOR_H__
+#define __ARCH_ARM_MACH_MSM_BOARD_7627_REGULATOR_H__
+
+#include "proccomm-regulator.h"
+
+extern struct proccomm_regulator_platform_data msm7627_proccomm_regulator_data;
+
+#endif
diff --git a/arch/arm/mach-msm/board-msm7x27.c b/arch/arm/mach-msm/board-msm7x27.c
index ef1bf2d..3114e42 100644
--- a/arch/arm/mach-msm/board-msm7x27.c
+++ b/arch/arm/mach-msm/board-msm7x27.c
@@ -63,6 +63,7 @@
#include <mach/usbdiag.h>
#endif
+#include "board-msm7627-regulator.h"
#include "devices.h"
#include "clock.h"
#include "acpuclock.h"
@@ -1569,7 +1570,21 @@
.aux_dat = 96,
.msm_i2c_config_gpio = msm_i2c_gpio_config,
};
+static struct platform_device msm_proccomm_regulator_dev = {
+ .name = PROCCOMM_REGULATOR_DEV_NAME,
+ .id = -1,
+ .dev = {
+ .platform_data = &msm7627_proccomm_regulator_data
+ }
+};
+static void __init msm7627_init_regulators(void)
+{
+ int rc = platform_device_register(&msm_proccomm_regulator_dev);
+ if (rc)
+ pr_err("%s: could not register regulator device: %d\n",
+ __func__, rc);
+}
static void __init msm_device_i2c_init(void)
{
if (gpio_request(60, "i2c_pri_clk"))
@@ -1624,6 +1639,7 @@
static void __init msm7x2x_init(void)
{
+ msm7627_init_regulators();
#ifdef CONFIG_ARCH_MSM7X25
msm_clock_init(msm_clocks_7x25, msm_num_clocks_7x25);
#elif defined(CONFIG_ARCH_MSM7X27)
diff --git a/arch/arm/mach-msm/board-msm7x30.c b/arch/arm/mach-msm/board-msm7x30.c
index 03307f0..9fb9fb6 100644
--- a/arch/arm/mach-msm/board-msm7x30.c
+++ b/arch/arm/mach-msm/board-msm7x30.c
@@ -389,6 +389,14 @@
return rc;
}
+/* TODO: Put the regulator to LPM / HPM in suspend/resume*/
+static int cyttsp_platform_suspend(struct i2c_client *client)
+{
+ msleep(20);
+
+ return CY_OK;
+}
+
static int cyttsp_platform_resume(struct i2c_client *client)
{
/* add any special code to strobe a wakeup pin or chip reset */
@@ -432,6 +440,7 @@
*/
.lp_intrvl = CY_LP_INTRVL_DFLT,
.resume = cyttsp_platform_resume,
+ .suspend = cyttsp_platform_suspend,
.init = cyttsp_platform_init,
.sleep_gpio = -1,
.resout_gpio = -1,
diff --git a/arch/arm/mach-msm/board-msm8960-regulator.c b/arch/arm/mach-msm/board-msm8960-regulator.c
index ca24e79..29b7460 100644
--- a/arch/arm/mach-msm/board-msm8960-regulator.c
+++ b/arch/arm/mach-msm/board-msm8960-regulator.c
@@ -118,6 +118,8 @@
REGULATOR_SUPPLY("8921_l25", NULL),
REGULATOR_SUPPLY("VDDD_CDC_D", "tabla-slim"),
REGULATOR_SUPPLY("CDC_VDDA_A_1P2V", "tabla-slim"),
+ REGULATOR_SUPPLY("VDDD_CDC_D", "tabla2x-slim"),
+ REGULATOR_SUPPLY("CDC_VDDA_A_1P2V", "tabla2x-slim"),
};
VREG_CONSUMERS(L26) = {
REGULATOR_SUPPLY("8921_l26", NULL),
@@ -157,7 +159,12 @@
REGULATOR_SUPPLY("CDC_VDD_CP", "tabla-slim"),
REGULATOR_SUPPLY("CDC_VDDA_TX", "tabla-slim"),
REGULATOR_SUPPLY("CDC_VDDA_RX", "tabla-slim"),
+ REGULATOR_SUPPLY("VDDIO_CDC", "tabla2x-slim"),
+ REGULATOR_SUPPLY("CDC_VDD_CP", "tabla2x-slim"),
+ REGULATOR_SUPPLY("CDC_VDDA_TX", "tabla2x-slim"),
+ REGULATOR_SUPPLY("CDC_VDDA_RX", "tabla2x-slim"),
REGULATOR_SUPPLY("vcc_i2c", "3-005b"),
+ REGULATOR_SUPPLY("EXT_HUB_VDDIO", "msm_hsic_host"),
};
VREG_CONSUMERS(S5) = {
REGULATOR_SUPPLY("8921_s5", NULL),
@@ -478,7 +485,7 @@
RPM_SMPS(S3, 0, 1, 1, 500000, 1150000, NULL, 100000, 4p80),
RPM_SMPS(S4, 1, 1, 0, 1800000, 1800000, NULL, 100000, 3p20),
RPM_SMPS(S7, 0, 1, 0, 1150000, 1150000, NULL, 100000, 3p20),
- RPM_SMPS(S8, 1, 1, 0, 2200000, 2200000, NULL, 100000, 1p60),
+ RPM_SMPS(S8, 1, 1, 1, 2200000, 2200000, NULL, 100000, 1p60),
/* ID a_on pd ss min_uV max_uV supply sys_uA init_ip */
RPM_LDO(L1, 1, 1, 0, 1050000, 1050000, "8921_s4", 0, 10000),
@@ -500,7 +507,7 @@
RPM_LDO(L18, 0, 1, 0, 1300000, 1300000, "8921_s4", 0, 0),
RPM_LDO(L21, 0, 1, 0, 1900000, 1900000, "8921_s8", 0, 0),
RPM_LDO(L22, 0, 1, 0, 2750000, 2750000, NULL, 0, 0),
- RPM_LDO(L23, 1, 1, 0, 1800000, 1800000, "8921_s8", 10000, 10000),
+ RPM_LDO(L23, 1, 1, 1, 1800000, 1800000, "8921_s8", 10000, 10000),
RPM_LDO(L24, 0, 1, 1, 750000, 1150000, "8921_s1", 10000, 10000),
RPM_LDO(L25, 1, 1, 0, 1225000, 1225000, "8921_s1", 10000, 10000),
diff --git a/arch/arm/mach-msm/board-msm8960.c b/arch/arm/mach-msm/board-msm8960.c
index ac8b991..c264011 100644
--- a/arch/arm/mach-msm/board-msm8960.c
+++ b/arch/arm/mach-msm/board-msm8960.c
@@ -89,6 +89,7 @@
#include "rpm_log.h"
#include "smd_private.h"
#include "pm-boot.h"
+#include "msm_watchdog.h"
static struct platform_device msm_fm_platform_init = {
.name = "iris_fm",
@@ -154,6 +155,12 @@
PM_GPIO_STRENGTH_HIGH, \
_func, 0, 0)
+#define PM8XXX_GPIO_OUTPUT_VIN(_gpio, _val, _vin) \
+ PM8XXX_GPIO_INIT(_gpio, PM_GPIO_DIR_OUT, PM_GPIO_OUT_BUF_CMOS, _val, \
+ PM_GPIO_PULL_NO, _vin, \
+ PM_GPIO_STRENGTH_HIGH, \
+ PM_GPIO_FUNC_NORMAL, 0, 0)
+
/* Initial PM8921 GPIO configurations */
static struct pm8xxx_gpio_init pm8921_gpios[] __initdata = {
PM8XXX_GPIO_DISABLE(6), /* Disable unused */
@@ -161,7 +168,7 @@
PM8XXX_GPIO_INPUT(16, PM_GPIO_PULL_UP_30), /* SD_CARD_WP */
/* External regulator shared by display and touchscreen on LiQUID */
PM8XXX_GPIO_OUTPUT(17, 0), /* DISP 3.3 V Boost */
- PM8XXX_GPIO_OUTPUT(21, 1), /* Backlight Enable */
+ PM8XXX_GPIO_OUTPUT_VIN(21, 1, PM_GPIO_VIN_VPH), /* Backlight Enable */
PM8XXX_GPIO_DISABLE(22), /* Disable NFC */
PM8XXX_GPIO_OUTPUT_FUNC(24, 0, PM_GPIO_FUNC_2), /* Bl: Off, PWM mode */
PM8XXX_GPIO_INPUT(26, PM_GPIO_PULL_UP_30), /* SD_CARD_DET_N */
@@ -725,6 +732,12 @@
.pull = GPIOMUX_PULL_DOWN,
};
+static struct gpiomux_setting hsic_hub_act_cfg = {
+ .func = GPIOMUX_FUNC_GPIO,
+ .drv = GPIOMUX_DRV_2MA,
+ .pull = GPIOMUX_PULL_NONE,
+};
+
static struct msm_gpiomux_config msm8960_hsic_configs[] = {
{
.gpio = 150, /*HSIC_STROBE */
@@ -740,6 +753,13 @@
[GPIOMUX_SUSPENDED] = &hsic_sus_cfg,
},
},
+ {
+ .gpio = 91, /* HSIC_HUB_RESET */
+ .settings = {
+ [GPIOMUX_ACTIVE] = &hsic_hub_act_cfg,
+ [GPIOMUX_SUSPENDED] = &hsic_sus_cfg,
+ },
+ },
};
#endif
@@ -2406,6 +2426,35 @@
.platform_data = &tabla_platform_data,
},
};
+
+static struct tabla_pdata tabla20_platform_data = {
+ .slimbus_slave_device = {
+ .name = "tabla-slave",
+ .e_addr = {0, 0, 0x60, 0, 0x17, 2},
+ },
+ .irq = MSM_GPIO_TO_INT(62),
+ .irq_base = TABLA_INTERRUPT_BASE,
+ .num_irqs = NR_TABLA_IRQS,
+ .reset_gpio = PM8921_GPIO_PM_TO_SYS(34),
+ .micbias = {
+ .ldoh_v = TABLA_LDOH_2P85_V,
+ .cfilt1_mv = 1800,
+ .cfilt2_mv = 1800,
+ .cfilt3_mv = 1800,
+ .bias1_cfilt_sel = TABLA_CFILT1_SEL,
+ .bias2_cfilt_sel = TABLA_CFILT2_SEL,
+ .bias3_cfilt_sel = TABLA_CFILT3_SEL,
+ .bias4_cfilt_sel = TABLA_CFILT3_SEL,
+ }
+};
+
+static struct slim_device msm_slim_tabla20 = {
+ .name = "tabla2x-slim",
+ .e_addr = {0, 1, 0x60, 0, 0x17, 2},
+ .dev = {
+ .platform_data = &tabla20_platform_data,
+ },
+};
#endif
static struct slim_boardinfo msm_slim_devices[] = {
@@ -2414,6 +2463,10 @@
.bus_num = 1,
.slim_slave = &msm_slim_tabla,
},
+ {
+ .bus_num = 1,
+ .slim_slave = &msm_slim_tabla20,
+ },
#endif
/* add more slimbus slaves as needed */
};
@@ -2614,11 +2667,6 @@
msm_gpiomux_install(wcnss_5wire_interface,
ARRAY_SIZE(wcnss_5wire_interface));
-#ifdef CONFIG_USB_EHCI_MSM_HSIC
- msm_gpiomux_install(msm8960_hsic_configs,
- ARRAY_SIZE(msm8960_hsic_configs));
-#endif
-
return 0;
}
@@ -3057,6 +3105,7 @@
#endif
#ifdef CONFIG_USB_EHCI_MSM_HSIC
+#define HSIC_HUB_RESET_GPIO 91
static struct msm_hsic_host_platform_data msm_hsic_pdata = {
.strobe = 150,
.data = 151,
@@ -3308,14 +3357,16 @@
.name = "vdd",
.min_uV = CY_TMA300_VTG_MIN_UV,
.max_uV = CY_TMA300_VTG_MAX_UV,
- .load_uA = CY_TMA300_CURR_24HZ_UA,
+ .hpm_load_uA = CY_TMA300_CURR_24HZ_UA,
+ .lpm_load_uA = CY_TMA300_SLEEP_CURR_UA,
},
/* TODO: Remove after runtime PM is enabled in I2C driver */
{
.name = "vcc_i2c",
.min_uV = CY_I2C_VTG_MIN_UV,
.max_uV = CY_I2C_VTG_MAX_UV,
- .load_uA = CY_I2C_CURR_UA,
+ .hpm_load_uA = CY_I2C_CURR_UA,
+ .lpm_load_uA = CY_I2C_SLEEP_CURR_UA,
},
};
@@ -3707,6 +3758,7 @@
&msm_ptm_device,
#endif
&msm_device_dspcrashd_8960,
+ &msm8960_device_watchdog,
};
static struct platform_device *sim_devices[] __initdata = {
@@ -3764,7 +3816,6 @@
&msm8960_device_otg,
&msm8960_device_gadget_peripheral,
&msm_device_hsusb_host,
- &msm_device_hsic_host,
&android_usb_device,
&msm_pcm,
&msm_pcm_routing,
@@ -4374,6 +4425,28 @@
#endif /* CONFIG_MSM_DSPS */
}
+static void __init msm8960_init_hsic(void)
+{
+#ifdef CONFIG_USB_EHCI_MSM_HSIC
+ uint32_t version = socinfo_get_version();
+
+ pr_info("%s: version:%d mtp:%d\n", __func__,
+ SOCINFO_VERSION_MAJOR(version),
+ machine_is_msm8960_mtp());
+
+ if ((SOCINFO_VERSION_MAJOR(version) == 1) ||
+ machine_is_msm8960_mtp() ||
+ machine_is_msm8960_fluid())
+ return;
+
+ msm_gpiomux_install(msm8960_hsic_configs,
+ ARRAY_SIZE(msm8960_hsic_configs));
+
+ platform_device_register(&msm_device_hsic_host);
+#endif
+}
+
+
#ifdef CONFIG_ISL9519_CHARGER
static struct isl_platform_data isl_data __initdata = {
.valid_n_gpio = 0, /* Not required when notify-by-pmic */
@@ -4461,6 +4534,10 @@
static void __init msm8960_sim_init(void)
{
+ struct msm_watchdog_pdata *wdog_pdata = (struct msm_watchdog_pdata *)
+ &msm8960_device_watchdog.dev.platform_data;
+
+ wdog_pdata->bark_time = 15000;
BUG_ON(msm_rpm_init(&msm_rpm_data));
BUG_ON(msm_rpmrs_levels_init(msm_rpmrs_levels,
ARRAY_SIZE(msm_rpmrs_levels)));
@@ -4553,6 +4630,12 @@
msm8960_device_otg.dev.platform_data = &msm_otg_pdata;
msm8960_device_gadget_peripheral.dev.parent = &msm8960_device_otg.dev;
msm_device_hsusb_host.dev.parent = &msm8960_device_otg.dev;
+#ifdef CONFIG_USB_EHCI_MSM_HSIC
+ if (machine_is_msm8960_liquid()) {
+ if (SOCINFO_VERSION_MAJOR(socinfo_get_version()) >= 2)
+ msm_hsic_pdata.hub_reset = HSIC_HUB_RESET_GPIO;
+ }
+#endif
msm_device_hsic_host.dev.platform_data = &msm_hsic_pdata;
gpiomux_init();
if (machine_is_msm8960_cdp())
@@ -4577,6 +4660,7 @@
platform_add_devices(common_devices, ARRAY_SIZE(common_devices));
pm8921_gpio_mpp_init();
platform_add_devices(cdp_devices, ARRAY_SIZE(cdp_devices));
+ msm8960_init_hsic();
msm8960_init_cam();
msm8960_init_mmc();
acpuclk_init(&acpuclk_8960_soc_data);
@@ -4663,6 +4747,7 @@
.timer = &msm_timer,
.init_machine = msm8960_cdp_init,
.init_early = msm8960_allocate_memory_regions,
+ .init_very_early = msm8960_early_memory,
MACHINE_END
MACHINE_START(MSM8930_MTP, "QCT MSM8930 MTP")
@@ -4672,6 +4757,7 @@
.timer = &msm_timer,
.init_machine = msm8960_cdp_init,
.init_early = msm8960_allocate_memory_regions,
+ .init_very_early = msm8960_early_memory,
MACHINE_END
MACHINE_START(MSM8930_FLUID, "QCT MSM8930 FLUID")
@@ -4681,5 +4767,6 @@
.timer = &msm_timer,
.init_machine = msm8960_cdp_init,
.init_early = msm8960_allocate_memory_regions,
+ .init_very_early = msm8960_early_memory,
MACHINE_END
#endif
diff --git a/arch/arm/mach-msm/board-msm8x60.c b/arch/arm/mach-msm/board-msm8x60.c
index 61b70cf..455644f 100644
--- a/arch/arm/mach-msm/board-msm8x60.c
+++ b/arch/arm/mach-msm/board-msm8x60.c
@@ -109,6 +109,10 @@
#include "rpm_resources.h"
#include "acpuclock.h"
#include "pm-boot.h"
+
+#include <linux/ion.h>
+#include <mach/ion.h>
+
#define MSM_SHARED_RAM_PHYS 0x40000000
/* Macros assume PMIC GPIOs start at 0 */
@@ -2624,6 +2628,16 @@
#define USER_SMI_SIZE (MSM_SMI_SIZE - KERNEL_SMI_SIZE)
#define MSM_PMEM_SMIPOOL_SIZE USER_SMI_SIZE
+#define MSM_ION_EBI_SIZE MSM_PMEM_SF_SIZE
+#define MSM_ION_ADSP_SIZE MSM_PMEM_ADSP_SIZE
+#define MSM_ION_SMI_SIZE MSM_PMEM_SMIPOOL_SIZE
+
+#ifdef CONFIG_MSM_MULTIMEDIA_USE_ION
+#define MSM_ION_HEAP_NUM 5
+#else
+#define MSM_ION_HEAP_NUM 2
+#endif
+
static unsigned fb_size;
static int __init fb_size_setup(char *p)
{
@@ -2753,6 +2767,7 @@
};
#ifdef CONFIG_ANDROID_PMEM
+#ifndef CONFIG_MSM_MULTIMEDIA_USE_ION
static struct android_pmem_platform_data android_pmem_pdata = {
.name = "pmem",
.allocator_type = PMEM_ALLOCATORTYPE_ALLORNOTHING,
@@ -2778,7 +2793,7 @@
.id = 2,
.dev = { .platform_data = &android_pmem_adsp_pdata },
};
-
+#endif
static struct android_pmem_platform_data android_pmem_audio_pdata = {
.name = "pmem_audio",
.allocator_type = PMEM_ALLOCATORTYPE_BITMAP,
@@ -2802,6 +2817,7 @@
}, \
.num_paths = 1, \
}
+#ifndef CONFIG_MSM_MULTIMEDIA_USE_ION
static struct msm_bus_paths pmem_smi_table[] = {
[0] = PMEM_BUS_WIDTH(0), /* Off */
[1] = PMEM_BUS_WIDTH(1), /* On */
@@ -2846,7 +2862,7 @@
.id = 7,
.dev = { .platform_data = &android_pmem_smipool_pdata },
};
-
+#endif
#endif
#define GPIO_DONGLE_PWR_EN 258
@@ -3193,6 +3209,14 @@
return rc;
}
+/* TODO: Put the regulator to LPM / HPM in suspend/resume*/
+static int cyttsp_platform_suspend(struct i2c_client *client)
+{
+ msleep(20);
+
+ return CY_OK;
+}
+
static int cyttsp_platform_resume(struct i2c_client *client)
{
/* add any special code to strobe a wakeup pin or chip reset */
@@ -3232,6 +3256,7 @@
.resout_gpio = -1,
.irq_gpio = CYTTSP_TS_GPIO_IRQ,
.resume = cyttsp_platform_resume,
+ .suspend = cyttsp_platform_suspend,
.init = cyttsp_platform_init,
};
@@ -3274,6 +3299,7 @@
.resout_gpio = -1,
.irq_gpio = CYTTSP_TS_GPIO_IRQ,
.resume = cyttsp_platform_resume,
+ .suspend = cyttsp_platform_suspend,
.init = cyttsp_platform_init,
.disable_ghost_det = true,
};
@@ -4131,11 +4157,13 @@
&msm_device_ssbi3,
#endif
#ifdef CONFIG_ANDROID_PMEM
+#ifndef CONFIG_MSM_MULTIMEDIA_USE_ION
&android_pmem_device,
&android_pmem_adsp_device,
- &android_pmem_audio_device,
&android_pmem_smipool_device,
#endif
+ &android_pmem_audio_device,
+#endif
#ifdef CONFIG_MSM_ROTATOR
&msm_rotator_device,
#endif
@@ -5001,11 +5029,13 @@
&msm_batt_device,
#endif
#ifdef CONFIG_ANDROID_PMEM
+#ifndef CONFIG_MSM_MULTIMEDIA_USE_ION
&android_pmem_device,
&android_pmem_adsp_device,
- &android_pmem_audio_device,
&android_pmem_smipool_device,
#endif
+ &android_pmem_audio_device,
+#endif
#ifdef CONFIG_MSM_ROTATOR
&msm_rotator_device,
#endif
@@ -5098,9 +5128,60 @@
&msm_tsens_device,
&msm_rpm_device,
-
+#ifdef CONFIG_ION_MSM
+ &ion_dev,
+#endif
+ &msm8660_device_watchdog,
};
+#ifdef CONFIG_ION_MSM
+struct ion_platform_data ion_pdata = {
+ .nr = MSM_ION_HEAP_NUM,
+ .heaps = {
+ {
+ .id = ION_HEAP_SYSTEM_ID,
+ .type = ION_HEAP_TYPE_SYSTEM,
+ .name = ION_VMALLOC_HEAP_NAME,
+ },
+ {
+ .id = ION_HEAP_SYSTEM_CONTIG_ID,
+ .type = ION_HEAP_TYPE_SYSTEM_CONTIG,
+ .name = ION_KMALLOC_HEAP_NAME,
+ },
+#ifdef CONFIG_MSM_MULTIMEDIA_USE_ION
+ {
+ .id = ION_HEAP_EBI_ID,
+ .type = ION_HEAP_TYPE_CARVEOUT,
+ .name = ION_EBI1_HEAP_NAME,
+ .size = MSM_ION_EBI_SIZE,
+ .memory_type = ION_EBI_TYPE,
+ },
+ {
+ .id = ION_HEAP_ADSP_ID,
+ .type = ION_HEAP_TYPE_CARVEOUT,
+ .name = ION_ADSP_HEAP_NAME,
+ .size = MSM_ION_ADSP_SIZE,
+ .memory_type = ION_EBI_TYPE,
+ },
+ {
+ .id = ION_HEAP_SMI_ID,
+ .type = ION_HEAP_TYPE_CARVEOUT,
+ .name = ION_SMI_HEAP_NAME,
+ .size = MSM_ION_SMI_SIZE,
+ .memory_type = ION_SMI_TYPE,
+ },
+#endif
+ }
+};
+
+struct platform_device ion_dev = {
+ .name = "ion-msm",
+ .id = 1,
+ .dev = { .platform_data = &ion_pdata },
+};
+#endif
+
+
static struct memtype_reserve msm8x60_reserve_table[] __initdata = {
/* Kernel SMI memory pool for video core, used for firmware */
/* and encoder, decoder scratch buffers */
@@ -5128,14 +5209,25 @@
},
};
+static void reserve_ion_memory(void)
+{
+#if defined(CONFIG_ION_MSM) && defined(CONFIG_MSM_MULTIMEDIA_USE_ION)
+ msm8x60_reserve_table[MEMTYPE_EBI1].size += MSM_ION_EBI_SIZE;
+ msm8x60_reserve_table[MEMTYPE_EBI1].size += MSM_ION_ADSP_SIZE;
+ msm8x60_reserve_table[MEMTYPE_SMI].size += MSM_ION_SMI_SIZE;
+#endif
+}
+
static void __init size_pmem_devices(void)
{
#ifdef CONFIG_ANDROID_PMEM
+#ifndef CONFIG_MSM_MULTIMEDIA_USE_ION
android_pmem_adsp_pdata.size = pmem_adsp_size;
android_pmem_smipool_pdata.size = MSM_PMEM_SMIPOOL_SIZE;
- android_pmem_audio_pdata.size = MSM_PMEM_AUDIO_SIZE;
android_pmem_pdata.size = pmem_sf_size;
#endif
+ android_pmem_audio_pdata.size = MSM_PMEM_AUDIO_SIZE;
+#endif
}
static void __init reserve_memory_for(struct android_pmem_platform_data *p)
@@ -5146,18 +5238,23 @@
static void __init reserve_pmem_memory(void)
{
#ifdef CONFIG_ANDROID_PMEM
+#ifndef CONFIG_MSM_MULTIMEDIA_USE_ION
reserve_memory_for(&android_pmem_adsp_pdata);
reserve_memory_for(&android_pmem_smipool_pdata);
- reserve_memory_for(&android_pmem_audio_pdata);
reserve_memory_for(&android_pmem_pdata);
+#endif
+ reserve_memory_for(&android_pmem_audio_pdata);
msm8x60_reserve_table[MEMTYPE_EBI1].size += pmem_kernel_ebi1_size;
#endif
}
+
+
static void __init msm8x60_calculate_reserve_sizes(void)
{
size_pmem_devices();
reserve_pmem_memory();
+ reserve_ion_memory();
}
static int msm8x60_paddr_to_memtype(unsigned int paddr)
diff --git a/arch/arm/mach-msm/clock-8960.c b/arch/arm/mach-msm/clock-8960.c
index ca66200..37dabc8 100644
--- a/arch/arm/mach-msm/clock-8960.c
+++ b/arch/arm/mach-msm/clock-8960.c
@@ -461,6 +461,42 @@
.fmax[VDD_DIG_##l2] = (f2), \
.fmax[VDD_DIG_##l3] = (f3)
+enum vdd_l23_levels {
+ VDD_L23_OFF,
+ VDD_L23_ON
+};
+
+static int set_vdd_l23(struct clk_vdd_class *vdd_class, int level)
+{
+ int rc;
+
+ if (level == VDD_L23_OFF) {
+ rc = rpm_vreg_set_voltage(RPM_VREG_ID_PM8921_L23,
+ RPM_VREG_VOTER3, 0, 0, 1);
+ if (rc)
+ return rc;
+ rc = rpm_vreg_set_voltage(RPM_VREG_ID_PM8921_S8,
+ RPM_VREG_VOTER3, 0, 0, 1);
+ if (rc)
+ rpm_vreg_set_voltage(RPM_VREG_ID_PM8921_L23,
+ RPM_VREG_VOTER3, 1800000, 1800000, 1);
+ } else {
+ rc = rpm_vreg_set_voltage(RPM_VREG_ID_PM8921_S8,
+ RPM_VREG_VOTER3, 2200000, 2200000, 1);
+ if (rc)
+ return rc;
+ rc = rpm_vreg_set_voltage(RPM_VREG_ID_PM8921_L23,
+ RPM_VREG_VOTER3, 1800000, 1800000, 1);
+ if (rc)
+ rpm_vreg_set_voltage(RPM_VREG_ID_PM8921_S8,
+ RPM_VREG_VOTER3, 0, 0, 1);
+ }
+
+ return rc;
+}
+
+static DEFINE_VDD_CLASS(vdd_l23, set_vdd_l23);
+
/*
* Clock Descriptions
*/
@@ -537,6 +573,8 @@
.c = {
.dbg_name = "pll3_clk",
.ops = &clk_ops_pll,
+ .vdd_class = &vdd_l23,
+ .fmax[VDD_L23_ON] = ULONG_MAX,
CLK_INIT(pll3_clk.c),
},
};
@@ -5124,32 +5162,43 @@
CLK_DUMMY("rgb_tv_clk", RGB_TV_CLK, NULL, OFF),
CLK_DUMMY("npl_tv_clk", NPL_TV_CLK, NULL, OFF),
CLK_LOOKUP("core_clk", gfx3d_clk.c, NULL),
+ CLK_LOOKUP("core_clk", gfx3d_clk.c, "footswitch-8x60.2"),
+ CLK_LOOKUP("bus_clk", gfx3d_axi_clk.c, "footswitch-8x60.2"),
CLK_LOOKUP("iface_clk", vcap_p_clk.c, NULL),
- CLK_LOOKUP("bus_clk", vcap_axi_clk.c, NULL),
+ CLK_LOOKUP("iface_clk", vcap_p_clk.c, "footswitch-8x60.10"),
+ CLK_LOOKUP("bus_clk", vcap_axi_clk.c, "footswitch-8x60.10"),
CLK_LOOKUP("core_clk", vcap_clk.c, NULL),
+ CLK_LOOKUP("core_clk", vcap_clk.c, "footswitch-8x60.10"),
CLK_LOOKUP("vcap_npl_clk", vcap_npl_clk.c, NULL),
- CLK_LOOKUP("bus_clk", ijpeg_axi_clk.c, NULL),
+ CLK_LOOKUP("bus_clk", ijpeg_axi_clk.c, "footswitch-8x60.3"),
CLK_LOOKUP("mem_clk", imem_axi_clk.c, NULL),
CLK_LOOKUP("ijpeg_clk", ijpeg_clk.c, NULL),
+ CLK_LOOKUP("core_clk", ijpeg_clk.c, "footswitch-8x60.3"),
CLK_LOOKUP("core_clk", jpegd_clk.c, NULL),
CLK_LOOKUP("mdp_clk", mdp_clk.c, NULL),
+ CLK_LOOKUP("core_clk", mdp_clk.c, "footswitch-8x60.4"),
CLK_LOOKUP("mdp_vsync_clk", mdp_vsync_clk.c, NULL),
CLK_LOOKUP("lut_mdp", lut_mdp_clk.c, NULL),
CLK_LOOKUP("core_clk", rot_clk.c, "msm_rotator.0"),
+ CLK_LOOKUP("core_clk", rot_clk.c, "footswitch-8x60.6"),
CLK_DUMMY("tv_src_clk", TV_SRC_CLK, NULL, OFF),
CLK_LOOKUP("core_clk", vcodec_clk.c, NULL),
+ CLK_LOOKUP("core_clk", vcodec_clk.c, "footswitch-8x60.7"),
CLK_DUMMY("mdp_tv_clk", MDP_TV_CLK, NULL, OFF),
CLK_DUMMY("hdmi_clk", HDMI_TV_CLK, NULL, OFF),
CLK_LOOKUP("core_clk", hdmi_app_clk.c, NULL),
CLK_LOOKUP("vpe_clk", vpe_clk.c, NULL),
+ CLK_LOOKUP("core_clk", vpe_clk.c, "footswitch-8x60.9"),
CLK_LOOKUP("vfe_clk", vfe_clk.c, NULL),
+ CLK_LOOKUP("core_clk", vfe_clk.c, "footswitch-8x60.8"),
CLK_LOOKUP("csi_vfe_clk", csi_vfe_clk.c, NULL),
- CLK_LOOKUP("vfe_axi_clk", vfe_axi_clk.c, NULL),
- CLK_LOOKUP("mdp_axi_clk", mdp_axi_clk.c, NULL),
- CLK_LOOKUP("bus_clk", vcodec_axi_clk.c, NULL),
- CLK_LOOKUP("bus_a_clk", vcodec_axi_a_clk.c, NULL),
- CLK_LOOKUP("bus_b_clk", vcodec_axi_b_clk.c, NULL),
- CLK_LOOKUP("vpe_axi_clk", vpe_axi_clk.c, NULL),
+ CLK_LOOKUP("bus_clk", vfe_axi_clk.c, "footswitch-8x60.8"),
+ CLK_LOOKUP("bus_clk", mdp_axi_clk.c, "footswitch-8x60.4"),
+ CLK_LOOKUP("bus_clk", rot_axi_clk.c, "footswitch-8x60.6"),
+ CLK_LOOKUP("bus_clk", vcodec_axi_clk.c, "footswitch-8x60.7"),
+ CLK_LOOKUP("bus_a_clk", vcodec_axi_a_clk.c, "footswitch-8x60.7"),
+ CLK_LOOKUP("bus_b_clk", vcodec_axi_b_clk.c, "footswitch-8x60.7"),
+ CLK_LOOKUP("bus_clk", vpe_axi_clk.c, "footswitch-8x60.9"),
CLK_LOOKUP("amp_pclk", amp_p_clk.c, NULL),
CLK_LOOKUP("csi_pclk", csi_p_clk.c, NULL),
CLK_LOOKUP("dsi_m_pclk", dsi1_m_p_clk.c, NULL),
@@ -5157,17 +5206,24 @@
CLK_LOOKUP("dsi_m_pclk", dsi2_m_p_clk.c, NULL),
CLK_LOOKUP("dsi_s_pclk", dsi2_s_p_clk.c, NULL),
CLK_LOOKUP("iface_clk", gfx3d_p_clk.c, NULL),
+ CLK_LOOKUP("iface_clk", gfx3d_p_clk.c, "footswitch-8x60.2"),
CLK_LOOKUP("master_iface_clk", hdmi_m_p_clk.c, NULL),
CLK_LOOKUP("slave_iface_clk", hdmi_s_p_clk.c, NULL),
CLK_LOOKUP("ijpeg_pclk", ijpeg_p_clk.c, NULL),
+ CLK_LOOKUP("iface_clk", ijpeg_p_clk.c, "footswitch-8x60.3"),
CLK_LOOKUP("iface_clk", jpegd_p_clk.c, NULL),
CLK_LOOKUP("mem_iface_clk", imem_p_clk.c, NULL),
CLK_LOOKUP("mdp_pclk", mdp_p_clk.c, NULL),
+ CLK_LOOKUP("iface_clk", mdp_p_clk.c, "footswitch-8x60.4"),
CLK_LOOKUP("iface_clk", smmu_p_clk.c, NULL),
CLK_LOOKUP("iface_clk", rot_p_clk.c, "msm_rotator.0"),
+ CLK_LOOKUP("iface_clk", rot_p_clk.c, "footswitch-8x60.6"),
CLK_LOOKUP("iface_clk", vcodec_p_clk.c, NULL),
+ CLK_LOOKUP("iface_clk", vcodec_p_clk.c, "footswitch-8x60.7"),
CLK_LOOKUP("vfe_pclk", vfe_p_clk.c, NULL),
+ CLK_LOOKUP("iface_clk", vfe_p_clk.c, "footswitch-8x60.8"),
CLK_LOOKUP("vpe_pclk", vpe_p_clk.c, NULL),
+ CLK_LOOKUP("iface_pclk", vpe_p_clk.c, "footswitch-8x60.9"),
CLK_LOOKUP("mi2s_bit_clk", mi2s_bit_clk.c, NULL),
CLK_LOOKUP("mi2s_osr_clk", mi2s_osr_clk.c, NULL),
CLK_LOOKUP("i2s_mic_bit_clk", codec_i2s_mic_bit_clk.c, NULL),
@@ -5205,7 +5261,7 @@
CLK_LOOKUP("usb_hsic_p_clk", usb_hsic_p_clk.c, NULL),
CLK_LOOKUP("ebi1_msmbus_clk", ebi1_msmbus_clk.c, NULL),
- CLK_LOOKUP("ebi1_clk", ebi1_adm_clk.c, "msm_dmov"),
+ CLK_LOOKUP("mem_clk", ebi1_adm_clk.c, "msm_dmov"),
CLK_LOOKUP("l2_mclk", l2_m_clk, NULL),
CLK_LOOKUP("krait0_mclk", krait0_m_clk, NULL),
@@ -5642,10 +5698,10 @@
/* Check if PLL8 is active */
is_pll_enabled = readl_relaxed(BB_PLL8_STATUS_REG) & BIT(16);
if (!is_pll_enabled) {
- /* Ref clk = 24.5MHz and program pll8 to 384MHz */
- writel_relaxed(0xF, BB_PLL8_L_VAL_REG);
- writel_relaxed(0x21, BB_PLL8_M_VAL_REG);
- writel_relaxed(0x31, BB_PLL8_N_VAL_REG);
+ /* Ref clk = 27MHz and program pll8 to 384MHz */
+ writel_relaxed(0xE, BB_PLL8_L_VAL_REG);
+ writel_relaxed(0x2, BB_PLL8_M_VAL_REG);
+ writel_relaxed(0x9, BB_PLL8_N_VAL_REG);
regval = readl_relaxed(BB_PLL8_CONFIG_REG);
@@ -5671,10 +5727,10 @@
/* Check if PLL3 is active */
is_pll_enabled = readl_relaxed(GPLL1_STATUS_REG) & BIT(16);
if (!is_pll_enabled) {
- /* Ref clk = 24.5MHz and program pll3 to 1200MHz */
- writel_relaxed(0x30, GPLL1_L_VAL_REG);
- writel_relaxed(0x30, GPLL1_M_VAL_REG);
- writel_relaxed(0x31, GPLL1_N_VAL_REG);
+ /* Ref clk = 27MHz and program pll3 to 1200MHz */
+ writel_relaxed(0x2C, GPLL1_L_VAL_REG);
+ writel_relaxed(0x4, GPLL1_M_VAL_REG);
+ writel_relaxed(0x9, GPLL1_N_VAL_REG);
regval = readl_relaxed(GPLL1_CONFIG_REG);
@@ -5690,10 +5746,10 @@
/* Check if PLL14 is active */
is_pll_enabled = readl_relaxed(BB_PLL14_STATUS_REG) & BIT(16);
if (!is_pll_enabled) {
- /* Ref clk = 24.5MHz and program pll14 to 480MHz */
- writel_relaxed(0x13, BB_PLL14_L_VAL_REG);
- writel_relaxed(0x1D, BB_PLL14_M_VAL_REG);
- writel_relaxed(0x31, BB_PLL14_N_VAL_REG);
+ /* Ref clk = 27MHz and program pll14 to 480MHz */
+ writel_relaxed(0x11, BB_PLL14_L_VAL_REG);
+ writel_relaxed(0x7, BB_PLL14_M_VAL_REG);
+ writel_relaxed(0x9, BB_PLL14_N_VAL_REG);
regval = readl_relaxed(BB_PLL14_CONFIG_REG);
@@ -5757,10 +5813,10 @@
/* Check if PLL4 is active */
is_pll_enabled = readl_relaxed(LCC_PLL0_STATUS_REG) & BIT(16);
if (!is_pll_enabled) {
- /* Ref clk = 24.5MHz and program pll4 to 393.2160MHz */
- writel_relaxed(0x10, LCC_PLL0_L_VAL_REG);
- writel_relaxed(0x130, LCC_PLL0_M_VAL_REG);
- writel_relaxed(0x17ED, LCC_PLL0_N_VAL_REG);
+ /* Ref clk = 27MHz and program pll4 to 393.2160MHz */
+ writel_relaxed(0xE, LCC_PLL0_L_VAL_REG);
+ writel_relaxed(0x27A, LCC_PLL0_M_VAL_REG);
+ writel_relaxed(0x465, LCC_PLL0_N_VAL_REG);
regval = readl_relaxed(LCC_PLL0_CONFIG_REG);
diff --git a/arch/arm/mach-msm/clock-debug.c b/arch/arm/mach-msm/clock-debug.c
index 4e0d3e9..ab4d8c1 100644
--- a/arch/arm/mach-msm/clock-debug.c
+++ b/arch/arm/mach-msm/clock-debug.c
@@ -174,7 +174,7 @@
/* Find max frequency supported within voltage constraints. */
if (!clock->vdd_class) {
- fmax = ULONG_MAX;
+ fmax = INT_MAX;
} else {
for (level = 0; level < ARRAY_SIZE(clock->fmax); level++)
if (clock->fmax[level])
@@ -213,7 +213,7 @@
if (!debugfs_base)
return -ENOMEM;
- strncpy(temp, clock->dbg_name, ARRAY_SIZE(temp)-1);
+ strlcpy(temp, clock->dbg_name, ARRAY_SIZE(temp));
for (ptr = temp; *ptr; ptr++)
*ptr = tolower(*ptr);
diff --git a/arch/arm/mach-msm/dal.c b/arch/arm/mach-msm/dal.c
index 218bd0f..94c02f0 100644
--- a/arch/arm/mach-msm/dal.c
+++ b/arch/arm/mach-msm/dal.c
@@ -1,4 +1,4 @@
-/* Copyright (c) 2008-2009, Code Aurora Forum. All rights reserved.
+/* Copyright (c) 2008-2011, Code Aurora Forum. All rights reserved.
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License version 2 and
@@ -407,7 +407,7 @@
if (!p)
return NULL;
- strncpy(p->port, port, sizeof(p->port) - 1);
+ strlcpy(p->port, port, sizeof(p->port));
p->refcount = 1;
snprintf(wq_name, sizeof(wq_name), "dalrpc_rcv_%s", port);
@@ -537,8 +537,8 @@
} else if (strnlen((char *)&h->msg.param[1],
DALRPC_MAX_PORTNAME_LEN)) {
/* another port was recommended in the response. */
- strncpy(dyn_port, (char *)&h->msg.param[1],
- DALRPC_MAX_PORTNAME_LEN);
+ strlcpy(dyn_port, (char *)&h->msg.param[1],
+ sizeof(dyn_port));
dyn_port[DALRPC_MAX_PORTNAME_LEN] = 0;
port = dyn_port;
} else if (port == dyn_port) {
diff --git a/arch/arm/mach-msm/devices-8064.c b/arch/arm/mach-msm/devices-8064.c
index fd2be92..35a69df 100644
--- a/arch/arm/mach-msm/devices-8064.c
+++ b/arch/arm/mach-msm/devices-8064.c
@@ -24,6 +24,7 @@
#include <mach/dma.h>
#include "clock.h"
#include "devices.h"
+#include "msm_watchdog.h"
/* Address of GSBI blocks */
#define MSM_GSBI1_PHYS 0x12440000
@@ -54,6 +55,20 @@
#define MSM_HSUSB_PHYS 0x12500000
#define MSM_HSUSB_SIZE SZ_4K
+static struct msm_watchdog_pdata msm_watchdog_pdata = {
+ .pet_time = 10000,
+ .bark_time = 11000,
+ .has_secure = true,
+};
+
+struct platform_device msm8064_device_watchdog = {
+ .name = "msm_watchdog",
+ .id = -1,
+ .dev = {
+ .platform_data = &msm_watchdog_pdata,
+ },
+};
+
static struct resource msm_dmov_resource[] = {
{
.start = ADM_0_SCSS_0_IRQ,
diff --git a/arch/arm/mach-msm/devices-8960.c b/arch/arm/mach-msm/devices-8960.c
index 899f2e1..ba36f69 100644
--- a/arch/arm/mach-msm/devices-8960.c
+++ b/arch/arm/mach-msm/devices-8960.c
@@ -35,6 +35,7 @@
#include "devices.h"
#include "devices-msm8x60.h"
#include "footswitch.h"
+#include "msm_watchdog.h"
#ifdef CONFIG_MSM_MPM
#include "mpm.h"
@@ -800,6 +801,20 @@
.id = -1,
};
+static struct msm_watchdog_pdata msm_watchdog_pdata = {
+ .pet_time = 10000,
+ .bark_time = 11000,
+ .has_secure = true,
+};
+
+struct platform_device msm8960_device_watchdog = {
+ .name = "msm_watchdog",
+ .id = -1,
+ .dev = {
+ .platform_data = &msm_watchdog_pdata,
+ },
+};
+
static struct resource msm_dmov_resource[] = {
{
.start = ADM_0_SCSS_1_IRQ,
diff --git a/arch/arm/mach-msm/devices-9615.c b/arch/arm/mach-msm/devices-9615.c
index 74e7871..3cf7d48 100644
--- a/arch/arm/mach-msm/devices-9615.c
+++ b/arch/arm/mach-msm/devices-9615.c
@@ -34,6 +34,7 @@
#include "spm.h"
#include "pm.h"
#include "rpm_resources.h"
+#include "msm_watchdog.h"
/* Address of GSBI blocks */
#define MSM_GSBI1_PHYS 0x16000000
@@ -56,6 +57,20 @@
#define MSM_PMIC1_SSBI_CMD_PHYS 0x00500000
#define MSM_PMIC_SSBI_SIZE SZ_4K
+static struct msm_watchdog_pdata msm_watchdog_pdata = {
+ .pet_time = 10000,
+ .bark_time = 11000,
+ .has_secure = true,
+};
+
+struct platform_device msm9615_device_watchdog = {
+ .name = "msm_watchdog",
+ .id = -1,
+ .dev = {
+ .platform_data = &msm_watchdog_pdata,
+ },
+};
+
static struct resource msm_dmov_resource[] = {
{
.start = ADM_0_SCSS_1_IRQ,
@@ -721,20 +736,19 @@
};
static uint8_t spm_wfi_cmd_sequence[] __initdata = {
- 0x00, 0x03, 0x0B, 0x00,
- 0x0f,
+ 0x00, 0x03, 0x00, 0x0f,
};
static uint8_t spm_power_collapse_without_rpm[] __initdata = {
- 0x30, 0x20, 0x10, 0x00,
- 0x50, 0x03, 0x50, 0x00,
- 0x10, 0x20, 0x30, 0x0f,
+ 0x34, 0x24, 0x14, 0x04,
+ 0x54, 0x03, 0x54, 0x04,
+ 0x14, 0x24, 0x3e, 0x0f,
};
static uint8_t spm_power_collapse_with_rpm[] __initdata = {
- 0x30, 0x20, 0x10, 0x00,
- 0x50, 0x07, 0x50, 0x00,
- 0x10, 0x20, 0x30, 0x0f,
+ 0x34, 0x24, 0x14, 0x04,
+ 0x54, 0x07, 0x54, 0x04,
+ 0x14, 0x24, 0x3e, 0x0f,
};
static struct msm_spm_seq_entry msm_spm_seq_list[] __initdata = {
@@ -759,7 +773,7 @@
[0] = {
.reg_base_addr = MSM_SAW0_BASE,
.reg_init_values[MSM_SPM_REG_SAW2_SPM_CTL] = 0x01,
- .reg_init_values[MSM_SPM_REG_SAW2_CFG] = 0x1F,
+ .reg_init_values[MSM_SPM_REG_SAW2_CFG] = 0x1001,
.num_modes = ARRAY_SIZE(msm_spm_seq_list),
.modes = msm_spm_seq_list,
},
diff --git a/arch/arm/mach-msm/devices-iommu.c b/arch/arm/mach-msm/devices-iommu.c
index 397fdea..3d2d2e7 100644
--- a/arch/arm/mach-msm/devices-iommu.c
+++ b/arch/arm/mach-msm/devices-iommu.c
@@ -1057,11 +1057,7 @@
static int __init iommu_init(void)
{
int ret;
- if ((cpu_is_msm8960() &&
- SOCINFO_VERSION_MAJOR(socinfo_get_version()) < 2) ||
- (cpu_is_msm8x60() &&
- (SOCINFO_VERSION_MAJOR(socinfo_get_version()) != 2 ||
- SOCINFO_VERSION_MINOR(socinfo_get_version()) < 1))) {
+ if (!msm_soc_version_supports_iommu()) {
pr_err("IOMMU is not supported on this SoC version.\n");
return -ENODEV;
}
diff --git a/arch/arm/mach-msm/devices-msm8x60.c b/arch/arm/mach-msm/devices-msm8x60.c
index 49f3d3b..def2558 100644
--- a/arch/arm/mach-msm/devices-msm8x60.c
+++ b/arch/arm/mach-msm/devices-msm8x60.c
@@ -53,6 +53,7 @@
#include <sound/apr_audio.h>
#include "rpm_stats.h"
#include "mpm.h"
+#include "msm_watchdog.h"
/* Address of GSBI blocks */
#define MSM_GSBI1_PHYS 0x16000000
@@ -1833,6 +1834,20 @@
.id = -1,
};
+static struct msm_watchdog_pdata msm_watchdog_pdata = {
+ .pet_time = 10000,
+ .bark_time = 11000,
+ .has_secure = true,
+};
+
+struct platform_device msm8660_device_watchdog = {
+ .name = "msm_watchdog",
+ .id = -1,
+ .dev = {
+ .platform_data = &msm_watchdog_pdata,
+ },
+};
+
static struct resource msm_dmov_resource_adm0[] = {
{
.start = INT_ADM0_AARM,
diff --git a/arch/arm/mach-msm/devices.h b/arch/arm/mach-msm/devices.h
index 1748838..c490574 100644
--- a/arch/arm/mach-msm/devices.h
+++ b/arch/arm/mach-msm/devices.h
@@ -202,4 +202,8 @@
defined(CONFIG_CRYPTO_DEV_QCEDEV_MODULE)
extern struct platform_device msm9615_qcedev_device;
#endif
+extern struct platform_device msm8960_device_watchdog;
+extern struct platform_device msm8660_device_watchdog;
+extern struct platform_device msm8064_device_watchdog;
+extern struct platform_device msm9615_device_watchdog;
#endif
diff --git a/arch/arm/mach-msm/idle-v7.S b/arch/arm/mach-msm/idle-v7.S
index 20dbd39..a6e8fdb 100644
--- a/arch/arm/mach-msm/idle-v7.S
+++ b/arch/arm/mach-msm/idle-v7.S
@@ -91,7 +91,23 @@
#ifdef CONFIG_MSM_TRACE_ACROSS_PC
bl etm_save_reg_check
#endif
- bl v7_flush_dcache_all
+
+ ldr r0, =msm_pm_flush_l2_flag
+ ldr r0, [r0]
+ mov r1, #0
+ mcr p15, 2, r1, c0, c0, 0 /*CCSELR*/
+ mrc p15, 1, r1, c0, c0, 0 /*CCSIDR*/
+ mov r2, #1
+ and r1, r2, r1, ASR #30 /* Check if the cache is write back */
+ orr r1, r0, r1
+ cmp r1, #1
+ bne skip
+ bl v7_flush_dcache_all
+
+skip: ldr r0, =saved_state
+ ldr r1, =saved_state_end
+ sub r1, r1, r0
+ bl v7_flush_kern_dcache_area
mrc p15, 0, r4, c1, c0, 0 /* read current CR */
bic r0, r4, #(1 << 2) /* clear dcache bit */
@@ -234,8 +250,18 @@
ldr r2, =msm_pm_boot_vector
add r2, r2, r0, LSL #2 /* locate boot vector for our cpu */
str r1, [r2]
+ mov r0, r2
+ ldr r1, =4
+ stmfd sp!, {lr}
+ bl v7_flush_kern_dcache_area
+ ldmfd sp!, {lr}
bx lr
+ENTRY(msm_pm_set_l2_flush_flag)
+ ldr r1, =msm_pm_flush_l2_flag
+ str r0, [r1]
+ bx lr
+
.data
.globl msm_pm_pc_pgd
@@ -252,3 +278,11 @@
msm_pm_boot_vector:
.space 4 * NR_CPUS
+
+/*
+ * Default the l2 flush flag to 1 so that caches are flushed during power
+ * collapse unless the L2 driver decides to flush them only during L2
+ * Power collapse.
+ */
+msm_pm_flush_l2_flag:
+ .long 0x1
diff --git a/arch/arm/mach-msm/idle.h b/arch/arm/mach-msm/idle.h
index 138db45..753a47c 100644
--- a/arch/arm/mach-msm/idle.h
+++ b/arch/arm/mach-msm/idle.h
@@ -22,7 +22,14 @@
#ifdef CONFIG_CPU_V7
void msm_pm_boot_entry(void);
void msm_pm_write_boot_vector(unsigned int cpu, unsigned long address);
+void msm_pm_set_l2_flush_flag(unsigned int flag);
extern unsigned long msm_pm_pc_pgd;
+#else
+static inline void msm_pm_set_l2_flush_flag(unsigned int flag)
+{
+ /* empty */
+}
#endif
+
#endif
diff --git a/arch/arm/mach-msm/include/mach/iommu.h b/arch/arm/mach-msm/include/mach/iommu.h
index 5542ff4..5cd7013 100644
--- a/arch/arm/mach-msm/include/mach/iommu.h
+++ b/arch/arm/mach-msm/include/mach/iommu.h
@@ -15,6 +15,7 @@
#include <linux/interrupt.h>
#include <linux/clk.h>
+#include <mach/socinfo.h>
/* Sharability attributes of MSM IOMMU mappings */
#define MSM_IOMMU_ATTR_NON_SH 0x0
@@ -26,6 +27,9 @@
#define MSM_IOMMU_ATTR_CACHED_WB_NWA 0x2
#define MSM_IOMMU_ATTR_CACHED_WT 0x3
+/* Domain attributes */
+#define MSM_IOMMU_DOMAIN_PT_CACHEABLE 0x1
+
/* Mask for the cache policy attribute */
#define MSM_IOMMU_CP_MASK 0x03
@@ -121,3 +125,17 @@
#endif
#endif
+
+static inline int msm_soc_version_supports_iommu(void)
+{
+ if (cpu_is_msm8960() &&
+ SOCINFO_VERSION_MAJOR(socinfo_get_version()) < 2)
+ return 0;
+
+ if (cpu_is_msm8x60() &&
+ (SOCINFO_VERSION_MAJOR(socinfo_get_version()) != 2 ||
+ SOCINFO_VERSION_MINOR(socinfo_get_version()) < 1)) {
+ return 0;
+ }
+ return 1;
+}
diff --git a/arch/arm/mach-msm/include/mach/msm_smd.h b/arch/arm/mach-msm/include/mach/msm_smd.h
index 320f08f..af47425 100644
--- a/arch/arm/mach-msm/include/mach/msm_smd.h
+++ b/arch/arm/mach-msm/include/mach/msm_smd.h
@@ -22,16 +22,38 @@
#define SMD_MAX_CH_NAME_LEN 20 /* includes null char at end */
-/* warning: notify() may be called before open returns */
-int smd_open(const char *name, smd_channel_t **ch, void *priv,
- void (*notify)(void *priv, unsigned event));
-
#define SMD_EVENT_DATA 1
#define SMD_EVENT_OPEN 2
#define SMD_EVENT_CLOSE 3
#define SMD_EVENT_STATUS 4
#define SMD_EVENT_REOPEN_READY 5
+enum {
+ SMD_APPS_MODEM = 0,
+ SMD_APPS_QDSP,
+ SMD_MODEM_QDSP,
+ SMD_APPS_DSPS,
+ SMD_MODEM_DSPS,
+ SMD_QDSP_DSPS,
+ SMD_APPS_WCNSS,
+ SMD_MODEM_WCNSS,
+ SMD_QDSP_WCNSS,
+ SMD_DSPS_WCNSS,
+ SMD_APPS_Q6FW,
+ SMD_MODEM_Q6FW,
+ SMD_QDSP_Q6FW,
+ SMD_DSPS_Q6FW,
+ SMD_WCNSS_Q6FW,
+ SMD_NUM_TYPE,
+ SMD_LOOPBACK_TYPE = 100,
+
+};
+
+#ifdef CONFIG_MSM_SMD
+/* warning: notify() may be called before open returns */
+int smd_open(const char *name, smd_channel_t **ch, void *priv,
+ void (*notify)(void *priv, unsigned event));
+
int smd_close(smd_channel_t *ch);
/* passing a null pointer for data reads and discards */
@@ -77,28 +99,6 @@
int smd_tiocmset(smd_channel_t *ch, unsigned int set, unsigned int clear);
int
smd_tiocmset_from_cb(smd_channel_t *ch, unsigned int set, unsigned int clear);
-
-enum {
- SMD_APPS_MODEM = 0,
- SMD_APPS_QDSP,
- SMD_MODEM_QDSP,
- SMD_APPS_DSPS,
- SMD_MODEM_DSPS,
- SMD_QDSP_DSPS,
- SMD_APPS_WCNSS,
- SMD_MODEM_WCNSS,
- SMD_QDSP_WCNSS,
- SMD_DSPS_WCNSS,
- SMD_APPS_Q6FW,
- SMD_MODEM_Q6FW,
- SMD_QDSP_Q6FW,
- SMD_DSPS_Q6FW,
- SMD_WCNSS_Q6FW,
- SMD_NUM_TYPE,
- SMD_LOOPBACK_TYPE = 100,
-
-};
-
int smd_named_open_on_edge(const char *name, uint32_t edge, smd_channel_t **_ch,
void *priv, void (*notify)(void *, unsigned));
@@ -162,4 +162,107 @@
*/
int smd_write_end(smd_channel_t *ch);
+#else
+
+static inline int smd_open(const char *name, smd_channel_t **ch, void *priv,
+ void (*notify)(void *priv, unsigned event))
+{
+ return -ENODEV;
+}
+
+static inline int smd_close(smd_channel_t *ch)
+{
+ return -ENODEV;
+}
+
+static inline int smd_read(smd_channel_t *ch, void *data, int len)
+{
+ return -ENODEV;
+}
+
+static inline int smd_read_from_cb(smd_channel_t *ch, void *data, int len)
+{
+ return -ENODEV;
+}
+
+static inline int smd_read_user_buffer(smd_channel_t *ch, void *data, int len)
+{
+ return -ENODEV;
+}
+
+static inline int smd_write(smd_channel_t *ch, const void *data, int len)
+{
+ return -ENODEV;
+}
+
+static inline int
+smd_write_user_buffer(smd_channel_t *ch, const void *data, int len)
+{
+ return -ENODEV;
+}
+
+static inline int smd_write_avail(smd_channel_t *ch)
+{
+ return -ENODEV;
+}
+
+static inline int smd_read_avail(smd_channel_t *ch)
+{
+ return -ENODEV;
+}
+
+static inline int smd_cur_packet_size(smd_channel_t *ch)
+{
+ return -ENODEV;
+}
+
+static inline int smd_tiocmget(smd_channel_t *ch)
+{
+ return -ENODEV;
+}
+
+static inline int
+smd_tiocmset(smd_channel_t *ch, unsigned int set, unsigned int clear)
+{
+ return -ENODEV;
+}
+
+static inline int
+smd_tiocmset_from_cb(smd_channel_t *ch, unsigned int set, unsigned int clear)
+{
+ return -ENODEV;
+}
+
+static inline int
+smd_named_open_on_edge(const char *name, uint32_t edge, smd_channel_t **_ch,
+ void *priv, void (*notify)(void *, unsigned))
+{
+ return -ENODEV;
+}
+
+static inline void smd_enable_read_intr(smd_channel_t *ch)
+{
+}
+
+static inline void smd_disable_read_intr(smd_channel_t *ch)
+{
+}
+
+static inline int smd_write_start(smd_channel_t *ch, int len)
+{
+ return -ENODEV;
+}
+
+static inline int
+smd_write_segment(smd_channel_t *ch, void *data, int len, int user_buf)
+{
+ return -ENODEV;
+}
+
+static inline int smd_write_end(smd_channel_t *ch)
+{
+ return -ENODEV;
+}
+#endif
+
#endif
diff --git a/arch/arm/mach-msm/include/mach/rpm-regulator.h b/arch/arm/mach-msm/include/mach/rpm-regulator.h
index 7ffa2985..f857ab8 100644
--- a/arch/arm/mach-msm/include/mach/rpm-regulator.h
+++ b/arch/arm/mach-msm/include/mach/rpm-regulator.h
@@ -132,6 +132,7 @@
RPM_VREG_VOTER3, /* for use by other drivers */
RPM_VREG_VOTER4, /* for use by the acpu-clock driver */
RPM_VREG_VOTER5, /* for use by the acpu-clock driver */
+ RPM_VREG_VOTER6, /* for use by the acpu-clock driver */
RPM_VREG_VOTER_COUNT,
};
diff --git a/arch/arm/mach-msm/iommu.c b/arch/arm/mach-msm/iommu.c
index 0a77781..e874663 100644
--- a/arch/arm/mach-msm/iommu.c
+++ b/arch/arm/mach-msm/iommu.c
@@ -38,14 +38,10 @@
#define RCP15_PRRR(reg) MRC(reg, p15, 0, c10, c2, 0)
#define RCP15_NMRR(reg) MRC(reg, p15, 0, c10, c2, 1)
-#ifndef CONFIG_IOMMU_PGTABLES_L2
static inline void clean_pte(unsigned long *start, unsigned long *end)
{
dmac_flush_range(start, end);
}
-#else
-static inline void clean_pte(unsigned long *start, unsigned long *end) { }
-#endif
static int msm_iommu_tex_class[4];
@@ -53,6 +49,7 @@
struct msm_priv {
unsigned long *pgtable;
+ int redirect;
struct list_head list_attached;
};
@@ -168,7 +165,7 @@
}
static void __program_context(void __iomem *base, int ctx, int ncb,
- phys_addr_t pgtable)
+ phys_addr_t pgtable, int redirect)
{
unsigned int prrr, nmrr;
int i, j, found;
@@ -207,25 +204,25 @@
/* Turn on BFB prefetch */
SET_BFBDFE(base, ctx, 1);
-#ifdef CONFIG_IOMMU_PGTABLES_L2
/* Configure page tables as inner-cacheable and shareable to reduce
* the TLB miss penalty.
*/
- SET_TTBR0_SH(base, ctx, 1);
- SET_TTBR1_SH(base, ctx, 1);
+ if (redirect) {
+ SET_TTBR0_SH(base, ctx, 1);
+ SET_TTBR1_SH(base, ctx, 1);
- SET_TTBR0_NOS(base, ctx, 1);
- SET_TTBR1_NOS(base, ctx, 1);
+ SET_TTBR0_NOS(base, ctx, 1);
+ SET_TTBR1_NOS(base, ctx, 1);
- SET_TTBR0_IRGNH(base, ctx, 0); /* WB, WA */
- SET_TTBR0_IRGNL(base, ctx, 1);
+ SET_TTBR0_IRGNH(base, ctx, 0); /* WB, WA */
+ SET_TTBR0_IRGNL(base, ctx, 1);
- SET_TTBR1_IRGNH(base, ctx, 0); /* WB, WA */
- SET_TTBR1_IRGNL(base, ctx, 1);
+ SET_TTBR1_IRGNH(base, ctx, 0); /* WB, WA */
+ SET_TTBR1_IRGNL(base, ctx, 1);
- SET_TTBR0_ORGN(base, ctx, 1); /* WB, WA */
- SET_TTBR1_ORGN(base, ctx, 1); /* WB, WA */
-#endif
+ SET_TTBR0_ORGN(base, ctx, 1); /* WB, WA */
+ SET_TTBR1_ORGN(base, ctx, 1); /* WB, WA */
+ }
/* Find if this page table is used elsewhere, and re-use ASID */
found = 0;
@@ -275,6 +272,10 @@
if (!priv->pgtable)
goto fail_nomem;
+#ifdef CONFIG_IOMMU_PGTABLES_L2
+ priv->redirect = flags & MSM_IOMMU_DOMAIN_PT_CACHEABLE;
+#endif
+
memset(priv->pgtable, 0, SZ_16K);
domain->priv = priv;
return 0;
@@ -355,7 +356,7 @@
goto fail;
__program_context(iommu_drvdata->base, ctx_dev->num, iommu_drvdata->ncb,
- __pa(priv->pgtable));
+ __pa(priv->pgtable), priv->redirect);
__disable_clocks(iommu_drvdata);
list_add(&(ctx_drvdata->attached_elm), &priv->list_attached);
@@ -490,8 +491,8 @@
*(fl_pte+i) = (pa & 0xFF000000) | FL_SUPERSECTION |
FL_AP_READ | FL_AP_WRITE | FL_TYPE_SECT |
FL_SHARED | FL_NG | pgprot;
-
- clean_pte(fl_pte, fl_pte + 16);
+ if (!priv->redirect)
+ clean_pte(fl_pte, fl_pte + 16);
}
if (len == SZ_1M) {
@@ -502,8 +503,8 @@
*fl_pte = (pa & 0xFFF00000) | FL_AP_READ | FL_AP_WRITE | FL_NG |
FL_TYPE_SECT | FL_SHARED | pgprot;
-
- clean_pte(fl_pte, fl_pte + 1);
+ if (!priv->redirect)
+ clean_pte(fl_pte, fl_pte + 1);
}
/* Need a 2nd level table */
@@ -524,7 +525,8 @@
*fl_pte = ((((int)__pa(sl)) & FL_BASE_MASK) | \
FL_TYPE_TABLE);
- clean_pte(fl_pte, fl_pte + 1);
+ if (!priv->redirect)
+ clean_pte(fl_pte, fl_pte + 1);
}
if (!(*fl_pte & FL_TYPE_TABLE)) {
@@ -545,7 +547,8 @@
*sl_pte = (pa & SL_BASE_MASK_SMALL) | SL_AP0 | SL_AP1 | SL_NG |
SL_SHARED | SL_TYPE_SMALL | pgprot;
- clean_pte(sl_pte, sl_pte + 1);
+ if (!priv->redirect)
+ clean_pte(sl_pte, sl_pte + 1);
}
if (len == SZ_64K) {
@@ -561,7 +564,8 @@
*(sl_pte+i) = (pa & SL_BASE_MASK_LARGE) | SL_AP0 |
SL_NG | SL_AP1 | SL_SHARED | SL_TYPE_LARGE | pgprot;
- clean_pte(sl_pte, sl_pte + 16);
+ if (!priv->redirect)
+ clean_pte(sl_pte, sl_pte + 16);
}
ret = __flush_iotlb_va(domain, va);
@@ -622,13 +626,15 @@
for (i = 0; i < 16; i++)
*(fl_pte+i) = 0;
- clean_pte(fl_pte, fl_pte + 16);
+ if (!priv->redirect)
+ clean_pte(fl_pte, fl_pte + 16);
}
if (len == SZ_1M) {
*fl_pte = 0;
- clean_pte(fl_pte, fl_pte + 1);
+ if (!priv->redirect)
+ clean_pte(fl_pte, fl_pte + 1);
}
sl_table = (unsigned long *) __va(((*fl_pte) & FL_BASE_MASK));
@@ -639,13 +645,15 @@
for (i = 0; i < 16; i++)
*(sl_pte+i) = 0;
- clean_pte(sl_pte, sl_pte + 16);
+ if (!priv->redirect)
+ clean_pte(sl_pte, sl_pte + 16);
}
if (len == SZ_4K) {
*sl_pte = 0;
- clean_pte(sl_pte, sl_pte + 1);
+ if (!priv->redirect)
+ clean_pte(sl_pte, sl_pte + 1);
}
if (len == SZ_4K || len == SZ_64K) {
@@ -658,7 +666,8 @@
free_page((unsigned long)sl_table);
*fl_pte = 0;
- clean_pte(fl_pte, fl_pte + 1);
+ if (!priv->redirect)
+ clean_pte(fl_pte, fl_pte + 1);
}
}
@@ -723,7 +732,8 @@
memset(sl_table, 0, SZ_4K);
*fl_pte = ((((int)__pa(sl_table)) & FL_BASE_MASK) |
FL_TYPE_TABLE);
- clean_pte(fl_pte, fl_pte + 1);
+ if (!priv->redirect)
+ clean_pte(fl_pte, fl_pte + 1);
} else
sl_table = (unsigned long *)
__va(((*fl_pte) & FL_BASE_MASK));
@@ -751,7 +761,8 @@
}
}
- clean_pte(sl_table + sl_start, sl_table + sl_offset);
+ if (!priv->redirect)
+ clean_pte(sl_table + sl_start, sl_table + sl_offset);
fl_pte++;
sl_offset = 0;
@@ -796,7 +807,8 @@
sl_end = NUM_SL_PTE;
memset(sl_table + sl_start, 0, (sl_end - sl_start) * 4);
- clean_pte(sl_table + sl_start, sl_table + sl_end);
+ if (!priv->redirect)
+ clean_pte(sl_table + sl_start, sl_table + sl_end);
offset += (sl_end - sl_start) * SZ_4K;
@@ -820,7 +832,8 @@
free_page((unsigned long)sl_table);
*fl_pte = 0;
- clean_pte(fl_pte, fl_pte + 1);
+ if (!priv->redirect)
+ clean_pte(fl_pte, fl_pte + 1);
}
sl_start = 0;
@@ -1006,6 +1019,9 @@
static int __init msm_iommu_init(void)
{
+ if (!msm_soc_version_supports_iommu())
+ return -ENODEV;
+
setup_iommu_tex_classes();
register_iommu(&msm_iommu_ops);
return 0;
diff --git a/arch/arm/mach-msm/iommu_dev.c b/arch/arm/mach-msm/iommu_dev.c
index ca2ecc6..d1dd3ed 100644
--- a/arch/arm/mach-msm/iommu_dev.c
+++ b/arch/arm/mach-msm/iommu_dev.c
@@ -69,7 +69,7 @@
r.name = ctx_name;
found = device_for_each_child(&msm_iommu_root_dev->dev, &r, each_iommu);
- if (!found) {
+ if (!found || !dev_get_drvdata(r.dev)) {
pr_err("Could not find context <%s>\n", ctx_name);
goto fail;
}
diff --git a/arch/arm/mach-msm/msm-buspm-dev.c b/arch/arm/mach-msm/msm-buspm-dev.c
new file mode 100644
index 0000000..296418d
--- /dev/null
+++ b/arch/arm/mach-msm/msm-buspm-dev.c
@@ -0,0 +1,256 @@
+/* Copyright (c) 2011, Code Aurora Forum. All rights reserved.
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License version 2 and
+ * only version 2 as published by the Free Software Foundation.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ */
+
+/* #define DEBUG */
+
+#include <linux/module.h>
+#include <linux/fs.h>
+#include <linux/mm.h>
+#include <linux/err.h>
+#include <linux/slab.h>
+#include <linux/errno.h>
+#include <linux/device.h>
+#include <linux/uaccess.h>
+#include <linux/miscdevice.h>
+#include <linux/memory_alloc.h>
+#include "msm-buspm-dev.h"
+
+#define MSM_BUSPM_DRV_NAME "msm-buspm-dev"
+
+/*
+ * Allocate kernel buffer.
+ * Currently limited to one buffer per file descriptor. If alloc() is
+ * called twice for the same descriptor, the original buffer is freed.
+ * There is also no locking protection so the same descriptor can not be shared.
+ */
+
+static inline void *msm_buspm_dev_get_vaddr(struct file *filp)
+{
+ struct msm_buspm_map_dev *dev = filp->private_data;
+
+ return (dev) ? dev->vaddr : NULL;
+}
+
+static inline unsigned long msm_buspm_dev_get_paddr(struct file *filp)
+{
+ struct msm_buspm_map_dev *dev = filp->private_data;
+
+ return (dev) ? dev->paddr : 0L;
+}
+
+static void msm_buspm_dev_free(struct file *filp)
+{
+ struct msm_buspm_map_dev *dev = filp->private_data;
+
+ if (dev) {
+ pr_debug("freeing memory at 0x%p\n", dev->vaddr);
+ free_contiguous_memory(dev->vaddr);
+ dev->paddr = 0L;
+ dev->vaddr = NULL;
+ }
+}
+
+static int msm_buspm_dev_open(struct inode *inode, struct file *filp)
+{
+ struct msm_buspm_map_dev *dev;
+
+ if (capable(CAP_SYS_ADMIN)) {
+ dev = kzalloc(sizeof(*dev), GFP_KERNEL);
+ if (dev)
+ filp->private_data = dev;
+ else
+ return -ENOMEM;
+ } else {
+ return -EPERM;
+ }
+
+ return 0;
+}
+
+static int
+msm_buspm_dev_alloc(struct file *filp, struct buspm_alloc_params data)
+{
+ unsigned long paddr;
+ void *vaddr;
+ struct msm_buspm_map_dev *dev = filp->private_data;
+
+ /* If buffer already allocated, then free it */
+ if (dev->vaddr)
+ msm_buspm_dev_free(filp);
+
+ /* Allocate uncached memory */
+ vaddr = allocate_contiguous_ebi(data.size, PAGE_SIZE, 0);
+ paddr = (vaddr) ? memory_pool_node_paddr(vaddr) : 0L;
+
+ if (vaddr == NULL) {
+ pr_err("allocation of 0x%x bytes failed", data.size);
+ return -ENOMEM;
+ }
+
+ dev->vaddr = vaddr;
+ dev->paddr = paddr;
+ dev->buflen = data.size;
+ filp->f_pos = 0;
+ pr_debug("virt addr = 0x%p\n", dev->vaddr);
+ pr_debug("phys addr = 0x%lx\n", dev->paddr);
+
+ return 0;
+}
+
+static long
+msm_buspm_dev_ioctl(struct file *filp, unsigned int cmd, unsigned long arg)
+{
+ struct buspm_xfer_req xfer;
+ struct buspm_alloc_params alloc_data;
+ unsigned long paddr;
+ int retval = 0;
+ void *buf = msm_buspm_dev_get_vaddr(filp);
+ unsigned char *dbgbuf = buf;
+
+ switch (cmd) {
+ case MSM_BUSPM_IOC_FREE:
+ pr_debug("cmd = 0x%x (FREE)\n", cmd);
+ msm_buspm_dev_free(filp);
+ break;
+
+ case MSM_BUSPM_IOC_ALLOC:
+ pr_debug("cmd = 0x%x (ALLOC)\n", cmd);
+ retval = __get_user(alloc_data.size, (size_t __user *)arg);
+
+ if (retval == 0)
+ retval = msm_buspm_dev_alloc(filp, alloc_data);
+ break;
+
+ case MSM_BUSPM_IOC_RD_PHYS_ADDR:
+ pr_debug("Read Physical Address\n");
+ paddr = msm_buspm_dev_get_paddr(filp);
+ if (paddr == 0L) {
+ retval = -EINVAL;
+ } else {
+ pr_debug("phys addr = 0x%lx\n", paddr);
+ retval = __put_user(paddr,
+ (unsigned long __user *)arg);
+ }
+ break;
+
+ case MSM_BUSPM_IOC_RDBUF:
+ pr_debug("Read Buffer: 0x%x%x%x%x\n",
+ dbgbuf[0], dbgbuf[1], dbgbuf[2], dbgbuf[3]);
+
+ if (!buf) {
+ retval = -EINVAL;
+ break;
+ }
+
+ if (copy_from_user(&xfer, (void __user *)arg, sizeof(xfer))) {
+ retval = -EFAULT;
+ break;
+ }
+
+ if ((xfer.size <= sizeof(buf)) &&
+ (copy_to_user((void __user *)xfer.data, buf,
+ xfer.size))) {
+ retval = -EFAULT;
+ break;
+ }
+ break;
+
+ case MSM_BUSPM_IOC_WRBUF:
+ pr_debug("Write Buffer\n");
+
+ if (!buf) {
+ retval = -EINVAL;
+ break;
+ }
+
+ if (copy_from_user(&xfer, (void __user *)arg, sizeof(xfer))) {
+ retval = -EFAULT;
+ break;
+ }
+
+ if ((sizeof(buf) <= xfer.size) &&
+ (copy_from_user(buf, (void __user *)xfer.data,
+ xfer.size))) {
+ retval = -EFAULT;
+ break;
+ }
+ break;
+
+ default:
+ pr_debug("Unknown command 0x%x\n", cmd);
+ retval = -EINVAL;
+ break;
+ }
+
+ return retval;
+}
+
+static int msm_buspm_dev_release(struct inode *inode, struct file *filp)
+{
+ struct msm_buspm_map_dev *dev = filp->private_data;
+
+ msm_buspm_dev_free(filp);
+ kfree(dev);
+ filp->private_data = NULL;
+
+ return 0;
+}
+
+static int msm_buspm_dev_mmap(struct file *filp, struct vm_area_struct *vma)
+{
+ pr_debug("vma = 0x%p\n", vma);
+
+ /* Mappings are uncached */
+ vma->vm_page_prot = pgprot_noncached(vma->vm_page_prot);
+ if (remap_pfn_range(vma, vma->vm_start, vma->vm_pgoff,
+ vma->vm_end - vma->vm_start, vma->vm_page_prot))
+ return -EFAULT;
+
+ return 0;
+}
+
+static const struct file_operations msm_buspm_dev_fops = {
+ .owner = THIS_MODULE,
+ .mmap = msm_buspm_dev_mmap,
+ .open = msm_buspm_dev_open,
+ .unlocked_ioctl = msm_buspm_dev_ioctl,
+ .llseek = noop_llseek,
+ .release = msm_buspm_dev_release,
+};
+
+struct miscdevice msm_buspm_misc = {
+ .minor = MISC_DYNAMIC_MINOR,
+ .name = MSM_BUSPM_DRV_NAME,
+ .fops = &msm_buspm_dev_fops,
+};
+
+static int __init msm_buspm_dev_init(void)
+{
+ int ret = 0;
+
+ ret = misc_register(&msm_buspm_misc);
+ if (ret < 0)
+ pr_err("%s: Cannot register misc device\n", __func__);
+
+ return ret;
+}
+
+static void __exit msm_buspm_dev_exit(void)
+{
+ misc_deregister(&msm_buspm_misc);
+}
+module_init(msm_buspm_dev_init);
+module_exit(msm_buspm_dev_exit);
+
+MODULE_LICENSE("GPL v2");
+MODULE_VERSION("1.0");
+MODULE_ALIAS("platform:"MSM_BUSPM_DRV_NAME);
diff --git a/arch/arm/mach-msm/msm-buspm-dev.h b/arch/arm/mach-msm/msm-buspm-dev.h
new file mode 100644
index 0000000..5839087
--- /dev/null
+++ b/arch/arm/mach-msm/msm-buspm-dev.h
@@ -0,0 +1,50 @@
+/* Copyright (c) 2011, Code Aurora Forum. All rights reserved.
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License version 2 and
+ * only version 2 as published by the Free Software Foundation.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ */
+
+#ifndef __MSM_BUSPM_DEV_H__
+#define __MSM_BUSPM_DEV_H__
+
+#include <linux/ioctl.h>
+
+struct msm_buspm_map_dev {
+ void *vaddr;
+ unsigned long paddr;
+ size_t buflen;
+};
+
+/* Read/write data into kernel buffer */
+struct buspm_xfer_req {
+ int size; /* Size of this request, in bytes */
+ void *data; /* Data buffer to transfer data to/from */
+};
+
+struct buspm_alloc_params {
+ int size;
+};
+
+#define MSM_BUSPM_IOC_MAGIC 'p'
+
+#define MSM_BUSPM_IOC_FREE \
+ _IOW(MSM_BUSPM_IOC_MAGIC, 0, void *)
+
+#define MSM_BUSPM_IOC_ALLOC \
+ _IOW(MSM_BUSPM_IOC_MAGIC, 1, size_t)
+
+#define MSM_BUSPM_IOC_RDBUF \
+ _IOW(MSM_BUSPM_IOC_MAGIC, 2, struct buspm_xfer_req)
+
+#define MSM_BUSPM_IOC_WRBUF \
+ _IOW(MSM_BUSPM_IOC_MAGIC, 3, struct buspm_xfer_req)
+
+#define MSM_BUSPM_IOC_RD_PHYS_ADDR \
+ _IOR(MSM_BUSPM_IOC_MAGIC, 4, unsigned long)
+#endif
diff --git a/arch/arm/mach-msm/msm_rq_stats.c b/arch/arm/mach-msm/msm_rq_stats.c
index 83d5e96..425000d 100644
--- a/arch/arm/mach-msm/msm_rq_stats.c
+++ b/arch/arm/mach-msm/msm_rq_stats.c
@@ -55,7 +55,7 @@
rq_info.rq_avg = 0;
spin_unlock_irqrestore(&rq_lock, flags);
- return sprintf(buf, "%d.%d\n", val/10, val%10);
+ return snprintf(buf, PAGE_SIZE, "%d.%d\n", val/10, val%10);
}
static ssize_t show_run_queue_poll_ms(struct kobject *kobj,
diff --git a/arch/arm/mach-msm/msm_watchdog.c b/arch/arm/mach-msm/msm_watchdog.c
index 8a9ac36..a1316b7 100644
--- a/arch/arm/mach-msm/msm_watchdog.c
+++ b/arch/arm/mach-msm/msm_watchdog.c
@@ -29,6 +29,8 @@
#include "msm_watchdog.h"
#include "timer.h"
+#define MODULE_NAME "msm_watchdog"
+
#define TCSR_WDT_CFG 0x30
#define WDT0_RST 0x38
@@ -36,11 +38,12 @@
#define WDT0_BARK_TIME 0x4C
#define WDT0_BITE_TIME 0x5C
+#define WDT_HZ 32768
+
static void __iomem *msm_tmr0_base;
-/* Watchdog pet interval in ms */
-#define PET_DELAY 10000
static unsigned long delay_time;
+static unsigned long bark_time;
static unsigned long long last_pet;
/*
@@ -88,33 +91,26 @@
static DECLARE_DELAYED_WORK(dogwork_struct, pet_watchdog_work);
static DECLARE_WORK(init_dogwork_struct, init_watchdog_work);
-static int msm_watchdog_suspend(void)
+static int msm_watchdog_suspend(struct device *dev)
{
+ if (!enable)
+ return 0;
+
__raw_writel(1, msm_tmr0_base + WDT0_RST);
__raw_writel(0, msm_tmr0_base + WDT0_EN);
mb();
- return NOTIFY_DONE;
-}
-static int msm_watchdog_resume(void)
-{
- __raw_writel(1, msm_tmr0_base + WDT0_EN);
- __raw_writel(1, msm_tmr0_base + WDT0_RST);
- return NOTIFY_DONE;
+ return 0;
}
-static int msm_watchdog_power_event(struct notifier_block *this,
- unsigned long event, void *ptr)
+static int msm_watchdog_resume(struct device *dev)
{
- switch (event) {
- case PM_POST_HIBERNATION:
- case PM_POST_SUSPEND:
- return msm_watchdog_resume();
- case PM_HIBERNATION_PREPARE:
- case PM_SUSPEND_PREPARE:
- return msm_watchdog_suspend();
- default:
- return NOTIFY_DONE;
- }
+ if (!enable)
+ return 0;
+
+ __raw_writel(1, msm_tmr0_base + WDT0_EN);
+ __raw_writel(1, msm_tmr0_base + WDT0_RST);
+ mb();
+ return 0;
}
static int panic_wdog_handler(struct notifier_block *this,
@@ -124,9 +120,9 @@
__raw_writel(0, msm_tmr0_base + WDT0_EN);
mb();
} else {
- __raw_writel(32768 * (panic_timeout + 4),
+ __raw_writel(WDT_HZ * (panic_timeout + 4),
msm_tmr0_base + WDT0_BARK_TIME);
- __raw_writel(32768 * (panic_timeout + 4),
+ __raw_writel(WDT_HZ * (panic_timeout + 4),
msm_tmr0_base + WDT0_BITE_TIME);
__raw_writel(1, msm_tmr0_base + WDT0_RST);
}
@@ -137,10 +133,6 @@
.notifier_call = panic_wdog_handler,
};
-static struct notifier_block msm_watchdog_power_notifier = {
- .notifier_call = msm_watchdog_power_event,
-};
-
static int wdog_enable_set(const char *val, struct kernel_param *kp)
{
int ret = 0;
@@ -164,16 +156,14 @@
case 1:
if (!old_val) {
__raw_writel(0, msm_tmr0_base + WDT0_EN);
- unregister_pm_notifier(&msm_watchdog_power_notifier);
-
- /* may be suspended after the first write above */
- __raw_writel(0, msm_tmr0_base + WDT0_EN);
mb();
free_irq(WDT0_ACCSCSSNBARK_INT, 0);
enable = 0;
atomic_notifier_chain_unregister(&panic_notifier_list,
&panic_blk);
cancel_delayed_work(&dogwork_struct);
+ /* may be suspended after the first write above */
+ __raw_writel(0, msm_tmr0_base + WDT0_EN);
printk(KERN_INFO "MSM Watchdog deactivated.\n");
}
break;
@@ -204,18 +194,18 @@
schedule_delayed_work_on(0, &dogwork_struct, delay_time);
}
-static void __exit exit_watchdog(void)
+static int msm_watchdog_remove(struct platform_device *pdev)
{
if (enable) {
__raw_writel(0, msm_tmr0_base + WDT0_EN);
- unregister_pm_notifier(&msm_watchdog_power_notifier);
- /* In case we got suspended mid-exit */
- __raw_writel(0, msm_tmr0_base + WDT0_EN);
mb();
free_irq(WDT0_ACCSCSSNBARK_INT, 0);
enable = 0;
+ /* In case we got suspended mid-exit */
+ __raw_writel(0, msm_tmr0_base + WDT0_EN);
}
printk(KERN_INFO "MSM Watchdog Exit - Deactivated\n");
+ return 0;
}
static irqreturn_t wdog_bark_handler(int irq, void *dev_id)
@@ -235,7 +225,7 @@
if (print_all_stacks) {
/* Suspend wdog until all stacks are printed */
- msm_watchdog_suspend();
+ msm_watchdog_suspend(NULL);
printk(KERN_INFO "Stack trace dump:\n");
@@ -245,7 +235,7 @@
show_stack(tsk, NULL);
}
- msm_watchdog_resume();
+ msm_watchdog_resume(NULL);
}
panic("Apps watchdog bark received!");
@@ -262,7 +252,7 @@
int len;
} cmd_buf;
- if (!appsbark && !cpu_is_msm9615()) {
+ if (!appsbark) {
scm_regsave = (void *)__get_free_page(GFP_KERNEL);
if (scm_regsave) {
@@ -289,46 +279,9 @@
static void init_watchdog_work(struct work_struct *work)
{
- int ret;
-
- if (!enable) {
- printk(KERN_INFO "MSM Watchdog Not Initialized\n");
- return;
- }
-
- msm_tmr0_base = msm_timer_get_timer0_base();
-
- /* Must request irq before sending scm command */
- ret = request_irq(WDT0_ACCSCSSNBARK_INT, wdog_bark_handler, 0,
- "apps_wdog_bark", NULL);
- if (ret)
- return;
-
- /*
- * This is only temporary till SBLs turn on the XPUs
- * This initialization will be done in SBLs on a later releases
- */
- if (cpu_is_msm9615())
- __raw_writel(0xF, MSM_TCSR_BASE + TCSR_WDT_CFG);
-
- configure_bark_dump();
-
- delay_time = msecs_to_jiffies(PET_DELAY);
-
- /* 32768 ticks = 1 second */
- if (machine_is_msm8960_sim()) {
- __raw_writel(32768*15, msm_tmr0_base + WDT0_BARK_TIME);
- __raw_writel(32768*17, msm_tmr0_base + WDT0_BITE_TIME);
- } else {
- __raw_writel(32768*11, msm_tmr0_base + WDT0_BARK_TIME);
- __raw_writel(32768*12, msm_tmr0_base + WDT0_BITE_TIME);
- }
-
- ret = register_pm_notifier(&msm_watchdog_power_notifier);
- if (ret) {
- free_irq(WDT0_ACCSCSSNBARK_INT, NULL);
- return;
- }
+ u64 timeout = (bark_time * WDT_HZ)/1000;
+ __raw_writel(timeout, msm_tmr0_base + WDT0_BARK_TIME);
+ __raw_writel(timeout + 3*WDT_HZ, msm_tmr0_base + WDT0_BITE_TIME);
schedule_delayed_work_on(0, &dogwork_struct, delay_time);
@@ -344,14 +297,64 @@
return;
}
-static int __init init_watchdog(void)
+static int msm_watchdog_probe(struct platform_device *pdev)
{
+ struct msm_watchdog_pdata *pdata = pdev->dev.platform_data;
+ int ret;
+
+ if (!enable || !pdata || !pdata->pet_time || !pdata->bark_time) {
+ printk(KERN_INFO "MSM Watchdog Not Initialized\n");
+ return -ENODEV;
+ }
+
+ if (!pdata->has_secure)
+ appsbark = 1;
+
+ bark_time = pdata->bark_time;
+
+ msm_tmr0_base = msm_timer_get_timer0_base();
+
+ /* Must request irq before sending scm command */
+ ret = request_irq(WDT0_ACCSCSSNBARK_INT, wdog_bark_handler, 0,
+ "apps_wdog_bark", NULL);
+ if (ret)
+ return -EINVAL;
+
+ /*
+ * This is only temporary till SBLs turn on the XPUs
+ * This initialization will be done in SBLs on a later releases
+ */
+ if (cpu_is_msm9615())
+ __raw_writel(0xF, MSM_TCSR_BASE + TCSR_WDT_CFG);
+
+ configure_bark_dump();
+
+ delay_time = msecs_to_jiffies(pdata->pet_time);
schedule_work_on(0, &init_dogwork_struct);
return 0;
}
+static const struct dev_pm_ops msm_watchdog_dev_pm_ops = {
+ .suspend_noirq = msm_watchdog_suspend,
+ .resume_noirq = msm_watchdog_resume,
+};
+
+static struct platform_driver msm_watchdog_driver = {
+ .probe = msm_watchdog_probe,
+ .remove = msm_watchdog_remove,
+ .driver = {
+ .name = MODULE_NAME,
+ .owner = THIS_MODULE,
+ .pm = &msm_watchdog_dev_pm_ops,
+ },
+};
+
+static int init_watchdog(void)
+{
+ return platform_driver_register(&msm_watchdog_driver);
+}
+
late_initcall(init_watchdog);
-module_exit(exit_watchdog);
MODULE_DESCRIPTION("MSM Watchdog Driver");
MODULE_VERSION("1.0");
MODULE_LICENSE("GPL v2");
diff --git a/arch/arm/mach-msm/msm_watchdog.h b/arch/arm/mach-msm/msm_watchdog.h
index 23ff60e..201c2b1 100644
--- a/arch/arm/mach-msm/msm_watchdog.h
+++ b/arch/arm/mach-msm/msm_watchdog.h
@@ -13,6 +13,14 @@
#ifndef __ARCH_ARM_MACH_MSM_MSM_WATCHDOG_H
#define __ARCH_ARM_MACH_MSM_MSM_WATCHDOG_H
+struct msm_watchdog_pdata {
+ /* pet interval period in ms */
+ unsigned int pet_time;
+ /* bark timeout in ms */
+ unsigned int bark_time;
+ bool has_secure;
+};
+
#ifdef CONFIG_MSM_WATCHDOG
void pet_watchdog(void);
#else
diff --git a/arch/arm/mach-msm/pm-8x60.c b/arch/arm/mach-msm/pm-8x60.c
index 6a78597..ad6da6a 100644
--- a/arch/arm/mach-msm/pm-8x60.c
+++ b/arch/arm/mach-msm/pm-8x60.c
@@ -162,7 +162,7 @@
}
if (ret > 0) {
- strcat(buf, "\n");
+ strlcat(buf, "\n", PAGE_SIZE);
ret++;
}
@@ -216,7 +216,7 @@
{
char cpu_name[8];
struct kobject *cpu_kobj;
- struct msm_pm_sysfs_sleep_mode *mode;
+ struct msm_pm_sysfs_sleep_mode *mode = NULL;
int i, j, k;
int ret;
diff --git a/arch/arm/mach-msm/rpm_resources.c b/arch/arm/mach-msm/rpm_resources.c
index 6bbfee4..0cc2272 100644
--- a/arch/arm/mach-msm/rpm_resources.c
+++ b/arch/arm/mach-msm/rpm_resources.c
@@ -28,6 +28,7 @@
#include "mpm.h"
#include "rpm_resources.h"
#include "spm.h"
+#include "idle.h"
/******************************************************************************
* Debug Definitions
@@ -513,6 +514,7 @@
BUG_ON(!msm_rpmrs_l2_counter_addr);
writel_relaxed(++msm_rpmrs_l2_reset_count,
msm_rpmrs_l2_counter_addr);
+ msm_pm_set_l2_flush_flag(1);
break;
case MSM_RPMRS_L2_CACHE_GDHS:
lpm = MSM_SPM_L2_MODE_GDHS;
@@ -537,6 +539,7 @@
bool notify_rpm, bool collapsed)
{
msm_spm_l2_set_low_power_mode(MSM_SPM_MODE_DISABLED, notify_rpm);
+ msm_pm_set_l2_flush_flag(0);
if (!collapsed && (limits->l2_cache == MSM_RPMRS_L2_CACHE_HSFS_OPEN))
writel_relaxed(--msm_rpmrs_l2_reset_count,
msm_rpmrs_l2_counter_addr);
@@ -683,7 +686,7 @@
rc = param_get_uint(buf, &kp);
if (rc > 0) {
- strcat(buf, "\n");
+ strlcat(buf, "\n", PAGE_SIZE);
rc++;
}
@@ -769,6 +772,7 @@
goto resource_sysfs_add_exit;
}
+ rc = 0;
resource_sysfs_add_exit:
if (rc) {
if (low_power_kobj)
@@ -1063,6 +1067,8 @@
msm_rpmrs_l2_counter_addr);
mb();
+ msm_pm_set_l2_flush_flag(0);
+
msm_rpmrs_l2_cache.beyond_limits =
msm_spm_l2_cache_beyond_limits;
msm_rpmrs_l2_cache.aggregate = NULL;
diff --git a/arch/arm/mach-msm/sdio_cmux.c b/arch/arm/mach-msm/sdio_cmux.c
index f7c25c3..0aa5423 100644
--- a/arch/arm/mach-msm/sdio_cmux.c
+++ b/arch/arm/mach-msm/sdio_cmux.c
@@ -336,10 +336,12 @@
ch = &logical_ch[id];
mutex_lock(&ch->lc_lock);
+ ch->receive_cb = NULL;
+ mutex_lock(&ch->tx_lock);
+ ch->write_done = NULL;
+ mutex_unlock(&ch->tx_lock);
ch->is_local_open = 0;
ch->priv = NULL;
- ch->receive_cb = NULL;
- ch->write_done = NULL;
mutex_unlock(&ch->lc_lock);
sdio_cmux_write_cmd(ch->lc_id, CLOSE);
return 0;
diff --git a/arch/arm/mach-msm/socinfo.c b/arch/arm/mach-msm/socinfo.c
index 9df1a68..206dfd2 100644
--- a/arch/arm/mach-msm/socinfo.c
+++ b/arch/arm/mach-msm/socinfo.c
@@ -216,6 +216,15 @@
/* 8930 IDs */
[116] = MSM_CPU_8930,
+ /* 8660A ID */
+ [122] = MSM_CPU_8960,
+
+ /* 8260A ID */
+ [123] = MSM_CPU_8960,
+
+ /* 8060A ID */
+ [124] = MSM_CPU_8960,
+
/* Uninitialized IDs are not known to run Linux.
MSM_CPU_UNKNOWN is set to 0 to ensure these IDs are
considered as unknown CPU. */
diff --git a/arch/arm/mach-msm/timer.c b/arch/arm/mach-msm/timer.c
index b597fb1..d9488ec 100644
--- a/arch/arm/mach-msm/timer.c
+++ b/arch/arm/mach-msm/timer.c
@@ -49,6 +49,10 @@
#define DG_TIMER_RATING 300
#endif
+#ifndef MSM_TMR0_BASE
+#define MSM_TMR0_BASE MSM_TMR_BASE
+#endif
+
#define MSM_DGT_SHIFT (5)
#define TIMER_MATCH_VAL 0x0000
@@ -336,6 +340,7 @@
struct msm_clock *clock;
struct msm_clock_percpu_data *clock_state, *gpt_state;
unsigned long irq_flags;
+ struct irq_chip *chip;
clock = clockevent_to_clock(evt);
clock_state = &__get_cpu_var(msm_clocks_percpu)[clock->index];
@@ -355,11 +360,9 @@
get_cpu_var(msm_active_clock) = clock;
put_cpu_var(msm_active_clock);
__raw_writel(TIMER_ENABLE_EN, clock->regbase + TIMER_ENABLE);
- if (irq_get_chip(clock->irq.irq) &&
- irq_get_chip(clock->irq.irq)->irq_unmask) {
- irq_get_chip(clock->irq.irq)->irq_unmask(
- irq_get_irq_data(clock->irq.irq));
- }
+ chip = irq_get_chip(clock->irq.irq);
+ if (chip && chip->irq_unmask)
+ chip->irq_unmask(irq_get_irq_data(clock->irq.irq));
if (clock != &msm_clocks[MSM_CLOCK_GPT])
__raw_writel(TIMER_ENABLE_EN,
msm_clocks[MSM_CLOCK_GPT].regbase +
@@ -375,11 +378,9 @@
msm_read_timer_count(clock, LOCAL_TIMER) +
clock_state->sleep_offset;
__raw_writel(0, clock->regbase + TIMER_MATCH_VAL);
- if (irq_get_chip(clock->irq.irq) &&
- irq_get_chip(clock->irq.irq)->irq_mask) {
- irq_get_chip(clock->irq.irq)->irq_mask(
- irq_get_irq_data(clock->irq.irq));
- }
+ chip = irq_get_chip(clock->irq.irq);
+ if (chip && chip->irq_mask)
+ chip->irq_mask(irq_get_irq_data(clock->irq.irq));
if (!is_smp() || clock != &msm_clocks[MSM_CLOCK_DGT]
|| smp_processor_id())
@@ -396,7 +397,6 @@
local_irq_restore(irq_flags);
}
-/* Call this after SMP init */
void __iomem *msm_timer_get_timer0_base(void)
{
return MSM_TMR_BASE + global_timer_offset;
@@ -973,6 +973,7 @@
{
int i;
int res;
+ struct irq_chip *chip;
struct msm_clock *dgt = &msm_clocks[MSM_CLOCK_DGT];
struct msm_clock *gpt = &msm_clocks[MSM_CLOCK_GPT];
@@ -995,10 +996,17 @@
else if (cpu_is_msm7x30() || cpu_is_msm8x55())
dgt->freq = 6144000;
else if (cpu_is_msm8x60()) {
+ global_timer_offset = MSM_TMR0_BASE - MSM_TMR_BASE;
dgt->freq = 6750000;
__raw_writel(DGT_CLK_CTL_DIV_4, MSM_TMR_BASE + DGT_CLK_CTL);
- } else if (cpu_is_msm8960() || cpu_is_apq8064() || cpu_is_msm8930()
- || cpu_is_msm9615()) {
+ } else if (cpu_is_msm9615()) {
+ dgt->freq = 6750000;
+ __raw_writel(DGT_CLK_CTL_DIV_4, MSM_TMR_BASE + DGT_CLK_CTL);
+ gpt->freq = 32765;
+ gpt_hz = 32765;
+ sclk_hz = 32765;
+ } else if (cpu_is_msm8960() || cpu_is_apq8064() || cpu_is_msm8930()) {
+ global_timer_offset = MSM_TMR0_BASE - MSM_TMR_BASE;
dgt->freq = 6750000;
__raw_writel(DGT_CLK_CTL_DIV_4, MSM_TMR_BASE + DGT_CLK_CTL);
gpt->freq = 32765;
@@ -1056,8 +1064,9 @@
printk(KERN_ERR "msm_timer_init: setup_irq "
"failed for %s\n", cs->name);
- irq_get_chip(clock->irq.irq)->irq_mask(irq_get_irq_data(
- clock->irq.irq));
+ chip = irq_get_chip(clock->irq.irq);
+ if (chip && chip->irq_mask)
+ chip->irq_mask(irq_get_irq_data(clock->irq.irq));
clockevents_register_device(ce);
}
@@ -1082,7 +1091,6 @@
if (!smp_processor_id())
return 0;
- global_timer_offset = MSM_TMR0_BASE - MSM_TMR_BASE;
if (cpu_is_msm8x60() || cpu_is_msm8960() || cpu_is_apq8064()
|| cpu_is_msm8930())
__raw_writel(DGT_CLK_CTL_DIV_4, MSM_TMR_BASE + DGT_CLK_CTL);
diff --git a/arch/arm/mm/mmu.c b/arch/arm/mm/mmu.c
index 350e5a9..9beef12 100644
--- a/arch/arm/mm/mmu.c
+++ b/arch/arm/mm/mmu.c
@@ -25,6 +25,7 @@
#include <asm/tlb.h>
#include <asm/highmem.h>
#include <asm/traps.h>
+#include <asm/mmu_writeable.h>
#include <asm/mach/arch.h>
#include <asm/mach/map.h>
@@ -49,6 +50,9 @@
#define CPOLICY_WRITEBACK 3
#define CPOLICY_WRITEALLOC 4
+#define RX_AREA_START _text
+#define RX_AREA_END __start_rodata
+
static unsigned int cachepolicy __initdata = CPOLICY_WRITEBACK;
static unsigned int ecc_mask __initdata = 0;
pgprot_t pgprot_user;
@@ -791,6 +795,19 @@
{
int i, j, highmem = 0;
+#if (defined CONFIG_HIGHMEM) && (defined CONFIG_FIX_MOVABLE_ZONE)
+
+/* For now, we must ensure that a small highmem zone exists
+ * after most of it is transformed into the movable zone.
+ */
+#define MIN_HIGHMEM_SIZE (5 * SECTION_SIZE)
+ void *v_movable_start;
+
+ v_movable_start = __va(movable_reserved_start) - MIN_HIGHMEM_SIZE;
+
+ if (vmalloc_min > v_movable_start)
+ vmalloc_min = v_movable_start;
+#endif
for (i = 0, j = 0; i < meminfo.nr_banks; i++) {
struct membank *bank = &meminfo.bank[j];
*bank = meminfo.bank[i];
@@ -1028,6 +1045,90 @@
#endif
}
+#ifdef CONFIG_STRICT_MEMORY_RWX
+static struct {
+ pmd_t *pmd_to_flush;
+ pmd_t *pmd;
+ unsigned long addr;
+ pmd_t saved_pmd;
+ bool made_writeable;
+} mem_unprotect;
+
+static DEFINE_SPINLOCK(mem_text_writeable_lock);
+
+void mem_text_writeable_spinlock(unsigned long *flags)
+{
+ spin_lock_irqsave(&mem_text_writeable_lock, *flags);
+}
+
+void mem_text_writeable_spinunlock(unsigned long *flags)
+{
+ spin_unlock_irqrestore(&mem_text_writeable_lock, *flags);
+}
+
+/*
+ * mem_text_address_writeable() and mem_text_address_restore()
+ * should be called as a pair. They are used to make the
+ * specified address in the kernel text section temporarily writeable
+ * when it has been marked read-only by STRICT_MEMORY_RWX.
+ * Used by kprobes and other debugging tools to set breakpoints etc.
+ * mem_text_address_writeable() is invoked before writing.
+ * After the write, mem_text_address_restore() must be called
+ * to restore the original state.
+ * This is only effective when used on the kernel text section
+ * marked as MEMORY_RX by map_lowmem()
+ *
+ * They must each be called with mem_text_writeable_lock locked
+ * by the caller, with no unlocking between the calls.
+ * The caller should release mem_text_writeable_lock immediately
+ * after the call to mem_text_address_restore().
+ * Only the write and associated cache operations should be performed
+ * between the calls.
+ */
+
+/* this function must be called with mem_text_writeable_lock held */
+void mem_text_address_writeable(unsigned long addr)
+{
+ struct task_struct *tsk = current;
+ struct mm_struct *mm = tsk->active_mm;
+ pgd_t *pgd = pgd_offset(mm, addr);
+ pud_t *pud = pud_offset(pgd, addr);
+
+ mem_unprotect.made_writeable = 0;
+
+ if ((addr < (unsigned long)RX_AREA_START) ||
+ (addr >= (unsigned long)RX_AREA_END))
+ return;
+
+ mem_unprotect.pmd = pmd_offset(pud, addr);
+ mem_unprotect.pmd_to_flush = mem_unprotect.pmd;
+ mem_unprotect.addr = addr & PAGE_MASK;
+
+ if (addr & SECTION_SIZE)
+ mem_unprotect.pmd++;
+
+ mem_unprotect.saved_pmd = *mem_unprotect.pmd;
+ if ((mem_unprotect.saved_pmd & PMD_TYPE_MASK) != PMD_TYPE_SECT)
+ return;
+
+ *mem_unprotect.pmd &= ~PMD_SECT_APX;
+
+ flush_pmd_entry(mem_unprotect.pmd_to_flush);
+ flush_tlb_kernel_page(mem_unprotect.addr);
+ mem_unprotect.made_writeable = 1;
+}
+
+/* this function must be called with mem_text_writeable_lock held */
+void mem_text_address_restore(void)
+{
+ if (mem_unprotect.made_writeable) {
+ *mem_unprotect.pmd = mem_unprotect.saved_pmd;
+ flush_pmd_entry(mem_unprotect.pmd_to_flush);
+ flush_tlb_kernel_page(mem_unprotect.addr);
+ }
+}
+#endif
+
static void __init map_lowmem(void)
{
struct memblock_region *reg;
@@ -1052,9 +1153,9 @@
create_mapping(&map);
- map.pfn = __phys_to_pfn(__pa(_text));
- map.virtual = (unsigned long)_text;
- map.length = __start_rodata - _text;
+ map.pfn = __phys_to_pfn(__pa(RX_AREA_START));
+ map.virtual = (unsigned long)RX_AREA_START;
+ map.length = RX_AREA_END - RX_AREA_START;
map.type = MT_MEMORY_RX;
create_mapping(&map);
diff --git a/drivers/base/iommu.c b/drivers/base/iommu.c
index 1377e85..6507d8b 100644
--- a/drivers/base/iommu.c
+++ b/drivers/base/iommu.c
@@ -45,6 +45,9 @@
struct iommu_domain *domain;
int ret;
+ if (!iommu_found())
+ return NULL;
+
domain = kmalloc(sizeof(*domain), GFP_KERNEL);
if (!domain)
return NULL;
@@ -64,6 +67,9 @@
void iommu_domain_free(struct iommu_domain *domain)
{
+ if (!iommu_found())
+ return;
+
iommu_ops->domain_destroy(domain);
kfree(domain);
}
@@ -71,12 +77,18 @@
int iommu_attach_device(struct iommu_domain *domain, struct device *dev)
{
+ if (!iommu_found())
+ return -ENODEV;
+
return iommu_ops->attach_dev(domain, dev);
}
EXPORT_SYMBOL_GPL(iommu_attach_device);
void iommu_detach_device(struct iommu_domain *domain, struct device *dev)
{
+ if (!iommu_found())
+ return;
+
iommu_ops->detach_dev(domain, dev);
}
EXPORT_SYMBOL_GPL(iommu_detach_device);
@@ -84,6 +96,9 @@
phys_addr_t iommu_iova_to_phys(struct iommu_domain *domain,
unsigned long iova)
{
+ if (!iommu_found())
+ return 0;
+
return iommu_ops->iova_to_phys(domain, iova);
}
EXPORT_SYMBOL_GPL(iommu_iova_to_phys);
@@ -91,6 +106,9 @@
int iommu_domain_has_cap(struct iommu_domain *domain,
unsigned long cap)
{
+ if (!iommu_found())
+ return -ENODEV;
+
return iommu_ops->domain_has_cap(domain, cap);
}
EXPORT_SYMBOL_GPL(iommu_domain_has_cap);
@@ -101,6 +119,9 @@
unsigned long invalid_mask;
size_t size;
+ if (!iommu_found())
+ return -ENODEV;
+
size = 0x1000UL << gfp_order;
invalid_mask = size - 1;
@@ -115,6 +136,9 @@
unsigned long invalid_mask;
size_t size;
+ if (!iommu_found())
+ return -ENODEV;
+
size = 0x1000UL << gfp_order;
invalid_mask = size - 1;
@@ -127,6 +151,9 @@
int iommu_map_range(struct iommu_domain *domain, unsigned int iova,
struct scatterlist *sg, unsigned int len, int prot)
{
+ if (!iommu_found())
+ return -ENODEV;
+
BUG_ON(iova & (~PAGE_MASK));
return iommu_ops->map_range(domain, iova, sg, len, prot);
@@ -136,6 +163,9 @@
int iommu_unmap_range(struct iommu_domain *domain, unsigned int iova,
unsigned int len)
{
+ if (!iommu_found())
+ return -ENODEV;
+
BUG_ON(iova & (~PAGE_MASK));
return iommu_ops->unmap_range(domain, iova, len);
diff --git a/drivers/bluetooth/hci_smd.c b/drivers/bluetooth/hci_smd.c
index 2ecddcf..77f9c79 100644
--- a/drivers/bluetooth/hci_smd.c
+++ b/drivers/bluetooth/hci_smd.c
@@ -24,16 +24,27 @@
#include <linux/errno.h>
#include <linux/string.h>
#include <linux/skbuff.h>
+#include <linux/wakelock.h>
+#include <linux/uaccess.h>
#include <net/bluetooth/bluetooth.h>
#include <net/bluetooth/hci_core.h>
#include <net/bluetooth/hci.h>
#include <mach/msm_smd.h>
-#include <linux/wakelock.h>
#define EVENT_CHANNEL "APPS_RIVA_BT_CMD"
#define DATA_CHANNEL "APPS_RIVA_BT_ACL"
#define RX_Q_MONITOR (1) /* 1 milli second */
+
+static unsigned int driver_state;
+
+static int hcismd_set;
+static DEFINE_MUTEX(hci_smd_enable);
+
+static int hcismd_set_enable(const char *val, struct kernel_param *kp);
+module_param_call(hcismd_set, hcismd_set_enable, NULL, &hcismd_set, 0644);
+
+
struct hci_smd_data {
struct hci_dev *hdev;
@@ -45,7 +56,7 @@
struct tasklet_struct hci_event_task;
struct tasklet_struct hci_data_task;
};
-struct hci_smd_data hs;
+static struct hci_smd_data hs;
/* Rx queue monitor timer function */
static int is_rx_q_empty(unsigned long arg)
@@ -358,32 +369,37 @@
static int hci_smd_register_dev(struct hci_smd_data *hsmd)
{
- struct hci_dev *hdev;
+ static struct hci_dev *hdev;
int rc;
/* Initialize and register HCI device */
- hdev = hci_alloc_dev();
- if (!hdev) {
- BT_ERR("Can't allocate HCI device");
- return -ENOMEM;
- }
+ if (!driver_state) {
+ hdev = hci_alloc_dev();
+ if (!hdev) {
+ BT_ERR("Can't allocate HCI device");
+ return -ENOMEM;
+ }
- hsmd->hdev = hdev;
- hdev->bus = HCI_SMD;
- hdev->driver_data = hsmd;
- hdev->open = hci_smd_open;
- hdev->close = hci_smd_close;
- hdev->send = hci_smd_send_frame;
- hdev->destruct = hci_smd_destruct;
- hdev->owner = THIS_MODULE;
+ hsmd->hdev = hdev;
+ hdev->bus = HCI_SMD;
+ hdev->driver_data = hsmd;
+ hdev->open = hci_smd_open;
+ hdev->close = hci_smd_close;
+ hdev->send = hci_smd_send_frame;
+ hdev->destruct = hci_smd_destruct;
+ hdev->owner = THIS_MODULE;
+ }
tasklet_init(&hsmd->hci_event_task,
hci_smd_recv_event, (unsigned long) hsmd);
tasklet_init(&hsmd->hci_data_task,
hci_smd_recv_data, (unsigned long) hsmd);
-
- wake_lock_init(&hs.wake_lock_rx, WAKE_LOCK_SUSPEND, "msm_smd_Rx");
- wake_lock_init(&hs.wake_lock_tx, WAKE_LOCK_SUSPEND, "msm_smd_Tx");
+ if (!driver_state) {
+ wake_lock_init(&hs.wake_lock_rx, WAKE_LOCK_SUSPEND,
+ "msm_smd_Rx");
+ wake_lock_init(&hs.wake_lock_tx, WAKE_LOCK_SUSPEND,
+ "msm_smd_Tx");
+ }
/*
* Setup the timer to monitor whether the Rx queue is empty,
* to control the wake lock release
@@ -411,24 +427,21 @@
/* Disable the read interrupts on the channel */
smd_disable_read_intr(hsmd->event_channel);
smd_disable_read_intr(hsmd->data_channel);
-
- if (hci_register_dev(hdev) < 0) {
- BT_ERR("Can't register HCI device");
- hci_free_dev(hdev);
- return -ENODEV;
+ if (!driver_state) {
+ if (hci_register_dev(hdev) < 0) {
+ BT_ERR("Can't register HCI device");
+ hci_free_dev(hdev);
+ return -ENODEV;
+ }
+ driver_state = 1;
}
-
return 0;
}
-static void hci_smd_deregister(void)
+static void hci_smd_deregister_dev(void)
{
smd_close(hs.event_channel);
- hs.event_channel = 0;
smd_close(hs.data_channel);
- hs.data_channel = 0;
- wake_lock_destroy(&hs.wake_lock_rx);
- wake_lock_destroy(&hs.wake_lock_tx);
/*Destroy the timer used to monitor the Rx queue for emptiness */
del_timer_sync(&hs.rx_q_timer);
@@ -436,17 +449,34 @@
tasklet_kill(&hs.hci_data_task);
}
-static int hci_smd_init(void)
+static int hcismd_set_enable(const char *val, struct kernel_param *kp)
{
- return hci_smd_register_dev(&hs);
-}
-module_init(hci_smd_init);
+ int ret = 0;
-static void __exit hci_smd_exit(void)
-{
- hci_smd_deregister();
+ mutex_lock(&hci_smd_enable);
+
+ ret = param_set_int(val, kp);
+
+ if (ret)
+ goto done;
+
+ switch (hcismd_set) {
+
+ case 1:
+ hci_smd_register_dev(&hs);
+ break;
+ case 0:
+ hci_smd_deregister_dev();
+ break;
+ default:
+ ret = -EFAULT;
+ }
+
+done:
+ mutex_unlock(&hci_smd_enable);
+ return ret;
}
-module_exit(hci_smd_exit);
+
MODULE_AUTHOR("Ankur Nandwani <ankurn@codeaurora.org>");
MODULE_DESCRIPTION("Bluetooth SMD driver");
diff --git a/drivers/char/diag/diagfwd_cntl.c b/drivers/char/diag/diagfwd_cntl.c
index 534c016..9730d4f 100644
--- a/drivers/char/diag/diagfwd_cntl.c
+++ b/drivers/char/diag/diagfwd_cntl.c
@@ -121,12 +121,10 @@
queue_work(driver->diag_wq, &(driver->diag_read_smd_cntl_work));
}
-#if defined(CONFIG_MSM_N_WAY_SMD)
static void diag_smd_qdsp_cntl_notify(void *ctxt, unsigned event)
{
queue_work(driver->diag_wq, &(driver->diag_read_smd_qdsp_cntl_work));
}
-#endif
static void diag_smd_wcnss_cntl_notify(void *ctxt, unsigned event)
{
diff --git a/drivers/char/hw_random/msm_rng.c b/drivers/char/hw_random/msm_rng.c
index 5937c78..b03a4ec 100644
--- a/drivers/char/hw_random/msm_rng.c
+++ b/drivers/char/hw_random/msm_rng.c
@@ -22,6 +22,7 @@
#include <linux/io.h>
#include <linux/err.h>
#include <linux/types.h>
+#include <mach/msm_iomap.h>
#include <mach/socinfo.h>
#define DRIVER_NAME "msm_rng"
@@ -36,11 +37,12 @@
#define PRNG_LFSR_CFG_MASK 0xFFFF0000
#define PRNG_LFSR_CFG_CLOCKS 0x0000DDDD
#define PRNG_CONFIG_MASK 0xFFFFFFFD
-#define PRNG_CONFIG_ENABLE 0x00000002
+#define PRNG_HW_ENABLE 0x00000002
#define MAX_HW_FIFO_DEPTH 16 /* FIFO is 16 words deep */
#define MAX_HW_FIFO_SIZE (MAX_HW_FIFO_DEPTH * 4) /* FIFO is 32 bits wide */
+
struct msm_rng_device {
struct platform_device *pdev;
void __iomem *base;
@@ -110,40 +112,43 @@
static int __devinit msm_rng_enable_hw(struct msm_rng_device *msm_rng_dev)
{
unsigned long val = 0;
+ unsigned long reg_val = 0;
int ret = 0;
- int error = 0;
+ /* Enable the PRNG CLK */
ret = clk_enable(msm_rng_dev->prng_clk);
if (ret) {
dev_err(&(msm_rng_dev->pdev)->dev,
"failed to enable clock in probe\n");
- error = -EPERM;
- return error;
+ return -EPERM;
}
-
- /* enable PRNG h/w*/
val = readl_relaxed(msm_rng_dev->base + PRNG_LFSR_CFG_OFFSET) &
- PRNG_LFSR_CFG_MASK;
+ PRNG_LFSR_CFG_MASK;
val |= PRNG_LFSR_CFG_MASK;
writel_relaxed(val, msm_rng_dev->base + PRNG_LFSR_CFG_OFFSET);
- /* The PRNG CONFIG register should be read after writing to the
- * PRNG_LFSR_CFG register.
- */
+ /* The PRNG CONFIG register should be first written before reading */
mb();
- val = readl_relaxed(msm_rng_dev->base + PRNG_CONFIG_OFFSET) &
- PRNG_CONFIG_MASK;
- val |= PRNG_CONFIG_ENABLE;
- writel_relaxed(val, msm_rng_dev->base + PRNG_CONFIG_OFFSET);
- /* The PRNG clk should be disabled only after we have enabled the
- * PRNG H/W by writting to the PRNG_CONFIG register.
- */
- mb();
+ /* Enable PRNG h/w only if it is NOT ON */
+ val = readl_relaxed(msm_rng_dev->base + PRNG_CONFIG_OFFSET) &
+ PRNG_HW_ENABLE;
+ /* PRNG H/W is not ON */
+ if (val != PRNG_HW_ENABLE) {
+ reg_val = readl_relaxed(msm_rng_dev->base + PRNG_CONFIG_OFFSET)
+ & PRNG_CONFIG_MASK;
+ reg_val |= PRNG_HW_ENABLE;
+ writel_relaxed(reg_val, msm_rng_dev->base + PRNG_CONFIG_OFFSET);
+
+ /* The PRNG clk should be disabled only after we enable the
+ * PRNG h/w by writing to the PRNG CONFIG register.
+ */
+ mb();
+ }
clk_disable(msm_rng_dev->prng_clk);
- return error;
+ return 0;
}
static int __devinit msm_rng_probe(struct platform_device *pdev)
@@ -188,8 +193,7 @@
platform_set_drvdata(pdev, msm_rng_dev);
/* Enable rng h/w */
- if (cpu_is_msm9615())
- error = msm_rng_enable_hw(msm_rng_dev);
+ error = msm_rng_enable_hw(msm_rng_dev);
if (error)
goto rollback_clk;
diff --git a/drivers/crypto/msm/qce40.c b/drivers/crypto/msm/qce40.c
index 4ef2e08..893933b 100644
--- a/drivers/crypto/msm/qce40.c
+++ b/drivers/crypto/msm/qce40.c
@@ -25,6 +25,7 @@
#include <linux/delay.h>
#include <linux/crypto.h>
#include <linux/qcedev.h>
+#include <linux/bitops.h>
#include <crypto/hash.h>
#include <crypto/sha.h>
#include <mach/dma.h>
@@ -168,23 +169,24 @@
return 0;
};
-#ifdef CONFIG_ARCH_MSM9615
static void config_ce_engine(struct qce_device *pce_dev)
{
unsigned int val = 0;
+ unsigned int ret = 0;
- val = (1 << CRYPTO_MASK_DOUT_INTR) | (1 << CRYPTO_MASK_DIN_INTR) |
- (1 << CRYPTO_MASK_OP_DONE_INTR) |
- (1 << CRYPTO_MASK_ERR_INTR);
+ /* Crypto config register returns a 0 when it is XPU protected. */
+ ret = readl_relaxed(pce_dev->iobase + CRYPTO_CONFIG_REG);
- writel_relaxed(val, pce_dev->iobase + CRYPTO_CONFIG_REG);
+ /* Configure the crypto register if it is not XPU protected. */
+ if (ret) {
+ val = BIT(CRYPTO_MASK_DOUT_INTR) |
+ BIT(CRYPTO_MASK_DIN_INTR) |
+ BIT(CRYPTO_MASK_OP_DONE_INTR) |
+ BIT(CRYPTO_MASK_ERR_INTR);
+
+ writel_relaxed(val, pce_dev->iobase + CRYPTO_CONFIG_REG);
+ }
}
-#else
-static void config_ce_engine(struct qce_device *pce_dev)
-{
-
-}
-#endif
static void _check_probe_done_call_back(struct msm_dmov_cmd *cmd_ptr,
unsigned int result, struct msm_dmov_errdata *err)
@@ -2569,4 +2571,4 @@
MODULE_LICENSE("GPL v2");
MODULE_AUTHOR("Mona Hossain <mhossain@codeaurora.org>");
MODULE_DESCRIPTION("Crypto Engine driver");
-MODULE_VERSION("2.12");
+MODULE_VERSION("2.13");
diff --git a/drivers/gpio/pm8xxx-gpio.c b/drivers/gpio/pm8xxx-gpio.c
index 026fd05..377510f 100644
--- a/drivers/gpio/pm8xxx-gpio.c
+++ b/drivers/gpio/pm8xxx-gpio.c
@@ -289,7 +289,8 @@
GFP_KERNEL);
if (!pm_gpio_chip->bank1) {
pr_err("Cannot allocate pm_gpio_chip->bank1\n");
- return -ENOMEM;
+ ret = -ENOMEM;
+ goto free_chip;
}
spin_lock_init(&pm_gpio_chip->pm_lock);
@@ -332,6 +333,8 @@
pr_err("failed to remove gpio chip\n");
reset_drvdata:
platform_set_drvdata(pdev, NULL);
+ kfree(pm_gpio_chip->bank1);
+free_chip:
kfree(pm_gpio_chip);
return ret;
}
diff --git a/drivers/gpu/ion/ion.c b/drivers/gpu/ion/ion.c
index 2357b68..60bc276 100644
--- a/drivers/gpu/ion/ion.c
+++ b/drivers/gpu/ion/ion.c
@@ -697,7 +697,7 @@
struct ion_handle *handle = rb_entry(n, struct ion_handle,
node);
- seq_printf(s, "%16.16s: %16u : %16d : %16p\n",
+ seq_printf(s, "%16.16s: %16x : %16d : %16p\n",
handle->buffer->heap->name,
handle->buffer->size,
atomic_read(&handle->ref.refcount),
@@ -1237,7 +1237,7 @@
};
static size_t ion_debug_heap_total(struct ion_client *client,
- enum ion_heap_type type)
+ enum ion_heap_ids id)
{
size_t size = 0;
struct rb_node *n;
@@ -1247,7 +1247,7 @@
struct ion_handle *handle = rb_entry(n,
struct ion_handle,
node);
- if (handle->buffer->heap->type == type)
+ if (handle->buffer->heap->id == id)
size += handle->buffer->size;
}
mutex_unlock(&client->lock);
@@ -1265,22 +1265,22 @@
struct ion_client *client = rb_entry(n, struct ion_client,
node);
char task_comm[TASK_COMM_LEN];
- size_t size = ion_debug_heap_total(client, heap->type);
+ size_t size = ion_debug_heap_total(client, heap->id);
if (!size)
continue;
get_task_comm(task_comm, client->task);
- seq_printf(s, "%16.s %16u %16u\n", task_comm, client->pid,
+ seq_printf(s, "%16.s %16u %16x\n", task_comm, client->pid,
size);
}
for (n = rb_first(&dev->kernel_clients); n; n = rb_next(n)) {
struct ion_client *client = rb_entry(n, struct ion_client,
node);
- size_t size = ion_debug_heap_total(client, heap->type);
+ size_t size = ion_debug_heap_total(client, heap->id);
if (!size)
continue;
- seq_printf(s, "%16.s %16u %16u\n", client->name, client->pid,
+ seq_printf(s, "%16.s %16u %16x\n", client->name, client->pid,
size);
}
if (heap->ops->get_allocated) {
@@ -1337,6 +1337,83 @@
mutex_unlock(&dev->lock);
}
+static int ion_debug_leak_show(struct seq_file *s, void *unused)
+{
+ struct ion_device *dev = s->private;
+ struct rb_node *n;
+ struct rb_node *n2;
+
+ /* mark all buffers as 1 */
+ seq_printf(s, "%16.s %16.s %16.s %16.s\n", "buffer", "heap", "size",
+ "ref cnt");
+ mutex_lock(&dev->lock);
+ for (n = rb_first(&dev->buffers); n; n = rb_next(n)) {
+ struct ion_buffer *buf = rb_entry(n, struct ion_buffer,
+ node);
+
+ buf->marked = 1;
+ }
+
+ /* now see which buffers we can access */
+ for (n = rb_first(&dev->kernel_clients); n; n = rb_next(n)) {
+ struct ion_client *client = rb_entry(n, struct ion_client,
+ node);
+
+ mutex_lock(&client->lock);
+ for (n2 = rb_first(&client->handles); n2; n2 = rb_next(n2)) {
+ struct ion_handle *handle = rb_entry(n2,
+ struct ion_handle, node);
+
+ handle->buffer->marked = 0;
+
+ }
+ mutex_unlock(&client->lock);
+
+ }
+
+ for (n = rb_first(&dev->user_clients); n; n = rb_next(n)) {
+ struct ion_client *client = rb_entry(n, struct ion_client,
+ node);
+
+ mutex_lock(&client->lock);
+ for (n2 = rb_first(&client->handles); n2; n2 = rb_next(n2)) {
+ struct ion_handle *handle = rb_entry(n2,
+ struct ion_handle, node);
+
+ handle->buffer->marked = 0;
+
+ }
+ mutex_unlock(&client->lock);
+
+ }
+ /* And anyone still marked as a 1 means a leaked handle somewhere */
+ for (n = rb_first(&dev->buffers); n; n = rb_next(n)) {
+ struct ion_buffer *buf = rb_entry(n, struct ion_buffer,
+ node);
+
+ if (buf->marked == 1)
+ seq_printf(s, "%16.x %16.s %16.x %16.d\n",
+ (int)buf, buf->heap->name, buf->size,
+ atomic_read(&buf->ref.refcount));
+ }
+ mutex_unlock(&dev->lock);
+ return 0;
+}
+
+static int ion_debug_leak_open(struct inode *inode, struct file *file)
+{
+ return single_open(file, ion_debug_leak_show, inode->i_private);
+}
+
+static const struct file_operations debug_leak_fops = {
+ .open = ion_debug_leak_open,
+ .read = seq_read,
+ .llseek = seq_lseek,
+ .release = single_release,
+};
+
+
+
struct ion_device *ion_device_create(long (*custom_ioctl)
(struct ion_client *client,
unsigned int cmd,
@@ -1369,6 +1446,8 @@
idev->heaps = RB_ROOT;
idev->user_clients = RB_ROOT;
idev->kernel_clients = RB_ROOT;
+ debugfs_create_file("check_leaked_fds", 0664, idev->debug_root, idev,
+ &debug_leak_fops);
return idev;
}
diff --git a/drivers/gpu/ion/ion_carveout_heap.c b/drivers/gpu/ion/ion_carveout_heap.c
index a572ca8..71dea89 100644
--- a/drivers/gpu/ion/ion_carveout_heap.c
+++ b/drivers/gpu/ion/ion_carveout_heap.c
@@ -44,8 +44,17 @@
unsigned long offset = gen_pool_alloc_aligned(carveout_heap->pool,
size, ilog2(align));
- if (!offset)
+ if (!offset) {
+ if ((carveout_heap->total_size -
+ carveout_heap->allocated_bytes) > size)
+ pr_debug("%s: heap %s has enough memory (%lx) but"
+ " the allocation of size %lx still failed."
+ " Memory is probably fragmented.",
+ __func__, heap->name,
+ carveout_heap->total_size -
+ carveout_heap->allocated_bytes, size);
return ION_CARVEOUT_ALLOCATE_FAIL;
+ }
carveout_heap->allocated_bytes += size;
return offset;
@@ -92,13 +101,27 @@
struct scatterlist *ion_carveout_heap_map_dma(struct ion_heap *heap,
struct ion_buffer *buffer)
{
- return ERR_PTR(-EINVAL);
+ struct scatterlist *sglist;
+ struct page *page = phys_to_page(buffer->priv_phys);
+
+ if (page == NULL)
+ return NULL;
+
+ sglist = vmalloc(sizeof(struct scatterlist));
+ if (!sglist)
+ return ERR_PTR(-ENOMEM);
+
+ sg_init_table(sglist, 1);
+ sg_set_page(sglist, page, buffer->size, 0);
+
+ return sglist;
}
void ion_carveout_heap_unmap_dma(struct ion_heap *heap,
struct ion_buffer *buffer)
{
- return;
+ if (buffer->sglist)
+ vfree(buffer->sglist);
}
void *ion_carveout_heap_map_kernel(struct ion_heap *heap,
@@ -183,6 +206,8 @@
.map_user = ion_carveout_heap_map_user,
.map_kernel = ion_carveout_heap_map_kernel,
.unmap_kernel = ion_carveout_heap_unmap_kernel,
+ .map_dma = ion_carveout_heap_map_dma,
+ .unmap_dma = ion_carveout_heap_unmap_dma,
.cache_op = ion_carveout_cache_ops,
.get_allocated = ion_carveout_get_allocated,
.get_total = ion_carveout_get_total,
diff --git a/drivers/gpu/ion/ion_priv.h b/drivers/gpu/ion/ion_priv.h
index 10e2219..888b599 100644
--- a/drivers/gpu/ion/ion_priv.h
+++ b/drivers/gpu/ion/ion_priv.h
@@ -72,6 +72,7 @@
int dmap_cnt;
struct scatterlist *sglist;
int umap_cnt;
+ int marked;
};
/**
diff --git a/drivers/gpu/ion/msm/msm_ion.c b/drivers/gpu/ion/msm/msm_ion.c
index 8b45b3a..54dd056 100644
--- a/drivers/gpu/ion/msm/msm_ion.c
+++ b/drivers/gpu/ion/msm/msm_ion.c
@@ -19,9 +19,9 @@
#include <mach/msm_memtypes.h>
#include "../ion_priv.h"
-struct ion_device *idev;
-int num_heaps;
-struct ion_heap **heaps;
+static struct ion_device *idev;
+static int num_heaps;
+static struct ion_heap **heaps;
struct ion_client *msm_ion_client_create(unsigned int heap_mask,
const char *name)
@@ -83,19 +83,17 @@
heaps[i] = ion_heap_create(heap_data);
if (IS_ERR_OR_NULL(heaps[i])) {
- err = PTR_ERR(heaps[i]);
- goto heapdestroy;
+ pr_err("%s: could not create ion heap %s"
+ " (id %x)\n", __func__, heap_data->name,
+ heap_data->id);
+ heaps[i] = 0;
+ continue;
}
ion_device_add_heap(idev, heaps[i]);
}
platform_set_drvdata(pdev, idev);
return 0;
-heapdestroy:
- for (i = 0; i < num_heaps; i++) {
- if (!IS_ERR_OR_NULL(heaps[i]))
- ion_heap_destroy(heaps[i]);
- }
freeheaps:
kfree(heaps);
out:
diff --git a/drivers/gpu/msm/Kconfig b/drivers/gpu/msm/Kconfig
index 5852e26..ba63fbc 100644
--- a/drivers/gpu/msm/Kconfig
+++ b/drivers/gpu/msm/Kconfig
@@ -64,24 +64,10 @@
bool "Build a DRM interface for the MSM_KGSL driver"
depends on MSM_KGSL && DRM
-config MSM_KGSL_GPUMMU
- bool "Enable the GPU MMU in the MSM_KGSL driver"
- depends on MSM_KGSL && !MSM_KGSL_CFF_DUMP
- default y
-
-config MSM_KGSL_IOMMU
- bool "Enable the use of IOMMU in the MSM_KGSL driver"
- depends on MSM_KGSL && MSM_IOMMU && !MSM_KGSL_GPUMMU && !MSM_KGSL_CFF_DUMP
-
-config MSM_KGSL_MMU
- bool
- depends on MSM_KGSL_GPUMMU || MSM_KGSL_IOMMU
- default y
-
config KGSL_PER_PROCESS_PAGE_TABLE
bool "Enable Per Process page tables for the KGSL driver"
default n
- depends on MSM_KGSL_GPUMMU && !MSM_KGSL_DRM
+ depends on !MSM_KGSL_DRM
---help---
The MMU will use per process pagetables when enabled.
@@ -105,7 +91,6 @@
config MSM_KGSL_MMU_PAGE_FAULT
bool "Force the GPU MMU to page fault for unmapped regions"
default y
- depends on MSM_KGSL_GPUMMU
config MSM_KGSL_DISABLE_SHADOW_WRITES
bool "Disable register shadow writes for context switches"
diff --git a/drivers/gpu/msm/adreno.c b/drivers/gpu/msm/adreno.c
index 7599894..b13190d 100644
--- a/drivers/gpu/msm/adreno.c
+++ b/drivers/gpu/msm/adreno.c
@@ -129,21 +129,28 @@
const char *pm4fw;
const char *pfpfw;
struct adreno_gpudev *gpudev;
+ unsigned int istore_size;
+ unsigned int pix_shader_start;
} adreno_gpulist[] = {
{ ADRENO_REV_A200, 0, 2, ANY_ID, ANY_ID,
- "yamato_pm4.fw", "yamato_pfp.fw", &adreno_a2xx_gpudev },
+ "yamato_pm4.fw", "yamato_pfp.fw", &adreno_a2xx_gpudev,
+ 512, 384},
{ ADRENO_REV_A205, 0, 1, 0, ANY_ID,
- "yamato_pm4.fw", "yamato_pfp.fw", &adreno_a2xx_gpudev },
+ "yamato_pm4.fw", "yamato_pfp.fw", &adreno_a2xx_gpudev,
+ 512, 384},
{ ADRENO_REV_A220, 2, 1, ANY_ID, ANY_ID,
- "leia_pm4_470.fw", "leia_pfp_470.fw", &adreno_a2xx_gpudev },
+ "leia_pm4_470.fw", "leia_pfp_470.fw", &adreno_a2xx_gpudev,
+ 512, 384},
/*
* patchlevel 5 (8960v2) needs special pm4 firmware to work around
* a hardware problem.
*/
{ ADRENO_REV_A225, 2, 2, 0, 5,
- "a225p5_pm4.fw", "a225_pfp.fw", &adreno_a2xx_gpudev },
+ "a225p5_pm4.fw", "a225_pfp.fw", &adreno_a2xx_gpudev,
+ 1536, 768 },
{ ADRENO_REV_A225, 2, 2, ANY_ID, ANY_ID,
- "a225_pm4.fw", "a225_pfp.fw", &adreno_a2xx_gpudev },
+ "a225_pm4.fw", "a225_pfp.fw", &adreno_a2xx_gpudev,
+ 1536, 768 },
};
static void adreno_gmeminit(struct adreno_device *adreno_dev)
@@ -413,6 +420,8 @@
adreno_dev->gpudev = adreno_gpulist[i].gpudev;
adreno_dev->pfp_fwfile = adreno_gpulist[i].pfpfw;
adreno_dev->pm4_fwfile = adreno_gpulist[i].pm4fw;
+ adreno_dev->istore_size = adreno_gpulist[i].istore_size;
+ adreno_dev->pix_shader_start = adreno_gpulist[i].pix_shader_start;
}
static int __devinit
diff --git a/drivers/gpu/msm/adreno.h b/drivers/gpu/msm/adreno.h
index 51ee31a..0776a24 100644
--- a/drivers/gpu/msm/adreno.h
+++ b/drivers/gpu/msm/adreno.h
@@ -38,6 +38,12 @@
#define ADRENO_DEFAULT_PWRSCALE_POLICY NULL
#endif
+/*
+ * constants for the size of shader instructions
+ */
+#define ADRENO_ISTORE_BYTES 12
+#define ADRENO_ISTORE_WORDS 3
+
enum adreno_gpurev {
ADRENO_REV_UNKNOWN = 0,
ADRENO_REV_A200 = 200,
@@ -64,6 +70,8 @@
unsigned int mharb;
struct adreno_gpudev *gpudev;
unsigned int wait_timeout;
+ unsigned int istore_size;
+ unsigned int pix_shader_start;
};
struct adreno_gpudev {
@@ -125,5 +133,28 @@
return (adreno_dev->gpurev <= ADRENO_REV_A225);
}
+/**
+ * adreno_encode_istore_size - encode istore size in CP format
+ * @adreno_dev - The 3D device.
+ *
+ * Encode the istore size into the format expected that the
+ * CP_SET_SHADER_BASES and CP_ME_INIT commands:
+ * bits 31:29 - istore size as encoded by this function
+ * bits 27:16 - vertex shader start offset in instructions
+ * bits 11:0 - pixel shader start offset in instructions.
+ */
+static inline int adreno_encode_istore_size(struct adreno_device *adreno_dev)
+{
+ unsigned int size;
+ /* in a225 the CP microcode multiplies the encoded
+ * value by 3 while decoding.
+ */
+ if (adreno_is_a225(adreno_dev))
+ size = adreno_dev->istore_size/3;
+ else
+ size = adreno_dev->istore_size;
+
+ return (ilog2(size) - 5) << 29;
+}
#endif /*__ADRENO_H */
diff --git a/drivers/gpu/msm/adreno_a2xx.c b/drivers/gpu/msm/adreno_a2xx.c
index 064b05e..6003846 100644
--- a/drivers/gpu/msm/adreno_a2xx.c
+++ b/drivers/gpu/msm/adreno_a2xx.c
@@ -72,10 +72,6 @@
#define TEX_CONSTANTS (32*6) /* DWORDS */
#define BOOL_CONSTANTS 8 /* DWORDS */
#define LOOP_CONSTANTS 56 /* DWORDS */
-#define SHADER_INSTRUCT_LOG2 9U /* 2^n == SHADER_INSTRUCTIONS */
-
-/* 96-bit instructions */
-#define SHADER_INSTRUCT (1<<SHADER_INSTRUCT_LOG2)
/* LOAD_CONSTANT_CONTEXT shadow size */
#define LCC_SHADOW_SIZE 0x2000 /* 8KB */
@@ -88,14 +84,21 @@
#define CMD_BUFFER_SIZE 0x3000 /* 12KB */
#endif
#define TEX_SHADOW_SIZE (TEX_CONSTANTS*4) /* 768 bytes */
-#define SHADER_SHADOW_SIZE (SHADER_INSTRUCT*12) /* 6KB */
#define REG_OFFSET LCC_SHADOW_SIZE
#define CMD_OFFSET (REG_OFFSET + REG_SHADOW_SIZE)
#define TEX_OFFSET (CMD_OFFSET + CMD_BUFFER_SIZE)
#define SHADER_OFFSET ((TEX_OFFSET + TEX_SHADOW_SIZE + 32) & ~31)
-#define CONTEXT_SIZE (SHADER_OFFSET + 3 * SHADER_SHADOW_SIZE)
+static inline int _shader_shadow_size(struct adreno_device *adreno_dev)
+{
+ return adreno_dev->istore_size*ADRENO_ISTORE_BYTES;
+}
+
+static inline int _context_size(struct adreno_device *adreno_dev)
+{
+ return SHADER_OFFSET + 3*_shader_shadow_size(adreno_dev);
+}
/* A scratchpad used to build commands during context create */
@@ -601,7 +604,8 @@
*cmds++ = 0x00003F00;
*cmds++ = cp_type3_packet(CP_SET_SHADER_BASES, 1);
- *cmds++ = (0x80000000) | 0x180;
+ *cmds++ = adreno_encode_istore_size(adreno_dev)
+ | adreno_dev->pix_shader_start;
/* load the patched vertex shader stream */
cmds = program_shader(cmds, 0, gmem2sys_vtx_pgm, GMEM2SYS_VTX_PGM_LEN);
@@ -802,7 +806,8 @@
*cmds++ = 0x00000300; /* 0x100 = Vertex, 0x200 = Pixel */
*cmds++ = cp_type3_packet(CP_SET_SHADER_BASES, 1);
- *cmds++ = (0x80000000) | 0x180;
+ *cmds++ = adreno_encode_istore_size(adreno_dev)
+ | adreno_dev->pix_shader_start;
/* Load the patched fragment shader stream */
cmds =
@@ -1089,7 +1094,8 @@
}
static void
-build_shader_save_restore_cmds(struct adreno_context *drawctxt)
+build_shader_save_restore_cmds(struct adreno_device *adreno_dev,
+ struct adreno_context *drawctxt)
{
unsigned int *cmd = tmp_ctx.cmd;
unsigned int *save, *restore, *fixup;
@@ -1099,8 +1105,10 @@
/* compute vertex, pixel and shared instruction shadow GPU addresses */
tmp_ctx.shader_vertex = drawctxt->gpustate.gpuaddr + SHADER_OFFSET;
- tmp_ctx.shader_pixel = tmp_ctx.shader_vertex + SHADER_SHADOW_SIZE;
- tmp_ctx.shader_shared = tmp_ctx.shader_pixel + SHADER_SHADOW_SIZE;
+ tmp_ctx.shader_pixel = tmp_ctx.shader_vertex
+ + _shader_shadow_size(adreno_dev);
+ tmp_ctx.shader_shared = tmp_ctx.shader_pixel
+ + _shader_shadow_size(adreno_dev);
/* restore shader partitioning and instructions */
@@ -1156,8 +1164,8 @@
*cmd++ = REG_SCRATCH_REG2;
/* AND off invalid bits. */
*cmd++ = 0x0FFF0FFF;
- /* OR in instruction memory size */
- *cmd++ = (unsigned int)((SHADER_INSTRUCT_LOG2 - 5U) << 29);
+ /* OR in instruction memory size. */
+ *cmd++ = adreno_encode_istore_size(adreno_dev);
/* write the computed value to the SET_SHADER_BASES data field */
*cmd++ = cp_type3_packet(CP_REG_TO_MEM, 2);
@@ -1226,7 +1234,7 @@
/* Allocate vmalloc memory to store the gpustate */
result = kgsl_allocate(&drawctxt->gpustate,
- drawctxt->pagetable, CONTEXT_SIZE);
+ drawctxt->pagetable, _context_size(adreno_dev));
if (result)
return result;
@@ -1234,7 +1242,8 @@
drawctxt->flags |= CTXT_FLAGS_STATE_SHADOW;
/* Blank out h/w register, constant, and command buffer shadows. */
- kgsl_sharedmem_set(&drawctxt->gpustate, 0, 0, CONTEXT_SIZE);
+ kgsl_sharedmem_set(&drawctxt->gpustate, 0, 0,
+ _context_size(adreno_dev));
/* set-up command and vertex buffer pointers */
tmp_ctx.cmd = tmp_ctx.start
@@ -1245,7 +1254,7 @@
build_regrestore_cmds(adreno_dev, drawctxt);
build_regsave_cmds(adreno_dev, drawctxt);
- build_shader_save_restore_cmds(drawctxt);
+ build_shader_save_restore_cmds(adreno_dev, drawctxt);
kgsl_cache_range_op(&drawctxt->gpustate,
KGSL_CACHE_OP_FLUSH);
diff --git a/drivers/gpu/msm/adreno_debugfs.c b/drivers/gpu/msm/adreno_debugfs.c
index c878a2c..419ce9d 100644
--- a/drivers/gpu/msm/adreno_debugfs.c
+++ b/drivers/gpu/msm/adreno_debugfs.c
@@ -223,21 +223,23 @@
return 0;
}
-#define KGSL_ISTORE_START 0x5000
-#define KGSL_ISTORE_LENGTH 0x600
+#define ADRENO_ISTORE_START 0x5000
static ssize_t kgsl_istore_read(
struct file *file,
char __user *buff,
size_t buff_count,
loff_t *ppos)
{
- int i, count = KGSL_ISTORE_LENGTH, remaining, pos = 0, tot = 0;
+ int i, count, remaining, pos = 0, tot = 0;
struct kgsl_device *device = file->private_data;
const int rowc = 8;
+ struct adreno_device *adreno_dev;
if (!ppos || !device)
return 0;
+ adreno_dev = ADRENO_DEVICE(device);
+ count = adreno_dev->istore_size * ADRENO_ISTORE_WORDS;
remaining = count;
for (i = 0; i < count; i += rowc) {
unsigned int vals[rowc];
@@ -248,7 +250,8 @@
if (pos >= *ppos) {
for (j = 0; j < linec; ++j)
kgsl_regread_nolock(device,
- KGSL_ISTORE_START+i+j, vals+j);
+ ADRENO_ISTORE_START + i + j,
+ vals + j);
} else
memset(vals, 0, sizeof(vals));
diff --git a/drivers/gpu/msm/adreno_ringbuffer.c b/drivers/gpu/msm/adreno_ringbuffer.c
index d59057c..a098200 100644
--- a/drivers/gpu/msm/adreno_ringbuffer.c
+++ b/drivers/gpu/msm/adreno_ringbuffer.c
@@ -246,6 +246,7 @@
union reg_cp_rb_cntl cp_rb_cntl;
unsigned int *cmds, rb_cntl;
struct kgsl_device *device = rb->device;
+ struct adreno_device *adreno_dev = ADRENO_DEVICE(device);
uint cmds_gpu;
if (rb->flags & KGSL_FLAGS_STARTED)
@@ -357,9 +358,10 @@
GSL_RB_WRITE(cmds, cmds_gpu,
SUBBLOCK_OFFSET(REG_PA_SU_POLY_OFFSET_FRONT_SCALE));
- /* Vertex and Pixel Shader Start Addresses in instructions
- * (3 DWORDS per instruction) */
- GSL_RB_WRITE(cmds, cmds_gpu, 0x80000180);
+ /* Instruction memory size: */
+ GSL_RB_WRITE(cmds, cmds_gpu,
+ (adreno_encode_istore_size(adreno_dev)
+ | adreno_dev->pix_shader_start));
/* Maximum Contexts */
GSL_RB_WRITE(cmds, cmds_gpu, 0x00000001);
/* Write Confirm Interval and The CP will wait the
diff --git a/drivers/gpu/msm/kgsl.c b/drivers/gpu/msm/kgsl.c
index 7e61a32..c6fceaa 100644
--- a/drivers/gpu/msm/kgsl.c
+++ b/drivers/gpu/msm/kgsl.c
@@ -23,6 +23,7 @@
#include <linux/ashmem.h>
#include <linux/major.h>
+#include <linux/ion.h>
#include "kgsl.h"
#include "kgsl_debugfs.h"
@@ -43,6 +44,8 @@
MODULE_PARM_DESC(ksgl_mmu_type,
"Type of MMU to be used for graphics. Valid values are 'iommu' or 'gpummu' or 'nommu'");
+static struct ion_client *kgsl_ion_client;
+
static inline struct kgsl_mem_entry *
kgsl_mem_entry_create(void)
{
@@ -62,18 +65,34 @@
struct kgsl_mem_entry *entry = container_of(kref,
struct kgsl_mem_entry,
refcount);
- size_t size = entry->memdesc.size;
+
+ entry->priv->stats[entry->memtype].cur -= entry->memdesc.size;
+
+ if (entry->memtype != KGSL_MEM_ENTRY_KERNEL)
+ kgsl_driver.stats.mapped -= entry->memdesc.size;
+
+ /*
+ * Ion takes care of freeing the sglist for us (how nice </sarcasm>) so
+ * unmap the dma before freeing the sharedmem so kgsl_sharedmem_free
+ * doesn't try to free it again
+ */
+
+ if (entry->memtype == KGSL_MEM_ENTRY_ION) {
+ ion_unmap_dma(kgsl_ion_client, entry->priv_data);
+ entry->memdesc.sg = NULL;
+ }
kgsl_sharedmem_free(&entry->memdesc);
- if (entry->memtype == KGSL_USER_MEMORY)
- entry->priv->stats.user -= size;
- else if (entry->memtype == KGSL_MAPPED_MEMORY) {
- if (entry->file_ptr)
- fput(entry->file_ptr);
-
- kgsl_driver.stats.mapped -= size;
- entry->priv->stats.mapped -= size;
+ switch (entry->memtype) {
+ case KGSL_MEM_ENTRY_PMEM:
+ case KGSL_MEM_ENTRY_ASHMEM:
+ if (entry->priv_data)
+ fput(entry->priv_data);
+ break;
+ case KGSL_MEM_ENTRY_ION:
+ ion_free(kgsl_ion_client, entry->priv_data);
+ break;
}
kfree(entry);
@@ -513,11 +532,6 @@
if (--private->refcnt)
goto unlock;
- KGSL_MEM_INFO(device,
- "Memory usage: user (%d/%d) mapped (%d/%d)\n",
- private->stats.user, private->stats.user_max,
- private->stats.mapped, private->stats.mapped_max);
-
kgsl_process_uninit_sysfs(private);
list_del(&private->list);
@@ -1113,13 +1127,12 @@
param->gpuaddr = entry->memdesc.gpuaddr;
- entry->memtype = KGSL_USER_MEMORY;
+ entry->memtype = KGSL_MEM_ENTRY_KERNEL;
kgsl_mem_entry_attach_process(entry, private);
/* Process specific statistics */
- KGSL_STATS_ADD(len, private->stats.user,
- private->stats.user_max);
+ kgsl_process_add_stats(private, entry->memtype, len);
kgsl_check_idle(dev_priv->device);
return 0;
@@ -1220,7 +1233,7 @@
}
- entry->file_ptr = filep;
+ entry->priv_data = filep;
entry->memdesc.pagetable = pagetable;
entry->memdesc.size = size;
@@ -1392,7 +1405,7 @@
goto err;
}
- entry->file_ptr = filep;
+ entry->priv_data = filep;
entry->memdesc.pagetable = pagetable;
entry->memdesc.size = ALIGN(size, PAGE_SIZE);
entry->memdesc.hostptr = hostptr;
@@ -1416,6 +1429,51 @@
}
#endif
+static int kgsl_setup_ion(struct kgsl_mem_entry *entry,
+ struct kgsl_pagetable *pagetable, int fd)
+{
+ struct ion_handle *handle;
+ struct scatterlist *s;
+ unsigned long flags;
+
+ if (kgsl_ion_client == NULL) {
+ kgsl_ion_client = msm_ion_client_create(UINT_MAX, KGSL_NAME);
+ if (kgsl_ion_client == NULL)
+ return -ENODEV;
+ }
+
+ handle = ion_import_fd(kgsl_ion_client, fd);
+ if (IS_ERR_OR_NULL(handle))
+ return PTR_ERR(handle);
+
+ entry->memtype = KGSL_MEM_ENTRY_ION;
+ entry->priv_data = handle;
+ entry->memdesc.pagetable = pagetable;
+ entry->memdesc.size = 0;
+
+ if (ion_handle_get_flags(kgsl_ion_client, handle, &flags))
+ goto err;
+
+ entry->memdesc.sg = ion_map_dma(kgsl_ion_client, handle, flags);
+
+ if (IS_ERR_OR_NULL(entry->memdesc.sg))
+ goto err;
+
+ /* Calculate the size of the memdesc from the sglist */
+
+ entry->memdesc.sglen = 0;
+
+ for (s = entry->memdesc.sg; s != NULL; s = sg_next(s)) {
+ entry->memdesc.size += s->length;
+ entry->memdesc.sglen++;
+ }
+
+ return 0;
+err:
+ ion_free(kgsl_ion_client, handle);
+ return -ENOMEM;
+}
+
static long kgsl_ioctl_map_user_mem(struct kgsl_device_private *dev_priv,
unsigned int cmd, void *data)
{
@@ -1443,6 +1501,7 @@
result = kgsl_setup_phys_file(entry, private->pagetable,
param->fd, param->offset,
param->len);
+ entry->memtype = KGSL_MEM_ENTRY_PMEM;
break;
case KGSL_USER_MEM_TYPE_ADDR:
@@ -1459,6 +1518,7 @@
result = kgsl_setup_hostptr(entry, private->pagetable,
(void *) param->hostptr,
param->offset, param->len);
+ entry->memtype = KGSL_MEM_ENTRY_USER;
break;
case KGSL_USER_MEM_TYPE_ASHMEM:
@@ -1475,6 +1535,12 @@
result = kgsl_setup_ashmem(entry, private->pagetable,
param->fd, (void *) param->hostptr,
param->len);
+
+ entry->memtype = KGSL_MEM_ENTRY_ASHMEM;
+ break;
+ case KGSL_USER_MEM_TYPE_ION:
+ result = kgsl_setup_ion(entry, private->pagetable,
+ param->fd);
break;
default:
KGSL_CORE_ERR("Invalid memory type: %x\n", memtype);
@@ -1494,14 +1560,10 @@
/* Adjust the returned value for a non 4k aligned offset */
param->gpuaddr = entry->memdesc.gpuaddr + (param->offset & ~PAGE_MASK);
- entry->memtype = KGSL_MAPPED_MEMORY;
-
KGSL_STATS_ADD(param->len, kgsl_driver.stats.mapped,
- kgsl_driver.stats.mapped_max);
+ kgsl_driver.stats.mapped_max);
- /* Statistics */
- KGSL_STATS_ADD(param->len, private->stats.mapped,
- private->stats.mapped_max);
+ kgsl_process_add_stats(private, entry->memtype, param->len);
kgsl_mem_entry_attach_process(entry, private);
@@ -1509,8 +1571,8 @@
return result;
error_put_file_ptr:
- if (entry->file_ptr)
- fput(entry->file_ptr);
+ if (entry->priv_data)
+ fput(entry->priv_data);
error:
kfree(entry);
@@ -1548,9 +1610,6 @@
}
kgsl_cache_range_op(&entry->memdesc, KGSL_CACHE_OP_CLEAN);
-
- /* Statistics - keep track of how many flushes each process does */
- private->stats.flushes++;
done:
spin_unlock(&private->mem_lock);
return result;
@@ -1573,12 +1632,11 @@
param->size, param->flags);
if (result == 0) {
- entry->memtype = KGSL_USER_MEMORY;
+ entry->memtype = KGSL_MEM_ENTRY_KERNEL;
kgsl_mem_entry_attach_process(entry, private);
param->gpuaddr = entry->memdesc.gpuaddr;
- KGSL_STATS_ADD(entry->memdesc.size, private->stats.user,
- private->stats.user_max);
+ kgsl_process_add_stats(private, entry->memtype, param->size);
} else
kfree(entry);
diff --git a/drivers/gpu/msm/kgsl.h b/drivers/gpu/msm/kgsl.h
index 1480df4..b5c24f0 100644
--- a/drivers/gpu/msm/kgsl.h
+++ b/drivers/gpu/msm/kgsl.h
@@ -101,9 +101,6 @@
extern struct kgsl_driver kgsl_driver;
-#define KGSL_USER_MEMORY 1
-#define KGSL_MAPPED_MEMORY 2
-
struct kgsl_pagetable;
struct kgsl_memdesc_ops;
@@ -120,11 +117,20 @@
struct kgsl_memdesc_ops *ops;
};
+/* List of different memory entry types */
+
+#define KGSL_MEM_ENTRY_KERNEL 0
+#define KGSL_MEM_ENTRY_PMEM 1
+#define KGSL_MEM_ENTRY_ASHMEM 2
+#define KGSL_MEM_ENTRY_USER 3
+#define KGSL_MEM_ENTRY_ION 4
+#define KGSL_MEM_ENTRY_MAX 5
+
struct kgsl_mem_entry {
struct kref refcount;
struct kgsl_memdesc memdesc;
int memtype;
- struct file *file_ptr;
+ void *priv_data;
struct list_head list;
uint32_t free_timestamp;
/* back pointer to private structure under whose context this
diff --git a/drivers/gpu/msm/kgsl_device.h b/drivers/gpu/msm/kgsl_device.h
index 2f369ed..e261b84 100644
--- a/drivers/gpu/msm/kgsl_device.h
+++ b/drivers/gpu/msm/kgsl_device.h
@@ -185,15 +185,12 @@
struct list_head mem_list;
struct kgsl_pagetable *pagetable;
struct list_head list;
- struct kobject *kobj;
+ struct kobject kobj;
struct {
- unsigned int user;
- unsigned int user_max;
- unsigned int mapped;
- unsigned int mapped_max;
- unsigned int flushes;
- } stats;
+ unsigned int cur;
+ unsigned int max;
+ } stats[KGSL_MEM_ENTRY_MAX];
};
struct kgsl_device_private {
@@ -208,6 +205,14 @@
struct kgsl_device *kgsl_get_device(int dev_idx);
+static inline void kgsl_process_add_stats(struct kgsl_process_private *priv,
+ unsigned int type, size_t size)
+{
+ priv->stats[type].cur += size;
+ if (priv->stats[type].max < priv->stats[type].cur)
+ priv->stats[type].max = priv->stats[type].cur;
+}
+
static inline void kgsl_regread(struct kgsl_device *device,
unsigned int offsetwords,
unsigned int *value)
diff --git a/drivers/gpu/msm/kgsl_drm.c b/drivers/gpu/msm/kgsl_drm.c
index cdf9dc4..dba2dfc 100644
--- a/drivers/gpu/msm/kgsl_drm.c
+++ b/drivers/gpu/msm/kgsl_drm.c
@@ -315,7 +315,6 @@
return 0;
}
-#ifdef CONFIG_MSM_KGSL_MMU
static void
kgsl_gem_unmap(struct drm_gem_object *obj)
{
@@ -335,12 +334,6 @@
priv->flags &= ~DRM_KGSL_GEM_FLAG_MAPPED;
}
-#else
-static void
-kgsl_gem_unmap(struct drm_gem_object *obj)
-{
-}
-#endif
static void
kgsl_gem_free_memory(struct drm_gem_object *obj)
@@ -724,7 +717,6 @@
return 0;
}
-#ifdef CONFIG_MSM_KGSL_MMU
static int
kgsl_gem_map(struct drm_gem_object *obj)
{
@@ -769,24 +761,6 @@
return ret;
}
-#else
-static int
-kgsl_gem_map(struct drm_gem_object *obj)
-{
- struct drm_kgsl_gem_object *priv = obj->driver_private;
- int index;
-
- if (TYPE_IS_PMEM(priv->type)) {
- for (index = 0; index < priv->bufcount; index++)
- priv->bufs[index].gpuaddr =
- priv->memdesc.physaddr + priv->bufs[index].offset;
-
- return 0;
- }
-
- return -EINVAL;
-}
-#endif
int
kgsl_gem_bind_gpu_ioctl(struct drm_device *dev, void *data,
diff --git a/drivers/gpu/msm/kgsl_mmu.c b/drivers/gpu/msm/kgsl_mmu.c
index 1879666..715b9d6 100644
--- a/drivers/gpu/msm/kgsl_mmu.c
+++ b/drivers/gpu/msm/kgsl_mmu.c
@@ -711,13 +711,7 @@
void kgsl_mmu_set_mmutype(char *mmutype)
{
- kgsl_mmu_type = KGSL_MMU_TYPE_NONE;
-#ifdef CONFIG_MSM_KGSL_GPUMMU
- kgsl_mmu_type = KGSL_MMU_TYPE_GPU;
-#elif defined(CONFIG_MSM_KGSL_IOMMU)
- if (iommu_found())
- kgsl_mmu_type = KGSL_MMU_TYPE_IOMMU;
-#endif
+ kgsl_mmu_type = iommu_found() ? KGSL_MMU_TYPE_IOMMU : KGSL_MMU_TYPE_GPU;
if (mmutype && !strncmp(mmutype, "gpummu", 6))
kgsl_mmu_type = KGSL_MMU_TYPE_GPU;
if (iommu_found() && mmutype && !strncmp(mmutype, "iommu", 5))
diff --git a/drivers/gpu/msm/kgsl_mmu.h b/drivers/gpu/msm/kgsl_mmu.h
index 4af073a..1338d0d 100644
--- a/drivers/gpu/msm/kgsl_mmu.h
+++ b/drivers/gpu/msm/kgsl_mmu.h
@@ -76,16 +76,10 @@
#define MH_INTERRUPT_MASK__AXI_WRITE_ERROR 0x00000002L
#define MH_INTERRUPT_MASK__MMU_PAGE_FAULT 0x00000004L
-#ifdef CONFIG_MSM_KGSL_MMU
#define KGSL_MMU_INT_MASK \
(MH_INTERRUPT_MASK__AXI_READ_ERROR | \
MH_INTERRUPT_MASK__AXI_WRITE_ERROR | \
MH_INTERRUPT_MASK__MMU_PAGE_FAULT)
-#else
-#define KGSL_MMU_INT_MASK \
- (MH_INTERRUPT_MASK__AXI_READ_ERROR | \
- MH_INTERRUPT_MASK__AXI_WRITE_ERROR)
-#endif
enum kgsl_mmutype {
KGSL_MMU_TYPE_GPU = 0,
diff --git a/drivers/gpu/msm/kgsl_pwrctrl.c b/drivers/gpu/msm/kgsl_pwrctrl.c
index aee42a1..343a39a 100644
--- a/drivers/gpu/msm/kgsl_pwrctrl.c
+++ b/drivers/gpu/msm/kgsl_pwrctrl.c
@@ -583,8 +583,7 @@
mutex_lock(&device->mutex);
if (device->state & (KGSL_STATE_ACTIVE | KGSL_STATE_NAP)) {
- if (device->ftbl->isidle(device) &&
- (device->requested_state != KGSL_STATE_SLEEP))
+ if (device->requested_state != KGSL_STATE_SLEEP)
kgsl_pwrscale_idle(device);
if (kgsl_pwrctrl_sleep(device) != 0) {
diff --git a/drivers/gpu/msm/kgsl_sharedmem.c b/drivers/gpu/msm/kgsl_sharedmem.c
index 8f75daa..b59761d 100644
--- a/drivers/gpu/msm/kgsl_sharedmem.c
+++ b/drivers/gpu/msm/kgsl_sharedmem.c
@@ -19,6 +19,52 @@
#include "kgsl_cffdump.h"
#include "kgsl_device.h"
+/* An attribute for showing per-process memory statistics */
+struct kgsl_mem_entry_attribute {
+ struct attribute attr;
+ int memtype;
+ ssize_t (*show)(struct kgsl_process_private *priv,
+ int type, char *buf);
+};
+
+#define to_mem_entry_attr(a) \
+container_of(a, struct kgsl_mem_entry_attribute, attr)
+
+#define __MEM_ENTRY_ATTR(_type, _name, _show) \
+{ \
+ .attr = { .name = __stringify(_name), .mode = 0444 }, \
+ .memtype = _type, \
+ .show = _show, \
+}
+
+/*
+ * A structure to hold the attributes for a particular memory type.
+ * For each memory type in each process we store the current and maximum
+ * memory usage and display the counts in sysfs. This structure and
+ * the following macro allow us to simplify the definition for those
+ * adding new memory types
+ */
+
+struct mem_entry_stats {
+ int memtype;
+ struct kgsl_mem_entry_attribute attr;
+ struct kgsl_mem_entry_attribute max_attr;
+};
+
+
+#define MEM_ENTRY_STAT(_type, _name) \
+{ \
+ .memtype = _type, \
+ .attr = __MEM_ENTRY_ATTR(_type, _name, mem_entry_show), \
+ .max_attr = __MEM_ENTRY_ATTR(_type, _name##_max, \
+ mem_entry_max_show), \
+}
+
+
+/**
+ * Given a kobj, find the process structure attached to it
+ */
+
static struct kgsl_process_private *
_get_priv_from_kobj(struct kobject *kobj)
{
@@ -39,87 +85,109 @@
return NULL;
}
-/* sharedmem / memory sysfs files */
+/**
+ * Show the current amount of memory allocated for the given memtype
+ */
static ssize_t
-process_show(struct kobject *kobj,
- struct kobj_attribute *attr,
- char *buf)
+mem_entry_show(struct kgsl_process_private *priv, int type, char *buf)
{
+ return snprintf(buf, PAGE_SIZE, "%d\n", priv->stats[type].cur);
+}
+
+/**
+ * Show the maximum memory allocated for the given memtype through the life of
+ * the process
+ */
+
+static ssize_t
+mem_entry_max_show(struct kgsl_process_private *priv, int type, char *buf)
+{
+ return snprintf(buf, PAGE_SIZE, "%d\n", priv->stats[type].max);
+}
+
+
+static void mem_entry_sysfs_release(struct kobject *kobj)
+{
+}
+
+static ssize_t mem_entry_sysfs_show(struct kobject *kobj,
+ struct attribute *attr, char *buf)
+{
+ struct kgsl_mem_entry_attribute *pattr = to_mem_entry_attr(attr);
struct kgsl_process_private *priv;
- unsigned int val = 0;
+ ssize_t ret;
mutex_lock(&kgsl_driver.process_mutex);
priv = _get_priv_from_kobj(kobj);
- if (priv == NULL) {
- mutex_unlock(&kgsl_driver.process_mutex);
- return 0;
- }
-
- if (!strncmp(attr->attr.name, "user", 4))
- val = priv->stats.user;
- if (!strncmp(attr->attr.name, "user_max", 8))
- val = priv->stats.user_max;
- if (!strncmp(attr->attr.name, "mapped", 6))
- val = priv->stats.mapped;
- if (!strncmp(attr->attr.name, "mapped_max", 10))
- val = priv->stats.mapped_max;
- if (!strncmp(attr->attr.name, "flushes", 7))
- val = priv->stats.flushes;
+ if (priv && pattr->show)
+ ret = pattr->show(priv, pattr->memtype, buf);
+ else
+ ret = -EIO;
mutex_unlock(&kgsl_driver.process_mutex);
- return snprintf(buf, PAGE_SIZE, "%u\n", val);
+ return ret;
}
-#define KGSL_MEMSTAT_ATTR(_name, _show) \
- static struct kobj_attribute attr_##_name = \
- __ATTR(_name, 0444, _show, NULL)
-
-KGSL_MEMSTAT_ATTR(user, process_show);
-KGSL_MEMSTAT_ATTR(user_max, process_show);
-KGSL_MEMSTAT_ATTR(mapped, process_show);
-KGSL_MEMSTAT_ATTR(mapped_max, process_show);
-KGSL_MEMSTAT_ATTR(flushes, process_show);
-
-static struct attribute *process_attrs[] = {
- &attr_user.attr,
- &attr_user_max.attr,
- &attr_mapped.attr,
- &attr_mapped_max.attr,
- &attr_flushes.attr,
- NULL
+static const struct sysfs_ops mem_entry_sysfs_ops = {
+ .show = mem_entry_sysfs_show,
};
-static struct attribute_group process_attr_group = {
- .attrs = process_attrs,
+static struct kobj_type ktype_mem_entry = {
+ .sysfs_ops = &mem_entry_sysfs_ops,
+ .default_attrs = NULL,
+ .release = mem_entry_sysfs_release
+};
+
+static struct mem_entry_stats mem_stats[] = {
+ MEM_ENTRY_STAT(KGSL_MEM_ENTRY_KERNEL, kernel),
+#ifdef CONFIG_ANDROID_PMEM
+ MEM_ENTRY_STAT(KGSL_MEM_ENTRY_PMEM, pmem),
+#endif
+#ifdef CONFIG_ASHMEM
+ MEM_ENTRY_STAT(KGSL_MEM_ENTRY_ASHMEM, ashmem),
+#endif
+ MEM_ENTRY_STAT(KGSL_MEM_ENTRY_USER, user),
+#ifdef CONFIG_ION
+ MEM_ENTRY_STAT(KGSL_MEM_ENTRY_USER, ion),
+#endif
};
void
kgsl_process_uninit_sysfs(struct kgsl_process_private *private)
{
- /* Remove the sysfs entry */
- if (private->kobj) {
- sysfs_remove_group(private->kobj, &process_attr_group);
- kobject_put(private->kobj);
+ int i;
+
+ for (i = 0; i < ARRAY_SIZE(mem_stats); i++) {
+ sysfs_remove_file(&private->kobj, &mem_stats[i].attr.attr);
+ sysfs_remove_file(&private->kobj,
+ &mem_stats[i].max_attr.attr);
}
+
+ kobject_put(&private->kobj);
}
void
kgsl_process_init_sysfs(struct kgsl_process_private *private)
{
unsigned char name[16];
+ int i, ret;
- /* Add a entry to the sysfs device */
snprintf(name, sizeof(name), "%d", private->pid);
- private->kobj = kobject_create_and_add(name, kgsl_driver.prockobj);
- /* sysfs failure isn't fatal, just annoying */
- if (private->kobj != NULL) {
- if (sysfs_create_group(private->kobj, &process_attr_group)) {
- kobject_put(private->kobj);
- private->kobj = NULL;
- }
+ if (kobject_init_and_add(&private->kobj, &ktype_mem_entry,
+ kgsl_driver.prockobj, name))
+ return;
+
+ for (i = 0; i < ARRAY_SIZE(mem_stats); i++) {
+ /* We need to check the value of sysfs_create_file, but we
+ * don't really care if it passed or not */
+
+ ret = sysfs_create_file(&private->kobj,
+ &mem_stats[i].attr.attr);
+ ret = sysfs_create_file(&private->kobj,
+ &mem_stats[i].max_attr.attr);
}
}
diff --git a/drivers/gpu/msm/kgsl_sharedmem.h b/drivers/gpu/msm/kgsl_sharedmem.h
index a9abcf9..d345ff3 100644
--- a/drivers/gpu/msm/kgsl_sharedmem.h
+++ b/drivers/gpu/msm/kgsl_sharedmem.h
@@ -15,6 +15,7 @@
#include <linux/slab.h>
#include <linux/dma-mapping.h>
+#include "kgsl_mmu.h"
struct kgsl_device;
struct kgsl_process_private;
@@ -94,11 +95,9 @@
kgsl_allocate(struct kgsl_memdesc *memdesc,
struct kgsl_pagetable *pagetable, size_t size)
{
-#ifdef CONFIG_MSM_KGSL_MMU
+ if (kgsl_mmu_get_mmutype() == KGSL_MMU_TYPE_NONE)
+ return kgsl_sharedmem_ebimem(memdesc, pagetable, size);
return kgsl_sharedmem_vmalloc(memdesc, pagetable, size);
-#else
- return kgsl_sharedmem_ebimem(memdesc, pagetable, size);
-#endif
}
static inline int
@@ -106,21 +105,18 @@
struct kgsl_pagetable *pagetable,
size_t size, unsigned int flags)
{
-#ifdef CONFIG_MSM_KGSL_MMU
+ if (kgsl_mmu_get_mmutype() == KGSL_MMU_TYPE_NONE)
+ return kgsl_sharedmem_ebimem_user(memdesc, pagetable, size,
+ flags);
return kgsl_sharedmem_vmalloc_user(memdesc, pagetable, size, flags);
-#else
- return kgsl_sharedmem_ebimem_user(memdesc, pagetable, size, flags);
-#endif
}
static inline int
kgsl_allocate_contiguous(struct kgsl_memdesc *memdesc, size_t size)
{
int ret = kgsl_sharedmem_alloc_coherent(memdesc, size);
-#ifndef CONFIG_MSM_KGSL_MMU
- if (!ret)
+ if (!ret && (kgsl_mmu_get_mmutype() == KGSL_MMU_TYPE_NONE))
memdesc->gpuaddr = memdesc->physaddr;
-#endif
return ret;
}
diff --git a/drivers/gpu/msm/z180.c b/drivers/gpu/msm/z180.c
index 6cd57b3..9e14247 100644
--- a/drivers/gpu/msm/z180.c
+++ b/drivers/gpu/msm/z180.c
@@ -411,7 +411,7 @@
unsigned int sizedwords;
if (device->state & KGSL_STATE_HUNG) {
- return -EINVAL;
+ result = -EINVAL;
goto error;
}
if (numibs != 1) {
diff --git a/drivers/hwmon/msmproc_adc.c b/drivers/hwmon/msmproc_adc.c
index a0ee748..fa6949e 100644
--- a/drivers/hwmon/msmproc_adc.c
+++ b/drivers/hwmon/msmproc_adc.c
@@ -34,81 +34,89 @@
};
static const struct pm8921_adc_map_pt adcmap_btm_threshold[] = {
- {-30, 41001},
- {-20, 40017},
- {-10, 38721},
- {0, 37186},
- {10, 35554},
- {11, 35392},
- {12, 35230},
- {13, 35070},
- {14, 34910},
- {15, 34751},
- {16, 34594},
- {17, 34438},
- {18, 34284},
- {19, 34131},
- {20, 33980},
- {21, 33830},
- {22, 33683},
- {23, 33538},
- {24, 33394},
- {25, 33253},
- {26, 33114},
- {27, 32977},
- {28, 32842},
- {29, 32710},
- {30, 32580},
- {31, 32452},
- {32, 32327},
- {33, 32204},
- {34, 32084},
- {35, 31966},
- {36, 31850},
- {37, 31737},
- {38, 31627},
- {39, 31518},
- {40, 31412},
- {41, 31309},
- {42, 31208},
- {43, 31109},
- {44, 31013},
- {45, 30918},
- {46, 30827},
- {47, 30737},
- {48, 30649},
- {49, 30564},
- {50, 30481},
- {51, 30400},
- {52, 30321},
- {53, 30244},
- {54, 30169},
- {55, 30096},
- {56, 30025},
- {57, 29956},
- {58, 29889},
- {59, 29823},
- {60, 29759},
- {61, 29697},
- {62, 29637},
- {63, 29578},
- {64, 29521},
- {65, 29465},
- {66, 29411},
- {67, 29359},
- {68, 29308},
- {69, 29258},
- {70, 29209},
- {71, 29162},
- {72, 29117},
- {73, 29072},
- {74, 29029},
- {75, 28987},
- {76, 28946},
- {77, 28906},
- {78, 28868},
- {79, 28830},
- {80, 28794}
+ {-30, 1642},
+ {-20, 1544},
+ {-10, 1414},
+ {0, 1260},
+ {1, 1244},
+ {2, 1228},
+ {3, 1212},
+ {4, 1195},
+ {5, 1179},
+ {6, 1162},
+ {7, 1146},
+ {8, 1129},
+ {9, 1113},
+ {10, 1097},
+ {11, 1080},
+ {12, 1064},
+ {13, 1048},
+ {14, 1032},
+ {15, 1016},
+ {16, 1000},
+ {17, 985},
+ {18, 969},
+ {19, 954},
+ {20, 939},
+ {21, 924},
+ {22, 909},
+ {23, 894},
+ {24, 880},
+ {25, 866},
+ {26, 852},
+ {27, 838},
+ {28, 824},
+ {29, 811},
+ {30, 798},
+ {31, 785},
+ {32, 773},
+ {33, 760},
+ {34, 748},
+ {35, 736},
+ {36, 725},
+ {37, 713},
+ {38, 702},
+ {39, 691},
+ {40, 681},
+ {41, 670},
+ {42, 660},
+ {43, 650},
+ {44, 640},
+ {45, 631},
+ {46, 622},
+ {47, 613},
+ {48, 604},
+ {49, 595},
+ {50, 587},
+ {51, 579},
+ {52, 571},
+ {53, 563},
+ {54, 556},
+ {55, 548},
+ {56, 541},
+ {57, 534},
+ {58, 527},
+ {59, 521},
+ {60, 514},
+ {61, 508},
+ {62, 502},
+ {63, 496},
+ {64, 490},
+ {65, 485},
+ {66, 281},
+ {67, 274},
+ {68, 267},
+ {69, 260},
+ {70, 254},
+ {71, 247},
+ {72, 241},
+ {73, 235},
+ {74, 229},
+ {75, 224},
+ {76, 218},
+ {77, 213},
+ {78, 208},
+ {79, 203}
};
static const struct pm8921_adc_map_pt adcmap_pa_therm[] = {
@@ -591,7 +599,9 @@
}
EXPORT_SYMBOL_GPL(pm8921_adc_tdkntcg_therm);
-int32_t pm8921_adc_batt_scaler(struct pm8921_adc_arb_btm_param *btm_param)
+int32_t pm8921_adc_batt_scaler(struct pm8921_adc_arb_btm_param *btm_param,
+ const struct pm8921_adc_properties *adc_properties,
+ const struct pm8921_adc_chan_properties *chan_properties)
{
int rc;
@@ -600,14 +610,28 @@
ARRAY_SIZE(adcmap_btm_threshold),
btm_param->low_thr_temp,
&btm_param->low_thr_voltage);
+ if (rc)
+ return rc;
- if (!rc) {
- rc = pm8921_adc_map_linear(
+ btm_param->low_thr_voltage *=
+ chan_properties->adc_graph[ADC_CALIB_RATIOMETRIC].dy;
+ do_div(btm_param->low_thr_voltage, adc_properties->adc_vdd_reference);
+ btm_param->low_thr_voltage +=
+ chan_properties->adc_graph[ADC_CALIB_RATIOMETRIC].adc_gnd;
+
+ rc = pm8921_adc_map_linear(
adcmap_btm_threshold,
ARRAY_SIZE(adcmap_btm_threshold),
btm_param->high_thr_temp,
&btm_param->high_thr_voltage);
- }
+ if (rc)
+ return rc;
+
+ btm_param->high_thr_voltage *=
+ chan_properties->adc_graph[ADC_CALIB_RATIOMETRIC].dy;
+ do_div(btm_param->high_thr_voltage, adc_properties->adc_vdd_reference);
+ btm_param->high_thr_voltage +=
+ chan_properties->adc_graph[ADC_CALIB_RATIOMETRIC].adc_gnd;
return rc;
}
diff --git a/drivers/hwmon/pm8921-adc.c b/drivers/hwmon/pm8921-adc.c
index 33f4a3a..38e18de 100644
--- a/drivers/hwmon/pm8921-adc.c
+++ b/drivers/hwmon/pm8921-adc.c
@@ -644,13 +644,16 @@
offset_adc = calib_read_2 -
((slope_adc * adc_pmic->adc_prop->adc_vdd_reference)
>> PM8921_ADC_MUL);
-
adc_pmic->conv->chan_prop->adc_graph[ADC_CALIB_RATIOMETRIC].offset
= offset_adc;
adc_pmic->conv->chan_prop->adc_graph[ADC_CALIB_RATIOMETRIC].dy =
(calib_read_1 - calib_read_2);
adc_pmic->conv->chan_prop->adc_graph[ADC_CALIB_RATIOMETRIC].dx =
adc_pmic->adc_prop->adc_vdd_reference;
+ adc_pmic->conv->chan_prop->adc_graph[ADC_CALIB_RATIOMETRIC].adc_vref =
+ calib_read_1;
+ adc_pmic->conv->chan_prop->adc_graph[ADC_CALIB_RATIOMETRIC].adc_gnd =
+ calib_read_2;
calib_fail:
rc = pm8921_adc_arb_cntrl(0, CHANNEL_MUXOFF);
if (rc < 0) {
@@ -827,7 +830,8 @@
return -EINVAL;
}
- rc = pm8921_adc_batt_scaler(btm_param);
+ rc = pm8921_adc_batt_scaler(btm_param, adc_pmic->adc_prop,
+ adc_pmic->conv->chan_prop);
if (rc < 0) {
pr_err("Failed to lookup the BTM thresholds\n");
return rc;
diff --git a/drivers/input/touchscreen/atmel_mxt_ts.c b/drivers/input/touchscreen/atmel_mxt_ts.c
index 4d97331..4c19222 100644
--- a/drivers/input/touchscreen/atmel_mxt_ts.c
+++ b/drivers/input/touchscreen/atmel_mxt_ts.c
@@ -233,7 +233,6 @@
#define MXT_MAX_FINGER 10
-#define MXT_BUFF_SIZE 100
#define T7_DATA_SIZE 3
#define MXT_MAX_RW_TRIES 3
#define MXT_BLOCK_SIZE 256
@@ -927,12 +926,17 @@
for (i = 0; i < data->info.object_num; i++) {
object = data->object_table + i;
- count += snprintf(buf + count, MXT_BUFF_SIZE,
- "Object Table Element %d(Type %d)\n",
+ count += snprintf(buf + count, PAGE_SIZE - count,
+ "Object[%d] (Type %d)\n",
i + 1, object->type);
+ if (count >= PAGE_SIZE)
+ return PAGE_SIZE - 1;
if (!mxt_object_readable(object->type)) {
- count += snprintf(buf + count, MXT_BUFF_SIZE, "\n");
+ count += snprintf(buf + count, PAGE_SIZE - count,
+ "\n");
+ if (count >= PAGE_SIZE)
+ return PAGE_SIZE - 1;
continue;
}
@@ -942,11 +946,15 @@
if (error)
return error;
- count += snprintf(buf + count, MXT_BUFF_SIZE,
- " Byte %d: 0x%x (%d)\n", j, val, val);
+ count += snprintf(buf + count, PAGE_SIZE - count,
+ "\t[%2d]: %02x (%d)\n", j, val, val);
+ if (count >= PAGE_SIZE)
+ return PAGE_SIZE - 1;
}
- count += snprintf(buf + count, MXT_BUFF_SIZE, "\n");
+ count += snprintf(buf + count, PAGE_SIZE - count, "\n");
+ if (count >= PAGE_SIZE)
+ return PAGE_SIZE - 1;
}
return count;
diff --git a/drivers/input/touchscreen/cyttsp-i2c.c b/drivers/input/touchscreen/cyttsp-i2c.c
index a3446a3..aefce3e 100644
--- a/drivers/input/touchscreen/cyttsp-i2c.c
+++ b/drivers/input/touchscreen/cyttsp-i2c.c
@@ -2419,7 +2419,7 @@
}
rc = regulator_set_optimum_mode(ts->vdd[i],
- reg_info[i].load_uA);
+ reg_info[i].hpm_load_uA);
if (rc < 0) {
pr_err("%s: regulator_set_optimum_mode failed rc=%d\n",
__func__, rc);
@@ -2838,6 +2838,57 @@
}
#ifdef CONFIG_PM
+static int cyttsp_regulator_lpm(struct cyttsp *ts, bool on)
+{
+ int rc = 0, i;
+ const struct cyttsp_regulator *reg_info =
+ ts->platform_data->regulator_info;
+ u8 num_reg = ts->platform_data->num_regulators;
+
+ if (on == false)
+ goto regulator_hpm;
+
+ for (i = 0; i < num_reg; i++) {
+ rc = regulator_set_optimum_mode(ts->vdd[i],
+ reg_info[i].lpm_load_uA);
+ if (rc < 0) {
+ pr_err("%s: regulator_set_optimum failed rc = %d\n",
+ __func__, rc);
+ goto fail_regulator_lpm;
+ }
+
+ }
+
+ return 0;
+
+regulator_hpm:
+ for (i = 0; i < num_reg; i++) {
+ rc = regulator_set_optimum_mode(ts->vdd[i],
+ reg_info[i].hpm_load_uA);
+ if (rc < 0) {
+ pr_err("%s: regulator_set_optimum failed"
+ "rc = %d\n", __func__, rc);
+ goto fail_regulator_hpm;
+ }
+ }
+
+ return 0;
+
+fail_regulator_lpm:
+ while (i--)
+ regulator_set_optimum_mode(ts->vdd[i],
+ reg_info[i].hpm_load_uA);
+
+ return rc;
+
+fail_regulator_hpm:
+ while (i--)
+ regulator_set_optimum_mode(ts->vdd[i],
+ reg_info[i].lpm_load_uA);
+
+ return rc;
+}
+
/* Function to manage power-on resume */
static int cyttsp_resume(struct device *dev)
{
@@ -2865,6 +2916,8 @@
(ts->platform_data->power_state != CY_ACTIVE_STATE)) {
if (ts->platform_data->resume)
retval = ts->platform_data->resume(ts->client);
+ else
+ retval = cyttsp_regulator_lpm(ts, false);
/* take TTSP device out of bootloader mode;
* switch back to TrueTouch operational mode */
if (!(retval < CY_OK)) {
@@ -2948,14 +3001,23 @@
if (!(retval < CY_OK)) {
if (ts->platform_data->use_sleep &&
(ts->platform_data->power_state == CY_ACTIVE_STATE)) {
+ if (ts->platform_data->suspend) {
+ retval =
+ ts->platform_data->suspend(ts->client);
+ } else {
+ retval = cyttsp_regulator_lpm(ts, true);
+ }
if (ts->platform_data->use_sleep & CY_USE_DEEP_SLEEP_SEL)
sleep_mode = CY_DEEP_SLEEP_MODE;
else
sleep_mode = CY_LOW_PWR_MODE;
- retval = i2c_smbus_write_i2c_block_data(ts->client,
- CY_REG_BASE,
- sizeof(sleep_mode), &sleep_mode);
+ if (!(retval < CY_OK)) {
+ retval =
+ i2c_smbus_write_i2c_block_data(ts->client,
+ CY_REG_BASE,
+ sizeof(sleep_mode), &sleep_mode);
+ }
}
}
diff --git a/drivers/leds/Kconfig b/drivers/leds/Kconfig
index feb345d..60c200e 100644
--- a/drivers/leds/Kconfig
+++ b/drivers/leds/Kconfig
@@ -354,7 +354,7 @@
config LEDS_MSM_PMIC
tristate "LED Support for Qualcomm PMIC connected LEDs"
- default y
+ default n
depends on ARCH_MSM
help
This option enables support for LEDs connected over PMIC
diff --git a/drivers/media/radio/radio-iris.c b/drivers/media/radio/radio-iris.c
index e8e9770..a256e51 100644
--- a/drivers/media/radio/radio-iris.c
+++ b/drivers/media/radio/radio-iris.c
@@ -84,11 +84,13 @@
struct hci_fm_trans_conf_req_struct trans_conf;
struct hci_fm_rds_grp_req rds_grp;
unsigned char g_search_mode;
+ unsigned char power_mode;
int search_on;
unsigned int tone_freq;
unsigned char g_scan_time;
unsigned int g_antenna;
unsigned int g_rds_grp_proc_ps;
+ unsigned char event_mask;
enum iris_region_t region;
struct hci_fm_dbg_param_rsp st_dbg_param;
struct hci_ev_srch_list_compl srch_st_result;
@@ -763,6 +765,17 @@
&sig_threshold);
}
+static int hci_fm_set_event_mask(struct radio_hci_dev *hdev,
+ unsigned long param)
+{
+ u16 opcode = 0;
+ u8 event_mask = param;
+
+ opcode = hci_opcode_pack(HCI_OGF_FM_RECV_CTRL_CMD_REQ,
+ HCI_OCF_FM_SET_EVENT_MASK);
+ return radio_hci_send_cmd(hdev, opcode, sizeof(event_mask),
+ &event_mask);
+}
static int hci_fm_get_sig_threshold_req(struct radio_hci_dev *hdev,
unsigned long param)
{
@@ -1095,6 +1108,13 @@
return ret;
}
+static inline int hci_conf_event_mask(__u8 *arg,
+ struct radio_hci_dev *hdev)
+{
+ u8 event_mask = *arg;
+ return radio_hci_request(hdev, hci_fm_set_event_mask,
+ event_mask, RADIO_HCI_TIMEOUT);
+}
static int hci_set_fm_recv_conf(struct hci_fm_recv_conf_req *arg,
struct radio_hci_dev *hdev)
{
@@ -1778,8 +1798,10 @@
case hci_diagnostic_cmd_op_pack(HCI_OCF_FM_POKE_DATA):
case hci_diagnostic_cmd_op_pack(HCI_FM_SET_INTERNAL_TONE_GENRATOR):
case hci_common_cmd_op_pack(HCI_OCF_FM_SET_CALIBRATION):
+ case hci_recv_ctrl_cmd_op_pack(HCI_OCF_FM_SET_EVENT_MASK):
hci_cc_rsp(hdev, skb);
break;
+
case hci_diagnostic_cmd_op_pack(HCI_OCF_FM_SSBI_PEEK_REG):
hci_cc_ssbi_peek_rsp(hdev, skb);
break;
@@ -2156,6 +2178,43 @@
return retval;
}
+static int set_low_power_mode(struct iris_device *radio, int power_mode)
+{
+
+ int rds_grps_proc = 0x00;
+ int retval = 0;
+ if (radio->power_mode != power_mode) {
+
+ if (power_mode) {
+ radio->event_mask = 0x00;
+ rds_grps_proc = 0x00 | AF_JUMP_ENABLE ;
+ retval = hci_fm_rds_grps_process(
+ &rds_grps_proc,
+ radio->fm_hdev);
+ if (retval < 0) {
+ FMDERR("Disable RDS failed");
+ return retval;
+ }
+ retval = hci_conf_event_mask(&radio->event_mask,
+ radio->fm_hdev);
+ } else {
+
+ radio->event_mask = SIG_LEVEL_INTR |
+ RDS_SYNC_INTR | AUDIO_CTRL_INTR;
+ retval = hci_conf_event_mask(&radio->event_mask,
+ radio->fm_hdev);
+ if (retval < 0) {
+ FMDERR("Enable Async events failed");
+ return retval;
+ }
+ retval = hci_fm_rds_grps_process(
+ &radio->g_rds_grp_proc_ps,
+ radio->fm_hdev);
+ }
+ radio->power_mode = power_mode;
+ }
+ return retval;
+}
static int iris_recv_set_region(struct iris_device *radio, int req_region)
{
int retval;
@@ -2401,6 +2460,7 @@
ctrl->value = radio->rds_grp.rds_buf_size;
break;
case V4L2_CID_PRIVATE_IRIS_LP_MODE:
+ ctrl->value = radio->power_mode;
break;
case V4L2_CID_PRIVATE_IRIS_ANTENNA:
ctrl->value = radio->g_antenna;
@@ -2770,6 +2830,7 @@
radio->fm_hdev);
break;
case V4L2_CID_PRIVATE_IRIS_LP_MODE:
+ set_low_power_mode(radio, ctrl->value);
break;
case V4L2_CID_PRIVATE_IRIS_ANTENNA:
temp_val = ctrl->value;
diff --git a/drivers/media/video/msm/gemini/msm_gemini_core.c b/drivers/media/video/msm/gemini/msm_gemini_core.c
index db0f505..480500b 100644
--- a/drivers/media/video/msm/gemini/msm_gemini_core.c
+++ b/drivers/media/video/msm/gemini/msm_gemini_core.c
@@ -71,7 +71,8 @@
for (i = 0; i < 2; i++) {
if (we_pingpong_buf.buf_status[i] && release_buf)
msm_gemini_platform_p2v(we_pingpong_buf.buf[i].file,
- &we_pingpong_buf.buf[i].msm_buffer);
+ &we_pingpong_buf.buf[i].msm_buffer,
+ &we_pingpong_buf.buf[i].handle);
we_pingpong_buf.buf_status[i] = 0;
}
}
diff --git a/drivers/media/video/msm/gemini/msm_gemini_hw.h b/drivers/media/video/msm/gemini/msm_gemini_hw.h
index f91a135..3c2fc6a 100644
--- a/drivers/media/video/msm/gemini/msm_gemini_hw.h
+++ b/drivers/media/video/msm/gemini/msm_gemini_hw.h
@@ -16,6 +16,7 @@
#include <media/msm_gemini.h>
#include "msm_gemini_hw_reg.h"
#include <mach/msm_subsystem_map.h>
+#include <linux/ion.h>
struct msm_gemini_hw_buf {
struct msm_gemini_buf vbuf;
@@ -28,6 +29,7 @@
uint32_t num_of_mcu_rows;
struct msm_mapped_buffer *msm_buffer;
int *subsystem_id;
+ struct ion_handle *handle;
};
struct msm_gemini_hw_pingpong {
diff --git a/drivers/media/video/msm/gemini/msm_gemini_platform.c b/drivers/media/video/msm/gemini/msm_gemini_platform.c
index 9f5ec16..e81215e 100644
--- a/drivers/media/video/msm/gemini/msm_gemini_platform.c
+++ b/drivers/media/video/msm/gemini/msm_gemini_platform.c
@@ -25,29 +25,38 @@
/* AXI rate in KHz */
#define MSM_SYSTEM_BUS_RATE 160000
+struct ion_client *gemini_client;
void msm_gemini_platform_p2v(struct file *file,
- struct msm_mapped_buffer **msm_buffer)
+ struct msm_mapped_buffer **msm_buffer,
+ struct ion_handle **ionhandle)
{
-
if (msm_subsystem_unmap_buffer(
(struct msm_mapped_buffer *)*msm_buffer) < 0)
pr_err("%s: umapped stat memory\n", __func__);
*msm_buffer = NULL;
-#ifdef CONFIG_ANDROID_PMEM
+#ifdef CONFIG_MSM_MULTIMEDIA_USE_ION
+ ion_free(gemini_client, *ionhandle);
+ *ionhandle = NULL;
+#elif CONFIG_ANDROID_PMEM
put_pmem_file(file);
#endif
}
uint32_t msm_gemini_platform_v2p(int fd, uint32_t len, struct file **file_p,
- struct msm_mapped_buffer **msm_buffer,
- int *subsys_id)
+ struct msm_mapped_buffer **msm_buffer,
+ int *subsys_id, struct ion_handle **ionhandle)
{
unsigned long paddr;
unsigned long size;
int rc;
int flags;
-#ifdef CONFIG_ANDROID_PMEM
+#ifdef CONFIG_MSM_MULTIMEDIA_USE_ION
+ *ionhandle = ion_import_fd(gemini_client, fd);
+ if (IS_ERR_OR_NULL(*ionhandle))
+ return 0;
+ rc = ion_phys(gemini_client, *ionhandle, &paddr, (size_t *)&size);
+#elif CONFIG_ANDROID_PMEM
unsigned long kvstart;
rc = get_pmem_file(fd, &paddr, &kvstart, &size, file_p);
#else
@@ -73,6 +82,12 @@
flags, subsys_id, 1);
if (IS_ERR((void *)*msm_buffer)) {
pr_err("%s: msm_subsystem_map_buffer failed\n", __func__);
+#ifdef CONFIG_MSM_MULTIMEDIA_USE_ION
+ ion_free(gemini_client, *ionhandle);
+ *ionhandle = NULL;
+#elif CONFIG_ANDROID_PMEM
+ put_pmem_file(*file_p);
+#endif
return 0;
}
paddr = ((struct msm_mapped_buffer *)*msm_buffer)->iova[0];
@@ -136,6 +151,10 @@
*mem = gemini_mem;
*base = gemini_base;
*irq = gemini_irq;
+
+#ifdef CONFIG_MSM_MULTIMEDIA_USE_ION
+ gemini_client = msm_ion_client_create(-1, "camera/gemini");
+#endif
GMN_DBG("%s:%d] success\n", __func__, __LINE__);
return rc;
@@ -159,7 +178,9 @@
result = msm_camio_jpeg_clk_disable();
iounmap(base);
release_mem_region(mem->start, resource_size(mem));
-
+#ifdef CONFIG_MSM_MULTIMEDIA_USE_ION
+ ion_client_destroy(gemini_client);
+#endif
GMN_DBG("%s:%d] success\n", __func__, __LINE__);
return result;
}
diff --git a/drivers/media/video/msm/gemini/msm_gemini_platform.h b/drivers/media/video/msm/gemini/msm_gemini_platform.h
index cd897b0..c54d7df 100644
--- a/drivers/media/video/msm/gemini/msm_gemini_platform.h
+++ b/drivers/media/video/msm/gemini/msm_gemini_platform.h
@@ -15,12 +15,13 @@
#include <linux/interrupt.h>
#include <linux/platform_device.h>
-
+#include <linux/ion.h>
void msm_gemini_platform_p2v(struct file *file,
- struct msm_mapped_buffer **msm_buffer);
+ struct msm_mapped_buffer **msm_buffer,
+ struct ion_handle **ionhandle);
uint32_t msm_gemini_platform_v2p(int fd, uint32_t len, struct file **file,
struct msm_mapped_buffer **msm_buffer,
- int *subsys_id);
+ int *subsys_id, struct ion_handle **ionhandle);
int msm_gemini_platform_clk_enable(void);
int msm_gemini_platform_clk_disable(void);
diff --git a/drivers/media/video/msm/gemini/msm_gemini_sync.c b/drivers/media/video/msm/gemini/msm_gemini_sync.c
index c8d4fa0..0f0bd67 100644
--- a/drivers/media/video/msm/gemini/msm_gemini_sync.c
+++ b/drivers/media/video/msm/gemini/msm_gemini_sync.c
@@ -151,7 +151,7 @@
buf_p = msm_gemini_q_out(q_p);
if (buf_p) {
msm_gemini_platform_p2v(buf_p->file,
- &buf_p->msm_buffer);
+ &buf_p->msm_buffer, &buf_p->handle);
GMN_DBG("%s:%d] %s\n", __func__, __LINE__, q_p->name);
kfree(buf_p->subsystem_id);
kfree(buf_p);
@@ -317,7 +317,8 @@
}
buf_cmd = buf_p->vbuf;
- msm_gemini_platform_p2v(buf_p->file, &buf_p->msm_buffer);
+ msm_gemini_platform_p2v(buf_p->file, &buf_p->msm_buffer,
+ &buf_p->handle);
kfree(buf_p->subsystem_id);
kfree(buf_p);
@@ -368,7 +369,7 @@
}
buf_p->y_buffer_addr = msm_gemini_platform_v2p(buf_cmd.fd,
buf_cmd.y_len, &buf_p->file, &buf_p->msm_buffer,
- buf_p->subsystem_id);
+ buf_p->subsystem_id, &buf_p->handle);
if (!buf_p->y_buffer_addr) {
GMN_PR_ERR("%s:%d] v2p wrong\n", __func__, __LINE__);
kfree(buf_p->subsystem_id);
@@ -434,7 +435,8 @@
}
buf_cmd = buf_p->vbuf;
- msm_gemini_platform_p2v(buf_p->file, &buf_p->msm_buffer);
+ msm_gemini_platform_p2v(buf_p->file, &buf_p->msm_buffer,
+ &buf_p->handle);
kfree(buf_p->subsystem_id);
kfree(buf_p);
@@ -484,7 +486,7 @@
}
buf_p->y_buffer_addr = msm_gemini_platform_v2p(buf_cmd.fd,
buf_cmd.y_len + buf_cmd.cbcr_len, &buf_p->file,
- &buf_p->msm_buffer, buf_p->subsystem_id)
+ &buf_p->msm_buffer, buf_p->subsystem_id, &buf_p->handle)
+ buf_cmd.offset;
buf_p->y_len = buf_cmd.y_len;
diff --git a/drivers/media/video/msm/msm_camera.c b/drivers/media/video/msm/msm_camera.c
index 6bc7d8e..565c724 100644
--- a/drivers/media/video/msm/msm_camera.c
+++ b/drivers/media/video/msm/msm_camera.c
@@ -2516,20 +2516,17 @@
} else {
enable &= PP_MASK;
if (enable & (enable - 1)) {
- pr_err("%s: error: more than one PP request!\n",
+ CDBG("%s: more than one PP request!\n",
__func__);
- return -EINVAL;
}
if (sync->pp_mask) {
if (enable) {
- pr_err("%s: postproc %x is already enabled\n",
+ CDBG("%s: postproc %x is already enabled\n",
__func__, sync->pp_mask & enable);
- return -EINVAL;
} else {
sync->pp_mask &= enable;
CDBG("%s: sync->pp_mask %d enable %d\n",
__func__, sync->pp_mask, enable);
- return 0;
}
}
diff --git a/drivers/media/video/msm/msm_isp.c b/drivers/media/video/msm/msm_isp.c
index 56fbc41..e12d6b1 100644
--- a/drivers/media/video/msm/msm_isp.c
+++ b/drivers/media/video/msm/msm_isp.c
@@ -522,6 +522,8 @@
case CMD_AXI_CFG_PREVIEW:
case CMD_AXI_CFG_SNAP:
case CMD_AXI_CFG_ZSL:
+ case CMD_AXI_CFG_VIDEO_ALL_CHNLS:
+ case CMD_AXI_CFG_ZSL_ALL_CHNLS:
case CMD_RAW_PICT_AXI_CFG:
/* Dont need to pass buffer information.
* subdev will get the buffer from media
diff --git a/drivers/media/video/msm/msm_mctl.c b/drivers/media/video/msm/msm_mctl.c
index 4ee6117..a7fe8a2 100644
--- a/drivers/media/video/msm/msm_mctl.c
+++ b/drivers/media/video/msm/msm_mctl.c
@@ -73,6 +73,14 @@
.colorspace = V4L2_COLORSPACE_JPEG,
},
{
+ .name = "YU12BAYER",
+ .depth = 8,
+ .bitsperpxl = 8,
+ .fourcc = V4L2_PIX_FMT_YUV420M,
+ .pxlcode = V4L2_MBUS_FMT_SBGGR10_1X10, /* Bayer sensor */
+ .colorspace = V4L2_COLORSPACE_JPEG,
+ },
+ {
.name = "RAWBAYER",
.depth = 10,
.bitsperpxl = 10,
diff --git a/drivers/media/video/msm/msm_mctl_pp.c b/drivers/media/video/msm/msm_mctl_pp.c
index a09514b..2bf95a0 100644
--- a/drivers/media/video/msm/msm_mctl_pp.c
+++ b/drivers/media/video/msm/msm_mctl_pp.c
@@ -126,6 +126,10 @@
idx = msm_mctl_out_type_to_inst_index(
p_mctl->sync.pcam_sync, msg_type);
+ if (idx < 0) {
+ pr_err("%s Invalid instance. returning\n", __func__);
+ return -EINVAL;
+ }
pcam_inst = p_mctl->sync.pcam_sync->dev_inst[idx];
vb = msm_mctl_buf_find(p_mctl, pcam_inst,
del_buf, msg_type, fbuf);
@@ -192,27 +196,52 @@
}
static int msm_mctl_pp_get_phy_addr(
+ struct msm_cam_v4l2_dev_inst *pcam_inst,
uint32_t frame_handle,
struct msm_pp_frame *pp_frame)
{
struct msm_frame_buffer *vb = NULL;
struct videobuf2_contig_pmem *mem;
+ int i, buf_idx = 0;
vb = (struct msm_frame_buffer *)frame_handle;
- mem = vb2_plane_cookie(&vb->vidbuf, 0);
+ buf_idx = vb->vidbuf.v4l2_buf.index;
memset(pp_frame, 0, sizeof(struct msm_pp_frame));
pp_frame->handle = (uint32_t)vb;
pp_frame->frame_id = vb->vidbuf.v4l2_buf.sequence;
- pp_frame->image_type = (unsigned short)mem->path;
pp_frame->timestamp = vb->vidbuf.v4l2_buf.timestamp;
- /* hard coded for now. Will need to expand to MP case */
- pp_frame->num_planes = 1;
- pp_frame->sp.addr_offset = mem->addr_offset;
- pp_frame->sp.phy_addr = videobuf2_to_pmem_contig(&vb->vidbuf, 0);
- pp_frame->sp.y_off = 0;
- pp_frame->sp.cbcr_off = mem->offset.sp_off.cbcr_off;
- pp_frame->sp.length = mem->size;
- pp_frame->sp.fd = (int)mem->vaddr;
+ /* Get the cookie for 1st plane and store the path.
+ * Also use this to check the number of planes in
+ * this buffer.*/
+ mem = vb2_plane_cookie(&vb->vidbuf, 0);
+ pp_frame->image_type = (unsigned short)mem->path;
+ if (mem->buffer_type == VIDEOBUF2_SINGLE_PLANE) {
+ pp_frame->num_planes = 1;
+ pp_frame->sp.addr_offset = mem->addr_offset;
+ pp_frame->sp.phy_addr =
+ videobuf2_to_pmem_contig(&vb->vidbuf, 0);
+ pp_frame->sp.y_off = 0;
+ pp_frame->sp.cbcr_off = mem->offset.sp_off.cbcr_off;
+ pp_frame->sp.length = mem->size;
+ pp_frame->sp.fd = (int)mem->vaddr;
+ } else {
+ pp_frame->num_planes = pcam_inst->plane_info.num_planes;
+ for (i = 0; i < pp_frame->num_planes; i++) {
+ mem = vb2_plane_cookie(&vb->vidbuf, i);
+ pp_frame->mp[i].addr_offset = mem->addr_offset;
+ pp_frame->mp[i].phy_addr =
+ videobuf2_to_pmem_contig(&vb->vidbuf, i);
+ pp_frame->mp[i].data_offset =
+ pcam_inst->buf_offset[buf_idx][i].data_offset;
+ pp_frame->mp[i].fd = (int)mem->vaddr;
+ pp_frame->mp[i].length = mem->size;
+ D("%s frame id %d buffer %d plane %d phy addr 0x%x"
+ " fd %d length %d\n", __func__,
+ pp_frame->frame_id, buf_idx, i,
+ (uint32_t)pp_frame->mp[i].phy_addr,
+ pp_frame->mp[i].fd, pp_frame->mp[i].length);
+ }
+ }
return 0;
}
@@ -235,12 +264,38 @@
return 0;
}
+static int msm_mctl_pp_path_to_inst_index(struct msm_cam_v4l2_device *pcam,
+ int out_type)
+{
+ int image_mode;
+ switch (out_type) {
+ case OUTPUT_TYPE_P:
+ image_mode = MSM_V4L2_EXT_CAPTURE_MODE_PREVIEW;
+ break;
+ case OUTPUT_TYPE_V:
+ image_mode = MSM_V4L2_EXT_CAPTURE_MODE_VIDEO;
+ break;
+ case OUTPUT_TYPE_S:
+ image_mode = MSM_V4L2_EXT_CAPTURE_MODE_MAIN;
+ break;
+ default:
+ image_mode = -1;
+ break;
+ }
+ if ((image_mode >= 0) && pcam->dev_inst_map[image_mode])
+ return pcam->dev_inst_map[image_mode]->my_index;
+ else
+ return -EINVAL;
+}
+
int msm_mctl_pp_proc_vpe_cmd(
struct msm_cam_media_controller *p_mctl,
struct msm_mctl_pp_cmd *pp_cmd)
{
- int rc = 0;
+ int rc = 0, idx;
void __user *argp = (void __user *)pp_cmd->value;
+ struct msm_cam_v4l2_dev_inst *pcam_inst;
+
switch (pp_cmd->id) {
case VPE_CMD_INIT:
case VPE_CMD_DEINIT:
@@ -422,15 +477,27 @@
zoom->pp_frame_cmd.cookie,
zoom->pp_frame_cmd.vpe_output_action,
zoom->pp_frame_cmd.path);
-
+ idx = msm_mctl_pp_path_to_inst_index(p_mctl->sync.pcam_sync,
+ zoom->pp_frame_cmd.path);
+ if (idx < 0) {
+ pr_err("%s Invalid path, returning\n", __func__);
+ kfree(zoom);
+ return idx;
+ }
+ pcam_inst = p_mctl->sync.pcam_sync->dev_inst[idx];
+ if (!pcam_inst) {
+ pr_err("%s Invalid instance, returning\n", __func__);
+ kfree(zoom);
+ return -EINVAL;
+ }
zoom->user_cmd = pp_cmd->id;
- rc = msm_mctl_pp_get_phy_addr(
+ rc = msm_mctl_pp_get_phy_addr(pcam_inst,
zoom->pp_frame_cmd.src_buf_handle, &zoom->src_frame);
if (rc) {
kfree(zoom);
break;
}
- rc = msm_mctl_pp_get_phy_addr(
+ rc = msm_mctl_pp_get_phy_addr(pcam_inst,
zoom->pp_frame_cmd.dest_buf_handle, &zoom->dest_frame);
if (rc) {
kfree(zoom);
diff --git a/drivers/media/video/msm/msm_vfe32.c b/drivers/media/video/msm/msm_vfe32.c
index 51b7a90..5c02f85 100644
--- a/drivers/media/video/msm/msm_vfe32.c
+++ b/drivers/media/video/msm/msm_vfe32.c
@@ -454,7 +454,7 @@
break;
case OUTPUT_1_2_AND_3:
- CDBG("%s: OUTPUT_1_2_AND_3", __func__);
+ CDBG("%s: OUTPUT_ZSL", __func__);
/* use wm0& 4 for postview, wm1&5 for preview.*/
/* use wm2& 6 for main img */
vfe32_ctrl->outpath.output_mode |=
@@ -478,6 +478,23 @@
vfe32_ctrl->outpath.out1.ch0 = 0; /* raw */
vfe32_ctrl->outpath.output_mode |= VFE32_OUTPUT_MODE_S;
break;
+ case OUTPUT_ALL_CHNLS:
+ /* YV12 preview */
+ vfe32_ctrl->outpath.output_mode |=
+ VFE32_OUTPUT_MODE_P_ALL_CHNLS;
+ /* video */
+ vfe32_ctrl->outpath.output_mode |=
+ VFE32_OUTPUT_MODE_V;
+ break;
+ case OUTPUT_ZSL_ALL_CHNLS:
+ CDBG("%s: OUTPUT_ZSL_ALL_CHNLS", __func__);
+ vfe32_ctrl->outpath.output_mode |=
+ VFE32_OUTPUT_MODE_S; /* main image.*/
+ vfe32_ctrl->outpath.output_mode |=
+ VFE32_OUTPUT_MODE_P_ALL_CHNLS; /* preview. */
+ vfe32_ctrl->outpath.output_mode |=
+ VFE32_OUTPUT_MODE_T; /* thumbnail. */
+ break;
default:
break;
}
@@ -725,6 +742,12 @@
irq_comp_mask |=
((0x1 << (vfe32_ctrl->outpath.out0.ch0)) |
(0x1 << (vfe32_ctrl->outpath.out0.ch1)));
+ } else if (vfe32_ctrl->outpath.output_mode &
+ VFE32_OUTPUT_MODE_P_ALL_CHNLS) {
+ pr_debug("%s Enabling all channels ", __func__);
+ irq_comp_mask |= (0x1 << vfe32_ctrl->outpath.out0.ch0 |
+ 0x1 << vfe32_ctrl->outpath.out0.ch1 |
+ 0x1 << vfe32_ctrl->outpath.out0.ch2);
}
if (vfe32_ctrl->outpath.output_mode & VFE32_OUTPUT_MODE_T) {
irq_comp_mask |=
@@ -741,6 +764,14 @@
vfe32_AXI_WM_CFG[vfe32_ctrl->outpath.out0.ch0]);
msm_io_w(1, vfe32_ctrl->vfebase +
vfe32_AXI_WM_CFG[vfe32_ctrl->outpath.out0.ch1]);
+ } else if (vfe32_ctrl->outpath.output_mode &
+ VFE32_OUTPUT_MODE_P_ALL_CHNLS) {
+ msm_io_w(1, vfe32_ctrl->vfebase +
+ vfe32_AXI_WM_CFG[vfe32_ctrl->outpath.out0.ch0]);
+ msm_io_w(1, vfe32_ctrl->vfebase +
+ vfe32_AXI_WM_CFG[vfe32_ctrl->outpath.out0.ch1]);
+ msm_io_w(1, vfe32_ctrl->vfebase +
+ vfe32_AXI_WM_CFG[vfe32_ctrl->outpath.out0.ch2]);
}
if (vfe32_ctrl->outpath.output_mode & VFE32_OUTPUT_MODE_T) {
msm_io_w(1, vfe32_ctrl->vfebase +
@@ -839,6 +870,12 @@
if (vfe32_ctrl->outpath.output_mode & VFE32_OUTPUT_MODE_PT) {
irq_comp_mask |= (0x1 << vfe32_ctrl->outpath.out0.ch0 |
0x1 << vfe32_ctrl->outpath.out0.ch1);
+ } else if (vfe32_ctrl->outpath.output_mode &
+ VFE32_OUTPUT_MODE_P_ALL_CHNLS) {
+ pr_debug("%s Enabling all channels ", __func__);
+ irq_comp_mask |= (0x1 << vfe32_ctrl->outpath.out0.ch0 |
+ 0x1 << vfe32_ctrl->outpath.out0.ch1 |
+ 0x1 << vfe32_ctrl->outpath.out0.ch2);
}
if (vfe32_ctrl->outpath.output_mode & VFE32_OUTPUT_MODE_V) {
@@ -853,6 +890,14 @@
vfe32_AXI_WM_CFG[vfe32_ctrl->outpath.out0.ch0]);
msm_io_w(1, vfe32_ctrl->vfebase +
vfe32_AXI_WM_CFG[vfe32_ctrl->outpath.out0.ch1]);
+ } else if (vfe32_ctrl->outpath.output_mode &
+ VFE32_OUTPUT_MODE_P_ALL_CHNLS) {
+ msm_io_w(1, vfe32_ctrl->vfebase +
+ vfe32_AXI_WM_CFG[vfe32_ctrl->outpath.out0.ch0]);
+ msm_io_w(1, vfe32_ctrl->vfebase +
+ vfe32_AXI_WM_CFG[vfe32_ctrl->outpath.out0.ch1]);
+ msm_io_w(1, vfe32_ctrl->vfebase +
+ vfe32_AXI_WM_CFG[vfe32_ctrl->outpath.out0.ch2]);
}
msm_camio_set_perf_lvl(S_PREVIEW);
vfe32_start_common();
@@ -1673,6 +1718,12 @@
goto proc_general_done;
}
cmdp_local = cmdp;
+ new_val = *cmdp_local;
+
+ old_val = msm_io_r(vfe32_ctrl->vfebase + V32_DEMOSAICV3_0_OFF);
+ old_val &= DEMOSAIC_MASK;
+ new_val = new_val | old_val;
+ *cmdp_local = new_val;
msm_io_memcpy(vfe32_ctrl->vfebase + V32_DEMOSAICV3_0_OFF,
cmdp_local, V32_DEMOSAICV3_0_LEN);
@@ -1681,6 +1732,45 @@
cmdp_local, V32_DEMOSAICV3_1_LEN);
break;
+ case VFE_CMD_DEMOSAICV3_UPDATE:
+ if (cmd->length !=
+ V32_DEMOSAICV3_0_LEN * V32_DEMOSAICV3_UP_REG_CNT) {
+ rc = -EFAULT;
+ goto proc_general_done;
+ }
+ cmdp = kmalloc(cmd->length, GFP_ATOMIC);
+ if (!cmdp) {
+ rc = -ENOMEM;
+ goto proc_general_done;
+ }
+ if (copy_from_user(cmdp,
+ (void __user *)(cmd->value),
+ cmd->length)) {
+ rc = -EFAULT;
+ goto proc_general_done;
+ }
+ cmdp_local = cmdp;
+ new_val = *cmdp_local;
+
+ old_val = msm_io_r(vfe32_ctrl->vfebase + V32_DEMOSAICV3_0_OFF);
+ old_val &= DEMOSAIC_MASK;
+ new_val = new_val | old_val;
+ *cmdp_local = new_val;
+
+ msm_io_memcpy(vfe32_ctrl->vfebase + V32_DEMOSAICV3_0_OFF,
+ cmdp_local, V32_DEMOSAICV3_0_LEN);
+ /* As the address space is not contiguous increment by 2
+ * before copying to next address space */
+ cmdp_local += 1;
+ msm_io_memcpy(vfe32_ctrl->vfebase + V32_DEMOSAICV3_1_OFF,
+ cmdp_local, 2 * V32_DEMOSAICV3_0_LEN);
+ /* As the address space is not contiguous increment by 2
+ * before copying to next address space */
+ cmdp_local += 2;
+ msm_io_memcpy(vfe32_ctrl->vfebase + V32_DEMOSAICV3_2_OFF,
+ cmdp_local, 2 * V32_DEMOSAICV3_0_LEN);
+ break;
+
case VFE_CMD_DEMOSAICV3_ABCC_CFG:
rc = -EFAULT;
break;
@@ -3499,6 +3589,27 @@
}
break;
+ case CMD_AXI_CFG_ZSL_ALL_CHNLS: {
+ uint32_t *axio = NULL;
+ CDBG("%s, CMD_AXI_CFG_ZSL\n", __func__);
+ axio = kmalloc(vfe32_cmd[VFE_CMD_AXI_OUT_CFG].length,
+ GFP_ATOMIC);
+ if (!axio) {
+ rc = -ENOMEM;
+ break;
+ }
+
+ if (copy_from_user(axio, (void __user *)(vfecmd.value),
+ vfe32_cmd[VFE_CMD_AXI_OUT_CFG].length)) {
+ kfree(axio);
+ rc = -EFAULT;
+ break;
+ }
+ vfe32_config_axi(OUTPUT_ZSL_ALL_CHNLS, axio);
+ kfree(axio);
+ }
+ break;
+
case CMD_AXI_CFG_VIDEO: {
uint32_t *axio = NULL;
axio = kmalloc(vfe32_cmd[VFE_CMD_AXI_OUT_CFG].length,
@@ -3518,6 +3629,26 @@
kfree(axio);
}
break;
+
+ case CMD_AXI_CFG_VIDEO_ALL_CHNLS: {
+ uint32_t *axio = NULL;
+ axio = kmalloc(vfe32_cmd[VFE_CMD_AXI_OUT_CFG].length,
+ GFP_ATOMIC);
+ if (!axio) {
+ rc = -ENOMEM;
+ break;
+ }
+
+ if (copy_from_user(axio, (void __user *)(vfecmd.value),
+ vfe32_cmd[VFE_CMD_AXI_OUT_CFG].length)) {
+ kfree(axio);
+ rc = -EFAULT;
+ break;
+ }
+ vfe32_config_axi(OUTPUT_ALL_CHNLS, axio);
+ kfree(axio);
+ }
+ break;
default:
break;
}
diff --git a/drivers/media/video/msm/msm_vfe32.h b/drivers/media/video/msm/msm_vfe32.h
index 30b77d7..a01d910 100644
--- a/drivers/media/video/msm/msm_vfe32.h
+++ b/drivers/media/video/msm/msm_vfe32.h
@@ -140,6 +140,9 @@
/* For DBPC bit 1 is set to zero and other's 1 */
#define DBCC_MASK 0xFFFFFFFD
+/* For DBPC/ABF/DBCC/ABCC bits are set to 1 all others 0 */
+#define DEMOSAIC_MASK 0xF
+
/* For MCE enable bit 28 set to zero and other's 1 */
#define MCE_EN_MASK 0xEFFFFFFF
@@ -211,6 +214,8 @@
#define V32_DEMOSAICV3_0_LEN 4
#define V32_DEMOSAICV3_1_OFF 0x0000061C
#define V32_DEMOSAICV3_1_LEN 88
+#define V32_DEMOSAICV3_2_OFF 0x0000066C
+#define V32_DEMOSAICV3_UP_REG_CNT 5
/* BPC */
#define V32_DEMOSAIC_2_OFF 0x0000029C
#define V32_DEMOSAIC_2_LEN 8
@@ -871,6 +876,7 @@
#define VFE32_OUTPUT_MODE_V (0x1 << 2)
#define VFE32_OUTPUT_MODE_P (0x1 << 3)
#define VFE32_OUTPUT_MODE_T (0x1 << 4)
+#define VFE32_OUTPUT_MODE_P_ALL_CHNLS (0x1 << 5)
struct vfe_stats_control {
uint8_t ackPending;
diff --git a/drivers/mfd/pm8921-core.c b/drivers/mfd/pm8921-core.c
index f05fb8e..742d8dd 100644
--- a/drivers/mfd/pm8921-core.c
+++ b/drivers/mfd/pm8921-core.c
@@ -270,6 +270,7 @@
SINGLE_IRQ_RESOURCE("PM8921_BMS_OCV_FOR_R", PM8921_BMS_OCV_FOR_R),
SINGLE_IRQ_RESOURCE("PM8921_BMS_GOOD_OCV", PM8921_BMS_GOOD_OCV),
SINGLE_IRQ_RESOURCE("PM8921_BMS_VSENSE_AVG", PM8921_BMS_VSENSE_AVG),
+ SINGLE_IRQ_RESOURCE("PM8921_BMS_CCADC_EOC", PM8921_BMS_CCADC_EOC),
};
static struct mfd_cell charger_cell __devinitdata = {
diff --git a/drivers/mfd/pm8xxx-batt-alarm.c b/drivers/mfd/pm8xxx-batt-alarm.c
index 92ade1c..1d30db9 100644
--- a/drivers/mfd/pm8xxx-batt-alarm.c
+++ b/drivers/mfd/pm8xxx-batt-alarm.c
@@ -502,15 +502,16 @@
= container_of(work, struct pm8xxx_batt_alarm_chip, irq_work);
int status;
- if (chip) {
- status = pm8xxx_batt_alarm_status_read();
+ if (!chip)
+ return;
- if (status < 0)
- pr_err("failed to read status, rc=%d\n", status);
- else
- srcu_notifier_call_chain(&chip->irq_notifier_list,
- status, NULL);
- }
+ status = pm8xxx_batt_alarm_status_read();
+
+ if (status < 0)
+ pr_err("failed to read status, rc=%d\n", status);
+ else
+ srcu_notifier_call_chain(&chip->irq_notifier_list,
+ status, NULL);
enable_irq(chip->irq);
}
diff --git a/drivers/mfd/pm8xxx-pwm.c b/drivers/mfd/pm8xxx-pwm.c
index fa4b130..5b4f7e3 100644
--- a/drivers/mfd/pm8xxx-pwm.c
+++ b/drivers/mfd/pm8xxx-pwm.c
@@ -1230,6 +1230,7 @@
struct dentry *temp;
struct pm8xxx_pwm_user *puser;
int i;
+ int rc = 0;
if (dev == NULL) {
pr_err("no parent data passed in.\n");
@@ -1246,8 +1247,8 @@
sizeof(struct pm8xxx_pwm_user), GFP_KERNEL);
if (dbgdev->user == NULL) {
pr_err("kcalloc() failed.\n");
- kfree(dbgdev);
- return -ENOMEM;
+ rc = -ENOMEM;
+ goto user_error;
}
mutex_init(&dbgdev->dbg_mutex);
@@ -1257,7 +1258,8 @@
dent = debugfs_create_dir("pm8xxx-pwm-dbg", NULL);
if (dent == NULL || IS_ERR(dent)) {
pr_err("ERR debugfs_create_dir: dent=%p\n", dent);
- return -ENOMEM;
+ rc = -ENOMEM;
+ goto dir_error;
}
dbgdev->dent = dent;
@@ -1269,6 +1271,7 @@
dent = debugfs_create_dir(pwm_ch, dbgdev->dent);
if (dent == NULL || IS_ERR(dent)) {
pr_err("ERR: pwm=%d: dir: dent=%p\n", i, dent);
+ rc = -ENOMEM;
goto debug_error;
}
@@ -1279,6 +1282,7 @@
dent, puser, &dbg_pwm_period_fops);
if (temp == NULL || IS_ERR(temp)) {
pr_err("ERR: pwm=%d: period: dent=%p\n", i, dent);
+ rc = -ENOMEM;
goto debug_error;
}
@@ -1286,6 +1290,7 @@
dent, puser, &dbg_pwm_duty_cycle_fops);
if (temp == NULL || IS_ERR(temp)) {
pr_err("ERR: pwm=%d: duty-cycle: dent=%p\n", i, dent);
+ rc = -ENOMEM;
goto debug_error;
}
@@ -1293,6 +1298,7 @@
dent, puser, &dbg_pwm_enable_fops);
if (temp == NULL || IS_ERR(temp)) {
pr_err("ERR: pwm=%d: enable: dent=%p\n", i, dent);
+ rc = -ENOMEM;
goto debug_error;
}
}
@@ -1303,7 +1309,11 @@
debug_error:
debugfs_remove_recursive(dbgdev->dent);
- return -ENOMEM;
+dir_error:
+ kfree(dbgdev->user);
+user_error:
+ kfree(dbgdev);
+ return rc;
}
static int __devexit pm8xxx_pwm_dbg_remove(void)
diff --git a/drivers/mfd/wcd9310-core.c b/drivers/mfd/wcd9310-core.c
index aef0754..8eca7aa 100644
--- a/drivers/mfd/wcd9310-core.c
+++ b/drivers/mfd/wcd9310-core.c
@@ -573,6 +573,7 @@
int ret = 0;
int sgla_retry_cnt;
+ dev_info(&slim->dev, "Initialized slim device %s\n", slim->name);
pdata = slim->dev.platform_data;
if (!pdata) {
@@ -727,17 +728,35 @@
.remove = tabla_slim_remove,
.id_table = slimtest_id,
};
+
+static const struct slim_device_id slimtest2x_id[] = {
+ {"tabla2x-slim", 0},
+ {}
+};
+
+static struct slim_driver tabla2x_slim_driver = {
+ .driver = {
+ .name = "tabla2x-slim",
+ .owner = THIS_MODULE,
+ },
+ .probe = tabla_slim_probe,
+ .remove = tabla_slim_remove,
+ .id_table = slimtest2x_id,
+};
+
static int __init tabla_init(void)
{
- int ret;
+ int ret1, ret2;
- ret = slim_driver_register(&tabla_slim_driver);
- if (ret != 0) {
- pr_err("Failed to register tabla SB driver: %d\n", ret);
- goto err;
- }
-err:
- return ret;
+ ret1 = slim_driver_register(&tabla_slim_driver);
+ if (ret1 != 0)
+ pr_err("Failed to register tabla SB driver: %d\n", ret1);
+
+ ret2 = slim_driver_register(&tabla2x_slim_driver);
+ if (ret2 != 0)
+ pr_err("Failed to register tabla2x SB driver: %d\n", ret2);
+
+ return (ret1 && ret2) ? -1 : 0;
}
module_init(tabla_init);
diff --git a/drivers/mmc/core/host.c b/drivers/mmc/core/host.c
index 8703a52..5441006 100644
--- a/drivers/mmc/core/host.c
+++ b/drivers/mmc/core/host.c
@@ -53,6 +53,31 @@
static DEFINE_SPINLOCK(mmc_host_lock);
#ifdef CONFIG_MMC_CLKGATE
+static ssize_t clkgate_delay_show(struct device *dev,
+ struct device_attribute *attr, char *buf)
+{
+ struct mmc_host *host = cls_dev_to_mmc_host(dev);
+ return snprintf(buf, PAGE_SIZE, "%lu millisecs\n",
+ host->clkgate_delay);
+}
+
+static ssize_t clkgate_delay_store(struct device *dev,
+ struct device_attribute *attr, const char *buf, size_t count)
+{
+ struct mmc_host *host = cls_dev_to_mmc_host(dev);
+ unsigned long flags, value;
+
+ if (kstrtoul(buf, 0, &value))
+ return -EINVAL;
+
+ spin_lock_irqsave(&host->clk_lock, flags);
+ host->clkgate_delay = value;
+ spin_unlock_irqrestore(&host->clk_lock, flags);
+
+ pr_info("%s: clock gate delay set to %lu ms\n",
+ mmc_hostname(host), value);
+ return count;
+}
/*
* Enabling clock gating will make the core call out to the host
@@ -113,7 +138,7 @@
static void mmc_host_clk_gate_work(struct work_struct *work)
{
struct mmc_host *host = container_of(work, struct mmc_host,
- clk_gate_work);
+ clk_gate_work.work);
mmc_host_clk_gate_delayed(host);
}
@@ -130,6 +155,8 @@
{
unsigned long flags;
+ /* cancel any clock gating work scheduled by mmc_host_clk_release() */
+ cancel_delayed_work_sync(&host->clk_gate_work);
mutex_lock(&host->clk_gate_mutex);
spin_lock_irqsave(&host->clk_lock, flags);
if (host->clk_gated) {
@@ -179,7 +206,8 @@
host->clk_requests--;
if (mmc_host_may_gate_card(host->card) &&
!host->clk_requests)
- queue_work(system_nrt_wq, &host->clk_gate_work);
+ queue_delayed_work(system_nrt_wq, &host->clk_gate_work,
+ msecs_to_jiffies(host->clkgate_delay));
spin_unlock_irqrestore(&host->clk_lock, flags);
}
@@ -212,8 +240,13 @@
host->clk_requests = 0;
/* Hold MCI clock for 8 cycles by default */
host->clk_delay = 8;
+ /*
+ * Default clock gating delay is value is 200ms.
+ * This value can be tuned by writing into sysfs entry.
+ */
+ host->clkgate_delay = 200;
host->clk_gated = false;
- INIT_WORK(&host->clk_gate_work, mmc_host_clk_gate_work);
+ INIT_DELAYED_WORK(&host->clk_gate_work, mmc_host_clk_gate_work);
spin_lock_init(&host->clk_lock);
mutex_init(&host->clk_gate_mutex);
}
@@ -228,7 +261,7 @@
* Wait for any outstanding gate and then make sure we're
* ungated before exiting.
*/
- if (cancel_work_sync(&host->clk_gate_work))
+ if (cancel_delayed_work_sync(&host->clk_gate_work))
mmc_host_clk_gate_delayed(host);
if (host->clk_gated)
mmc_host_clk_hold(host);
@@ -236,6 +269,17 @@
WARN_ON(host->clk_requests > 1);
}
+static inline void mmc_host_clk_sysfs_init(struct mmc_host *host)
+{
+ host->clkgate_delay_attr.show = clkgate_delay_show;
+ host->clkgate_delay_attr.store = clkgate_delay_store;
+ sysfs_attr_init(&host->clkgate_delay_attr.attr);
+ host->clkgate_delay_attr.attr.name = "clkgate_delay";
+ host->clkgate_delay_attr.attr.mode = S_IRUGO | S_IWUSR;
+ if (device_create_file(&host->class_dev, &host->clkgate_delay_attr))
+ pr_err("%s: Failed to create clkgate_delay sysfs entry\n",
+ mmc_hostname(host));
+}
#else
static inline void mmc_host_clk_init(struct mmc_host *host)
@@ -246,6 +290,9 @@
{
}
+static inline void mmc_host_clk_sysfs_init(struct mmc_host *host)
+{
+}
#endif
/**
@@ -398,6 +445,8 @@
#ifdef CONFIG_DEBUG_FS
mmc_add_host_debugfs(host);
#endif
+ mmc_host_clk_sysfs_init(host);
+
err = sysfs_create_group(&host->parent->kobj, &dev_attr_grp);
if (err)
pr_err("%s: failed to create sysfs group with err %d\n",
diff --git a/drivers/mmc/host/msm_sdcc.c b/drivers/mmc/host/msm_sdcc.c
index c1df55e..6181758 100644
--- a/drivers/mmc/host/msm_sdcc.c
+++ b/drivers/mmc/host/msm_sdcc.c
@@ -132,6 +132,8 @@
static void
msmsdcc_start_command(struct msmsdcc_host *host, struct mmc_command *cmd,
u32 c);
+static inline void msmsdcc_delay(struct msmsdcc_host *host);
+
#ifdef CONFIG_MMC_MSM_SPS_SUPPORT
static int msmsdcc_sps_reset_ep(struct msmsdcc_host *host,
@@ -207,77 +209,83 @@
* @host - Pointer to driver's host structure
*
*/
-static void msmsdcc_soft_reset_and_restore(struct msmsdcc_host *host)
+static void msmsdcc_soft_reset(struct msmsdcc_host *host)
{
- if (host->is_sps_mode) {
- /* Reset DML first */
- msmsdcc_dml_reset(host);
- /*
- * delay the SPS pipe reset in thread context as
- * sps_connect/sps_disconnect APIs can be called
- * only from non-atomic context.
- */
- host->sps.pipe_reset_pending = true;
- }
/*
* Reset SDCC controller's DPSM (data path state machine
* and CPSM (command path state machine).
*/
- mb();
writel_relaxed(0, host->base + MMCICOMMAND);
+ msmsdcc_delay(host);
writel_relaxed(0, host->base + MMCIDATACTRL);
- mb();
+ msmsdcc_delay(host);
+}
- pr_debug("%s: Applied soft reset to Controller\n",
- mmc_hostname(host->mmc));
+static void msmsdcc_hard_reset(struct msmsdcc_host *host)
+{
+ int ret;
- if (host->is_sps_mode)
- msmsdcc_dml_init(host);
+ /* Reset the controller */
+ ret = clk_reset(host->clk, CLK_RESET_ASSERT);
+ if (ret)
+ pr_err("%s: Clock assert failed at %u Hz"
+ " with err %d\n", mmc_hostname(host->mmc),
+ host->clk_rate, ret);
+
+ ret = clk_reset(host->clk, CLK_RESET_DEASSERT);
+ if (ret)
+ pr_err("%s: Clock deassert failed at %u Hz"
+ " with err %d\n", mmc_hostname(host->mmc),
+ host->clk_rate, ret);
+
+ /* Give some delay for clock reset to propogate to controller */
+ msmsdcc_delay(host);
}
static void msmsdcc_reset_and_restore(struct msmsdcc_host *host)
{
if (host->plat->sdcc_v4_sup) {
- msmsdcc_soft_reset_and_restore(host);
+ if (host->is_sps_mode) {
+ /* Reset DML first */
+ msmsdcc_dml_reset(host);
+ /*
+ * delay the SPS pipe reset in thread context as
+ * sps_connect/sps_disconnect APIs can be called
+ * only from non-atomic context.
+ */
+ host->sps.pipe_reset_pending = true;
+ }
+ mb();
+ msmsdcc_soft_reset(host);
+
+ pr_debug("%s: Applied soft reset to Controller\n",
+ mmc_hostname(host->mmc));
+
+ if (host->is_sps_mode)
+ msmsdcc_dml_init(host);
} else {
/* Give Clock reset (hard reset) to controller */
u32 mci_clk = 0;
u32 mci_mask0 = 0;
- int ret;
/* Save the controller state */
mci_clk = readl_relaxed(host->base + MMCICLOCK);
mci_mask0 = readl_relaxed(host->base + MMCIMASK0);
-
mb();
- /* Reset the controller */
- ret = clk_reset(host->clk, CLK_RESET_ASSERT);
- if (ret)
- pr_err("%s: Clock assert failed at %u Hz"
- " with err %d\n", mmc_hostname(host->mmc),
- host->clk_rate, ret);
- ret = clk_reset(host->clk, CLK_RESET_DEASSERT);
- if (ret)
- pr_err("%s: Clock deassert failed at %u Hz"
- " with err %d\n", mmc_hostname(host->mmc),
- host->clk_rate, ret);
-
+ msmsdcc_hard_reset(host);
pr_debug("%s: Controller has been reinitialized\n",
mmc_hostname(host->mmc));
- mb();
/* Restore the contoller state */
writel_relaxed(host->pwr, host->base + MMCIPOWER);
+ msmsdcc_delay(host);
writel_relaxed(mci_clk, host->base + MMCICLOCK);
+ msmsdcc_delay(host);
writel_relaxed(mci_mask0, host->base + MMCIMASK0);
- ret = clk_set_rate(host->clk, host->clk_rate);
- if (ret)
- pr_err("%s: Failed to set clk rate %u Hz. err %d\n",
- mmc_hostname(host->mmc),
- host->clk_rate, ret);
- mb();
+ mb(); /* no delay required after writing to MASK0 register */
}
+
if (host->dummy_52_needed)
host->dummy_52_needed = 0;
}
@@ -310,8 +318,6 @@
return retval;
}
-static inline void msmsdcc_delay(struct msmsdcc_host *host);
-
static void
msmsdcc_stop_data(struct msmsdcc_host *host)
{
@@ -361,8 +367,13 @@
msmsdcc_start_command_exec(struct msmsdcc_host *host, u32 arg, u32 c)
{
writel_relaxed(arg, host->base + MMCIARGUMENT);
- msmsdcc_delay(host);
writel_relaxed(c, host->base + MMCICOMMAND);
+ /*
+ * As after sending the command, we don't write any of the
+ * controller registers and just wait for the
+ * CMD_RESPOND_END/CMD_SENT/Command failure notication
+ * from Controller.
+ */
mb();
}
@@ -374,7 +385,6 @@
writel_relaxed(host->cmd_timeout, host->base + MMCIDATATIMER);
writel_relaxed((unsigned int)host->curr.xfer_size,
host->base + MMCIDATALENGTH);
- msmsdcc_delay(host); /* Allow data parms to be applied */
writel_relaxed(host->cmd_datactrl, host->base + MMCIDATACTRL);
msmsdcc_delay(host); /* Force delay prior to ADM or command */
@@ -607,6 +617,7 @@
host->dummy_52_sent = 1;
msmsdcc_start_command(host, &dummy52cmd,
MCI_CPSM_PROGENA);
+ spin_unlock_irqrestore(&host->lock, flags);
return;
}
msmsdcc_stop_data(host);
@@ -931,7 +942,7 @@
}
}
- if (host->prog_scan && (cmd->opcode == 12)) {
+ if ((cmd->flags & MMC_RSP_R1B) == MMC_RSP_R1B) {
*c |= MCI_CPSM_PROGENA;
host->prog_enable = 1;
}
@@ -1013,6 +1024,8 @@
if (data->flags & MMC_DATA_READ)
datactrl |= (MCI_DPSM_DIRECTION | MCI_RX_DATA_PEND);
+ else if (data->flags & MMC_DATA_WRITE)
+ datactrl |= MCI_DATA_PEND;
clks = (unsigned long long)data->timeout_ns * host->clk_rate;
do_div(clks, 1000000000UL);
@@ -1029,8 +1042,6 @@
host->dma.hdr.exec_func = msmsdcc_dma_exec_func;
host->dma.hdr.user = (void *)host;
host->dma.busy = 1;
- if ((data->flags & MMC_DATA_WRITE) && !host->curr.mrq->sbc)
- host->prog_scan = 1;
if (cmd) {
msmsdcc_start_command_deferred(host, cmd, &c);
@@ -1043,8 +1054,6 @@
msm_dmov_enqueue_cmd_ext(host->dma.channel, &host->dma.hdr);
} else {
/* SPS-BAM mode or PIO mode */
- if ((data->flags & MMC_DATA_WRITE) && !host->curr.mrq->sbc)
- host->prog_scan = 1;
writel_relaxed(timeout, base + MMCIDATATIMER);
writel_relaxed(host->curr.xfer_size, base + MMCIDATALENGTH);
@@ -1052,8 +1061,14 @@
writel_relaxed((readl_relaxed(host->base + MMCIMASK0) &
(~(MCI_IRQ_PIO))) | pio_irqmask,
host->base + MMCIMASK0);
- msmsdcc_delay(host); /* Allow parms to be applied */
writel_relaxed(datactrl, base + MMCIDATACTRL);
+ /*
+ * We don't need delay after writing to DATA_CTRL register
+ * if we are not writing to CMD register immediately after
+ * this. As we already have delay before sending the
+ * command, we just need mb() here.
+ */
+ mb();
if (cmd) {
msmsdcc_delay(host); /* Delay between data/command */
@@ -1239,8 +1254,10 @@
(~(MCI_IRQ_PIO))) | MCI_RXDATAAVLBLMASK,
host->base + MMCIMASK0);
if (!host->curr.xfer_remain) {
- /* Delay needed (same port was just written) */
- msmsdcc_delay(host);
+ /*
+ * back to back write to MASK0 register don't need
+ * synchronization delay.
+ */
writel_relaxed((readl_relaxed(host->base + MMCIMASK0) &
(~(MCI_IRQ_PIO))) | 0, host->base + MMCIMASK0);
}
@@ -1329,16 +1346,12 @@
} else { /* host->data == NULL */
if (!cmd->error && host->prog_enable) {
if (status & MCI_PROGDONE) {
- host->prog_scan = 0;
host->prog_enable = 0;
- msmsdcc_request_end(host, cmd->mrq);
+ msmsdcc_request_end(host, cmd->mrq);
} else
host->curr.cmd = cmd;
} else {
- if (host->prog_enable) {
- host->prog_scan = 0;
- host->prog_enable = 0;
- }
+ host->prog_enable = 0;
if (host->dummy_52_needed)
host->dummy_52_needed = 0;
if (cmd->data && cmd->error)
@@ -1351,9 +1364,6 @@
msmsdcc_start_command(host, host->curr.mrq->cmd, 0);
else
msmsdcc_request_start(host, host->curr.mrq);
- } else if (cmd->data) {
- if (!(cmd->data->flags & MMC_DATA_READ))
- msmsdcc_start_data(host, cmd->data, NULL, 0);
}
}
@@ -1560,9 +1570,9 @@
static void
msmsdcc_request_start(struct msmsdcc_host *host, struct mmc_request *mrq)
{
- if (mrq->data && mrq->data->flags & MMC_DATA_READ) {
+ if (mrq->data) {
/* Queue/read data, daisy-chain command when data starts */
- if (mrq->sbc)
+ if (mrq->sbc && (mrq->data->flags & MMC_DATA_READ))
msmsdcc_start_data(host, mrq->data, mrq->sbc, 0);
else
msmsdcc_start_data(host, mrq->data, mrq->cmd, 0);
@@ -1672,16 +1682,20 @@
{
int rc = 0;
- rc = regulator_set_optimum_mode(vreg->reg, uA_load);
- if (rc < 0)
- pr_err("%s: regulator_set_optimum_mode(reg=%s, uA_load=%d)"
- " failed. rc=%d\n", __func__, vreg->name,
- uA_load, rc);
- else
- /* regulator_set_optimum_mode() can return non zero value
- * even for success case.
- */
- rc = 0;
+ /* regulators that do not support regulator_set_voltage also
+ do not support regulator_set_optimum_mode */
+ if (vreg->set_voltage_sup) {
+ rc = regulator_set_optimum_mode(vreg->reg, uA_load);
+ if (rc < 0)
+ pr_err("%s: regulator_set_optimum_mode(reg=%s, "
+ "uA_load=%d) failed. rc=%d\n", __func__,
+ vreg->name, uA_load, rc);
+ else
+ /* regulator_set_optimum_mode() can return non zero
+ * value even for success case.
+ */
+ rc = 0;
+ }
return rc;
}
@@ -1922,7 +1936,9 @@
if (!IS_ERR(host->pclk))
clk_enable(host->pclk);
clk_enable(host->clk);
+ msmsdcc_delay(host);
} else {
+ msmsdcc_delay(host);
clk_disable(host->clk);
if (!IS_ERR(host->pclk))
clk_disable(host->pclk);
@@ -2120,6 +2136,10 @@
writel_relaxed(host->mci_irqenable,
host->base + MMCIMASK0);
}
+ } else {
+ writel_relaxed(host->mci_irqenable,
+ host->base + MMCIMASK0);
+ mb();
}
}
spin_unlock_irqrestore(&host->lock, flags);
@@ -2222,6 +2242,7 @@
msmsdcc_setup_pins(host, false);
break;
case MMC_POWER_UP:
+ /* writing PWR_UP bit is redundant */
pwr |= MCI_PWR_UP;
if (host->sdcc_irq_disabled) {
if (host->plat->cfg_mpm_sdiowakeup)
@@ -2255,7 +2276,7 @@
if (host->pwr != pwr) {
host->pwr = pwr;
writel_relaxed(pwr, host->base + MMCIPOWER);
- mb();
+ msmsdcc_delay(host);
}
if (!host->clks_on) {
/* force the clocks to be off */
@@ -2279,7 +2300,7 @@
writel_relaxed(MCI_SDIOINTMASK,
host->base + MMCIMASK0);
}
- msmsdcc_delay(host);
+ mb();
}
msmsdcc_setup_clocks(host, false);
host->clks_on = 0;
@@ -2299,7 +2320,7 @@
else
clk &= ~MCI_CLK_PWRSAVE;
writel_relaxed(clk, host->base + MMCICLOCK);
- mb();
+ msmsdcc_delay(host);
return 0;
}
@@ -2446,7 +2467,7 @@
/* Stop SD CLK output. */
writel_relaxed((readl_relaxed(host->base + MMCICLOCK) |
MCI_CLK_PWRSAVE), host->base + MMCICLOCK);
-
+ msmsdcc_delay(host);
spin_unlock_irqrestore(&host->lock, flags);
/*
@@ -2460,6 +2481,7 @@
spin_lock_irqsave(&host->lock, flags);
writel_relaxed((readl_relaxed(host->base + MMCICLOCK) |
IO_PAD_PWR_SWITCH), host->base + MMCICLOCK);
+ msmsdcc_delay(host);
host->io_pad_pwr_switch = 1;
spin_unlock_irqrestore(&host->lock, flags);
@@ -2470,6 +2492,7 @@
/* Start SD CLK output. */
writel_relaxed((readl_relaxed(host->base + MMCICLOCK)
& ~MCI_CLK_PWRSAVE), host->base + MMCICLOCK);
+ msmsdcc_delay(host);
spin_unlock_irqrestore(&host->lock, flags);
/*
@@ -2683,6 +2706,7 @@
*/
writel_relaxed((readl_relaxed(host->base + MMCICLOCK)
& ~MCI_CLK_PWRSAVE), host->base + MMCICLOCK);
+ msmsdcc_delay(host);
/* first of all reset the tuning block */
rc = msmsdcc_init_cm_sdc4_dll(host);
if (rc)
@@ -2757,6 +2781,7 @@
/* re-enable PWESAVE */
writel_relaxed((readl_relaxed(host->base + MMCICLOCK) |
MCI_CLK_PWRSAVE), host->base + MMCICLOCK);
+ msmsdcc_delay(host);
host->cmd19_tuning_in_progress = 0;
return rc;
}
@@ -3463,10 +3488,7 @@
msmsdcc_request_end(host, mrq);
}
} else {
- if (host->prog_enable) {
- host->prog_scan = 0;
- host->prog_enable = 0;
- }
+ host->prog_enable = 0;
msmsdcc_reset_and_restore(host);
msmsdcc_request_end(host, mrq);
}
@@ -3678,6 +3700,8 @@
msmsdcc_get_min_sup_clk_rate(host)));
host->clks_on = 1;
+ /* Apply Hard reset to SDCC to put it in power on default state */
+ msmsdcc_hard_reset(host);
ret = msmsdcc_vreg_init(host, true);
if (ret) {
@@ -3709,6 +3733,7 @@
mmc->caps |= plat->mmc_bus_width;
mmc->caps |= MMC_CAP_MMC_HIGHSPEED | MMC_CAP_SD_HIGHSPEED;
+ mmc->caps |= MMC_CAP_WAIT_WHILE_BUSY;
/*
* If we send the CMD23 before multi block write/read command
@@ -3749,8 +3774,6 @@
writel_relaxed(0, host->base + MMCIMASK0);
writel_relaxed(MCI_CLEAR_STATIC_MASK, host->base + MMCICLEAR);
- /* Delay needed (MMCIMASK0 was just written above) */
- msmsdcc_delay(host);
writel_relaxed(MCI_IRQENABLE, host->base + MMCIMASK0);
mb();
host->mci_irqenable = MCI_IRQENABLE;
@@ -4143,12 +4166,14 @@
* part of LPM), then clocks should be turned on before
* calling mmc_suspend_host() because mmc_suspend_host might
* send some commands to the card. The clocks will be turned
- * off again after mmc_suspend_host. Thus for SD/MMC/SDIO
+ * off again after mmc_suspend_host. Thus for SDIO
* cards, clocks will be turned on before mmc_suspend_host
* and turned off after mmc_suspend_host.
*/
- mmc->ios.clock = host->clk_rate;
- mmc->ops->set_ios(host->mmc, &host->mmc->ios);
+ if (mmc->card && mmc_card_sdio(mmc->card)) {
+ mmc->ios.clock = host->clk_rate;
+ mmc->ops->set_ios(host->mmc, &host->mmc->ios);
+ }
/*
* MMC core thinks that host is disabled by now since
@@ -4217,26 +4242,26 @@
enable_irq(host->core_irqres->start);
host->sdcc_irq_disabled = 0;
}
- }
- mmc->ios.clock = host->clk_rate;
- mmc->ops->set_ios(host->mmc, &host->mmc->ios);
+ mmc->ios.clock = host->clk_rate;
+ mmc->ops->set_ios(host->mmc, &host->mmc->ios);
- spin_lock_irqsave(&host->lock, flags);
- writel_relaxed(host->mci_irqenable, host->base + MMCIMASK0);
- mb();
+ spin_lock_irqsave(&host->lock, flags);
+ writel_relaxed(host->mci_irqenable,
+ host->base + MMCIMASK0);
+ mb();
- if (mmc->card && (mmc->card->type == MMC_TYPE_SDIO) &&
- (mmc->pm_flags & MMC_PM_WAKE_SDIO_IRQ) &&
- !host->sdio_irq_disabled) {
+ if ((mmc->pm_flags & MMC_PM_WAKE_SDIO_IRQ) &&
+ !host->sdio_irq_disabled) {
if (host->plat->sdiowakeup_irq) {
disable_irq_nosync(
host->plat->sdiowakeup_irq);
msmsdcc_disable_irq_wake(host);
host->sdio_irq_disabled = 1;
}
- }
+ }
- spin_unlock_irqrestore(&host->lock, flags);
+ spin_unlock_irqrestore(&host->lock, flags);
+ }
mmc_resume_host(mmc);
diff --git a/drivers/mmc/host/msm_sdcc.h b/drivers/mmc/host/msm_sdcc.h
index 31ece6e..590c293 100644
--- a/drivers/mmc/host/msm_sdcc.h
+++ b/drivers/mmc/host/msm_sdcc.h
@@ -77,6 +77,7 @@
#define MCI_DPSM_DIRECTION (1 << 1)
#define MCI_DPSM_MODE (1 << 2)
#define MCI_DPSM_DMAENABLE (1 << 3)
+#define MCI_DATA_PEND (1 << 17)
#define MCI_AUTO_PROG_DONE (1 << 19)
#define MCI_RX_DATA_PEND (1 << 20)
@@ -208,7 +209,7 @@
#define NR_SG 32
-#define MSM_MMC_IDLE_TIMEOUT 10000 /* msecs */
+#define MSM_MMC_IDLE_TIMEOUT 5000 /* msecs */
/*
* Set the request timeout to 10secs to allow
@@ -332,7 +333,6 @@
struct tasklet_struct dma_tlet;
- unsigned int prog_scan;
unsigned int prog_enable;
/* Command parameters */
diff --git a/drivers/power/Kconfig b/drivers/power/Kconfig
index 179a4ac..cca1035 100644
--- a/drivers/power/Kconfig
+++ b/drivers/power/Kconfig
@@ -261,7 +261,8 @@
config ISL9519_CHARGER
tristate "isl9519 charger"
- depends on BATTERY_MSM8X60
+ depends on (BATTERY_MSM8X60 || PM8921_CHARGER)
+ depends on I2C
default n
help
The isl9519q charger chip from intersil is connected to an external
diff --git a/drivers/power/isl9519q.c b/drivers/power/isl9519q.c
index a45d286..733de45 100644
--- a/drivers/power/isl9519q.c
+++ b/drivers/power/isl9519q.c
@@ -20,9 +20,11 @@
#include <linux/workqueue.h>
#include <linux/interrupt.h>
#include <linux/msm-charger.h>
+#include <linux/mfd/pm8xxx/pm8921-charger.h>
#include <linux/slab.h>
#include <linux/i2c/isl9519.h>
#include <linux/msm_adc.h>
+#include <linux/spinlock.h>
#define CHG_CURRENT_REG 0x14
#define MAX_SYS_VOLTAGE_REG 0x15
@@ -34,7 +36,7 @@
#define TRCKL_CHG_STATUS_BIT 0x80
-#define ISL9519_CHG_PERIOD ((HZ) * 150)
+#define ISL9519_CHG_PERIOD_SEC 150
struct isl9519q_struct {
struct i2c_client *client;
@@ -52,6 +54,10 @@
struct msm_hardware_charger adapter_hw_chg;
int suspended;
int charge_at_resume;
+ struct ext_chg_pm8921 ext_chg;
+ spinlock_t lock;
+ bool notify_by_pmic;
+ bool trickle;
};
static int isl9519q_read_reg(struct i2c_client *client, int reg,
@@ -70,6 +76,8 @@
} else
*val = ret;
+ pr_debug("%s.reg=0x%x.val=0x%x.\n", __func__, reg, *val);
+
return 0;
}
@@ -79,6 +87,8 @@
int ret;
struct isl9519q_struct *isl_chg;
+ pr_debug("%s.reg=0x%x.val=0x%x.\n", __func__, reg, val);
+
isl_chg = i2c_get_clientdata(client);
ret = i2c_smbus_write_word_data(isl_chg->client, reg, val);
@@ -91,6 +101,14 @@
return 0;
}
+/**
+ * Read charge-current via ADC.
+ *
+ * The ISL CCMON (charge-current-monitor) pin is connected to
+ * the PMIC MPP#X pin.
+ * This not required when notify_by_pmic is used where the PMIC
+ * uses BMS to notify the ISL on charging-done / charge-resume.
+ */
static int isl_read_adc(int channel, int *mv_reading)
{
int ret;
@@ -136,98 +154,129 @@
out:
*mv_reading = 0;
pr_debug("%s: done with error for %d\n", __func__, channel);
- return -EINVAL;
+ return -EINVAL;
}
-static void isl9519q_charge(struct work_struct *isl9519_work)
+static bool is_trickle_charging(struct isl9519q_struct *isl_chg)
{
- u16 temp;
+ u16 ctrl = 0;
int ret;
+
+ ret = isl9519q_read_reg(isl_chg->client, CONTROL_REG, &ctrl);
+
+ if (!ret) {
+ pr_debug("%s.control_reg=0x%x.\n", __func__, ctrl);
+ } else {
+ dev_err(&isl_chg->client->dev,
+ "%s couldnt read cntrl reg\n", __func__);
+ }
+
+ if (ctrl & TRCKL_CHG_STATUS_BIT)
+ return true;
+
+ return false;
+}
+
+static void isl_adapter_check_ichg(struct isl9519q_struct *isl_chg)
+{
+ int ichg; /* isl charger current */
+ int mv_reading = 0;
+
+ ichg = isl_read_adc(CHANNEL_ADC_BATT_AMON, &mv_reading);
+
+ dev_dbg(&isl_chg->client->dev, "%s mv_reading=%d\n",
+ __func__, mv_reading);
+ dev_dbg(&isl_chg->client->dev, "%s isl_charger_current=%d\n",
+ __func__, ichg);
+
+ if (ichg >= 0 && ichg <= isl_chg->term_current)
+ msm_charger_notify_event(&isl_chg->adapter_hw_chg,
+ CHG_DONE_EVENT);
+
+ isl_chg->trickle = is_trickle_charging(isl_chg);
+ if (isl_chg->trickle)
+ msm_charger_notify_event(&isl_chg->adapter_hw_chg,
+ CHG_BATT_BEGIN_FAST_CHARGING);
+}
+
+/**
+ * isl9519q_worker
+ *
+ * Periodic task required to kick the ISL HW watchdog to keep
+ * charging.
+ *
+ * @isl9519_work: work context.
+ */
+static void isl9519q_worker(struct work_struct *isl9519_work)
+{
struct isl9519q_struct *isl_chg;
- int isl_charger_current;
- int mv_reading;
isl_chg = container_of(isl9519_work, struct isl9519q_struct,
charge_work.work);
dev_dbg(&isl_chg->client->dev, "%s\n", __func__);
- if (isl_chg->charging) {
- isl_charger_current = isl_read_adc(CHANNEL_ADC_BATT_AMON,
- &mv_reading);
- dev_dbg(&isl_chg->client->dev, "%s mv_reading=%d\n",
- __func__, mv_reading);
- dev_dbg(&isl_chg->client->dev, "%s isl_charger_current=%d\n",
- __func__, isl_charger_current);
- if (isl_charger_current >= 0
- && isl_charger_current <= isl_chg->term_current) {
- msm_charger_notify_event(
- &isl_chg->adapter_hw_chg,
- CHG_DONE_EVENT);
- }
- isl9519q_write_reg(isl_chg->client, CHG_CURRENT_REG,
- isl_chg->chgcurrent);
- ret = isl9519q_read_reg(isl_chg->client, CONTROL_REG, &temp);
- if (!ret) {
- if (!(temp & TRCKL_CHG_STATUS_BIT))
- msm_charger_notify_event(
- &isl_chg->adapter_hw_chg,
- CHG_BATT_BEGIN_FAST_CHARGING);
- } else {
- dev_err(&isl_chg->client->dev,
- "%s couldnt read cntrl reg\n", __func__);
- }
- schedule_delayed_work(&isl_chg->charge_work,
- ISL9519_CHG_PERIOD);
+ if (!isl_chg->charging) {
+ pr_info("%s.stop charging.\n", __func__);
+ isl9519q_write_reg(isl_chg->client, CHG_CURRENT_REG, 0);
+ return; /* Stop periodic worker */
}
+
+ /* Kick the dog by writting to CHG_CURRENT_REG */
+ isl9519q_write_reg(isl_chg->client, CHG_CURRENT_REG,
+ isl_chg->chgcurrent);
+
+ if (isl_chg->notify_by_pmic)
+ isl_chg->trickle = is_trickle_charging(isl_chg);
+ else
+ isl_adapter_check_ichg(isl_chg);
+
+ schedule_delayed_work(&isl_chg->charge_work,
+ (ISL9519_CHG_PERIOD_SEC * HZ));
}
-static int isl9519q_start_charging(struct msm_hardware_charger *hw_chg,
- int chg_voltage, int chg_current)
+static int isl9519q_start_charging(struct isl9519q_struct *isl_chg,
+ int chg_voltage, int chg_current)
{
- struct isl9519q_struct *isl_chg;
int ret = 0;
- isl_chg = container_of(hw_chg, struct isl9519q_struct, adapter_hw_chg);
- if (isl_chg->charging)
- /* we are already charging */
+ pr_info("%s.\n", __func__);
+
+ if (isl_chg->charging) {
+ pr_warn("%s.already charging.\n", __func__);
return 0;
+ }
if (isl_chg->suspended) {
+ pr_warn("%s.suspended - can't start charging.\n", __func__);
isl_chg->charge_at_resume = 1;
return 0;
}
- dev_dbg(&isl_chg->client->dev, "%s\n", __func__);
+ dev_dbg(&isl_chg->client->dev,
+ "%s starting timed work.period=%d seconds.\n",
+ __func__, (int) ISL9519_CHG_PERIOD_SEC);
- ret = isl9519q_write_reg(isl_chg->client, CHG_CURRENT_REG,
- isl_chg->chgcurrent);
- if (ret) {
- dev_err(&isl_chg->client->dev,
- "%s coulnt write to current_reg\n", __func__);
- goto out;
- }
+ /*
+ * The ISL will start charging from the worker context.
+ * This API might be called from interrupt context.
+ */
+ schedule_delayed_work(&isl_chg->charge_work, 1);
- dev_dbg(&isl_chg->client->dev, "%s starting timed work\n",
- __func__);
- schedule_delayed_work(&isl_chg->charge_work,
- ISL9519_CHG_PERIOD);
isl_chg->charging = true;
-out:
return ret;
}
-static int isl9519q_stop_charging(struct msm_hardware_charger *hw_chg)
+static int isl9519q_stop_charging(struct isl9519q_struct *isl_chg)
{
- struct isl9519q_struct *isl_chg;
- int ret = 0;
+ pr_info("%s.\n", __func__);
- isl_chg = container_of(hw_chg, struct isl9519q_struct, adapter_hw_chg);
- if (!(isl_chg->charging))
- /* we arent charging */
+ if (!(isl_chg->charging)) {
+ pr_warn("%s.already not charging.\n", __func__);
return 0;
+ }
if (isl_chg->suspended) {
isl_chg->charge_at_resume = 0;
@@ -236,17 +285,71 @@
dev_dbg(&isl_chg->client->dev, "%s\n", __func__);
- ret = isl9519q_write_reg(isl_chg->client, CHG_CURRENT_REG, 0);
- if (ret) {
- dev_err(&isl_chg->client->dev,
- "%s coulnt write to current_reg\n", __func__);
- goto out;
- }
-
isl_chg->charging = false;
- cancel_delayed_work(&isl_chg->charge_work);
-out:
- return ret;
+ isl_chg->trickle = false;
+ /*
+ * The ISL will stop charging from the worker context.
+ * This API might be called from interrupt context.
+ */
+ schedule_delayed_work(&isl_chg->charge_work, 1);
+
+ return 0;
+}
+
+static int isl_ext_start_charging(void *ctx)
+{
+ int rc;
+ struct isl9519q_struct *isl_chg = ctx;
+ unsigned long flags;
+
+ spin_lock_irqsave(&isl_chg->lock, flags);
+ rc = isl9519q_start_charging(isl_chg, 0, isl_chg->chgcurrent);
+ spin_unlock_irqrestore(&isl_chg->lock, flags);
+
+ return rc;
+}
+
+static int isl_ext_stop_charging(void *ctx)
+{
+ int rc;
+ struct isl9519q_struct *isl_chg = ctx;
+ unsigned long flags;
+
+ spin_lock_irqsave(&isl_chg->lock, flags);
+ rc = isl9519q_stop_charging(isl_chg);
+ spin_unlock_irqrestore(&isl_chg->lock, flags);
+
+ return rc;
+}
+
+static bool isl_ext_is_trickle(void *ctx)
+{
+ struct isl9519q_struct *isl_chg = ctx;
+
+ return isl_chg->trickle;
+}
+
+static int isl_adapter_start_charging(struct msm_hardware_charger *hw_chg,
+ int chg_voltage, int chg_current)
+{
+ int rc;
+ struct isl9519q_struct *isl_chg;
+
+ isl_chg = container_of(hw_chg, struct isl9519q_struct, adapter_hw_chg);
+ rc = isl9519q_start_charging(isl_chg, chg_voltage, chg_current);
+
+ return rc;
+}
+
+static int isl_adapter_stop_charging(struct msm_hardware_charger *hw_chg)
+{
+ int rc;
+ struct isl9519q_struct *isl_chg;
+
+ isl_chg = container_of(hw_chg, struct isl9519q_struct, adapter_hw_chg);
+ rc = isl9519q_stop_charging(isl_chg);
+
+ return rc;
}
static int isl9519q_charging_switched(struct msm_hardware_charger *hw_chg)
@@ -296,6 +399,93 @@
#define DEFAULT_MAX_VOLTAGE_REG_VALUE 0x1070
#define DEFAULT_MIN_VOLTAGE_REG_VALUE 0x0D00
+static int __devinit isl9519q_init_adapter(struct isl9519q_struct *isl_chg)
+{
+ int ret;
+ struct isl_platform_data *pdata = isl_chg->client->dev.platform_data;
+ struct i2c_client *client = isl_chg->client;
+
+ isl_chg->adapter_hw_chg.type = CHG_TYPE_AC;
+ isl_chg->adapter_hw_chg.rating = 2;
+ isl_chg->adapter_hw_chg.name = "isl-adapter";
+ isl_chg->adapter_hw_chg.start_charging = isl_adapter_start_charging;
+ isl_chg->adapter_hw_chg.stop_charging = isl_adapter_stop_charging;
+ isl_chg->adapter_hw_chg.charging_switched = isl9519q_charging_switched;
+
+ ret = gpio_request(pdata->valid_n_gpio, "isl_charger_valid");
+ if (ret) {
+ dev_err(&client->dev, "%s gpio_request failed "
+ "for %d ret=%d\n",
+ __func__, pdata->valid_n_gpio, ret);
+ goto out;
+ }
+
+ ret = msm_charger_register(&isl_chg->adapter_hw_chg);
+ if (ret) {
+ dev_err(&client->dev,
+ "%s msm_charger_register failed for ret =%d\n",
+ __func__, ret);
+ goto free_gpio;
+ }
+
+ ret = request_threaded_irq(client->irq, NULL,
+ isl_valid_handler,
+ IRQF_TRIGGER_FALLING |
+ IRQF_TRIGGER_RISING,
+ "isl_charger_valid", client);
+ if (ret) {
+ dev_err(&client->dev,
+ "%s request_threaded_irq failed "
+ "for %d ret =%d\n",
+ __func__, client->irq, ret);
+ goto unregister;
+ }
+ irq_set_irq_wake(client->irq, 1);
+
+ ret = gpio_get_value_cansleep(isl_chg->valid_n_gpio);
+ if (ret < 0) {
+ dev_err(&client->dev,
+ "%s gpio_get_value failed for %d ret=%d\n",
+ __func__, pdata->valid_n_gpio, ret);
+ /* assume absent */
+ ret = 1;
+ }
+ if (!ret) {
+ msm_charger_notify_event(&isl_chg->adapter_hw_chg,
+ CHG_INSERTED_EVENT);
+ isl_chg->present = 1;
+ }
+
+ return 0;
+
+unregister:
+ msm_charger_unregister(&isl_chg->adapter_hw_chg);
+free_gpio:
+ gpio_free(pdata->valid_n_gpio);
+out:
+ return ret;
+
+}
+
+static int __devinit isl9519q_init_ext_chg(struct isl9519q_struct *isl_chg)
+{
+ int ret;
+
+ isl_chg->ext_chg.name = "isl9519q";
+ isl_chg->ext_chg.ctx = isl_chg;
+ isl_chg->ext_chg.start_charging = isl_ext_start_charging;
+ isl_chg->ext_chg.stop_charging = isl_ext_stop_charging;
+ isl_chg->ext_chg.is_trickle = isl_ext_is_trickle;
+ ret = register_external_dc_charger(&isl_chg->ext_chg);
+ if (ret) {
+ pr_err("%s.failed to register external dc charger.ret=%d.\n",
+ __func__, ret);
+ return ret;
+ }
+
+ return 0;
+}
+
static int __devinit isl9519q_probe(struct i2c_client *client,
const struct i2c_device_id *id)
{
@@ -306,6 +496,8 @@
ret = 0;
pdata = client->dev.platform_data;
+ pr_info("%s.\n", __func__);
+
if (pdata == NULL) {
dev_err(&client->dev, "%s no platform data\n", __func__);
ret = -EINVAL;
@@ -324,7 +516,9 @@
goto out;
}
- INIT_DELAYED_WORK(&isl_chg->charge_work, isl9519q_charge);
+ spin_lock_init(&isl_chg->lock);
+
+ INIT_DELAYED_WORK(&isl_chg->charge_work, isl9519q_worker);
isl_chg->client = client;
isl_chg->chgcurrent = pdata->chgcurrent;
isl_chg->term_current = pdata->term_current;
@@ -337,12 +531,14 @@
isl_chg->chgcurrent &= ~0x7F;
isl_chg->input_current &= ~0x7F;
- isl_chg->adapter_hw_chg.type = CHG_TYPE_AC;
- isl_chg->adapter_hw_chg.rating = 2;
- isl_chg->adapter_hw_chg.name = "isl-adapter";
- isl_chg->adapter_hw_chg.start_charging = isl9519q_start_charging;
- isl_chg->adapter_hw_chg.stop_charging = isl9519q_stop_charging;
- isl_chg->adapter_hw_chg.charging_switched = isl9519q_charging_switched;
+ /**
+ * ISL is Notified by PMIC to start/stop charging, rather than
+ * handling interrupt from ISL for End-Of-Chargring, and
+ * monitoring the charge-current periodically. The valid_n_gpio
+ * is also not used, dc-present is detected by PMIC.
+ */
+ isl_chg->notify_by_pmic = (client->irq == 0);
+ i2c_set_clientdata(client, isl_chg);
if (pdata->chg_detection_config) {
ret = pdata->chg_detection_config();
@@ -353,35 +549,6 @@
}
}
- ret = gpio_request(pdata->valid_n_gpio, "isl_charger_valid");
- if (ret) {
- dev_err(&client->dev, "%s gpio_request failed for %d ret=%d\n",
- __func__, pdata->valid_n_gpio, ret);
- goto free_isl_chg;
- }
-
- i2c_set_clientdata(client, isl_chg);
-
- ret = msm_charger_register(&isl_chg->adapter_hw_chg);
- if (ret) {
- dev_err(&client->dev,
- "%s msm_charger_register failed for ret =%d\n",
- __func__, ret);
- goto free_gpio;
- }
-
- ret = request_threaded_irq(client->irq, NULL,
- isl_valid_handler,
- IRQF_TRIGGER_FALLING | IRQF_TRIGGER_RISING,
- "isl_charger_valid", client);
- if (ret) {
- dev_err(&client->dev,
- "%s request_threaded_irq failed for %d ret =%d\n",
- __func__, client->irq, ret);
- goto unregister;
- }
- irq_set_irq_wake(client->irq, 1);
-
isl_chg->max_system_voltage &= MAX_VOLTAGE_REG_MASK;
isl_chg->min_system_voltage &= MIN_VOLTAGE_REG_MASK;
if (isl_chg->max_system_voltage == 0)
@@ -391,57 +558,34 @@
ret = isl9519q_write_reg(isl_chg->client, MAX_SYS_VOLTAGE_REG,
isl_chg->max_system_voltage);
- if (ret) {
- dev_err(&client->dev,
- "%s couldnt write to MAX_SYS_VOLTAGE_REG ret=%d\n",
- __func__, ret);
- goto free_irq;
- }
+ if (ret)
+ goto free_isl_chg;
ret = isl9519q_write_reg(isl_chg->client, MIN_SYS_VOLTAGE_REG,
isl_chg->min_system_voltage);
- if (ret) {
- dev_err(&client->dev,
- "%s couldnt write to MIN_SYS_VOLTAGE_REG ret=%d\n",
- __func__, ret);
- goto free_irq;
- }
+ if (ret)
+ goto free_isl_chg;
if (isl_chg->input_current) {
ret = isl9519q_write_reg(isl_chg->client,
INPUT_CURRENT_REG,
isl_chg->input_current);
- if (ret) {
- dev_err(&client->dev,
- "%s couldnt write INPUT_CURRENT_REG ret=%d\n",
- __func__, ret);
- goto free_irq;
- }
+ if (ret)
+ goto free_isl_chg;
}
- ret = gpio_get_value_cansleep(isl_chg->valid_n_gpio);
- if (ret < 0) {
- dev_err(&client->dev,
- "%s gpio_get_value failed for %d ret=%d\n", __func__,
- pdata->valid_n_gpio, ret);
- /* assume absent */
- ret = 1;
- }
- if (!ret) {
- msm_charger_notify_event(&isl_chg->adapter_hw_chg,
- CHG_INSERTED_EVENT);
- isl_chg->present = 1;
- }
+ if (isl_chg->notify_by_pmic)
+ ret = isl9519q_init_ext_chg(isl_chg);
+ else
+ ret = isl9519q_init_adapter(isl_chg);
- pr_debug("%s OK chg_present=%d\n", __func__, isl_chg->present);
+ if (ret)
+ goto free_isl_chg;
+
+ pr_info("%s OK.\n", __func__);
+
return 0;
-free_irq:
- free_irq(client->irq, NULL);
-unregister:
- msm_charger_unregister(&isl_chg->adapter_hw_chg);
-free_gpio:
- gpio_free(pdata->valid_n_gpio);
free_isl_chg:
kfree(isl_chg);
out:
@@ -493,7 +637,7 @@
isl_chg->suspended = 0;
if (isl_chg->charge_at_resume) {
isl_chg->charge_at_resume = 0;
- isl9519q_start_charging(&isl_chg->adapter_hw_chg, 0, 0);
+ isl9519q_start_charging(isl_chg, 0, 0);
}
return 0;
}
@@ -519,10 +663,12 @@
static int __init isl9519q_init(void)
{
+ pr_info("%s. isl9519q SW rev 1.01\n", __func__);
+
return i2c_add_driver(&isl9519q_driver);
}
-module_init(isl9519q_init);
+late_initcall_sync(isl9519q_init);
static void __exit isl9519q_exit(void)
{
diff --git a/drivers/power/pm8921-bms.c b/drivers/power/pm8921-bms.c
index fdbc819..2d0f7cd 100644
--- a/drivers/power/pm8921-bms.c
+++ b/drivers/power/pm8921-bms.c
@@ -23,6 +23,7 @@
#include <linux/bitops.h>
#include <linux/debugfs.h>
#include <linux/slab.h>
+#include <linux/delay.h>
#define BMS_CONTROL 0x224
#define BMS_OUTPUT0 0x230
@@ -35,14 +36,19 @@
#define CCADC_DATA1 0x245
#define CCADC_OFFSET_TRIM1 0x34A
#define CCADC_OFFSET_TRIM0 0x34B
+#define CCADC_FULLSCALE_TRIM1 0x34C
+#define CCADC_FULLSCALE_TRIM0 0x34D
#define ADC_ARB_SECP_CNTRL 0x190
#define ADC_ARB_SECP_AMUX_CNTRL 0x191
#define ADC_ARB_SECP_ANA_PARAM 0x192
+#define ADC_ARB_SECP_DIG_PARAM 0x193
#define ADC_ARB_SECP_RSV 0x194
#define ADC_ARB_SECP_DATA1 0x195
#define ADC_ARB_SECP_DATA0 0x196
+#define ADC_ARB_BMS_CNTRL 0x18D
+
enum pmic_bms_interrupts {
PM8921_BMS_SBI_WRITE_OK,
PM8921_BMS_CC_THR,
@@ -51,19 +57,10 @@
PM8921_BMS_OCV_FOR_R,
PM8921_BMS_GOOD_OCV,
PM8921_BMS_VSENSE_AVG,
+ PM8921_BMS_CCADC_EOC,
PM_BMS_MAX_INTS,
};
-/**
- * struct pm8921_bms_chip -device information
- * @dev: device pointer to access the parent
- * @dent: debugfs directory
- * @r_sense: batt sense resistance value
- * @i_test: peak current
- * @v_failure: battery dead voltage
- * @fcc: battery capacity
- *
- */
struct pm8921_bms_chip {
struct device *dev;
struct dentry *dent;
@@ -76,7 +73,10 @@
struct pc_temp_ocv_lut *pc_temp_ocv_lut;
struct pc_sf_lut *pc_sf_lut;
struct work_struct calib_hkadc_work;
+ struct delayed_work calib_ccadc_work;
unsigned int calib_delay_ms;
+ int ccadc_gain_uv;
+ u16 ccadc_result_offset;
unsigned int revision;
unsigned int xoadc_v0625;
unsigned int xoadc_v125;
@@ -389,11 +389,61 @@
* resolution (the value of a single bit) was changed after revision 2.0
* for more accurate readings
*/
- return (chip->revision < PM8XXX_REVISION_8901_2p0) ?
+ return (chip->revision < PM8XXX_REVISION_8921_2p0) ?
cc_to_microvolt_v1((s64)cc) :
cc_to_microvolt_v2((s64)cc);
}
+#define CCADC_READING_RESOLUTION_N_V1 1085069
+#define CCADC_READING_RESOLUTION_D_V1 100000
+#define CCADC_READING_RESOLUTION_N_V2 542535
+#define CCADC_READING_RESOLUTION_D_V2 100000
+static s64 ccadc_reading_to_microvolt_v1(s64 cc)
+{
+ return div_s64(cc * CCADC_READING_RESOLUTION_N_V1,
+ CCADC_READING_RESOLUTION_D_V1);
+}
+
+static s64 ccadc_reading_to_microvolt_v2(s64 cc)
+{
+ return div_s64(cc * CCADC_READING_RESOLUTION_N_V2,
+ CCADC_READING_RESOLUTION_D_V2);
+}
+
+static s64 ccadc_reading_to_microvolt(struct pm8921_bms_chip *chip, s64 cc)
+{
+ /*
+ * resolution (the value of a single bit) was changed after revision 2.0
+ * for more accurate readings
+ */
+ return (chip->revision < PM8XXX_REVISION_8921_2p0) ?
+ ccadc_reading_to_microvolt_v1((s64)cc) :
+ ccadc_reading_to_microvolt_v2((s64)cc);
+}
+
+static s64 microvolt_to_ccadc_reading_v1(s64 uv)
+{
+ return div_s64(uv * CCADC_READING_RESOLUTION_D_V1,
+ CCADC_READING_RESOLUTION_N_V1);
+}
+
+static s64 microvolt_to_ccadc_reading_v2(s64 uv)
+{
+ return div_s64(uv * CCADC_READING_RESOLUTION_D_V2,
+ CCADC_READING_RESOLUTION_N_V2);
+}
+
+static s64 microvolt_to_ccadc_reading(struct pm8921_bms_chip *chip, s64 cc)
+{
+ /*
+ * resolution (the value of a single bit) was changed after revision 2.0
+ * for more accurate readings
+ */
+ return (chip->revision < PM8XXX_REVISION_8921_2p0) ?
+ microvolt_to_ccadc_reading_v1((s64)cc) :
+ microvolt_to_ccadc_reading_v2((s64)cc);
+}
+
#define CC_READING_TICKS 55
#define SLEEP_CLK_HZ 32768
#define SECONDS_PER_HOUR 3600
@@ -403,6 +453,19 @@
SLEEP_CLK_HZ * SECONDS_PER_HOUR);
}
+#define GAIN_REFERENCE_UV 25000
+/*
+ * gain compensation for ccadc readings - common for vsense based and
+ * couloumb counter based readings
+ */
+static s64 cc_adjust_for_gain(struct pm8921_bms_chip *chip, s64 cc)
+{
+ if (chip->ccadc_gain_uv == 0)
+ return cc;
+
+ return div_s64(cc * GAIN_REFERENCE_UV, chip->ccadc_gain_uv);
+}
+
/* returns the signed value read from the hardware */
static int read_cc(struct pm8921_bms_chip *chip, int *result)
{
@@ -435,7 +498,9 @@
return rc;
}
*result = xoadc_reading_to_microvolt(reading);
- pr_debug("raw = %04x ocv_microV = %u\n", reading, *result);
+ pr_debug("raw = %04x ocv_uV = %u\n", reading, *result);
+ *result = adjust_xo_vbatt_reading(chip, *result);
+ pr_debug("after adj ocv_uV = %u\n", *result);
if (*result != 0)
last_ocv_uv = *result;
return 0;
@@ -468,8 +533,10 @@
pr_err("fail to read VSENSE_FOR_RBATT rc = %d\n", rc);
return rc;
}
- *result = cc_to_microvolt(chip, reading);
- pr_debug("raw = %04x vsense_for_r_microV = %u\n", reading, *result);
+ *result = ccadc_reading_to_microvolt(chip, reading);
+ pr_debug("raw = %04x vsense_for_r_uV = %u\n", reading, *result);
+ *result = cc_adjust_for_gain(chip, *result);
+ pr_debug("after adj vsense_for_r_uV = %u\n", *result);
return 0;
}
@@ -500,8 +567,10 @@
pr_err("fail to read VSENSE_AVG rc = %d\n", rc);
return rc;
}
- *result = cc_to_microvolt(chip, reading);
- pr_debug("read = %04x vsense = %d\n", reading, *result);
+ *result = ccadc_reading_to_microvolt(chip, reading);
+ pr_debug("raw = %04x vsense = %d\n", reading, *result);
+ *result = cc_adjust_for_gain(the_chip, (s64)*result);
+ pr_debug("after adj vsense = %d\n", *result);
return 0;
}
@@ -866,6 +935,7 @@
rc = read_cc(the_chip, coulumb_counter);
cc_voltage_uv = (int64_t)*coulumb_counter;
cc_voltage_uv = cc_to_microvolt(chip, cc_voltage_uv);
+ cc_voltage_uv = cc_adjust_for_gain(chip, cc_voltage_uv);
pr_debug("cc_voltage_uv = %lld microvolts\n", cc_voltage_uv);
cc_uvh = ccmicrovolt_to_uvh(cc_voltage_uv);
pr_debug("cc_uvh = %lld micro_volt_hour\n", cc_uvh);
@@ -1098,6 +1168,391 @@
calib_hkadc(chip);
}
+#define START_CONV_BIT BIT(7)
+#define EOC_CONV_BIT BIT(6)
+#define SEL_CCADC_BIT BIT(1)
+#define EN_ARB_BIT BIT(0)
+
+#define CCADC_CALIB_DIG_PARAM 0xE3
+#define CCADC_CALIB_RSV_GND 0x40
+#define CCADC_CALIB_RSV_25MV 0x80
+#define CCADC_CALIB_ANA_PARAM 0x1B
+#define SAMPLE_COUNT 16
+#define ADC_WAIT_COUNT 10
+
+#define CCADC_MAX_25MV 30000
+#define CCADC_MIN_25MV 20000
+#define CCADC_MAX_0UV -4000
+#define CCADC_MIN_0UV -7000
+
+#define CCADC_INTRINSIC_OFFSET 0xC000
+
+#define REG_SBI_CONFIG 0x04F
+#define PAGE3_ENABLE_MASK 0x6
+
+static int calib_ccadc_enable_trim_access(struct pm8921_bms_chip *chip,
+ u8 *sbi_config)
+{
+ u8 reg;
+ int rc;
+
+ rc = pm8xxx_readb(chip->dev->parent, REG_SBI_CONFIG, sbi_config);
+ if (rc) {
+ pr_err("error = %d reading sbi config reg\n", rc);
+ return rc;
+ }
+
+ reg = *sbi_config | PAGE3_ENABLE_MASK;
+ return pm8xxx_writeb(chip->dev->parent, REG_SBI_CONFIG, reg);
+}
+
+static int calib_ccadc_restore_trim_access(struct pm8921_bms_chip *chip,
+ u8 sbi_config)
+{
+ return pm8xxx_writeb(chip->dev->parent, REG_SBI_CONFIG, sbi_config);
+}
+
+static int calib_ccadc_enable_arbiter(struct pm8921_bms_chip *chip)
+{
+ int rc;
+
+ /* enable Arbiter, must be sent twice */
+ rc = pm_bms_masked_write(chip, ADC_ARB_SECP_CNTRL,
+ SEL_CCADC_BIT | EN_ARB_BIT, SEL_CCADC_BIT | EN_ARB_BIT);
+ if (rc < 0) {
+ pr_err("error = %d enabling arbiter for offset\n", rc);
+ return rc;
+ }
+ rc = pm_bms_masked_write(chip, ADC_ARB_SECP_CNTRL,
+ SEL_CCADC_BIT | EN_ARB_BIT, SEL_CCADC_BIT | EN_ARB_BIT);
+ if (rc < 0) {
+ pr_err("error = %d writing ADC_ARB_SECP_CNTRL\n", rc);
+ return rc;
+ }
+ return 0;
+}
+
+static int calib_start_conv(struct pm8921_bms_chip *chip,
+ u16 *result)
+{
+ int rc, i;
+ u8 data_msb, data_lsb, reg;
+
+ /* Start conversion */
+ rc = pm_bms_masked_write(chip, ADC_ARB_SECP_CNTRL,
+ START_CONV_BIT, START_CONV_BIT);
+ if (rc < 0) {
+ pr_err("error = %d starting offset meas\n", rc);
+ return rc;
+ }
+
+ /* Wait for End of conversion */
+ for (i = 0; i < ADC_WAIT_COUNT; i++) {
+ rc = pm8xxx_readb(chip->dev->parent,
+ ADC_ARB_SECP_CNTRL, ®);
+ if (rc < 0) {
+ pr_err("error = %d read eoc for offset\n", rc);
+ return rc;
+ }
+ if ((reg & (START_CONV_BIT | EOC_CONV_BIT)) != EOC_CONV_BIT)
+ msleep(60);
+ else
+ break;
+ }
+ if (i == ADC_WAIT_COUNT) {
+ pr_err("waited too long for offset eoc\n");
+ return rc;
+ }
+
+ rc = pm8xxx_readb(chip->dev->parent, ADC_ARB_SECP_DATA0, &data_lsb);
+ if (rc < 0) {
+ pr_err("error = %d reading offset lsb\n", rc);
+ return rc;
+ }
+
+ rc = pm8xxx_readb(chip->dev->parent, ADC_ARB_SECP_DATA1, &data_msb);
+ if (rc < 0) {
+ pr_err("error = %d reading offset msb\n", rc);
+ return rc;
+ }
+
+ *result = (data_msb << 8) | data_lsb;
+ return 0;
+}
+
+static int calib_ccadc_read_trim(struct pm8921_bms_chip *chip,
+ int addr, u8 *data_msb, u8 *data_lsb)
+{
+ int rc;
+ u8 sbi_config;
+
+ calib_ccadc_enable_trim_access(chip, &sbi_config);
+ rc = pm8xxx_readb(chip->dev->parent, addr, data_msb);
+ if (rc < 0) {
+ pr_err("error = %d read msb\n", rc);
+ return rc;
+ }
+ rc = pm8xxx_readb(chip->dev->parent, addr + 1, data_lsb);
+ if (rc < 0) {
+ pr_err("error = %d read lsb\n", rc);
+ return rc;
+ }
+ calib_ccadc_restore_trim_access(chip, sbi_config);
+ return 0;
+}
+
+static int calib_ccadc_read_gain_uv(struct pm8921_bms_chip *chip)
+{
+ s8 data_msb;
+ u8 data_lsb;
+ int rc, gain, offset;
+
+ rc = calib_ccadc_read_trim(chip, CCADC_FULLSCALE_TRIM1,
+ &data_msb, &data_lsb);
+ gain = (data_msb << 8) | data_lsb;
+
+ rc = calib_ccadc_read_trim(chip, CCADC_OFFSET_TRIM1,
+ &data_msb, &data_lsb);
+ offset = (data_msb << 8) | data_lsb;
+
+ pr_debug("raw gain trim = 0x%x offset trim =0x%x\n", gain, offset);
+ gain = ccadc_reading_to_microvolt(chip, (s64)gain - offset);
+ return gain;
+}
+
+#define CCADC_PROGRAM_TRIM_COUNT 2
+#define ADC_ARB_BMS_CNTRL_CCADC_SHIFT 4
+#define ADC_ARB_BMS_CNTRL_CONV_MASK 0x03
+#define BMS_CONV_IN_PROGRESS 0x2
+
+static int calib_ccadc_program_trim(struct pm8921_bms_chip *chip,
+ int addr, u8 data_msb, u8 data_lsb,
+ int wait)
+{
+ int i, rc, loop;
+ u8 cntrl, sbi_config;
+ bool in_progress = 0;
+
+ loop = wait ? CCADC_PROGRAM_TRIM_COUNT : 0;
+
+ calib_ccadc_enable_trim_access(chip, &sbi_config);
+
+ for (i = 0; i < loop; i++) {
+ rc = pm8xxx_readb(chip->dev->parent, ADC_ARB_BMS_CNTRL, &cntrl);
+ if (rc < 0) {
+ pr_err("error = %d reading ADC_ARB_BMS_CNTRL\n", rc);
+ return rc;
+ }
+
+ /* break if a ccadc conversion is not happening */
+ in_progress = (((cntrl >> ADC_ARB_BMS_CNTRL_CCADC_SHIFT)
+ & ADC_ARB_BMS_CNTRL_CONV_MASK) == BMS_CONV_IN_PROGRESS);
+
+ if (!in_progress)
+ break;
+ }
+
+ if (in_progress) {
+ pr_debug("conv in progress cannot write trim,returing EBUSY\n");
+ return -EBUSY;
+ }
+
+ rc = pm8xxx_writeb(chip->dev->parent, addr, data_msb);
+ if (rc < 0) {
+ pr_err("error = %d write msb = 0x%x\n", rc, data_msb);
+ return rc;
+ }
+ rc = pm8xxx_writeb(chip->dev->parent, addr + 1, data_lsb);
+ if (rc < 0) {
+ pr_err("error = %d write lsb = 0x%x\n", rc, data_lsb);
+ return rc;
+ }
+ calib_ccadc_restore_trim_access(chip, sbi_config);
+ return 0;
+}
+
+static void calib_ccadc(struct pm8921_bms_chip *chip)
+{
+ u8 data_msb, data_lsb, sec_cntrl;
+ int result_offset, voltage_offset, result_gain;
+ u16 result;
+ int i, rc;
+
+ rc = pm8xxx_readb(chip->dev->parent, ADC_ARB_SECP_CNTRL, &sec_cntrl);
+ if (rc < 0) {
+ pr_err("error = %d reading ADC_ARB_SECP_CNTRL\n", rc);
+ return;
+ }
+
+ rc = calib_ccadc_enable_arbiter(chip);
+ if (rc < 0) {
+ pr_err("error = %d enabling arbiter for offset\n", rc);
+ goto bail;
+ }
+
+ /*
+ * Set decimation ratio to 4k, lower ratio may be used in order to speed
+ * up, pending verification through bench
+ */
+ rc = pm8xxx_writeb(chip->dev->parent, ADC_ARB_SECP_DIG_PARAM,
+ CCADC_CALIB_DIG_PARAM);
+ if (rc < 0) {
+ pr_err("error = %d writing ADC_ARB_SECP_DIG_PARAM\n", rc);
+ goto bail;
+ }
+
+ result_offset = 0;
+ for (i = 0; i < SAMPLE_COUNT; i++) {
+ /* Short analog inputs to CCADC internally to ground */
+ rc = pm8xxx_writeb(chip->dev->parent, ADC_ARB_SECP_RSV,
+ CCADC_CALIB_RSV_GND);
+ if (rc < 0) {
+ pr_err("error = %d selecting gnd voltage\n", rc);
+ goto bail;
+ }
+
+ /* Enable CCADC */
+ rc = pm8xxx_writeb(chip->dev->parent, ADC_ARB_SECP_ANA_PARAM,
+ CCADC_CALIB_ANA_PARAM);
+ if (rc < 0) {
+ pr_err("error = %d enabling ccadc\n", rc);
+ goto bail;
+ }
+
+ rc = calib_start_conv(chip, &result);
+ if (rc < 0) {
+ pr_err("error = %d for zero volt measurement\n", rc);
+ goto bail;
+ }
+
+ result_offset += result;
+ }
+
+ result_offset = result_offset / SAMPLE_COUNT;
+
+ voltage_offset = ccadc_reading_to_microvolt(chip,
+ ((s64)result_offset - CCADC_INTRINSIC_OFFSET));
+
+ pr_debug("offset result_offset = 0x%x, voltage = %d microVolts\n",
+ result_offset, voltage_offset);
+
+ /* Sanity Check */
+ if (voltage_offset > CCADC_MAX_0UV) {
+ pr_err("offset voltage = %d is huge limiting to %d\n",
+ voltage_offset, CCADC_MAX_0UV);
+ result_offset = CCADC_INTRINSIC_OFFSET
+ + microvolt_to_ccadc_reading(chip, (s64)CCADC_MAX_0UV);
+ } else if (voltage_offset < CCADC_MIN_0UV) {
+ pr_err("offset voltage = %d is too low limiting to %d\n",
+ voltage_offset, CCADC_MIN_0UV);
+ result_offset = CCADC_INTRINSIC_OFFSET
+ + microvolt_to_ccadc_reading(chip, (s64)CCADC_MIN_0UV);
+ }
+
+ chip->ccadc_result_offset = result_offset;
+ data_msb = chip->ccadc_result_offset >> 8;
+ data_lsb = chip->ccadc_result_offset;
+
+ rc = calib_ccadc_program_trim(chip, CCADC_OFFSET_TRIM1,
+ data_msb, data_lsb, 1);
+ if (rc) {
+ pr_debug("error = %d programming offset trim 0x%02x 0x%02x\n",
+ rc, data_msb, data_lsb);
+ /* enable the interrupt and write it when it fires */
+ pm8921_bms_enable_irq(chip, PM8921_BMS_CCADC_EOC);
+ }
+
+ rc = calib_ccadc_enable_arbiter(chip);
+ if (rc < 0) {
+ pr_err("error = %d enabling arbiter for gain\n", rc);
+ goto bail;
+ }
+
+ /*
+ * Set decimation ratio to 4k, lower ratio may be used in order to speed
+ * up, pending verification through bench
+ */
+ rc = pm8xxx_writeb(chip->dev->parent, ADC_ARB_SECP_DIG_PARAM,
+ CCADC_CALIB_DIG_PARAM);
+ if (rc < 0) {
+ pr_err("error = %d enabling decimation ration for gain\n", rc);
+ goto bail;
+ }
+
+ result_gain = 0;
+ for (i = 0; i < SAMPLE_COUNT; i++) {
+ rc = pm8xxx_writeb(chip->dev->parent,
+ ADC_ARB_SECP_RSV, CCADC_CALIB_RSV_25MV);
+ if (rc < 0) {
+ pr_err("error = %d selecting 25mV for gain\n", rc);
+ goto bail;
+ }
+
+ /* Enable CCADC */
+ rc = pm8xxx_writeb(chip->dev->parent, ADC_ARB_SECP_ANA_PARAM,
+ CCADC_CALIB_ANA_PARAM);
+ if (rc < 0) {
+ pr_err("error = %d enabling ccadc\n", rc);
+ goto bail;
+ }
+
+ rc = calib_start_conv(chip, &result);
+ if (rc < 0) {
+ pr_err("error = %d for adc reading 25mV\n", rc);
+ goto bail;
+ }
+
+ result_gain += result;
+ }
+ result_gain = result_gain / SAMPLE_COUNT;
+
+ /*
+ * result_offset includes INTRINSIC OFFSET
+ * chip->ccadc_gain_uv will be the actual voltage
+ * measured for 25000UV
+ */
+ chip->ccadc_gain_uv = ccadc_reading_to_microvolt(chip,
+ ((s64)result_gain - result_offset));
+
+ pr_debug("gain result_gain = 0x%x, voltage = %d microVolts\n",
+ result_gain,
+ chip->ccadc_gain_uv);
+ /* Sanity Check */
+ if (chip->ccadc_gain_uv > CCADC_MAX_25MV) {
+ pr_err("gain voltage = %d is huge limiting to %d\n",
+ chip->ccadc_gain_uv, CCADC_MAX_25MV);
+ chip->ccadc_gain_uv = CCADC_MAX_25MV;
+ result_gain = result_offset +
+ microvolt_to_ccadc_reading(chip, CCADC_MAX_25MV);
+ } else if (chip->ccadc_gain_uv < CCADC_MIN_25MV) {
+ pr_err("gain voltage = %d is too low limiting to %d\n",
+ chip->ccadc_gain_uv, CCADC_MIN_25MV);
+ chip->ccadc_gain_uv = CCADC_MIN_25MV;
+ result_gain = result_offset +
+ microvolt_to_ccadc_reading(chip, CCADC_MIN_25MV);
+ }
+
+ data_msb = result_gain >> 8;
+ data_lsb = result_gain;
+ rc = calib_ccadc_program_trim(chip, CCADC_FULLSCALE_TRIM1,
+ data_msb, data_lsb, 0);
+ if (rc)
+ pr_debug("error = %d programming gain trim\n", rc);
+bail:
+ pm8xxx_writeb(chip->dev->parent, ADC_ARB_SECP_CNTRL, sec_cntrl);
+}
+
+static void calibrate_ccadc_work(struct work_struct *work)
+{
+ struct pm8921_bms_chip *chip = container_of(work,
+ struct pm8921_bms_chip, calib_ccadc_work.work);
+
+ calib_ccadc(chip);
+ schedule_delayed_work(&chip->calib_ccadc_work,
+ round_jiffies_relative(msecs_to_jiffies
+ (chip->calib_delay_ms)));
+}
+
int pm8921_bms_get_vsense_avg(int *result)
{
int rc = -EINVAL;
@@ -1119,6 +1574,7 @@
int pm8921_bms_get_battery_current(int *result)
{
unsigned long flags;
+ int vsense;
if (!the_chip) {
pr_err("called before initialization\n");
@@ -1131,12 +1587,13 @@
spin_lock_irqsave(&the_chip->bms_output_lock, flags);
pm_bms_lock_output_data(the_chip);
- read_vsense_avg(the_chip, result);
+ read_vsense_avg(the_chip, &vsense);
pm_bms_unlock_output_data(the_chip);
spin_unlock_irqrestore(&the_chip->bms_output_lock, flags);
- pr_debug("vsense=%d\n", *result);
+ pr_debug("vsense=%d\n", vsense);
/* cast for signed division */
- *result = *result / (int)the_chip->r_sense;
+ *result = vsense / (int)the_chip->r_sense;
+
return 0;
}
EXPORT_SYMBOL(pm8921_bms_get_battery_current);
@@ -1283,6 +1740,23 @@
return IRQ_HANDLED;
}
+static irqreturn_t pm8921_bms_ccadc_eoc_handler(int irq, void *data)
+{
+ u8 data_msb, data_lsb;
+ struct pm8921_bms_chip *chip = data;
+ int rc;
+
+ pr_debug("irq = %d triggered\n", irq);
+ data_msb = chip->ccadc_result_offset >> 8;
+ data_lsb = chip->ccadc_result_offset;
+
+ rc = calib_ccadc_program_trim(chip, CCADC_OFFSET_TRIM1,
+ data_msb, data_lsb, 0);
+ pm8921_bms_disable_irq(chip, PM8921_BMS_CCADC_EOC);
+
+ return IRQ_HANDLED;
+}
+
struct pm_bms_irq_init_data {
unsigned int irq_id;
char *name;
@@ -1313,6 +1787,8 @@
pm8921_bms_good_ocv_handler),
BMS_IRQ(PM8921_BMS_VSENSE_AVG, IRQF_TRIGGER_RISING,
pm8921_bms_vsense_avg_handler),
+ BMS_IRQ(PM8921_BMS_CCADC_EOC, IRQF_TRIGGER_RISING,
+ pm8921_bms_ccadc_eoc_handler),
};
static void free_irqs(struct pm8921_bms_chip *chip)
@@ -1451,6 +1927,7 @@
CALC_PC,
CALC_SOC,
CALIB_HKADC,
+ CALIB_CCADC,
};
static int test_batt_temp = 5;
@@ -1526,6 +2003,11 @@
*val = 0;
calib_hkadc(the_chip);
break;
+ case CALIB_CCADC:
+ /* reading this will trigger calibration */
+ *val = 0;
+ calib_ccadc(the_chip);
+ break;
default:
ret = -EINVAL;
}
@@ -1677,6 +2159,8 @@
(void *)CALC_SOC, &calc_fops);
debugfs_create_file("calib_hkadc", 0644, chip->dent,
(void *)CALIB_HKADC, &calc_fops);
+ debugfs_create_file("calib_ccadc", 0644, chip->dent,
+ (void *)CALIB_CCADC, &calc_fops);
for (i = 0; i < ARRAY_SIZE(bms_irq_data); i++) {
if (chip->pmic_bms_irq[bms_irq_data[i].irq_id])
@@ -1725,23 +2209,29 @@
chip->revision = pm8xxx_get_revision(chip->dev->parent);
INIT_WORK(&chip->calib_hkadc_work, calibrate_hkadc_work);
- rc = pm8921_bms_hw_init(chip);
- if (rc) {
- pr_err("couldn't init hardware rc = %d\n", rc);
- goto free_chip;
- }
-
rc = request_irqs(chip, pdev);
if (rc) {
pr_err("couldn't register interrupts rc = %d\n", rc);
goto free_chip;
}
+ rc = pm8921_bms_hw_init(chip);
+ if (rc) {
+ pr_err("couldn't init hardware rc = %d\n", rc);
+ goto free_irqs;
+ }
+
platform_set_drvdata(pdev, chip);
the_chip = chip;
create_debugfs_entries(chip);
check_initial_ocv(chip);
+ chip->ccadc_gain_uv = calib_ccadc_read_gain_uv(chip);
+
+ INIT_DELAYED_WORK(&chip->calib_ccadc_work, calibrate_ccadc_work);
+ /* begin calibration only on chips > 2.0 */
+ if (chip->revision >= PM8XXX_REVISION_8921_2p0)
+ calibrate_ccadc_work(&(chip->calib_ccadc_work.work));
/* initial hkadc calibration */
schedule_work(&chip->calib_hkadc_work);
@@ -1755,6 +2245,8 @@
vbatt, last_ocv_uv);
return 0;
+free_irqs:
+ free_irqs(chip);
free_chip:
kfree(chip);
return rc;
diff --git a/drivers/power/pm8921-charger.c b/drivers/power/pm8921-charger.c
index 82582c4..303dd99 100644
--- a/drivers/power/pm8921-charger.c
+++ b/drivers/power/pm8921-charger.c
@@ -2229,7 +2229,7 @@
}
if (chip->ttrkl_time != 0) {
- rc = pm_chg_ttrkl_max_set(chip, chip->safety_time);
+ rc = pm_chg_ttrkl_max_set(chip, chip->ttrkl_time);
if (rc) {
pr_err("Failed to set trkl time to %d minutes rc=%d\n",
chip->safety_time, rc);
diff --git a/drivers/regulator/pm8921-regulator.c b/drivers/regulator/pm8921-regulator.c
index c0c9085..7e2ac6b 100644
--- a/drivers/regulator/pm8921-regulator.c
+++ b/drivers/regulator/pm8921-regulator.c
@@ -1448,7 +1448,7 @@
static int _pm8921_ftsmps_set_voltage(struct pm8921_vreg *vreg, int min_uV,
int max_uV, int force_on)
{
- int rc;
+ int rc = 0;
u8 vprog, band;
int uV = min_uV;
diff --git a/drivers/slimbus/slim-msm-ctrl.c b/drivers/slimbus/slim-msm-ctrl.c
index 4a2ad3f..1e4302b 100644
--- a/drivers/slimbus/slim-msm-ctrl.c
+++ b/drivers/slimbus/slim-msm-ctrl.c
@@ -21,7 +21,6 @@
#include <linux/delay.h>
#include <linux/kthread.h>
#include <linux/clk.h>
-#include <linux/pm_runtime.h>
#include <mach/sps.h>
/* Per spec.max 40 bytes per received message */
@@ -45,7 +44,6 @@
#define MSM_SLIM_PERF_SUMM_THRESHOLD 0x8000
#define MSM_SLIM_NCHANS 32
#define MSM_SLIM_NPORTS 24
-#define MSM_SLIM_AUTOSUSPEND MSEC_PER_SEC
/*
* Need enough descriptors to receive present messages from slaves
@@ -82,7 +80,6 @@
#define QC_DEVID_SAT1 0x3
#define QC_DEVID_SAT2 0x4
#define QC_DEVID_PGD 0x5
-#define QC_MSM_DEVS 5
/* Component registers */
enum comp_reg {
@@ -187,12 +184,6 @@
REF_CLK_GEAR = 15,
};
-enum msm_ctrl_state {
- MSM_CTRL_AWAKE,
- MSM_CTRL_SLEEPING,
- MSM_CTRL_ASLEEP,
-};
-
struct msm_slim_sps_bam {
u32 hdl;
void __iomem *base;
@@ -235,12 +226,10 @@
struct mutex tx_lock;
u8 pgdla;
bool use_rx_msgqs;
+ int suspended;
int pipe_b;
struct completion reconf;
bool reconf_busy;
- bool chan_active;
- enum msm_ctrl_state state;
- int numdevs;
};
struct msm_slim_sat {
@@ -461,11 +450,6 @@
* before exiting ISR
*/
mb();
- if (dev->ctrl.sched.usedslots == 0 &&
- dev->state != MSM_CTRL_SLEEPING) {
- dev->chan_active = false;
- pm_runtime_put(dev->dev);
- }
complete(&dev->reconf);
}
pstat = readl_relaxed(dev->base + PGD_PORT_INT_ST_EEn + (16 * dev->ee));
@@ -665,37 +649,17 @@
u8 *puc;
int timeout;
u8 la = txn->la;
- /*
- * Voting for runtime PM: Slimbus has 2 possible use cases:
- * 1. messaging
- * 2. Data channels
- * Messaging case goes through messaging slots and data channels
- * use their own slots
- * This "get" votes for messaging bandwidth
- */
- if (txn->mc < SLIM_MSG_MC_BEGIN_RECONFIGURATION ||
- txn->mc > SLIM_MSG_MC_RECONFIGURE_NOW ||
- dev->state != MSM_CTRL_SLEEPING)
- pm_runtime_get_sync(dev->dev);
mutex_lock(&dev->tx_lock);
- if (dev->state == MSM_CTRL_ASLEEP) {
- dev_err(dev->dev, "runtime or system PM suspended state");
- mutex_unlock(&dev->tx_lock);
- pm_runtime_put(dev->dev);
- return -EBUSY;
- }
if (txn->mt == SLIM_MSG_MT_CORE &&
- txn->mc == SLIM_MSG_MC_BEGIN_RECONFIGURATION) {
- if (dev->reconf_busy) {
+ txn->mc == SLIM_MSG_MC_BEGIN_RECONFIGURATION &&
+ dev->reconf_busy) {
wait_for_completion(&dev->reconf);
dev->reconf_busy = false;
- }
- /* This "get" votes for data channels */
- if (dev->ctrl.sched.usedslots != 0 &&
- !dev->chan_active) {
- dev->chan_active = true;
- pm_runtime_get(dev->dev);
- }
+ }
+ if (dev->suspended) {
+ dev_err(dev->dev, "No transaction in suspended state");
+ mutex_unlock(&dev->tx_lock);
+ return -EBUSY;
}
txn->rl--;
pbuf = msm_get_msg_buf(ctrl, txn->rl);
@@ -704,10 +668,6 @@
if (txn->dt == SLIM_MSG_DEST_ENUMADDR) {
mutex_unlock(&dev->tx_lock);
- if (txn->mc < SLIM_MSG_MC_BEGIN_RECONFIGURATION ||
- txn->mc > SLIM_MSG_MC_RECONFIGURE_NOW ||
- dev->state != MSM_CTRL_SLEEPING)
- pm_runtime_put(dev->dev);
return -EPROTONOSUPPORT;
}
if (txn->mt == SLIM_MSG_MT_CORE && txn->la == 0xFF &&
@@ -755,15 +715,11 @@
*/
dev->pipes[*puc].connected = false;
mutex_unlock(&dev->tx_lock);
- if (dev->state != MSM_CTRL_SLEEPING)
- pm_runtime_put(dev->dev);
return 0;
}
if (dev->err) {
dev_err(dev->dev, "pipe-port connect err:%d", dev->err);
mutex_unlock(&dev->tx_lock);
- if (dev->state != MSM_CTRL_SLEEPING)
- pm_runtime_put(dev->dev);
return dev->err;
}
*(puc) = *(puc) + dev->pipe_b;
@@ -774,37 +730,10 @@
dev->wr_comp = &done;
msm_send_msg_buf(ctrl, pbuf, txn->rl);
timeout = wait_for_completion_timeout(&done, HZ);
-
- if (dev->state == MSM_CTRL_SLEEPING &&
- txn->mc == SLIM_MSG_MC_RECONFIGURE_NOW &&
- txn->mt == SLIM_MSG_MT_CORE && timeout) {
- timeout = wait_for_completion_timeout(&dev->reconf, HZ);
- dev->reconf_busy = false;
- if (timeout) {
- clk_disable(dev->rclk);
- disable_irq(dev->irq);
- dev->state = MSM_CTRL_ASLEEP;
- }
- }
- if (!timeout && dev->state == MSM_CTRL_SLEEPING &&
- txn->mc >= SLIM_MSG_MC_BEGIN_RECONFIGURATION &&
- txn->mc <= SLIM_MSG_MC_RECONFIGURE_NOW &&
- txn->mt == SLIM_MSG_MT_CORE) {
- dev->reconf_busy = false;
- dev->state = MSM_CTRL_AWAKE;
- dev_err(dev->dev, "clock pause failed");
- mutex_unlock(&dev->tx_lock);
- return -ETIMEDOUT;
- }
-
- mutex_unlock(&dev->tx_lock);
- if (!txn->rbuf && dev->state == MSM_CTRL_AWAKE)
- pm_runtime_put(dev->dev);
-
if (!timeout)
dev_err(dev->dev, "TX timed out:MC:0x%x,mt:0x%x", txn->mc,
txn->mt);
-
+ mutex_unlock(&dev->tx_lock);
return timeout ? dev->err : -ETIMEDOUT;
}
@@ -834,7 +763,6 @@
static int msm_clk_pause_wakeup(struct slim_controller *ctrl)
{
struct msm_slim_ctrl *dev = slim_get_ctrldata(ctrl);
- enable_irq(dev->irq);
clk_enable(dev->rclk);
writel_relaxed(1, dev->base + FRM_WAKEUP);
/* Make sure framer wakeup write goes through before exiting function */
@@ -849,7 +777,6 @@
* we get the message
*/
usleep_range(5000, 5000);
- dev->state = MSM_CTRL_AWAKE;
return 0;
}
@@ -994,9 +921,6 @@
e_addr[1] == QC_DEVID_PGD &&
e_addr[2] != QC_CHIPID_SL)
dev->pgdla = laddr;
- dev->numdevs++;
- if (!ret && dev->numdevs == QC_MSM_DEVS)
- pm_runtime_enable(dev->dev);
} else if (mc == SLIM_MSG_MC_REPLY_INFORMATION ||
mc == SLIM_MSG_MC_REPLY_VALUE) {
@@ -1004,7 +928,6 @@
dev_dbg(dev->dev, "tid:%d, len:%d\n", tid, len - 4);
slim_msg_response(&dev->ctrl, &buf[4], tid,
len - 4);
- pm_runtime_put(dev->dev);
} else if (mc == SLIM_MSG_MC_REPORT_INFORMATION) {
u8 l_addr = buf[2];
u16 ele = (u16)buf[4] << 4;
@@ -1057,19 +980,11 @@
for (i = 0; i < 6; i++)
e_addr[i] = buf[7-i];
- pm_runtime_get_sync(dev->dev);
slim_assign_laddr(&dev->ctrl, e_addr, 6, &laddr);
sat->satcl.laddr = laddr;
- } else if (mt != SLIM_MSG_MT_CORE &&
- mc != SLIM_MSG_MC_REPORT_PRESENT)
- pm_runtime_get_sync(dev->dev);
+ }
switch (mc) {
case SLIM_MSG_MC_REPORT_PRESENT:
- /* Remove runtime_pm vote once satellite acks */
- if (mt != SLIM_MSG_MT_CORE) {
- pm_runtime_put(dev->dev);
- continue;
- }
/* send a Manager capability msg */
if (sat->sent_capability)
continue;
@@ -1170,11 +1085,8 @@
default:
break;
}
- if (!gen_ack) {
- if (mc != SLIM_MSG_MC_REPORT_PRESENT)
- pm_runtime_put(dev->dev);
+ if (!gen_ack)
continue;
- }
wbuf[0] = tid;
if (!ret)
wbuf[1] = MSM_SAT_SUCCSS;
@@ -1187,7 +1099,6 @@
txn.wbuf = wbuf;
txn.mt = SLIM_MSG_MT_SRC_REFERRED_USER;
msm_xfer_msg(&dev->ctrl, &txn);
- pm_runtime_put(dev->dev);
}
}
@@ -1791,9 +1702,6 @@
* function
*/
mb();
- pm_runtime_use_autosuspend(&pdev->dev);
- pm_runtime_set_autosuspend_delay(&pdev->dev, MSM_SLIM_AUTOSUSPEND);
- pm_runtime_set_active(&pdev->dev);
dev_dbg(dev->dev, "MSM SB controller is up!\n");
return 0;
@@ -1827,13 +1735,12 @@
struct resource *slew_mem = dev->slew_mem;
struct msm_slim_sat *sat = dev->satd;
slim_remove_device(&sat->satcl);
- pm_runtime_disable(&pdev->dev);
- pm_runtime_set_suspended(&pdev->dev);
kfree(sat->satch);
destroy_workqueue(sat->wq);
kfree(sat);
free_irq(dev->irq, dev);
slim_del_controller(&dev->ctrl);
+ clk_disable(dev->rclk);
clk_put(dev->rclk);
msm_slim_sps_exit(dev);
kthread_stop(dev->rx_msgq_thread);
@@ -1853,78 +1760,79 @@
return 0;
}
-#ifdef CONFIG_PM_RUNTIME
-static int msm_slim_runtime_idle(struct device *device)
+#ifdef CONFIG_PM
+static int msm_slim_suspend(struct device *device)
{
struct platform_device *pdev = to_platform_device(device);
struct msm_slim_ctrl *dev = platform_get_drvdata(pdev);
- dev_dbg(device, "pm_runtime: idle...\n");
- pm_runtime_mark_last_busy(dev->dev);
- pm_request_autosuspend(device);
- return -EAGAIN;
-}
-#endif
-
-/*
- * If PM_RUNTIME is not defined, these 2 functions become helper
- * functions to be called from system suspend/resume. So they are not
- * inside ifdef CONFIG_PM_RUNTIME
- */
-static int msm_slim_runtime_suspend(struct device *device)
-{
- struct platform_device *pdev = to_platform_device(device);
- struct msm_slim_ctrl *dev = platform_get_drvdata(pdev);
- dev_dbg(device, "pm_runtime: suspending...\n");
- dev->state = MSM_CTRL_SLEEPING;
- return slim_ctrl_clk_pause(&dev->ctrl, false, SLIM_CLK_UNSPECIFIED);
-}
-
-static int msm_slim_runtime_resume(struct device *device)
-{
- struct platform_device *pdev = to_platform_device(device);
- struct msm_slim_ctrl *dev = platform_get_drvdata(pdev);
- dev_dbg(device, "pm_runtime: resuming...\n");
+ int ret = slim_ctrl_clk_pause(&dev->ctrl, false, SLIM_CLK_UNSPECIFIED);
+ /* Make sure clock pause goes through */
mutex_lock(&dev->tx_lock);
- if (dev->state == MSM_CTRL_ASLEEP) {
- mutex_unlock(&dev->tx_lock);
- return slim_ctrl_clk_pause(&dev->ctrl, true, 0);
+ if (!ret && dev->reconf_busy) {
+ wait_for_completion(&dev->reconf);
+ dev->reconf_busy = false;
}
mutex_unlock(&dev->tx_lock);
- return 0;
-}
-
-#ifdef CONFIG_PM_SLEEP
-static int msm_slim_suspend(struct device *dev)
-{
- int ret = 0;
- if (!pm_runtime_enabled(dev) || !pm_runtime_suspended(dev)) {
- dev_dbg(dev, "system suspend");
- ret = msm_slim_runtime_suspend(dev);
- }
- if (ret == -EBUSY) {
+ if (!ret) {
+ clk_disable(dev->rclk);
+ disable_irq(dev->irq);
+ dev->suspended = 1;
+ } else if (ret == -EBUSY) {
/*
- * If the clock pause failed due to active channels, there is
- * a possibility that some audio stream is active during suspend
- * We dont want to return suspend failure in that case so that
- * display and relevant components can still go to suspend.
- * If there is some other error, then it should be passed-on
- * to system level suspend
- */
+ * If the clock pause failed due to active channels, there is
+ * a possibility that some audio stream is active during suspend
+ * We dont want to return suspend failure in that case so that
+ * display and relevant components can still go to suspend.
+ * If there is some other error, then it should be passed-on
+ * to system level suspend
+ */
ret = 0;
}
return ret;
}
-static int msm_slim_resume(struct device *dev)
+static int msm_slim_resume(struct device *device)
{
- /* If runtime_pm is enabled, this resume shouldn't do anything */
- if (!pm_runtime_enabled(dev) || !pm_runtime_suspended(dev)) {
- dev_dbg(dev, "system resume");
- return msm_slim_runtime_resume(dev);
+ struct platform_device *pdev = to_platform_device(device);
+ struct msm_slim_ctrl *dev = platform_get_drvdata(pdev);
+ mutex_lock(&dev->tx_lock);
+ if (dev->suspended) {
+ dev->suspended = 0;
+ mutex_unlock(&dev->tx_lock);
+ enable_irq(dev->irq);
+ return slim_ctrl_clk_pause(&dev->ctrl, true, 0);
}
+ mutex_unlock(&dev->tx_lock);
return 0;
}
-#endif /* CONFIG_PM_SLEEP */
+#else
+#define msm_slim_suspend NULL
+#define msm_slim_resume NULL
+#endif /* CONFIG_PM */
+
+#ifdef CONFIG_PM_RUNTIME
+static int msm_slim_runtime_idle(struct device *dev)
+{
+ dev_dbg(dev, "pm_runtime: idle...\n");
+ return 0;
+}
+
+static int msm_slim_runtime_suspend(struct device *dev)
+{
+ dev_dbg(dev, "pm_runtime: suspending...\n");
+ return 0;
+}
+
+static int msm_slim_runtime_resume(struct device *dev)
+{
+ dev_dbg(dev, "pm_runtime: resuming...\n");
+ return 0;
+}
+#else
+#define msm_slim_runtime_idle NULL
+#define msm_slim_runtime_suspend NULL
+#define msm_slim_runtime_resume NULL
+#endif
static const struct dev_pm_ops msm_slim_dev_pm_ops = {
SET_SYSTEM_SLEEP_PM_OPS(
diff --git a/drivers/slimbus/slimbus.c b/drivers/slimbus/slimbus.c
index bb30570..3b79129 100644
--- a/drivers/slimbus/slimbus.c
+++ b/drivers/slimbus/slimbus.c
@@ -892,6 +892,10 @@
cur = slim_slicecodefromsize(sl);
ec = ((sl | (1 << 3)) | ((msg->start_offset & 0xFFF) << 4));
+ ret = slim_ctrl_clk_pause(ctrl, true, 0);
+ if (ret)
+ return ret;
+
if (wbuf)
mlen += len;
if (rbuf) {
@@ -1123,6 +1127,10 @@
u8 chan = (u8)(chanh & 0xFF);
struct slim_ich *slc = &ctrl->chans[chan];
+ ret = slim_ctrl_clk_pause(ctrl, true, 0);
+ if (ret)
+ return ret;
+
mutex_lock(&ctrl->m_ctrl);
/* Make sure the channel is not already pending reconf. or active */
if (slc->state >= SLIM_CH_PENDING_ACTIVE) {
@@ -1185,8 +1193,11 @@
int slim_disconnect_ports(struct slim_device *sb, u32 *ph, int nph)
{
struct slim_controller *ctrl = sb->ctrl;
- int i;
+ int i, ret;
+ ret = slim_ctrl_clk_pause(ctrl, true, 0);
+ if (ret)
+ return ret;
mutex_lock(&ctrl->m_ctrl);
for (i = 0; i < nph; i++)
@@ -2378,6 +2389,10 @@
u32 segdist;
struct slim_pending_ch *pch;
+ ret = slim_ctrl_clk_pause(ctrl, true, 0);
+ if (ret)
+ return ret;
+
mutex_lock(&ctrl->sched.m_reconf);
mutex_lock(&ctrl->m_ctrl);
ctrl->sched.pending_msgsl += sb->pending_msgsl - sb->cur_msgsl;
diff --git a/drivers/tty/serial/msm_serial_hs.c b/drivers/tty/serial/msm_serial_hs.c
index 06d614b..bc1a25b 100644
--- a/drivers/tty/serial/msm_serial_hs.c
+++ b/drivers/tty/serial/msm_serial_hs.c
@@ -262,7 +262,10 @@
gsbi_resource = platform_get_resource_byname(pdev,
IORESOURCE_MEM,
"gsbi_resource");
- size = gsbi_resource->end - gsbi_resource->start + 1;
+ if (unlikely(!gsbi_resource))
+ return;
+
+ size = resource_size(gsbi_resource);
release_mem_region(gsbi_resource->start, size);
iounmap(msm_uport->mapped_gsbi);
msm_uport->mapped_gsbi = NULL;
@@ -280,7 +283,7 @@
IORESOURCE_MEM,
"gsbi_resource");
if (gsbi_resource) {
- size = gsbi_resource->end - gsbi_resource->start + 1;
+ size = resource_size(gsbi_resource);
if (unlikely(!request_mem_region(gsbi_resource->start, size,
"msm_serial_hs")))
return -EBUSY;
diff --git a/drivers/tty/serial/msm_serial_hs_hwreg.h b/drivers/tty/serial/msm_serial_hs_hwreg.h
index 001d555..fa7d518 100644
--- a/drivers/tty/serial/msm_serial_hs_hwreg.h
+++ b/drivers/tty/serial/msm_serial_hs_hwreg.h
@@ -32,6 +32,28 @@
#define ADM1_CRCI_GSBI6_RX_SEL 0x800
#define ADM1_CRCI_GSBI6_TX_SEL 0x400
+enum msm_hsl_regs {
+ UARTDM_MR1,
+ UARTDM_MR2,
+ UARTDM_IMR,
+ UARTDM_SR,
+ UARTDM_CR,
+ UARTDM_CSR,
+ UARTDM_IPR,
+ UARTDM_ISR,
+ UARTDM_RX_TOTAL_SNAP,
+ UARTDM_RFWR,
+ UARTDM_TFWR,
+ UARTDM_RF,
+ UARTDM_TF,
+ UARTDM_MISR,
+ UARTDM_DMRX,
+ UARTDM_NCF_TX,
+ UARTDM_DMEN,
+ UARTDM_BCR,
+ UARTDM_LAST
+};
+
#define UARTDM_MR1_ADDR 0x0
#define UARTDM_MR2_ADDR 0x4
diff --git a/drivers/tty/serial/msm_serial_hs_lite.c b/drivers/tty/serial/msm_serial_hs_lite.c
index ad085f9..9ba7d2f 100644
--- a/drivers/tty/serial/msm_serial_hs_lite.c
+++ b/drivers/tty/serial/msm_serial_hs_lite.c
@@ -22,6 +22,7 @@
#define SUPPORT_SYSRQ
#endif
+#include <linux/atomic.h>
#include <linux/hrtimer.h>
#include <linux/module.h>
#include <linux/io.h>
@@ -40,6 +41,8 @@
#include <linux/pm_runtime.h>
#include <linux/gpio.h>
#include <linux/debugfs.h>
+#include <linux/of.h>
+#include <linux/of_device.h>
#include <mach/board.h>
#include <mach/msm_serial_hs_lite.h>
#include <asm/mach-types.h>
@@ -57,11 +60,63 @@
unsigned int *mapped_gsbi;
int is_uartdm;
unsigned int old_snap_state;
+ unsigned int ver_id;
};
+#define UARTDM_VERSION_11_13 0
+#define UARTDM_VERSION_14 1
+
#define UART_TO_MSM(uart_port) ((struct msm_hsl_port *) uart_port)
#define is_console(port) ((port)->cons && \
(port)->cons->index == (port)->line)
+
+static const unsigned int regmap[][UARTDM_LAST] = {
+ [UARTDM_VERSION_11_13] = {
+ [UARTDM_MR1] = UARTDM_MR1_ADDR,
+ [UARTDM_MR2] = UARTDM_MR2_ADDR,
+ [UARTDM_IMR] = UARTDM_IMR_ADDR,
+ [UARTDM_SR] = UARTDM_SR_ADDR,
+ [UARTDM_CR] = UARTDM_CR_ADDR,
+ [UARTDM_CSR] = UARTDM_CSR_ADDR,
+ [UARTDM_IPR] = UARTDM_IPR_ADDR,
+ [UARTDM_ISR] = UARTDM_ISR_ADDR,
+ [UARTDM_RX_TOTAL_SNAP] = UARTDM_RX_TOTAL_SNAP_ADDR,
+ [UARTDM_TFWR] = UARTDM_TFWR_ADDR,
+ [UARTDM_RFWR] = UARTDM_RFWR_ADDR,
+ [UARTDM_RF] = UARTDM_RF_ADDR,
+ [UARTDM_TF] = UARTDM_TF_ADDR,
+ [UARTDM_MISR] = UARTDM_MISR_ADDR,
+ [UARTDM_DMRX] = UARTDM_DMRX_ADDR,
+ [UARTDM_NCF_TX] = UARTDM_NCF_TX_ADDR,
+ [UARTDM_DMEN] = UARTDM_DMEN_ADDR,
+ },
+ [UARTDM_VERSION_14] = {
+ [UARTDM_MR1] = 0x0,
+ [UARTDM_MR2] = 0x4,
+ [UARTDM_IMR] = 0xb0,
+ [UARTDM_SR] = 0xa4,
+ [UARTDM_CR] = 0xa8,
+ [UARTDM_CSR] = 0xa0,
+ [UARTDM_IPR] = 0x18,
+ [UARTDM_ISR] = 0xb4,
+ [UARTDM_RX_TOTAL_SNAP] = 0xbc,
+ [UARTDM_TFWR] = 0x1c,
+ [UARTDM_RFWR] = 0x20,
+ [UARTDM_RF] = 0x140,
+ [UARTDM_TF] = 0x100,
+ [UARTDM_MISR] = 0xac,
+ [UARTDM_DMRX] = 0x34,
+ [UARTDM_NCF_TX] = 0x40,
+ [UARTDM_DMEN] = 0x3c,
+ },
+};
+
+static struct of_device_id msm_hsl_match_table[] = {
+ { .compatible = "qcom,msm-lsuart-v14",
+ .data = (void *)UARTDM_VERSION_14
+ },
+ {}
+};
static struct dentry *debug_base;
static inline void wait_for_xmitr(struct uart_port *port, int bits);
static inline void msm_hsl_write(struct uart_port *port,
@@ -109,6 +164,7 @@
{
struct msm_hsl_port *msm_hsl_port = data;
struct uart_port *port = &(msm_hsl_port->uart);
+ unsigned int vid;
unsigned long flags;
int ret = 0;
@@ -120,17 +176,18 @@
return -EINVAL;
}
+ vid = msm_hsl_port->ver_id;
if (val) {
spin_lock_irqsave(&port->lock, flags);
- ret = msm_hsl_read(port, UARTDM_MR2_ADDR);
+ ret = msm_hsl_read(port, regmap[vid][UARTDM_MR2]);
ret |= UARTDM_MR2_LOOP_MODE_BMSK;
- msm_hsl_write(port, ret, UARTDM_MR2_ADDR);
+ msm_hsl_write(port, ret, regmap[vid][UARTDM_MR2]);
spin_unlock_irqrestore(&port->lock, flags);
} else {
spin_lock_irqsave(&port->lock, flags);
- ret = msm_hsl_read(port, UARTDM_MR2_ADDR);
+ ret = msm_hsl_read(port, regmap[vid][UARTDM_MR2]);
ret &= ~UARTDM_MR2_LOOP_MODE_BMSK;
- msm_hsl_write(port, ret, UARTDM_MR2_ADDR);
+ msm_hsl_write(port, ret, regmap[vid][UARTDM_MR2]);
spin_unlock_irqrestore(&port->lock, flags);
}
@@ -153,7 +210,7 @@
}
spin_lock_irqsave(&port->lock, flags);
- ret = msm_hsl_read(port, UARTDM_MR2_ADDR);
+ ret = msm_hsl_read(port, regmap[msm_hsl_port->ver_id][UARTDM_MR2]);
spin_unlock_irqrestore(&port->lock, flags);
clk_en(port, 0);
@@ -191,7 +248,8 @@
clk_en(port, 1);
msm_hsl_port->imr &= ~UARTDM_ISR_TXLEV_BMSK;
- msm_hsl_write(port, msm_hsl_port->imr, UARTDM_IMR_ADDR);
+ msm_hsl_write(port, msm_hsl_port->imr,
+ regmap[msm_hsl_port->ver_id][UARTDM_IMR]);
clk_en(port, 0);
}
@@ -203,7 +261,8 @@
clk_en(port, 1);
msm_hsl_port->imr |= UARTDM_ISR_TXLEV_BMSK;
- msm_hsl_write(port, msm_hsl_port->imr, UARTDM_IMR_ADDR);
+ msm_hsl_write(port, msm_hsl_port->imr,
+ regmap[msm_hsl_port->ver_id][UARTDM_IMR]);
clk_en(port, 0);
}
@@ -216,7 +275,8 @@
msm_hsl_port->imr &= ~(UARTDM_ISR_RXLEV_BMSK |
UARTDM_ISR_RXSTALE_BMSK);
- msm_hsl_write(port, msm_hsl_port->imr, UARTDM_IMR_ADDR);
+ msm_hsl_write(port, msm_hsl_port->imr,
+ regmap[msm_hsl_port->ver_id][UARTDM_IMR]);
clk_en(port, 0);
}
@@ -228,7 +288,8 @@
clk_en(port, 1);
msm_hsl_port->imr |= UARTDM_ISR_DELTA_CTS_BMSK;
- msm_hsl_write(port, msm_hsl_port->imr, UARTDM_IMR_ADDR);
+ msm_hsl_write(port, msm_hsl_port->imr,
+ regmap[msm_hsl_port->ver_id][UARTDM_IMR]);
clk_en(port, 0);
}
@@ -236,26 +297,31 @@
static void handle_rx(struct uart_port *port, unsigned int misr)
{
struct tty_struct *tty = port->state->port.tty;
+ unsigned int vid;
unsigned int sr;
int count = 0;
struct msm_hsl_port *msm_hsl_port = UART_TO_MSM(port);
+ vid = msm_hsl_port->ver_id;
/*
* Handle overrun. My understanding of the hardware is that overrun
* is not tied to the RX buffer, so we handle the case out of band.
*/
- if ((msm_hsl_read(port, UARTDM_SR_ADDR) & UARTDM_SR_OVERRUN_BMSK)) {
+ if ((msm_hsl_read(port, regmap[vid][UARTDM_SR]) &
+ UARTDM_SR_OVERRUN_BMSK)) {
port->icount.overrun++;
tty_insert_flip_char(tty, 0, TTY_OVERRUN);
- msm_hsl_write(port, RESET_ERROR_STATUS, UARTDM_CR_ADDR);
+ msm_hsl_write(port, RESET_ERROR_STATUS,
+ regmap[vid][UARTDM_CR]);
}
if (misr & UARTDM_ISR_RXSTALE_BMSK) {
- count = msm_hsl_read(port, UARTDM_RX_TOTAL_SNAP_ADDR) -
+ count = msm_hsl_read(port,
+ regmap[vid][UARTDM_RX_TOTAL_SNAP]) -
msm_hsl_port->old_snap_state;
msm_hsl_port->old_snap_state = 0;
} else {
- count = 4 * (msm_hsl_read(port, UARTDM_RFWR_ADDR));
+ count = 4 * (msm_hsl_read(port, regmap[vid][UARTDM_RFWR]));
msm_hsl_port->old_snap_state += count;
}
@@ -264,13 +330,12 @@
unsigned int c;
char flag = TTY_NORMAL;
- sr = msm_hsl_read(port, UARTDM_SR_ADDR);
- if ((sr &
- UARTDM_SR_RXRDY_BMSK) == 0) {
+ sr = msm_hsl_read(port, regmap[vid][UARTDM_SR]);
+ if ((sr & UARTDM_SR_RXRDY_BMSK) == 0) {
msm_hsl_port->old_snap_state -= count;
break;
}
- c = msm_hsl_read(port, UARTDM_RF_ADDR);
+ c = msm_hsl_read(port, regmap[vid][UARTDM_RF]);
if (sr & UARTDM_SR_RX_BREAK_BMSK) {
port->icount.brk++;
if (uart_handle_break(port))
@@ -305,7 +370,9 @@
int tx_count;
int x;
unsigned int tf_pointer = 0;
+ unsigned int vid;
+ vid = UART_TO_MSM(port)->ver_id;
tx_count = uart_circ_chars_pending(xmit);
if (tx_count > (UART_XMIT_SIZE - xmit->tail))
@@ -316,13 +383,14 @@
/* Handle x_char */
if (port->x_char) {
wait_for_xmitr(port, UARTDM_ISR_TX_READY_BMSK);
- msm_hsl_write(port, tx_count + 1, UARTDM_NCF_TX_ADDR);
- msm_hsl_write(port, port->x_char, UARTDM_TF_ADDR);
+ msm_hsl_write(port, tx_count + 1,
+ regmap[vid][UARTDM_NCF_TX]);
+ msm_hsl_write(port, port->x_char, regmap[vid][UARTDM_TF]);
port->icount.tx++;
port->x_char = 0;
} else if (tx_count) {
wait_for_xmitr(port, UARTDM_ISR_TX_READY_BMSK);
- msm_hsl_write(port, tx_count, UARTDM_NCF_TX_ADDR);
+ msm_hsl_write(port, tx_count, regmap[vid][UARTDM_NCF_TX]);
}
if (!tx_count) {
msm_hsl_stop_tx(port);
@@ -330,7 +398,7 @@
}
while (tf_pointer < tx_count) {
- if (unlikely(!(msm_hsl_read(port, UARTDM_SR_ADDR) &
+ if (unlikely(!(msm_hsl_read(port, regmap[vid][UARTDM_SR]) &
UARTDM_SR_TXRDY_BMSK)))
continue;
switch (tx_count - tf_pointer) {
@@ -358,7 +426,7 @@
break;
}
}
- msm_hsl_write(port, x, UARTDM_TF_ADDR);
+ msm_hsl_write(port, x, regmap[vid][UARTDM_TF]);
xmit->tail = ((tx_count - tf_pointer < 4) ?
(tx_count - tf_pointer + xmit->tail) :
(xmit->tail + 4)) & (UART_XMIT_SIZE - 1);
@@ -376,7 +444,9 @@
static void handle_delta_cts(struct uart_port *port)
{
- msm_hsl_write(port, RESET_CTS, UARTDM_CR_ADDR);
+ unsigned int vid = UART_TO_MSM(port)->ver_id;
+
+ msm_hsl_write(port, RESET_CTS, regmap[vid][UARTDM_CR]);
port->icount.cts++;
wake_up_interruptible(&port->state->port.delta_msr_wait);
}
@@ -385,20 +455,24 @@
{
struct uart_port *port = dev_id;
struct msm_hsl_port *msm_hsl_port = UART_TO_MSM(port);
+ unsigned int vid;
unsigned int misr;
unsigned long flags;
spin_lock_irqsave(&port->lock, flags);
clk_en(port, 1);
- misr = msm_hsl_read(port, UARTDM_MISR_ADDR);
- msm_hsl_write(port, 0, UARTDM_IMR_ADDR); /* disable interrupt */
+ vid = msm_hsl_port->ver_id;
+ misr = msm_hsl_read(port, regmap[vid][UARTDM_MISR]);
+ /* disable interrupt */
+ msm_hsl_write(port, 0, regmap[vid][UARTDM_IMR]);
if (misr & (UARTDM_ISR_RXSTALE_BMSK | UARTDM_ISR_RXLEV_BMSK)) {
handle_rx(port, misr);
if (misr & (UARTDM_ISR_RXSTALE_BMSK))
- msm_hsl_write(port, RESET_STALE_INT, UARTDM_CR_ADDR);
- msm_hsl_write(port, 6500, UARTDM_DMRX_ADDR);
- msm_hsl_write(port, STALE_EVENT_ENABLE, UARTDM_CR_ADDR);
+ msm_hsl_write(port, RESET_STALE_INT,
+ regmap[vid][UARTDM_CR]);
+ msm_hsl_write(port, 6500, regmap[vid][UARTDM_DMRX]);
+ msm_hsl_write(port, STALE_EVENT_ENABLE, regmap[vid][UARTDM_CR]);
}
if (misr & UARTDM_ISR_TXLEV_BMSK)
handle_tx(port);
@@ -407,7 +481,7 @@
handle_delta_cts(port);
/* restore interrupt */
- msm_hsl_write(port, msm_hsl_port->imr, UARTDM_IMR_ADDR);
+ msm_hsl_write(port, msm_hsl_port->imr, regmap[vid][UARTDM_IMR]);
clk_en(port, 0);
spin_unlock_irqrestore(&port->lock, flags);
@@ -416,10 +490,11 @@
static unsigned int msm_hsl_tx_empty(struct uart_port *port)
{
+ unsigned int vid = UART_TO_MSM(port)->ver_id;
unsigned int ret;
clk_en(port, 1);
- ret = (msm_hsl_read(port, UARTDM_SR_ADDR) &
+ ret = (msm_hsl_read(port, regmap[vid][UARTDM_SR]) &
UARTDM_SR_TXEMT_BMSK) ? TIOCSER_TEMT : 0;
clk_en(port, 0);
@@ -428,13 +503,15 @@
static void msm_hsl_reset(struct uart_port *port)
{
+ unsigned int vid = UART_TO_MSM(port)->ver_id;
+
/* reset everything */
- msm_hsl_write(port, RESET_RX, UARTDM_CR_ADDR);
- msm_hsl_write(port, RESET_TX, UARTDM_CR_ADDR);
- msm_hsl_write(port, RESET_ERROR_STATUS, UARTDM_CR_ADDR);
- msm_hsl_write(port, RESET_BREAK_INT, UARTDM_CR_ADDR);
- msm_hsl_write(port, RESET_CTS, UARTDM_CR_ADDR);
- msm_hsl_write(port, RFR_LOW, UARTDM_CR_ADDR);
+ msm_hsl_write(port, RESET_RX, regmap[vid][UARTDM_CR]);
+ msm_hsl_write(port, RESET_TX, regmap[vid][UARTDM_CR]);
+ msm_hsl_write(port, RESET_ERROR_STATUS, regmap[vid][UARTDM_CR]);
+ msm_hsl_write(port, RESET_BREAK_INT, regmap[vid][UARTDM_CR]);
+ msm_hsl_write(port, RESET_CTS, regmap[vid][UARTDM_CR]);
+ msm_hsl_write(port, RFR_LOW, regmap[vid][UARTDM_CR]);
}
static unsigned int msm_hsl_get_mctrl(struct uart_port *port)
@@ -444,34 +521,35 @@
static void msm_hsl_set_mctrl(struct uart_port *port, unsigned int mctrl)
{
+ unsigned int vid = UART_TO_MSM(port)->ver_id;
unsigned int mr;
unsigned int loop_mode;
clk_en(port, 1);
- mr = msm_hsl_read(port, UARTDM_MR1_ADDR);
+ mr = msm_hsl_read(port, regmap[vid][UARTDM_MR1]);
if (!(mctrl & TIOCM_RTS)) {
mr &= ~UARTDM_MR1_RX_RDY_CTL_BMSK;
- msm_hsl_write(port, mr, UARTDM_MR1_ADDR);
- msm_hsl_write(port, RFR_HIGH, UARTDM_CR_ADDR);
+ msm_hsl_write(port, mr, regmap[vid][UARTDM_MR1]);
+ msm_hsl_write(port, RFR_HIGH, regmap[vid][UARTDM_CR]);
} else {
mr |= UARTDM_MR1_RX_RDY_CTL_BMSK;
- msm_hsl_write(port, mr, UARTDM_MR1_ADDR);
+ msm_hsl_write(port, mr, regmap[vid][UARTDM_MR1]);
}
loop_mode = TIOCM_LOOP & mctrl;
if (loop_mode) {
- mr = msm_hsl_read(port, UARTDM_MR2_ADDR);
+ mr = msm_hsl_read(port, regmap[vid][UARTDM_MR2]);
mr |= UARTDM_MR2_LOOP_MODE_BMSK;
- msm_hsl_write(port, mr, UARTDM_MR2_ADDR);
+ msm_hsl_write(port, mr, regmap[vid][UARTDM_MR2]);
/* Reset TX */
msm_hsl_reset(port);
/* Turn on Uart Receiver & Transmitter*/
msm_hsl_write(port, UARTDM_CR_RX_EN_BMSK
- | UARTDM_CR_TX_EN_BMSK, UARTDM_CR_ADDR);
+ | UARTDM_CR_TX_EN_BMSK, regmap[vid][UARTDM_CR]);
}
clk_en(port, 0);
@@ -479,12 +557,14 @@
static void msm_hsl_break_ctl(struct uart_port *port, int break_ctl)
{
+ unsigned int vid = UART_TO_MSM(port)->ver_id;
+
clk_en(port, 1);
if (break_ctl)
- msm_hsl_write(port, START_BREAK, UARTDM_CR_ADDR);
+ msm_hsl_write(port, START_BREAK, regmap[vid][UARTDM_CR]);
else
- msm_hsl_write(port, STOP_BREAK, UARTDM_CR_ADDR);
+ msm_hsl_write(port, STOP_BREAK, regmap[vid][UARTDM_CR]);
clk_en(port, 0);
}
@@ -493,6 +573,7 @@
{
unsigned int baud_code, rxstale, watermark;
unsigned int data;
+ unsigned int vid;
struct msm_hsl_port *msm_hsl_port = UART_TO_MSM(port);
switch (baud) {
@@ -558,12 +639,16 @@
break;
}
- msm_hsl_write(port, baud_code, UARTDM_CSR_ADDR);
+ vid = msm_hsl_port->ver_id;
+ msm_hsl_write(port, baud_code, regmap[vid][UARTDM_CSR]);
+
+ if (vid == UARTDM_VERSION_14)
+ rxstale = 5000;
/* RX stale watermark */
watermark = UARTDM_IPR_STALE_LSB_BMSK & rxstale;
watermark |= UARTDM_IPR_STALE_TIMEOUT_MSB_BMSK & (rxstale << 2);
- msm_hsl_write(port, watermark, UARTDM_IPR_ADDR);
+ msm_hsl_write(port, watermark, regmap[vid][UARTDM_IPR]);
/* Set RX watermark
* Configure Rx Watermark as 3/4 size of Rx FIFO.
@@ -572,26 +657,26 @@
* Hence configuring Rx Watermark as 12 Words.
*/
watermark = (port->fifosize * 3) / (4*4);
- msm_hsl_write(port, watermark, UARTDM_RFWR_ADDR);
+ msm_hsl_write(port, watermark, regmap[vid][UARTDM_RFWR]);
/* set TX watermark */
- msm_hsl_write(port, 0, UARTDM_TFWR_ADDR);
+ msm_hsl_write(port, 0, regmap[vid][UARTDM_TFWR]);
- msm_hsl_write(port, CR_PROTECTION_EN, UARTDM_CR_ADDR);
+ msm_hsl_write(port, CR_PROTECTION_EN, regmap[vid][UARTDM_CR]);
msm_hsl_reset(port);
data = UARTDM_CR_TX_EN_BMSK;
data |= UARTDM_CR_RX_EN_BMSK;
/* enable TX & RX */
- msm_hsl_write(port, data, UARTDM_CR_ADDR);
+ msm_hsl_write(port, data, regmap[vid][UARTDM_CR]);
msm_hsl_write(port, RESET_STALE_INT, UARTDM_CR_ADDR);
/* turn on RX and CTS interrupts */
msm_hsl_port->imr = UARTDM_ISR_RXSTALE_BMSK
| UARTDM_ISR_DELTA_CTS_BMSK | UARTDM_ISR_RXLEV_BMSK;
- msm_hsl_write(port, msm_hsl_port->imr, UARTDM_IMR_ADDR);
- msm_hsl_write(port, 6500, UARTDM_DMRX_ADDR);
- msm_hsl_write(port, STALE_EVENT_ENABLE, UARTDM_CR_ADDR);
+ msm_hsl_write(port, msm_hsl_port->imr, regmap[vid][UARTDM_IMR]);
+ msm_hsl_write(port, 6500, regmap[vid][UARTDM_DMRX]);
+ msm_hsl_write(port, STALE_EVENT_ENABLE, regmap[vid][UARTDM_CR]);
}
static void msm_hsl_init_clock(struct uart_port *port)
@@ -611,6 +696,7 @@
const struct msm_serial_hslite_platform_data *pdata =
pdev->dev.platform_data;
unsigned int data, rfr_level;
+ unsigned int vid;
int ret;
unsigned long flags;
@@ -665,13 +751,14 @@
spin_lock_irqsave(&port->lock, flags);
+ vid = msm_hsl_port->ver_id;
/* set automatic RFR level */
- data = msm_hsl_read(port, UARTDM_MR1_ADDR);
+ data = msm_hsl_read(port, regmap[vid][UARTDM_MR1]);
data &= ~UARTDM_MR1_AUTO_RFR_LEVEL1_BMSK;
data &= ~UARTDM_MR1_AUTO_RFR_LEVEL0_BMSK;
data |= UARTDM_MR1_AUTO_RFR_LEVEL1_BMSK & (rfr_level << 2);
data |= UARTDM_MR1_AUTO_RFR_LEVEL0_BMSK & rfr_level;
- msm_hsl_write(port, data, UARTDM_MR1_ADDR);
+ msm_hsl_write(port, data, regmap[vid][UARTDM_MR1]);
spin_unlock_irqrestore(&port->lock, flags);
ret = request_irq(port->irq, msm_hsl_irq, IRQF_TRIGGER_HIGH,
@@ -693,7 +780,8 @@
clk_en(port, 1);
msm_hsl_port->imr = 0;
- msm_hsl_write(port, 0, UARTDM_IMR_ADDR); /* disable interrupts */
+ /* disable interrupts */
+ msm_hsl_write(port, 0, regmap[msm_hsl_port->ver_id][UARTDM_IMR]);
clk_en(port, 0);
@@ -718,6 +806,7 @@
{
unsigned long flags;
unsigned int baud, mr;
+ unsigned int vid;
spin_lock_irqsave(&port->lock, flags);
clk_en(port, 1);
@@ -727,8 +816,9 @@
msm_hsl_set_baud_rate(port, baud);
+ vid = UART_TO_MSM(port)->ver_id;
/* calculate parity */
- mr = msm_hsl_read(port, UARTDM_MR2_ADDR);
+ mr = msm_hsl_read(port, regmap[vid][UARTDM_MR2]);
mr &= ~UARTDM_MR2_PARITY_MODE_BMSK;
if (termios->c_cflag & PARENB) {
if (termios->c_cflag & PARODD)
@@ -765,16 +855,16 @@
mr |= STOP_BIT_ONE;
/* set parity, bits per char, and stop bit */
- msm_hsl_write(port, mr, UARTDM_MR2_ADDR);
+ msm_hsl_write(port, mr, regmap[vid][UARTDM_MR2]);
/* calculate and set hardware flow control */
- mr = msm_hsl_read(port, UARTDM_MR1_ADDR);
+ mr = msm_hsl_read(port, regmap[vid][UARTDM_MR1]);
mr &= ~(UARTDM_MR1_CTS_CTL_BMSK | UARTDM_MR1_RX_RDY_CTL_BMSK);
if (termios->c_cflag & CRTSCTS) {
mr |= UARTDM_MR1_CTS_CTL_BMSK;
mr |= UARTDM_MR1_RX_RDY_CTL_BMSK;
}
- msm_hsl_write(port, mr, UARTDM_MR1_ADDR);
+ msm_hsl_write(port, mr, regmap[vid][UARTDM_MR1]);
/* Configure status bits to ignore based on termio flags. */
port->read_status_mask = 0;
@@ -799,11 +889,12 @@
struct msm_hsl_port *msm_hsl_port = UART_TO_MSM(port);
struct platform_device *pdev = to_platform_device(port->dev);
struct resource *uart_resource;
- struct resource *gsbi_resource;
resource_size_t size;
uart_resource = platform_get_resource_byname(pdev, IORESOURCE_MEM,
"uartdm_resource");
+ if (!uart_resource)
+ uart_resource = platform_get_resource(pdev, IORESOURCE_MEM, 0);
if (unlikely(!uart_resource))
return;
size = uart_resource->end - uart_resource->start + 1;
@@ -815,11 +906,6 @@
if (msm_serial_hsl_has_gsbi(port)) {
iowrite32(GSBI_PROTOCOL_IDLE, msm_hsl_port->mapped_gsbi +
GSBI_CONTROL_ADDR);
- gsbi_resource = platform_get_resource_byname(pdev,
- IORESOURCE_MEM,
- "gsbi_resource");
-
- size = gsbi_resource->end - gsbi_resource->start + 1;
iounmap(msm_hsl_port->mapped_gsbi);
msm_hsl_port->mapped_gsbi = NULL;
}
@@ -835,6 +921,8 @@
uart_resource = platform_get_resource_byname(pdev, IORESOURCE_MEM,
"uartdm_resource");
+ if (!uart_resource)
+ uart_resource = platform_get_resource(pdev, IORESOURCE_MEM, 0);
if (unlikely(!uart_resource)) {
pr_err("%s: can't get uartdm resource\n", __func__);
return -ENXIO;
@@ -857,6 +945,9 @@
gsbi_resource = platform_get_resource_byname(pdev,
IORESOURCE_MEM,
"gsbi_resource");
+ if (!gsbi_resource)
+ gsbi_resource = platform_get_resource(pdev,
+ IORESOURCE_MEM, 1);
if (unlikely(!gsbi_resource)) {
pr_err("%s: can't get gsbi resource\n", __func__);
return -ENXIO;
@@ -988,28 +1079,35 @@
* Derived from wait_for_xmitr in 8250 serial driver by Russell King */
void wait_for_xmitr(struct uart_port *port, int bits)
{
- if (!(msm_hsl_read(port, UARTDM_SR_ADDR) & UARTDM_SR_TXEMT_BMSK)) {
- while ((msm_hsl_read(port, UARTDM_ISR_ADDR) & bits) != bits) {
+ unsigned int vid = UART_TO_MSM(port)->ver_id;
+
+ if (!(msm_hsl_read(port, regmap[vid][UARTDM_SR]) &
+ UARTDM_SR_TXEMT_BMSK)) {
+ while ((msm_hsl_read(port, regmap[vid][UARTDM_ISR]) &
+ bits) != bits) {
udelay(1);
touch_nmi_watchdog();
cpu_relax();
}
- msm_hsl_write(port, CLEAR_TX_READY, UARTDM_CR_ADDR);
+ msm_hsl_write(port, CLEAR_TX_READY, regmap[vid][UARTDM_CR]);
}
}
#ifdef CONFIG_SERIAL_MSM_HSL_CONSOLE
static void msm_hsl_console_putchar(struct uart_port *port, int ch)
{
- wait_for_xmitr(port, UARTDM_ISR_TX_READY_BMSK);
- msm_hsl_write(port, 1, UARTDM_NCF_TX_ADDR);
+ unsigned int vid = UART_TO_MSM(port)->ver_id;
- while (!(msm_hsl_read(port, UARTDM_SR_ADDR) & UARTDM_SR_TXRDY_BMSK)) {
+ wait_for_xmitr(port, UARTDM_ISR_TX_READY_BMSK);
+ msm_hsl_write(port, 1, regmap[vid][UARTDM_NCF_TX]);
+
+ while (!(msm_hsl_read(port, regmap[vid][UARTDM_SR]) &
+ UARTDM_SR_TXRDY_BMSK)) {
udelay(1);
touch_nmi_watchdog();
}
- msm_hsl_write(port, ch, UARTDM_TF_ADDR);
+ msm_hsl_write(port, ch, regmap[vid][UARTDM_TF]);
}
static void msm_hsl_console_write(struct console *co, const char *s,
@@ -1017,12 +1115,14 @@
{
struct uart_port *port;
struct msm_hsl_port *msm_hsl_port;
+ unsigned int vid;
int locked;
BUG_ON(co->index < 0 || co->index >= UART_NR);
port = get_port_from_line(co->index);
msm_hsl_port = UART_TO_MSM(port);
+ vid = msm_hsl_port->ver_id;
/* not pretty, but we can end up here via various convoluted paths */
if (port->sysrq || oops_in_progress)
@@ -1031,9 +1131,9 @@
locked = 1;
spin_lock(&port->lock);
}
- msm_hsl_write(port, 0, UARTDM_IMR_ADDR);
+ msm_hsl_write(port, 0, regmap[vid][UARTDM_IMR]);
uart_console_write(port, s, count, msm_hsl_console_putchar);
- msm_hsl_write(port, msm_hsl_port->imr, UARTDM_IMR_ADDR);
+ msm_hsl_write(port, msm_hsl_port->imr, regmap[vid][UARTDM_IMR]);
if (locked == 1)
spin_unlock(&port->lock);
}
@@ -1041,6 +1141,7 @@
static int __init msm_hsl_console_setup(struct console *co, char *options)
{
struct uart_port *port;
+ unsigned int vid;
int baud = 0, flow, bits, parity;
int ret;
@@ -1048,6 +1149,7 @@
return -ENXIO;
port = get_port_from_line(co->index);
+ vid = UART_TO_MSM(port)->ver_id;
if (unlikely(!port->membase))
return -ENXIO;
@@ -1068,7 +1170,7 @@
parity = 'n';
flow = 'n';
msm_hsl_write(port, UARTDM_MR2_BITS_PER_CHAR_8 | STOP_BIT_ONE,
- UARTDM_MR2_ADDR); /* 8N1 */
+ regmap[vid][UARTDM_MR2]); /* 8N1 */
if (baud < 300 || baud > 115200)
baud = 115200;
@@ -1077,8 +1179,8 @@
ret = uart_set_options(port, co, baud, parity, bits, flow);
msm_hsl_reset(port);
/* Enable transmitter */
- msm_hsl_write(port, CR_PROTECTION_EN, UARTDM_CR_ADDR);
- msm_hsl_write(port, UARTDM_CR_TX_EN_BMSK, UARTDM_CR_ADDR);
+ msm_hsl_write(port, CR_PROTECTION_EN, regmap[vid][UARTDM_CR]);
+ msm_hsl_write(port, UARTDM_CR_TX_EN_BMSK, regmap[vid][UARTDM_CR]);
printk(KERN_INFO "msm_serial_hsl: console setup on port #%d\n",
port->line);
@@ -1112,14 +1214,20 @@
.cons = MSM_HSL_CONSOLE,
};
+static atomic_t msm_serial_hsl_next_id = ATOMIC_INIT(0);
+
static int __devinit msm_serial_hsl_probe(struct platform_device *pdev)
{
struct msm_hsl_port *msm_hsl_port;
struct resource *uart_resource;
struct resource *gsbi_resource;
struct uart_port *port;
+ const struct of_device_id *match;
int ret;
+ if (pdev->id == -1)
+ pdev->id = atomic_inc_return(&msm_serial_hsl_next_id) - 1;
+
if (unlikely(pdev->id < 0 || pdev->id >= UART_NR))
return -ENXIO;
@@ -1129,9 +1237,17 @@
port->dev = &pdev->dev;
msm_hsl_port = UART_TO_MSM(port);
+ match = of_match_device(msm_hsl_match_table, &pdev->dev);
+ if (!match)
+ msm_hsl_port->ver_id = UARTDM_VERSION_11_13;
+ else
+ msm_hsl_port->ver_id = (unsigned int)match->data;
+
gsbi_resource = platform_get_resource_byname(pdev,
IORESOURCE_MEM,
"gsbi_resource");
+ if (!gsbi_resource)
+ gsbi_resource = platform_get_resource(pdev, IORESOURCE_MEM, 1);
msm_hsl_port->clk = clk_get(&pdev->dev, "core_clk");
if (gsbi_resource) {
msm_hsl_port->is_uartdm = 1;
@@ -1150,10 +1266,11 @@
return PTR_ERR(msm_hsl_port->pclk);
}
-
uart_resource = platform_get_resource_byname(pdev,
IORESOURCE_MEM,
"uartdm_resource");
+ if (!uart_resource)
+ uart_resource = platform_get_resource(pdev, IORESOURCE_MEM, 0);
if (unlikely(!uart_resource)) {
printk(KERN_ERR "getting uartdm_resource failed\n");
return -ENXIO;
@@ -1281,6 +1398,7 @@
.name = "msm_serial_hsl",
.owner = THIS_MODULE,
.pm = &msm_hsl_dev_pm_ops,
+ .of_match_table = msm_hsl_match_table,
},
};
diff --git a/drivers/usb/gadget/android.c b/drivers/usb/gadget/android.c
index 8d58833..fdd0ba8 100644
--- a/drivers/usb/gadget/android.c
+++ b/drivers/usb/gadget/android.c
@@ -817,6 +817,7 @@
&common->luns[0].dev.kobj,
"lun");
if (err) {
+ fsg_common_release(&common->ref);
kfree(config);
return err;
}
diff --git a/drivers/usb/gadget/f_rmnet_sdio.c b/drivers/usb/gadget/f_rmnet_sdio.c
index b15c221..f63d939 100644
--- a/drivers/usb/gadget/f_rmnet_sdio.c
+++ b/drivers/usb/gadget/f_rmnet_sdio.c
@@ -1358,17 +1358,20 @@
struct rmnet_sdio_dev *dev = container_of(f, struct rmnet_sdio_dev,
function);
+ cancel_delayed_work_sync(&dev->sdio_open_work);
destroy_workqueue(dev->wq);
- rmnet_sdio_free_buf(dev);
dev->epout = dev->epin = dev->epnotify = NULL; /* release endpoints */
- msm_sdio_dmux_close(rmnet_sdio_data_ch);
- sdio_cmux_close(rmnet_sdio_ctl_ch);
+ if (test_bit(RMNET_SDIO_CH_OPEN, &dev->data_ch_status)) {
+ msm_sdio_dmux_close(rmnet_sdio_data_ch);
+ clear_bit(RMNET_SDIO_CH_OPEN, &dev->data_ch_status);
+ }
-
- clear_bit(RMNET_SDIO_CH_OPEN, &dev->data_ch_status);
- clear_bit(RMNET_SDIO_CH_OPEN, &dev->ctrl_ch_status);
+ if (test_bit(RMNET_SDIO_CH_OPEN, &dev->ctrl_ch_status)) {
+ sdio_cmux_close(rmnet_sdio_ctl_ch);
+ clear_bit(RMNET_SDIO_CH_OPEN, &dev->ctrl_ch_status);
+ }
debugfs_remove_recursive(dev->dent);
@@ -1454,7 +1457,7 @@
static void rmnet_sdio_debugfs_init(struct rmnet_sdio_dev *dev)
{
- dev->dent = debugfs_create_dir("usb_rmnet", 0);
+ dev->dent = debugfs_create_dir("usb_rmnet_sdio", 0);
if (IS_ERR(dev->dent))
return;
diff --git a/drivers/usb/gadget/f_rmnet_smd.c b/drivers/usb/gadget/f_rmnet_smd.c
index b8dd3a5..f59b683 100644
--- a/drivers/usb/gadget/f_rmnet_smd.c
+++ b/drivers/usb/gadget/f_rmnet_smd.c
@@ -42,6 +42,11 @@
#include "gadget_chips.h"
+#ifndef CONFIG_MSM_SMD
+#define CONFIG_RMNET_SMD_CTL_CHANNEL ""
+#define CONFIG_RMNET_SMD_DATA_CHANNEL ""
+#endif
+
static char *rmnet_ctl_ch = CONFIG_RMNET_SMD_CTL_CHANNEL;
module_param(rmnet_ctl_ch, charp, S_IRUGO);
MODULE_PARM_DESC(rmnet_ctl_ch, "RmNet control SMD channel");
@@ -1218,7 +1223,7 @@
static void rmnet_smd_debugfs_init(struct rmnet_smd_dev *dev)
{
- dent_smd = debugfs_create_dir("usb_rmnet", 0);
+ dent_smd = debugfs_create_dir("usb_rmnet_smd", 0);
if (IS_ERR(dent_smd))
return;
diff --git a/drivers/usb/gadget/f_rmnet_smd_sdio.c b/drivers/usb/gadget/f_rmnet_smd_sdio.c
index eda547a..2ddbd7c 100644
--- a/drivers/usb/gadget/f_rmnet_smd_sdio.c
+++ b/drivers/usb/gadget/f_rmnet_smd_sdio.c
@@ -1071,7 +1071,7 @@
spin_lock(&dev->lock);
if (!ctrl_dev->opened) {
spin_unlock(&dev->lock);
- kfree(cpkt);
+ rmnet_mux_free_ctrl_pkt(cpkt);
dev->cpkts_drp_cnt++;
pr_err_ratelimited(
"%s: ctrl pkts dropped: cpkts_drp_cnt: %lu\n",
diff --git a/drivers/usb/gadget/u_sdio.c b/drivers/usb/gadget/u_sdio.c
index fd01dbf..6ba7543 100644
--- a/drivers/usb/gadget/u_sdio.c
+++ b/drivers/usb/gadget/u_sdio.c
@@ -1107,7 +1107,6 @@
struct usb_cdc_line_coding coding;
int i;
int ret = 0;
- struct sdio_port_info *port_info;
pr_debug("%s: gadget:(%p) count:%d\n", __func__, g, count);
@@ -1139,7 +1138,6 @@
__func__);
goto free_sdio_ports;
}
- port_info++;
#ifdef DEBUG
/* REVISIT: create one file per port
diff --git a/drivers/usb/host/ehci-msm-hsic.c b/drivers/usb/host/ehci-msm-hsic.c
index 1b8b5d6..093a170 100644
--- a/drivers/usb/host/ehci-msm-hsic.c
+++ b/drivers/usb/host/ehci-msm-hsic.c
@@ -34,6 +34,7 @@
#include <linux/gpio.h>
#include <mach/clk.h>
#include <mach/msm_iomap.h>
+#include <mach/msm_xo.h>
#define MSM_USB_BASE (hcd->regs)
@@ -48,6 +49,7 @@
struct regulator *hsic_vddcx;
bool async_int;
atomic_t in_lpm;
+ struct msm_xo_voter *xo_handle;
struct wake_lock wlock;
};
@@ -145,6 +147,81 @@
return 0;
}
+#define HSIC_HUB_VDD_VOL_MIN 1650000 /* uV */
+#define HSIC_HUB_VDD_VOL_MAX 1950000 /* uV */
+#define HSIC_HUB_VDD_LOAD 36000 /* uA */
+static int msm_hsic_config_hub(struct msm_hsic_hcd *mehci, int init)
+{
+ int ret = 0;
+ struct msm_hsic_host_platform_data *pdata;
+ static struct regulator *hsic_hub_reg;
+
+ pdata = mehci->dev->platform_data;
+ if (!pdata->hub_reset)
+ return ret;
+
+ if (!init)
+ goto disable_reg;
+
+ hsic_hub_reg = regulator_get(mehci->dev, "EXT_HUB_VDDIO");
+ if (IS_ERR(hsic_hub_reg)) {
+ dev_err(mehci->dev, "unable to get ext hub vddcx\n");
+ return PTR_ERR(hsic_hub_reg);
+ }
+
+ ret = gpio_request(pdata->hub_reset, "HSIC_HUB_RESET_GPIO");
+ if (ret < 0) {
+ dev_err(mehci->dev, "gpio request failed for GPIO%d\n",
+ pdata->hub_reset);
+ goto gpio_req_fail;
+ }
+
+ ret = regulator_set_voltage(hsic_hub_reg,
+ HSIC_HUB_VDD_VOL_MIN,
+ HSIC_HUB_VDD_VOL_MAX);
+ if (ret) {
+ dev_err(mehci->dev, "unable to set the voltage"
+ "for hsic hub reg\n");
+ goto reg_set_voltage_fail;
+ }
+
+ ret = regulator_set_optimum_mode(hsic_hub_reg,
+ HSIC_HUB_VDD_LOAD);
+ if (ret < 0) {
+ pr_err("%s: Unable to set optimum mode of the regulator:"
+ "VDDCX\n", __func__);
+ goto reg_optimum_mode_fail;
+ }
+
+ ret = regulator_enable(hsic_hub_reg);
+ if (ret) {
+ dev_err(mehci->dev, "unable to enable ext hub vddcx\n");
+ goto reg_enable_fail;
+ }
+
+ gpio_direction_output(pdata->hub_reset, 0);
+ /* Hub reset should be asserted for minimum 2usec before deasserting */
+ udelay(5);
+ gpio_direction_output(pdata->hub_reset, 1);
+
+ return 0;
+
+disable_reg:
+ regulator_disable(hsic_hub_reg);
+reg_enable_fail:
+ regulator_set_optimum_mode(hsic_hub_reg, 0);
+reg_optimum_mode_fail:
+ regulator_set_voltage(hsic_hub_reg, 0,
+ HSIC_HUB_VDD_VOL_MIN);
+reg_set_voltage_fail:
+ gpio_free(pdata->hub_reset);
+gpio_req_fail:
+ regulator_put(hsic_hub_reg);
+
+ return ret;
+
+}
+
static int msm_hsic_config_gpios(struct msm_hsic_hcd *mehci, int gpio_en)
{
int rc = 0;
@@ -294,8 +371,9 @@
static int msm_hsic_suspend(struct msm_hsic_hcd *mehci)
{
struct usb_hcd *hcd = hsic_to_hcd(mehci);
- int cnt = 0;
+ int cnt = 0, ret;
u32 val;
+ struct msm_hsic_host_platform_data *pdata;
if (atomic_read(&mehci->in_lpm)) {
dev_dbg(mehci->dev, "%s called in lpm\n", __func__);
@@ -345,6 +423,13 @@
clk_disable(mehci->hsic_clk);
clk_disable(mehci->cal_clk);
clk_disable(mehci->ahb_clk);
+ pdata = mehci->dev->platform_data;
+ if (pdata->hub_reset) {
+ ret = msm_xo_mode_vote(mehci->xo_handle, MSM_XO_MODE_OFF);
+ if (ret)
+ pr_err("%s failed to devote for"
+ "TCXO D1 buffer%d\n", __func__, ret);
+ }
atomic_set(&mehci->in_lpm, 1);
enable_irq(hcd->irq);
@@ -358,8 +443,9 @@
static int msm_hsic_resume(struct msm_hsic_hcd *mehci)
{
struct usb_hcd *hcd = hsic_to_hcd(mehci);
- int cnt = 0;
+ int cnt = 0, ret;
unsigned temp;
+ struct msm_hsic_host_platform_data *pdata;
if (!atomic_read(&mehci->in_lpm)) {
dev_dbg(mehci->dev, "%s called in !in_lpm\n", __func__);
@@ -368,6 +454,13 @@
wake_lock(&mehci->wlock);
+ pdata = mehci->dev->platform_data;
+ if (pdata->hub_reset) {
+ ret = msm_xo_mode_vote(mehci->xo_handle, MSM_XO_MODE_ON);
+ if (ret)
+ pr_err("%s failed to vote for"
+ "TCXO D1 buffer%d\n", __func__, ret);
+ }
clk_enable(mehci->sys_clk);
clk_enable(mehci->hsic_clk);
clk_enable(mehci->cal_clk);
@@ -598,6 +691,7 @@
struct usb_hcd *hcd;
struct resource *res;
struct msm_hsic_hcd *mehci;
+ struct msm_hsic_host_platform_data *pdata;
int ret;
dev_dbg(&pdev->dev, "ehci_msm-hsic probe\n");
@@ -649,10 +743,34 @@
goto deinit_clocks;
}
+ pdata = mehci->dev->platform_data;
+ if (pdata->hub_reset) {
+ mehci->xo_handle = msm_xo_get(MSM_XO_TCXO_D1, "hsic");
+ if (IS_ERR(mehci->xo_handle)) {
+ pr_err(" %s not able to get the handle"
+ "to vote for TCXO D1 buffer\n", __func__);
+ ret = PTR_ERR(mehci->xo_handle);
+ goto deinit_vddcx;
+ }
+
+ ret = msm_xo_mode_vote(mehci->xo_handle, MSM_XO_MODE_ON);
+ if (ret) {
+ pr_err("%s failed to vote for TCXO"
+ "D1 buffer%d\n", __func__, ret);
+ goto free_xo_handle;
+ }
+ }
+
+ ret = msm_hsic_config_hub(mehci, 1);
+ if (ret) {
+ dev_err(&pdev->dev, "unable to initialize hsic hub");
+ goto free_xo_handle;
+ }
+
ret = msm_hsic_reset(mehci);
if (ret) {
dev_err(&pdev->dev, "unable to initialize PHY\n");
- goto deinit_vddcx;
+ goto deinit_hub;
}
ret = usb_add_hcd(hcd, hcd->irq, IRQF_SHARED);
@@ -676,6 +794,11 @@
unconfig_gpio:
msm_hsic_config_gpios(mehci, 0);
+deinit_hub:
+ msm_hsic_config_hub(mehci, 0);
+free_xo_handle:
+ if (pdata->hub_reset)
+ msm_xo_put(mehci->xo_handle);
deinit_vddcx:
msm_hsic_init_vddcx(mehci, 0);
deinit_clocks:
@@ -692,6 +815,7 @@
{
struct usb_hcd *hcd = platform_get_drvdata(pdev);
struct msm_hsic_hcd *mehci = hcd_to_hsic(hcd);
+ struct msm_hsic_host_platform_data *pdata;
device_init_wakeup(&pdev->dev, 0);
pm_runtime_disable(&pdev->dev);
@@ -699,6 +823,10 @@
usb_remove_hcd(hcd);
msm_hsic_config_gpios(mehci, 0);
+ msm_hsic_config_hub(mehci, 0);
+ pdata = mehci->dev->platform_data;
+ if (pdata->hub_reset)
+ msm_xo_put(mehci->xo_handle);
msm_hsic_init_vddcx(mehci, 0);
msm_hsic_init_clocks(mehci, 0);
diff --git a/drivers/usb/otg/msm72k_otg.c b/drivers/usb/otg/msm72k_otg.c
index 88d6b5b..84b8472 100644
--- a/drivers/usb/otg/msm72k_otg.c
+++ b/drivers/usb/otg/msm72k_otg.c
@@ -750,6 +750,16 @@
atomic_set(&dev->in_lpm, 1);
+ /*
+ * TODO: put regulators in low power mode by assuming that
+ * regulators are brought back to active state before PHY
+ * becomes active. But this assumption becomes wrong in case of
+ * ACA charger where PHY itself will generate the wakeup
+ * interrupt. This creates a small window where PHY regulators
+ * are in LPM but PHY is in active state and this patch assumes
+ * that there is no harm with this. Till hw folks confirms this
+ * put regulators in lpm.
+ */
if (!host_bus_suspend && dev->pmic_vbus_notif_supp) {
pr_debug("phy can power collapse: (%d)\n",
can_phy_power_collapse(dev));
@@ -849,6 +859,9 @@
struct msm_otg *dev = container_of(w, struct msm_otg, otg_resume_work);
unsigned long timeout;
+ if (can_phy_power_collapse(dev) && dev->pdata->ldo_enable)
+ dev->pdata->ldo_enable(1);
+
msm_otg_get_resume(dev);
if (!is_phy_clk_disabled())
diff --git a/drivers/usb/otg/msm_otg.c b/drivers/usb/otg/msm_otg.c
index 4658469..6c60cc9 100644
--- a/drivers/usb/otg/msm_otg.c
+++ b/drivers/usb/otg/msm_otg.c
@@ -215,12 +215,12 @@
{
int ret = 0;
- if (!hsusb_1p8 || IS_ERR(hsusb_1p8)) {
+ if (IS_ERR(hsusb_1p8)) {
pr_err("%s: HSUSB_1p8 is not initialized\n", __func__);
return -ENODEV;
}
- if (!hsusb_3p3 || IS_ERR(hsusb_3p3)) {
+ if (IS_ERR(hsusb_3p3)) {
pr_err("%s: HSUSB_3p3 is not initialized\n", __func__);
return -ENODEV;
}
diff --git a/drivers/video/msm/Kconfig b/drivers/video/msm/Kconfig
index 34b564f..f7bf993 100644
--- a/drivers/video/msm/Kconfig
+++ b/drivers/video/msm/Kconfig
@@ -301,6 +301,11 @@
---help---
Support for MDP4 OVERLAY write back mode
+config FB_MSM_WRITEBACK_MSM_PANEL
+ depends on FB_MSM_OVERLAY
+ bool "MDP overlay write back panel enable"
+ ---help---
+ Support for MDP4 OVERLAY write back mode
choice
prompt "LCD Panel"
default FB_MSM_MDDI_AUTO_DETECT
diff --git a/drivers/video/msm/Makefile b/drivers/video/msm/Makefile
index d6e8ced..f5a7c9e 100644
--- a/drivers/video/msm/Makefile
+++ b/drivers/video/msm/Makefile
@@ -149,6 +149,10 @@
obj-$(CONFIG_FB_MSM_EXTMDDI_SVGA) += mddi_ext_lcd.o
+obj-$(CONFIG_FB_MSM_WRITEBACK_MSM_PANEL) += mdp4_wfd_writeback_panel.o
+obj-$(CONFIG_FB_MSM_WRITEBACK_MSM_PANEL) += mdp4_wfd_writeback.o
+obj-$(CONFIG_FB_MSM_WRITEBACK_MSM_PANEL) += mdp4_overlay_writeback.o
+
obj-$(CONFIG_MSM_VIDC_1080P) += vidc/
obj-$(CONFIG_MSM_VIDC_720P) += vidc/
diff --git a/drivers/video/msm/mdp.c b/drivers/video/msm/mdp.c
index ca3c079..aeeb503 100644
--- a/drivers/video/msm/mdp.c
+++ b/drivers/video/msm/mdp.c
@@ -241,30 +241,42 @@
int mdp_histogram_ctrl(boolean en)
{
unsigned long flag;
- boolean hist_start;
- spin_lock_irqsave(&mdp_spin_lock, flag);
- hist_start = mdp_is_hist_start;
- spin_unlock_irqrestore(&mdp_spin_lock, flag);
+ unsigned long hist_base;
+ uint32_t status;
- if (hist_start == TRUE) {
- if (en == TRUE) {
- mdp_enable_irq(MDP_HISTOGRAM_TERM);
- mdp_hist_frame_cnt = 1;
+ if (mdp_rev >= MDP_REV_40)
+ hist_base = 0x95000;
+ else
+ hist_base = 0x94000;
+
+ if (en == TRUE) {
+ mdp_pipe_ctrl(MDP_CMD_BLOCK, MDP_BLOCK_POWER_ON, FALSE);
+ mdp_hist_frame_cnt = 1;
+ mdp_enable_irq(MDP_HISTOGRAM_TERM);
+ spin_lock_irqsave(&mdp_spin_lock, flag);
+ if (mdp_is_hist_start == FALSE && mdp_rev >= MDP_REV_40) {
+ MDP_OUTP(MDP_BASE + hist_base + 0x10, 1);
+ MDP_OUTP(MDP_BASE + hist_base + 0x1c, INTR_HIST_DONE);
+ }
+ spin_unlock_irqrestore(&mdp_spin_lock, flag);
+ MDP_OUTP(MDP_BASE + hist_base + 0x4, mdp_hist_frame_cnt);
+ MDP_OUTP(MDP_BASE + hist_base, 1);
+ mdp_pipe_ctrl(MDP_CMD_BLOCK, MDP_BLOCK_POWER_OFF, FALSE);
+ } else {
+ if (mdp_rev >= MDP_REV_40) {
mdp_pipe_ctrl(MDP_CMD_BLOCK, MDP_BLOCK_POWER_ON, FALSE);
-#ifdef CONFIG_FB_MSM_MDP40
- MDP_OUTP(MDP_BASE + 0x95010, 1);
- MDP_OUTP(MDP_BASE + 0x9501c, INTR_HIST_DONE);
- MDP_OUTP(MDP_BASE + 0x95004, 1);
- MDP_OUTP(MDP_BASE + 0x95000, 1);
-#else
- MDP_OUTP(MDP_BASE + 0x94004, 1);
- MDP_OUTP(MDP_BASE + 0x94000, 1);
-#endif
+ status = inpdw(MDP_BASE + hist_base + 0x1C);
+ status &= ~INTR_HIST_DONE;
+ MDP_OUTP(MDP_BASE + hist_base + 0x1C, status);
+
+ MDP_OUTP(MDP_BASE + hist_base + 0x18, INTR_HIST_DONE);
mdp_pipe_ctrl(MDP_CMD_BLOCK, MDP_BLOCK_POWER_OFF,
- FALSE);
- } else
- mdp_disable_irq(MDP_HISTOGRAM_TERM);
+ FALSE);
+ }
+
+ mdp_disable_irq(MDP_HISTOGRAM_TERM);
}
+
return 0;
}
@@ -280,26 +292,18 @@
goto mdp_hist_start_err;
}
+ ret = mdp_histogram_ctrl(TRUE);
+
spin_lock_irqsave(&mdp_spin_lock, flag);
mdp_is_hist_start = TRUE;
spin_unlock_irqrestore(&mdp_spin_lock, flag);
- mdp_enable_irq(MDP_HISTOGRAM_TERM);
- mdp_hist_frame_cnt = 1;
- mdp_pipe_ctrl(MDP_CMD_BLOCK, MDP_BLOCK_POWER_ON, FALSE);
-#ifdef CONFIG_FB_MSM_MDP40
- MDP_OUTP(MDP_BASE + 0x95004, 1);
- MDP_OUTP(MDP_BASE + 0x95000, 1);
-#else
- MDP_OUTP(MDP_BASE + 0x94004, 1);
- MDP_OUTP(MDP_BASE + 0x94000, 1);
-#endif
- mdp_pipe_ctrl(MDP_CMD_BLOCK, MDP_BLOCK_POWER_OFF, FALSE);
mdp_hist_start_err:
mutex_unlock(&mdp_hist_mutex);
return ret;
}
+
int mdp_stop_histogram(struct fb_info *info)
{
unsigned long flag;
@@ -310,12 +314,12 @@
ret = -EPERM;
goto mdp_hist_stop_err;
}
+
spin_lock_irqsave(&mdp_spin_lock, flag);
mdp_is_hist_start = FALSE;
spin_unlock_irqrestore(&mdp_spin_lock, flag);
- /* disable the irq for histogram since we handled it
- when the control reaches here */
- mdp_disable_irq(MDP_HISTOGRAM_TERM);
+
+ ret = mdp_histogram_ctrl(FALSE);
mdp_hist_stop_err:
mutex_unlock(&mdp_hist_mutex);
@@ -1546,6 +1550,15 @@
#endif
break;
+#ifdef CONFIG_FB_MSM_WRITEBACK_MSM_PANEL
+ case WRITEBACK_PANEL:
+ pdata->on = mdp4_overlay_writeback_on;
+ pdata->off = mdp4_overlay_writeback_off;
+ mfd->dma_fnc = mdp4_writeback_overlay;
+ mfd->dma = &dma_e_data;
+ mdp4_display_intf_sel(EXTERNAL_INTF_SEL, DTV_INTF);
+ break;
+#endif
default:
printk(KERN_ERR "mdp_probe: unknown device type!\n");
rc = -ENODEV;
diff --git a/drivers/video/msm/mdp.h b/drivers/video/msm/mdp.h
index 590fd13..c12a250 100644
--- a/drivers/video/msm/mdp.h
+++ b/drivers/video/msm/mdp.h
@@ -245,6 +245,10 @@
#define TV_OUT_DMA3_START BIT(13)
#define MDP_HIST_DONE BIT(20)
+/* histogram interrupts */
+#define INTR_HIST_DONE BIT(1)
+#define INTR_HIST_RESET_SEQ_DONE BIT(0)
+
#ifdef CONFIG_FB_MSM_MDP22
#define MDP_ANY_INTR_MASK (MDP_PPP_DONE| \
MDP_DMA_P_DONE| \
diff --git a/drivers/video/msm/mdp4.h b/drivers/video/msm/mdp4.h
index f60cb78..5d8c547 100644
--- a/drivers/video/msm/mdp4.h
+++ b/drivers/video/msm/mdp4.h
@@ -88,6 +88,7 @@
#define MDP4_PANEL_ATV BIT(3)
#define MDP4_PANEL_DSI_VIDEO BIT(4)
#define MDP4_PANEL_DSI_CMD BIT(5)
+#define MDP4_PANEL_WRITEBACK BIT(6)
enum {
OVERLAY_MODE_NONE,
@@ -121,11 +122,6 @@
#define INTR_PRIMARY_READ_PTR BIT(11)
#define INTR_DMA_P_HISTOGRAM BIT(17)
-/* histogram interrupts */
-#define INTR_HIST_DONE BIT(1)
-#define INTR_HIST_RESET_SEQ_DONE BIT(0)
-
-
#ifdef CONFIG_FB_MSM_OVERLAY
#define MDP4_ANY_INTR_MASK (INTR_OVERLAY0_DONE|INTR_DMA_S_DONE | \
INTR_DMA_P_HISTOGRAM)
@@ -330,6 +326,7 @@
ulong kickoff_dtv;
ulong kickoff_atv;
ulong kickoff_dsi;
+ ulong kickoff_writeback;
ulong writeback; /* blt */
ulong overlay_set[MDP4_MIXER_MAX];
ulong overlay_unset[MDP4_MIXER_MAX];
@@ -620,4 +617,25 @@
uint32_t mdp4_ss_table_value(int8_t param, int8_t index);
void mdp4_overlay_status_write(enum mdp4_overlay_status type, bool val);
bool mdp4_overlay_status_read(enum mdp4_overlay_status type);
+
+int mdp4_overlay_writeback_on(struct platform_device *pdev);
+int mdp4_overlay_writeback_off(struct platform_device *pdev);
+void mdp4_writeback_overlay(struct msm_fb_data_type *mfd);
+void mdp4_writeback_kickoff_video(struct msm_fb_data_type *mfd,
+ struct mdp4_overlay_pipe *pipe);
+void mdp4_writeback_dma_busy_wait(struct msm_fb_data_type *mfd);
+void mdp4_overlay1_done_writeback(struct mdp_dma_data *dma);
+
+int mdp4_writeback_register_buffer(struct fb_info *info,
+ struct msmfb_writeback_data *data);
+int mdp4_writeback_unregister_buffer(struct fb_info *info,
+ struct msmfb_writeback_data *data);
+int mdp4_writeback_dequeue_buffer(struct fb_info *info,
+ struct msmfb_data *data);
+int mdp4_writeback_queue_buffer(struct fb_info *info,
+ struct msmfb_data *data);
+void mdp4_writeback_dma_stop(struct msm_fb_data_type *mfd);
+int mdp4_writeback_init(struct fb_info *info);
+int mdp4_writeback_terminate(struct fb_info *info);
+
#endif /* MDP_H */
diff --git a/drivers/video/msm/mdp4_overlay.c b/drivers/video/msm/mdp4_overlay.c
index f865edf..6d63229 100644
--- a/drivers/video/msm/mdp4_overlay.c
+++ b/drivers/video/msm/mdp4_overlay.c
@@ -1065,7 +1065,7 @@
/*
* BLT only siupport at primary display
*/
- if (pipe->mixer_num == MDP4_MIXER0 && pipe->blt_addr) {
+ if (pipe->blt_addr) {
int off, bpp;
#ifdef BLT_RGB565
bpp = 2; /* overlay ouput is RGB565 */
@@ -1076,21 +1076,42 @@
data <<= 16;
data |= pipe->src_width;
outpdw(overlay_base + 0x0008, data); /* ROI, height + width */
- off = 0;
- if (pipe->ov_cnt & 0x01)
- off = pipe->src_height * pipe->src_width * bpp;
+ if (pipe->mixer_num == MDP4_MIXER0) {
+ off = 0;
+ if (pipe->ov_cnt & 0x01)
+ off = pipe->src_height * pipe->src_width * bpp;
- outpdw(overlay_base + 0x000c, pipe->blt_addr + off);
- /* overlay ouput is RGB888 */
- outpdw(overlay_base + 0x0010, pipe->src_width * bpp);
- outpdw(overlay_base + 0x001c, pipe->blt_addr + off);
- /* MDDI - BLT + on demand */
- outpdw(overlay_base + 0x0004, 0x08);
+ outpdw(overlay_base + 0x000c, pipe->blt_addr + off);
+ /* overlay ouput is RGB888 */
+ outpdw(overlay_base + 0x0010, pipe->src_width * bpp);
+ outpdw(overlay_base + 0x001c, pipe->blt_addr + off);
+ /* MDDI - BLT + on demand */
+ outpdw(overlay_base + 0x0004, 0x08);
#ifdef BLT_RGB565
- outpdw(overlay_base + 0x0014, 0x1); /* RGB565 */
+ outpdw(overlay_base + 0x0014, 0x1); /* RGB565 */
#else
- outpdw(overlay_base + 0x0014, 0x0); /* RGB888 */
+ outpdw(overlay_base + 0x0014, 0x0); /* RGB888 */
#endif
+ } else {
+ if (ctrl->panel_mode & MDP4_PANEL_WRITEBACK) {
+ off = 0;
+ bpp = 2;
+ if (pipe->ov_cnt & 0x01)
+ off = pipe->src_height *
+ pipe->src_width * bpp;
+
+ outpdw(overlay_base + 0x000c,
+ pipe->blt_addr + off);
+ /* overlay ouput is RGB888 */
+ outpdw(overlay_base + 0x0010,
+ pipe->src_width * bpp);
+ outpdw(overlay_base + 0x001c,
+ pipe->blt_addr + off);
+ /* MDDI - BLT + on demand */
+ outpdw(overlay_base + 0x0004, 0x08);
+ outpdw(overlay_base + 0x0014, 0x1); /* RGB565 */
+ }
+ }
} else {
data = pipe->src_height;
data <<= 16;
@@ -2450,6 +2471,12 @@
#endif
else if (ctrl->panel_mode & MDP4_PANEL_ATV)
mdp4_overlay_reg_flush(pipe, 1);
+#ifdef CONFIG_FB_MSM_WRITEBACK_MSM_PANEL
+ else if (ctrl->panel_mode & MDP4_PANEL_WRITEBACK) {
+ mdp4_writeback_dma_busy_wait(mfd);
+ mdp4_writeback_kickoff_video(mfd, pipe);
+ }
+#endif
} else {
/* primary interface */
ctrl->mixer0_played++;
diff --git a/drivers/video/msm/mdp4_overlay_dsi_video.c b/drivers/video/msm/mdp4_overlay_dsi_video.c
index 93933f3..5cf79c1 100644
--- a/drivers/video/msm/mdp4_overlay_dsi_video.c
+++ b/drivers/video/msm/mdp4_overlay_dsi_video.c
@@ -555,6 +555,10 @@
void mdp4_overlay0_done_dsi_video(struct mdp_dma_data *dma)
{
spin_lock(&mdp_spin_lock);
+ if (dsi_pipe->blt_addr == 0) {
+ spin_unlock(&mdp_spin_lock);
+ return;
+ }
dma->busy = FALSE;
mdp4_dsi_video_blt_dmap_update(dsi_pipe);
dsi_pipe->dmap_cnt++;
diff --git a/drivers/video/msm/mdp4_overlay_dtv.c b/drivers/video/msm/mdp4_overlay_dtv.c
index a9b32ab..13449d6 100644
--- a/drivers/video/msm/mdp4_overlay_dtv.c
+++ b/drivers/video/msm/mdp4_overlay_dtv.c
@@ -299,6 +299,10 @@
* rgb2 dis-engaged
*/
msleep(20);
+ if (dtv_pipe) {
+ mdp4_overlay_pipe_free(dtv_pipe);
+ dtv_pipe = NULL;
+ }
return ret;
}
diff --git a/drivers/video/msm/mdp4_overlay_lcdc.c b/drivers/video/msm/mdp4_overlay_lcdc.c
index e840230..0eda69a 100644
--- a/drivers/video/msm/mdp4_overlay_lcdc.c
+++ b/drivers/video/msm/mdp4_overlay_lcdc.c
@@ -451,6 +451,10 @@
void mdp4_overlay0_done_lcdc(struct mdp_dma_data *dma)
{
spin_lock(&mdp_spin_lock);
+ if (lcdc_pipe->blt_addr == 0) {
+ spin_unlock(&mdp_spin_lock);
+ return;
+ }
dma->busy = FALSE;
mdp4_lcdc_blt_dmap_update(lcdc_pipe);
lcdc_pipe->dmap_cnt++;
diff --git a/drivers/video/msm/mdp4_overlay_writeback.c b/drivers/video/msm/mdp4_overlay_writeback.c
new file mode 100644
index 0000000..4fcff20
--- /dev/null
+++ b/drivers/video/msm/mdp4_overlay_writeback.c
@@ -0,0 +1,565 @@
+/* Copyright (c) 2011, Code Aurora Forum. All rights reserved.
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License version 2 and
+ * only version 2 as published by the Free Software Foundation.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ *
+ */
+
+#include <linux/module.h>
+#include <linux/kernel.h>
+#include <linux/sched.h>
+#include <linux/time.h>
+#include <linux/init.h>
+#include <linux/interrupt.h>
+#include <linux/hrtimer.h>
+#include <linux/delay.h>
+#include <mach/hardware.h>
+#include <linux/io.h>
+
+#include <asm/system.h>
+#include <asm/mach-types.h>
+#include <linux/semaphore.h>
+#include <linux/spinlock.h>
+
+#include <linux/fb.h>
+
+#include "mdp.h"
+#include "msm_fb.h"
+#include "mdp4.h"
+enum {
+ REGISTERED,
+ IN_FREE_QUEUE,
+ IN_BUSY_QUEUE,
+ WITH_CLIENT
+};
+
+static struct mdp4_overlay_pipe *writeback_pipe;
+static struct msm_fb_data_type *writeback_mfd;
+static int busy_wait_cnt;
+
+int mdp4_overlay_writeback_on(struct platform_device *pdev)
+{
+ struct msm_fb_data_type *mfd;
+ struct fb_info *fbi;
+ uint8 *buf;
+ int ptype;
+ struct mdp4_overlay_pipe *pipe;
+ int bpp;
+ int ret;
+ uint32 format;
+
+ mfd = (struct msm_fb_data_type *)platform_get_drvdata(pdev);
+
+ if (!mfd)
+ return -ENODEV;
+
+ if (mfd->key != MFD_KEY)
+ return -EINVAL;
+
+ writeback_mfd = mfd; /* keep it */
+
+ fbi = mfd->fbi;
+
+ bpp = fbi->var.bits_per_pixel / 8;
+ buf = (uint8 *) fbi->fix.smem_start;
+ buf += fbi->var.xoffset * bpp +
+ fbi->var.yoffset * fbi->fix.line_length;
+
+ if (bpp == 2)
+ format = MDP_RGB_565;
+ else if (bpp == 3)
+ format = MDP_RGB_888;
+ else
+ format = MDP_ARGB_8888;
+
+ /* MDP cmd block enable */
+ mdp_pipe_ctrl(MDP_CMD_BLOCK, MDP_BLOCK_POWER_ON, FALSE);
+
+ if (writeback_pipe == NULL) {
+ ptype = mdp4_overlay_format2type(format);
+ if (ptype < 0)
+ pr_err("%s: format2type failed\n", __func__);
+ pipe = mdp4_overlay_pipe_alloc(ptype, MDP4_MIXER1, 0);
+ if (pipe == NULL)
+ pr_info("%s: pipe_alloc failed\n", __func__);
+ pipe->pipe_used++;
+ pipe->mixer_stage = MDP4_MIXER_STAGE_BASE;
+ pipe->mixer_num = MDP4_MIXER1;
+ pipe->src_format = format;
+ mdp4_overlay_panel_mode(pipe->mixer_num, MDP4_PANEL_WRITEBACK);
+ ret = mdp4_overlay_format2pipe(pipe);
+ if (ret < 0)
+ pr_info("%s: format2type failed\n", __func__);
+
+ writeback_pipe = pipe; /* keep it */
+
+ } else {
+ pipe = writeback_pipe;
+ }
+ ret = panel_next_on(pdev);
+ mdp_pipe_ctrl(MDP_CMD_BLOCK, MDP_BLOCK_POWER_OFF, FALSE);
+ return ret;
+}
+
+int mdp4_overlay_writeback_off(struct platform_device *pdev)
+{
+ int ret;
+ struct msm_fb_data_type *mfd =
+ (struct msm_fb_data_type *)platform_get_drvdata(pdev);
+ if (mfd && writeback_pipe) {
+ mdp4_writeback_dma_busy_wait(mfd);
+ mdp4_overlay_pipe_free(writeback_pipe);
+ writeback_pipe = NULL;
+ }
+ ret = panel_next_off(pdev);
+ return ret;
+}
+int mdp4_overlay_writeback_update(struct msm_fb_data_type *mfd)
+{
+ struct fb_info *fbi;
+ uint8 *buf;
+ struct mdp4_overlay_pipe *pipe;
+ int bpp;
+
+ if (mfd->key != MFD_KEY)
+ return -ENODEV;
+
+ if (!writeback_pipe)
+ return -EINVAL;
+
+ fbi = mfd->fbi;
+
+ pipe = writeback_pipe;
+
+ bpp = fbi->var.bits_per_pixel / 8;
+ buf = (uint8 *) fbi->fix.smem_start;
+ buf += fbi->var.xoffset * bpp +
+ fbi->var.yoffset * fbi->fix.line_length;
+
+ /* MDP cmd block enable */
+ mdp_pipe_ctrl(MDP_CMD_BLOCK, MDP_BLOCK_POWER_ON, FALSE);
+
+ pipe->src_height = fbi->var.yres;
+ pipe->src_width = fbi->var.xres;
+ pipe->src_h = fbi->var.yres;
+ pipe->src_w = fbi->var.xres;
+ pipe->dst_h = fbi->var.yres;
+ pipe->dst_w = fbi->var.xres;
+ pipe->srcp0_ystride = fbi->fix.line_length;
+ pipe->src_y = 0;
+ pipe->src_x = 0;
+ pipe->dst_y = 0;
+ pipe->dst_x = 0;
+ pipe->srcp0_addr = (uint32)buf;
+
+
+ mdp4_overlay_rgb_setup(pipe);
+
+ mdp4_mixer_stage_up(pipe);
+
+ mdp4_overlayproc_cfg(pipe);
+
+ /* MDP cmd block disable */
+ mdp_pipe_ctrl(MDP_CMD_BLOCK, MDP_BLOCK_POWER_OFF, FALSE);
+
+ wmb();
+ return 0;
+}
+void mdp4_writeback_dma_busy_wait(struct msm_fb_data_type *mfd)
+{
+ unsigned long flag;
+ int need_wait = 0;
+
+ spin_lock_irqsave(&mdp_spin_lock, flag);
+ if (mfd->dma->busy == TRUE) {
+ if (busy_wait_cnt == 0)
+ INIT_COMPLETION(mfd->dma->comp);
+ busy_wait_cnt++;
+ need_wait++;
+ }
+ spin_unlock_irqrestore(&mdp_spin_lock, flag);
+
+ if (need_wait) {
+ /* wait until DMA finishes the current job */
+ pr_debug("%s: pending pid=%d\n",
+ __func__, current->pid);
+ wait_for_completion(&mfd->dma->comp);
+ }
+}
+
+void mdp4_overlay1_done_writeback(struct mdp_dma_data *dma)
+{
+ spin_lock(&mdp_spin_lock);
+ dma->busy = FALSE;
+ spin_unlock(&mdp_spin_lock);
+ complete(&dma->comp);
+ if (busy_wait_cnt)
+ busy_wait_cnt--;
+
+ mdp_disable_irq_nosync(MDP_OVERLAY1_TERM);
+ pr_debug("%s ovdone interrupt\n", __func__);
+
+}
+void mdp4_writeback_overlay_kickoff(struct msm_fb_data_type *mfd,
+ struct mdp4_overlay_pipe *pipe)
+{
+ unsigned long flag;
+ spin_lock_irqsave(&mdp_spin_lock, flag);
+ mdp_enable_irq(MDP_OVERLAY1_TERM);
+ INIT_COMPLETION(writeback_pipe->comp);
+ mfd->dma->busy = TRUE;
+ outp32(MDP_INTR_CLEAR, INTR_OVERLAY1_DONE);
+ mdp_intr_mask |= INTR_OVERLAY1_DONE;
+ outp32(MDP_INTR_ENABLE, mdp_intr_mask);
+
+ wmb(); /* make sure all registers updated */
+ spin_unlock_irqrestore(&mdp_spin_lock, flag);
+ /* start OVERLAY pipe */
+ mdp_pipe_kickoff(MDP_OVERLAY1_TERM, mfd);
+ wmb();
+ pr_debug("%s: before ov done interrupt\n", __func__);
+ wait_for_completion_killable(&mfd->dma->comp);
+}
+void mdp4_writeback_dma_stop(struct msm_fb_data_type *mfd)
+{
+ /* mutex holded by caller */
+ if (mfd && writeback_pipe) {
+ mdp4_writeback_dma_busy_wait(mfd);
+ mdp4_overlay_writeback_update(mfd);
+
+ mdp4_writeback_overlay_kickoff(mfd, writeback_pipe);
+ }
+}
+
+void mdp4_writeback_kickoff_video(struct msm_fb_data_type *mfd,
+ struct mdp4_overlay_pipe *pipe)
+{
+ struct msmfb_writeback_data_list *node = NULL;
+ mutex_lock(&mfd->unregister_mutex);
+ mutex_lock(&mfd->writeback_mutex);
+ if (!list_empty(&mfd->writeback_free_queue)) {
+ node = list_first_entry(&mfd->writeback_free_queue,
+ struct msmfb_writeback_data_list, active_entry);
+ }
+ if (node) {
+ list_del(&(node->active_entry));
+ node->state = IN_BUSY_QUEUE;
+ }
+ mutex_unlock(&mfd->writeback_mutex);
+
+ writeback_pipe->blt_addr = (ulong) (node ? node->addr : NULL);
+
+ if (!writeback_pipe->blt_addr) {
+ pr_err("%s: no writeback buffer 0x%x, %p\n", __func__,
+ (unsigned int)writeback_pipe->blt_addr, node);
+ mutex_unlock(&mfd->unregister_mutex);
+ return;
+ }
+
+ if (writeback_pipe->blt_cnt == 0)
+ mdp4_overlay_writeback_update(mfd);
+
+ pr_debug("%s: pid=%d\n", __func__, current->pid);
+
+ mdp4_writeback_overlay_kickoff(mfd, pipe);
+
+ mutex_lock(&mfd->writeback_mutex);
+ list_add_tail(&node->active_entry, &mfd->writeback_busy_queue);
+ mutex_unlock(&mfd->writeback_mutex);
+ mutex_unlock(&mfd->unregister_mutex);
+ wake_up(&mfd->wait_q);
+}
+
+void mdp4_writeback_kickoff_ui(struct msm_fb_data_type *mfd,
+ struct mdp4_overlay_pipe *pipe)
+{
+
+ pr_debug("%s: pid=%d\n", __func__, current->pid);
+ mdp4_writeback_overlay_kickoff(mfd, pipe);
+}
+
+void mdp4_writeback_overlay(struct msm_fb_data_type *mfd)
+{
+ int ret = 0;
+ struct msmfb_writeback_data_list *node = NULL;
+
+ mutex_lock(&mfd->unregister_mutex);
+ mutex_lock(&mfd->writeback_mutex);
+ if (!list_empty(&mfd->writeback_free_queue)) {
+ node = list_first_entry(&mfd->writeback_free_queue,
+ struct msmfb_writeback_data_list, active_entry);
+ }
+ if (node) {
+ list_del(&(node->active_entry));
+ node->state = IN_BUSY_QUEUE;
+ }
+ mutex_unlock(&mfd->writeback_mutex);
+
+ writeback_pipe->blt_addr = (ulong) (node ? node->addr : NULL);
+
+ mutex_lock(&mfd->dma->ov_mutex);
+ pr_debug("%s in writeback\n", __func__);
+ if (writeback_pipe && !writeback_pipe->blt_addr) {
+ pr_err("%s: no writeback buffer 0x%x\n", __func__,
+ (unsigned int)writeback_pipe->blt_addr);
+ ret = mdp4_overlay_writeback_update(mfd);
+ if (ret)
+ pr_err("%s: update failed writeback pipe NULL\n",
+ __func__);
+ goto fail_no_blt_addr;
+ }
+
+ if (mfd && mfd->panel_power_on) {
+ pr_debug("%s in before busy wait\n", __func__);
+ mdp4_writeback_dma_busy_wait(mfd);
+
+ pr_debug("%s in before update\n", __func__);
+ ret = mdp4_overlay_writeback_update(mfd);
+ if (ret) {
+ pr_err("%s: update failed writeback pipe NULL\n",
+ __func__);
+ goto fail_no_blt_addr;
+ }
+
+ pr_debug("%s: in writeback pan display 0x%x\n", __func__,
+ (unsigned int)writeback_pipe->blt_addr);
+ mdp4_writeback_kickoff_ui(mfd, writeback_pipe);
+
+ mdp4_stat.kickoff_writeback++;
+
+ /* signal if pan function is waiting for the
+ * update completion */
+ if (mfd->pan_waiting) {
+ mfd->pan_waiting = FALSE;
+ complete(&mfd->pan_comp);
+ }
+ }
+
+ mutex_lock(&mfd->writeback_mutex);
+ list_add_tail(&node->active_entry, &mfd->writeback_busy_queue);
+ mutex_unlock(&mfd->writeback_mutex);
+ wake_up(&mfd->wait_q);
+fail_no_blt_addr:
+ /*NOTE: This api was removed
+ mdp4_overlay_resource_release();*/
+ mutex_unlock(&mfd->dma->ov_mutex);
+ mutex_unlock(&mfd->unregister_mutex);
+}
+static int mdp4_overlay_writeback_register_buffer(
+ struct msm_fb_data_type *mfd, struct msmfb_writeback_data_list *node)
+{
+ if (!node) {
+ pr_err("Cannot register a NULL node\n");
+ return -EINVAL;
+ }
+ node->state = REGISTERED;
+ list_add_tail(&node->registered_entry, &mfd->writeback_register_queue);
+ return 0;
+}
+static struct msmfb_writeback_data_list *get_if_registered(
+ struct msm_fb_data_type *mfd, uint32 fd, uint32 offset)
+{
+ struct msmfb_writeback_data_list *temp;
+ bool found = false;
+ if (!list_empty(&mfd->writeback_register_queue)) {
+ list_for_each_entry(temp, &mfd->writeback_register_queue,
+ registered_entry) {
+ if (temp && temp->buf_info.memory_id == fd
+ && temp->buf_info.offset == offset) {
+ found = true;
+ break;
+ }
+ }
+ }
+ if (found)
+ return temp;
+ return NULL;
+}
+int mdp4_writeback_register_buffer(
+ struct fb_info *info, struct msmfb_writeback_data *data)
+{
+ struct msm_fb_data_type *mfd = (struct msm_fb_data_type *)info->par;
+ struct msmfb_writeback_data_list *node = NULL;
+ unsigned long pmem_phys_addr, virtual_addr, len;
+ struct file *pmem_file;
+ int rv = 0;
+ if (!data || data->img.format != MDP_RGB_565) {
+ pr_err("Invalid input parameters\n");
+ return -EINVAL;
+ }
+
+ mutex_lock(&mfd->writeback_mutex);
+ node = get_if_registered(mfd, data->buf_info.memory_id,
+ data->buf_info.offset);
+ if (node) {
+ pr_err("Re-registering the same node\n");
+ rv = -EINVAL;
+ goto exit;
+ }
+
+ rv = get_pmem_file(data->buf_info.memory_id, &pmem_phys_addr,
+ &virtual_addr, &len, &pmem_file);
+
+ if (rv)
+ goto exit;
+
+ /* buffer big enough? */
+ if (len - data->buf_info.offset <
+ data->img.height * data->img.width * 2) {
+ rv = -ENOMEM;
+ goto post_get_pmem_failure;
+ }
+
+ node = kzalloc(sizeof(struct msmfb_writeback_data_list), GFP_KERNEL);
+ if (node == NULL) {
+ rv = -ENOMEM;
+ goto post_get_pmem_failure;
+ }
+
+ node->pmem_file = pmem_file;
+ node->addr = (void *)(pmem_phys_addr + node->buf_info.offset);
+ node->buf_info = data->buf_info;
+ node->img.width = data->img.width;
+ node->img.height = data->img.height;
+
+ rv = mdp4_overlay_writeback_register_buffer(mfd, node);
+post_get_pmem_failure:
+ put_pmem_file(pmem_file);
+exit:
+ mutex_unlock(&mfd->writeback_mutex);
+ if (rv)
+ kfree(node);
+
+ return rv;
+}
+
+int mdp4_writeback_queue_buffer(struct fb_info *info, struct msmfb_data *data)
+{
+ struct msm_fb_data_type *mfd = (struct msm_fb_data_type *)info->par;
+ struct msmfb_writeback_data_list *node = NULL;
+ int rv = 0;
+
+ mutex_lock(&mfd->writeback_mutex);
+ node = get_if_registered(mfd, data->memory_id, data->offset);
+ if (!node || node->state == IN_BUSY_QUEUE ||
+ node->state == IN_FREE_QUEUE) {
+ pr_err("memory not registered or Buffer already with us\n");
+ rv = -EINVAL;
+ goto exit;
+ }
+
+ list_add_tail(&node->active_entry, &mfd->writeback_free_queue);
+ node->state = IN_FREE_QUEUE;
+
+exit:
+ mutex_unlock(&mfd->writeback_mutex);
+ return rv;
+}
+static int is_buffer_ready(struct msm_fb_data_type *mfd)
+{
+ int rc;
+ mutex_lock(&mfd->writeback_mutex);
+ rc = list_empty(&mfd->writeback_register_queue)
+ || !list_empty(&mfd->writeback_busy_queue);
+ mutex_unlock(&mfd->writeback_mutex);
+ return rc;
+}
+int mdp4_writeback_dequeue_buffer(struct fb_info *info, struct msmfb_data *data)
+{
+ struct msm_fb_data_type *mfd = (struct msm_fb_data_type *)info->par;
+ struct msmfb_writeback_data_list *node = NULL;
+ int rc = 0;
+
+ rc = wait_event_interruptible(mfd->wait_q, is_buffer_ready(mfd));
+ if (rc) {
+ pr_err("failed to get dequeued buffer\n");
+ return -ENOBUFS;
+ }
+ mutex_lock(&mfd->writeback_mutex);
+ if (list_empty(&mfd->writeback_register_queue)) {
+ mutex_unlock(&mfd->writeback_mutex);
+ return -ENOBUFS;
+ } else if (!list_empty(&mfd->writeback_busy_queue)) {
+ node = list_first_entry(&mfd->writeback_busy_queue,
+ struct msmfb_writeback_data_list, active_entry);
+ }
+ if (node) {
+ list_del(&node->active_entry);
+ node->state = WITH_CLIENT;
+ memcpy(data, &node->buf_info, sizeof(struct msmfb_data));
+ } else {
+ pr_err("node is NULL. Somebody else dequeued?\n");
+ rc = -ENOBUFS;
+ }
+ mutex_unlock(&mfd->writeback_mutex);
+ return rc;
+}
+
+int mdp4_writeback_unregister_buffer(struct fb_info *info,
+ struct msmfb_writeback_data *data)
+{
+ struct msm_fb_data_type *mfd = (struct msm_fb_data_type *)info->par;
+ struct msmfb_writeback_data_list *node = NULL;
+ struct list_head *ptr, *next;
+ struct msmfb_writeback_data_list *temp;
+ mutex_lock(&mfd->unregister_mutex);
+ mutex_lock(&mfd->writeback_mutex);
+ node = get_if_registered(mfd, data->buf_info.memory_id,
+ data->buf_info.offset);
+ if (!node) {
+ pr_err("trying to unregister an "
+ "already unregistered buffer\n");
+ } else {
+ list_del(&node->registered_entry);
+ if (!list_empty(&mfd->writeback_free_queue)) {
+ list_for_each_safe(ptr, next,
+ &mfd->writeback_free_queue) {
+ temp = list_entry(ptr,
+ struct msmfb_writeback_data_list,
+ active_entry);
+ if (temp == node)
+ list_del(&node->active_entry);
+ }
+ }
+ if (!list_empty(&mfd->writeback_busy_queue)) {
+ list_for_each_safe(ptr, next,
+ &mfd->writeback_busy_queue) {
+ temp = list_entry(ptr,
+ struct msmfb_writeback_data_list,
+ active_entry);
+ if (temp == node)
+ list_del(&node->active_entry);
+ }
+ }
+ kfree(node);
+ }
+ mutex_unlock(&mfd->writeback_mutex);
+ mutex_unlock(&mfd->unregister_mutex);
+ wake_up(&mfd->wait_q);
+ return 0;
+}
+int mdp4_writeback_init(struct fb_info *info)
+{
+ struct msm_fb_data_type *mfd = (struct msm_fb_data_type *)info->par;
+ mutex_init(&mfd->writeback_mutex);
+ mutex_init(&mfd->unregister_mutex);
+ INIT_LIST_HEAD(&mfd->writeback_free_queue);
+ INIT_LIST_HEAD(&mfd->writeback_busy_queue);
+ INIT_LIST_HEAD(&mfd->writeback_register_queue);
+ init_waitqueue_head(&mfd->wait_q);
+ return 0;
+}
+int mdp4_writeback_terminate(struct fb_info *info)
+{
+ struct msm_fb_data_type *mfd = (struct msm_fb_data_type *)info->par;
+ INIT_LIST_HEAD(&mfd->writeback_register_queue);
+ INIT_LIST_HEAD(&mfd->writeback_busy_queue);
+ INIT_LIST_HEAD(&mfd->writeback_free_queue);
+ return 0;
+}
diff --git a/drivers/video/msm/mdp4_util.c b/drivers/video/msm/mdp4_util.c
index 99607e7..8370208 100644
--- a/drivers/video/msm/mdp4_util.c
+++ b/drivers/video/msm/mdp4_util.c
@@ -419,6 +419,59 @@
spin_unlock(&mdp_spin_lock);
}
#endif
+
+#ifdef CONFIG_FB_MSM_OVERLAY
+ if (isr & INTR_OVERLAY0_DONE) {
+ mdp4_stat.intr_overlay0++;
+ dma = &dma2_data;
+ if (panel & (MDP4_PANEL_LCDC | MDP4_PANEL_DSI_VIDEO)) {
+ /* disable LCDC interrupt */
+ spin_lock(&mdp_spin_lock);
+ mdp_intr_mask &= ~INTR_OVERLAY0_DONE;
+ outp32(MDP_INTR_ENABLE, mdp_intr_mask);
+ dma->waiting = FALSE;
+ spin_unlock(&mdp_spin_lock);
+ if (panel & MDP4_PANEL_LCDC)
+ mdp4_overlay0_done_lcdc(dma);
+#ifdef CONFIG_FB_MSM_MIPI_DSI
+ else if (panel & MDP4_PANEL_DSI_VIDEO)
+ mdp4_overlay0_done_dsi_video(dma);
+#endif
+ } else { /* MDDI, DSI_CMD */
+#ifdef CONFIG_FB_MSM_MIPI_DSI
+ if (panel & MDP4_PANEL_DSI_CMD)
+ mdp4_overlay0_done_dsi_cmd(dma);
+#else
+ if (panel & MDP4_PANEL_MDDI)
+ mdp4_overlay0_done_mddi(dma);
+#endif
+ }
+ mdp_hw_cursor_done();
+ }
+ if (isr & INTR_OVERLAY1_DONE) {
+ mdp4_stat.intr_overlay1++;
+ /* disable DTV interrupt */
+ dma = &dma_e_data;
+ spin_lock(&mdp_spin_lock);
+ mdp_intr_mask &= ~INTR_OVERLAY1_DONE;
+ outp32(MDP_INTR_ENABLE, mdp_intr_mask);
+ dma->waiting = FALSE;
+ spin_unlock(&mdp_spin_lock);
+#if defined(CONFIG_FB_MSM_DTV)
+ if (panel & MDP4_PANEL_DTV)
+ mdp4_overlay1_done_dtv();
+#endif
+#if defined(CONFIG_FB_MSM_TVOUT)
+ if (panel & MDP4_PANEL_ATV)
+ mdp4_overlay1_done_atv();
+#endif
+#if defined(CONFIG_FB_MSM_WRITEBACK_MSM_PANEL)
+ if (panel & MDP4_PANEL_WRITEBACK)
+ mdp4_overlay1_done_writeback(dma);
+#endif
+ }
+#endif /* OVERLAY */
+
if (isr & INTR_DMA_P_DONE) {
mdp4_stat.intr_dma_p++;
dma = &dma2_data;
@@ -488,53 +541,6 @@
}
spin_unlock(&mdp_spin_lock);
}
-#ifdef CONFIG_FB_MSM_OVERLAY
- if (isr & INTR_OVERLAY0_DONE) {
- mdp4_stat.intr_overlay0++;
- dma = &dma2_data;
- if (panel & (MDP4_PANEL_LCDC | MDP4_PANEL_DSI_VIDEO)) {
- /* disable LCDC interrupt */
- spin_lock(&mdp_spin_lock);
- mdp_intr_mask &= ~INTR_OVERLAY0_DONE;
- outp32(MDP_INTR_ENABLE, mdp_intr_mask);
- dma->waiting = FALSE;
- spin_unlock(&mdp_spin_lock);
- if (panel & MDP4_PANEL_LCDC)
- mdp4_overlay0_done_lcdc(dma);
-#ifdef CONFIG_FB_MSM_MIPI_DSI
- else if (panel & MDP4_PANEL_DSI_VIDEO)
- mdp4_overlay0_done_dsi_video(dma);
-#endif
- } else { /* MDDI, DSI_CMD */
-#ifdef CONFIG_FB_MSM_MIPI_DSI
- if (panel & MDP4_PANEL_DSI_CMD)
- mdp4_overlay0_done_dsi_cmd(dma);
-#else
- if (panel & MDP4_PANEL_MDDI)
- mdp4_overlay0_done_mddi(dma);
-#endif
- }
- mdp_hw_cursor_done();
- }
- if (isr & INTR_OVERLAY1_DONE) {
- mdp4_stat.intr_overlay1++;
- /* disable DTV interrupt */
- dma = &dma_e_data;
- spin_lock(&mdp_spin_lock);
- mdp_intr_mask &= ~INTR_OVERLAY1_DONE;
- outp32(MDP_INTR_ENABLE, mdp_intr_mask);
- dma->waiting = FALSE;
- spin_unlock(&mdp_spin_lock);
-#if defined(CONFIG_FB_MSM_DTV)
- if (panel & MDP4_PANEL_DTV)
- mdp4_overlay1_done_dtv();
-#endif
-#if defined(CONFIG_FB_MSM_TVOUT)
- if (panel & MDP4_PANEL_ATV)
- mdp4_overlay1_done_atv();
-#endif
- }
-#endif /* OVERLAY */
if (isr & INTR_DMA_P_HISTOGRAM) {
isr = inpdw(MDP_DMA_P_HIST_INTR_STATUS);
mask = inpdw(MDP_DMA_P_HIST_INTR_ENABLE);
diff --git a/drivers/video/msm/mdp4_wfd_writeback.c b/drivers/video/msm/mdp4_wfd_writeback.c
new file mode 100644
index 0000000..a8fdcc0
--- /dev/null
+++ b/drivers/video/msm/mdp4_wfd_writeback.c
@@ -0,0 +1,102 @@
+/* Copyright (c) 2011, Code Aurora Forum. All rights reserved.
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License version 2 and
+ * only version 2 as published by the Free Software Foundation.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ *
+ */
+
+#include <linux/types.h>
+#include <linux/list.h>
+#include <linux/ioctl.h>
+#include <linux/spinlock.h>
+#include <linux/init.h>
+#include <linux/platform_device.h>
+#include <linux/version.h>
+
+#include "mdp4_wfd_writeback_util.h"
+#include "msm_fb.h"
+
+static int writeback_on(struct platform_device *pdev)
+{
+ return 0;
+}
+static int writeback_off(struct platform_device *pdev)
+{
+ return 0;
+}
+static int writeback_probe(struct platform_device *pdev)
+{
+ struct msm_fb_data_type *mfd;
+ struct platform_device *mdp_dev = NULL;
+ struct msm_fb_panel_data *pdata = NULL;
+ int rc = 0;
+
+ WRITEBACK_MSG_ERR("Inside writeback_probe\n");
+ mfd = platform_get_drvdata(pdev);
+ if (!mfd)
+ return -ENODEV;
+ if (mfd->key != MFD_KEY)
+ return -EINVAL;
+
+ mdp_dev = platform_device_alloc("mdp", pdev->id);
+ if (!mdp_dev)
+ return -ENOMEM;
+ /*
+ * link to the latest pdev
+ */
+ mfd->pdev = mdp_dev;
+ mfd->dest = DISPLAY_LCD;
+
+ if (platform_device_add_data
+ (mdp_dev, pdev->dev.platform_data,
+ sizeof(struct msm_fb_panel_data))) {
+ pr_err("writeback_probe: "
+ "platform_device_add_data failed!\n");
+ platform_device_put(mdp_dev);
+ return -ENOMEM;
+ }
+ pdata = (struct msm_fb_panel_data *)mdp_dev->dev.platform_data;
+ pdata->on = writeback_on;
+ pdata->off = writeback_off;
+ pdata->next = pdev;
+
+ /*
+ * get/set panel specific fb info
+ */
+ mfd->panel_info = pdata->panel_info;
+
+ mfd->fb_imgType = MDP_RGB_565;
+
+ platform_set_drvdata(mdp_dev, mfd);
+
+ rc = platform_device_add(mdp_dev);
+ if (rc) {
+ WRITEBACK_MSG_ERR("failed to add device");
+ platform_device_put(mdp_dev);
+ return rc;
+ }
+ return rc;
+}
+
+static struct platform_driver writeback_driver = {
+ .probe = writeback_probe,
+ .driver = {
+ .name = "writeback",
+ },
+};
+
+static int __init writeback_driver_init(void)
+{
+ int rc = 0;
+ WRITEBACK_MSG_ERR("Inside writeback_driver_init\n");
+ rc = platform_driver_register(&writeback_driver);
+ return rc;
+}
+
+module_init(writeback_driver_init);
diff --git a/drivers/video/msm/mdp4_wfd_writeback_panel.c b/drivers/video/msm/mdp4_wfd_writeback_panel.c
new file mode 100644
index 0000000..77f714c
--- /dev/null
+++ b/drivers/video/msm/mdp4_wfd_writeback_panel.c
@@ -0,0 +1,83 @@
+/* Copyright (c) 2011, Code Aurora Forum. All rights reserved.
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License version 2 and
+ * only version 2 as published by the Free Software Foundation.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ *
+ */
+
+#include <linux/types.h>
+#include <linux/list.h>
+#include <linux/ioctl.h>
+#include <linux/spinlock.h>
+#include <linux/init.h>
+#include <linux/platform_device.h>
+#include <linux/version.h>
+
+#include "mdp4_wfd_writeback_util.h"
+#include "msm_fb.h"
+
+static int __devinit writeback_panel_probe(struct platform_device *pdev)
+{
+ int rc = 0;
+ if (pdev->id == 0)
+ return 0;
+
+ if (!msm_fb_add_device(pdev)) {
+ WRITEBACK_MSG_ERR("Failed to add fd device\n");
+ rc = -ENOMEM;
+ }
+ return rc;
+}
+static struct msm_fb_panel_data writeback_msm_panel_data = {
+ .panel_info = {
+ .type = WRITEBACK_PANEL,
+ .xres = 800,
+ .yres = 480,
+ .pdest = DISPLAY_2,
+ .wait_cycle = 0,
+ .bpp = 24,
+ .fb_num = 1,
+ .clk_rate = 74250000,
+ },
+};
+
+static struct platform_device writeback_panel_device = {
+ .name = "writeback_panel",
+ .id = 1,
+ .dev.platform_data = &writeback_msm_panel_data,
+};
+static struct platform_driver writeback_panel_driver = {
+ .probe = writeback_panel_probe,
+ .driver = {
+ .name = "writeback_panel"
+ }
+};
+
+static int __init writeback_panel_init(void)
+{
+ int rc = 0;
+ rc = platform_driver_register(&writeback_panel_driver);
+ if (rc) {
+ WRITEBACK_MSG_ERR("Failed to register platform driver\n");
+ goto fail_driver_registration;
+ }
+ rc = platform_device_register(&writeback_panel_device);
+ if (rc) {
+ WRITEBACK_MSG_ERR("Failed to register "
+ "writeback_panel_device\n");
+ goto fail_device_registration;
+ }
+ return rc;
+fail_device_registration:
+ platform_driver_unregister(&writeback_panel_driver);
+fail_driver_registration:
+ return rc;
+}
+
+module_init(writeback_panel_init);
diff --git a/drivers/video/msm/mdp4_wfd_writeback_util.h b/drivers/video/msm/mdp4_wfd_writeback_util.h
new file mode 100644
index 0000000..2d62713
--- /dev/null
+++ b/drivers/video/msm/mdp4_wfd_writeback_util.h
@@ -0,0 +1,28 @@
+/* Copyright (c) 2011, Code Aurora Forum. All rights reserved.
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License version 2 and
+ * only version 2 as published by the Free Software Foundation.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ *
+ */
+
+#ifndef _WRITEBACK_UTIL_H_
+#define _WRITEBACK_UTIL_H_
+
+#define DEBUG
+
+#ifdef DEBUG
+ #define WRITEBACK_MSG_INFO(fmt...) pr_info(fmt)
+ #define WRITEBACK_MSG_WARN(fmt...) pr_warning(fmt)
+#else
+ #define WRITEBACK_MSG_INFO(fmt...)
+ #define WRITEBACK_MSG_WARN(fmt...)
+#endif
+ #define WRITEBACK_MSG_ERR(fmt...) pr_err(fmt)
+ #define WRITEBACK_MSG_CRIT(fmt...) pr_crit(fmt)
+#endif
diff --git a/drivers/video/msm/mipi_chimei_wxga_pt.c b/drivers/video/msm/mipi_chimei_wxga_pt.c
index fe7035a..4729d83 100644
--- a/drivers/video/msm/mipi_chimei_wxga_pt.c
+++ b/drivers/video/msm/mipi_chimei_wxga_pt.c
@@ -168,7 +168,12 @@
pinfo->mipi.stream = false; /* dma_p */
pinfo->mipi.mdp_trigger = DSI_CMD_TRIGGER_NONE;
pinfo->mipi.dma_trigger = DSI_CMD_TRIGGER_SW;
- pinfo->mipi.fixed_packet_size = 4;
+ /*
+ * toshiba d2l chip does not need max_pkt_szie dcs cmd
+ * client reply len is directly configure through
+ * RDPKTLN register (0x0404)
+ */
+ pinfo->mipi.no_max_pkt_size = 1;
pinfo->mipi.force_clk_lane_hs = 1;
ret = mipi_tc358764_dsi2lvds_register(pinfo, MIPI_DSI_PRIM,
diff --git a/drivers/video/msm/mipi_dsi_host.c b/drivers/video/msm/mipi_dsi_host.c
index 600aac5..8d07e56 100644
--- a/drivers/video/msm/mipi_dsi_host.c
+++ b/drivers/video/msm/mipi_dsi_host.c
@@ -1159,20 +1159,22 @@
struct dsi_buf *tp, struct dsi_buf *rp,
struct dsi_cmd_desc *cmds, int rlen)
{
- int i , cnt, len, diff, pkt_size;
+ int cnt, len, diff, pkt_size;
unsigned long flag;
char cmd;
+ if (mfd->panel_info.mipi.no_max_pkt_size) {
+ /* Only support rlen = 4*n */
+ rlen += 3;
+ rlen &= 0x03;
+ }
+
len = rlen;
diff = 0;
if (len <= 2)
cnt = 4; /* short read */
- else if (mfd->panel_info.mipi.fixed_packet_size) {
- len = mfd->panel_info.mipi.fixed_packet_size;
- pkt_size = len; /* Avoid command to the device */
- cnt = (len + 6 + 3) & ~0x03; /* Add padding for align */
- } else {
+ else {
if (len > MIPI_DSI_LEN)
len = MIPI_DSI_LEN; /* 8 bytes at most */
@@ -1203,7 +1205,7 @@
dsi_mdp_busy = TRUE;
spin_unlock_irqrestore(&dsi_mdp_lock, flag);
- if (!mfd->panel_info.mipi.fixed_packet_size) {
+ if (!mfd->panel_info.mipi.no_max_pkt_size) {
/* packet size need to be set at every read */
pkt_size = len;
max_pktsize[0] = pkt_size;
@@ -1223,10 +1225,15 @@
* at RDBK_DATA register already
*/
mipi_dsi_buf_init(rp);
- mipi_dsi_cmd_dma_rx(rp, cnt);
+ if (mfd->panel_info.mipi.no_max_pkt_size) {
+ /*
+ * expect rlen = n * 4
+ * short alignement for start addr
+ */
+ rp->data += 2;
+ }
- for (i = 0; i < cnt ; i++)
- pr_debug("%s.rp->data[%d]=0x%x.\n", __func__, i, rp->data[i]);
+ mipi_dsi_cmd_dma_rx(rp, cnt);
spin_lock_irqsave(&dsi_mdp_lock, flag);
dsi_mdp_busy = FALSE;
@@ -1234,12 +1241,16 @@
complete(&dsi_mdp_comp);
spin_unlock_irqrestore(&dsi_mdp_lock, flag);
- /* Remove leading padding zeros if exist */
- for (i = 0; i < cnt ; i++)
- if (rp->data[0] == 0)
- rp->data++;
- else
- break;
+ if (mfd->panel_info.mipi.no_max_pkt_size) {
+ /*
+ * remove extra 2 bytes from previous
+ * rx transaction at shift register
+ * which was inserted during copy
+ * shift registers to rx buffer
+ * rx payload start from long alignment addr
+ */
+ rp->data += 2;
+ }
cmd = rp->data[0];
switch (cmd) {
diff --git a/drivers/video/msm/msm_fb.c b/drivers/video/msm/msm_fb.c
index d21910b..7595838 100644
--- a/drivers/video/msm/msm_fb.c
+++ b/drivers/video/msm/msm_fb.c
@@ -2630,6 +2630,136 @@
}
#endif
+#ifdef CONFIG_FB_MSM_WRITEBACK_MSM_PANEL
+static int msmfb_overlay_ioctl_writeback_init(struct fb_info *info)
+{
+ return mdp4_writeback_init(info);
+}
+static int msmfb_overlay_ioctl_writeback_register_buffer(
+ struct fb_info *info, unsigned long *argp)
+{
+ int ret = 0;
+ struct msmfb_writeback_data data;
+
+ ret = copy_from_user(&data, argp, sizeof(data));
+ if (ret)
+ goto error;
+
+ ret = mdp4_writeback_register_buffer(info, &data);
+ if (ret)
+ goto error;
+error:
+ if (ret)
+ pr_err("%s:msmfb_writeback_register_buffer "
+ " ioctl failed\n", __func__);
+ return ret;
+}
+
+static int msmfb_overlay_ioctl_writeback_unregister_buffer(
+ struct fb_info *info, unsigned long *argp)
+{
+ int ret = 0;
+ struct msmfb_writeback_data data;
+
+ ret = copy_from_user(&data, argp, sizeof(data));
+ if (ret)
+ goto error;
+
+ ret = mdp4_writeback_unregister_buffer(info, &data);
+ if (ret)
+ goto error;
+
+error:
+ if (ret)
+ pr_err("%s:msmfb_writeback_unregister_buffer ioctl failed\n",
+ __func__);
+ return ret;
+}
+
+static int msmfb_overlay_ioctl_writeback_queue_buffer(
+ struct fb_info *info, unsigned long *argp)
+{
+ int ret = 0;
+ struct msmfb_data data;
+
+ ret = copy_from_user(&data, argp, sizeof(data));
+ if (ret)
+ goto error;
+
+ ret = mdp4_writeback_queue_buffer(info, &data);
+ if (ret)
+ goto error;
+
+error:
+ if (ret)
+ pr_err("%s:msmfb_writeback_queue_buffer ioctl failed\n",
+ __func__);
+ return ret;
+}
+
+static int msmfb_overlay_ioctl_writeback_dequeue_buffer(
+ struct fb_info *info, unsigned long *argp)
+{
+ int ret = 0;
+ struct msmfb_data data;
+
+ ret = copy_from_user(&data, argp, sizeof(data));
+ if (ret)
+ goto error;
+
+ ret = mdp4_writeback_dequeue_buffer(info, &data);
+ if (ret)
+ goto error;
+
+ ret = copy_to_user(argp, &data, sizeof(data));
+ if (ret)
+ goto error;
+
+error:
+ if (ret)
+ pr_err("%s:msmfb_writeback_dequeue_buffer ioctl failed\n",
+ __func__);
+ return ret;
+}
+static int msmfb_overlay_ioctl_writeback_terminate(struct fb_info *info)
+{
+ return mdp4_writeback_terminate(info);
+}
+
+#else
+static int msmfb_overlay_ioctl_writeback_init(struct fb_info *info)
+{
+ return -ENOTSUPP;
+}
+static int msmfb_overlay_ioctl_writeback_register_buffer(
+ struct fb_info *info, unsigned long *argp)
+{
+ return -ENOTSUPP;
+}
+
+static int msmfb_overlay_ioctl_writeback_unregister_buffer(
+ struct fb_info *info, unsigned long *argp)
+{
+ return -ENOTSUPP;
+}
+
+static int msmfb_overlay_ioctl_writeback_queue_buffer(
+ struct fb_info *info, unsigned long *argp)
+{
+ return -ENOTSUPP;
+}
+
+static int msmfb_overlay_ioctl_writeback_dequeue_buffer(
+ struct fb_info *info, unsigned long *argp)
+{
+ return -ENOTSUPP;
+}
+static int msmfb_overlay_ioctl_writeback_terminate(struct fb_info *info)
+{
+ return -ENOTSUPP;
+}
+#endif
+
static int msmfb_overlay_3d_sbys(struct fb_info *info, unsigned long *argp)
{
int ret;
@@ -2809,6 +2939,28 @@
ret = msmfb_mixer_info(info, argp);
up(&msm_fb_ioctl_ppp_sem);
break;
+ case MSMFB_WRITEBACK_INIT:
+ ret = msmfb_overlay_ioctl_writeback_init(info);
+ break;
+ case MSMFB_WRITEBACK_REGISTER_BUFFER:
+ ret = msmfb_overlay_ioctl_writeback_register_buffer(
+ info, argp);
+ break;
+ case MSMFB_WRITEBACK_UNREGISTER_BUFFER:
+ ret = msmfb_overlay_ioctl_writeback_unregister_buffer(
+ info, argp);
+ break;
+ case MSMFB_WRITEBACK_QUEUE_BUFFER:
+ ret = msmfb_overlay_ioctl_writeback_queue_buffer(
+ info, argp);
+ break;
+ case MSMFB_WRITEBACK_DEQUEUE_BUFFER:
+ ret = msmfb_overlay_ioctl_writeback_dequeue_buffer(
+ info, argp);
+ break;
+ case MSMFB_WRITEBACK_TERMINATE:
+ ret = msmfb_overlay_ioctl_writeback_terminate(info);
+ break;
#endif
case MSMFB_BLIT:
down(&msm_fb_ioctl_ppp_sem);
@@ -3023,6 +3175,60 @@
return platform_driver_register(&msm_fb_driver);
}
+#ifdef CONFIG_FB_MSM_WRITEBACK_MSM_PANEL
+struct fb_info *msm_fb_get_writeback_fb(void)
+{
+ int c = 0;
+ for (c = 0; c < fbi_list_index; ++c) {
+ struct msm_fb_data_type *mfd;
+ mfd = (struct msm_fb_data_type *)fbi_list[c]->par;
+ if (mfd->panel.type == WRITEBACK_PANEL)
+ return fbi_list[c];
+ }
+
+ return NULL;
+}
+EXPORT_SYMBOL(msm_fb_get_writeback_fb);
+
+int msm_fb_writeback_register_buffer(struct fb_info *info,
+ struct msmfb_writeback_data *data)
+{
+ return mdp4_writeback_register_buffer(info, data);
+}
+EXPORT_SYMBOL(msm_fb_writeback_register_buffer);
+
+int msm_fb_writeback_queue_buffer(struct fb_info *info,
+ struct msmfb_data *data)
+{
+ return mdp4_writeback_queue_buffer(info, data);
+}
+EXPORT_SYMBOL(msm_fb_writeback_queue_buffer);
+
+int msm_fb_writeback_dequeue_buffer(struct fb_info *info,
+ struct msmfb_data *data)
+{
+ return mdp4_writeback_dequeue_buffer(info, data);
+}
+EXPORT_SYMBOL(msm_fb_writeback_dequeue_buffer);
+
+int msm_fb_writeback_unregister_buffer(struct fb_info *info,
+ struct msmfb_writeback_data *data)
+{
+ return mdp4_writeback_unregister_buffer(info, data);
+}
+EXPORT_SYMBOL(msm_fb_writeback_unregister_buffer);
+int msm_fb_writeback_init(struct fb_info *info)
+{
+ return mdp4_writeback_init(info);
+}
+EXPORT_SYMBOL(msm_fb_writeback_init);
+int msm_fb_writeback_terminate(struct fb_info *info)
+{
+ return mdp4_writeback_terminate(info);
+}
+EXPORT_SYMBOL(msm_fb_writeback_terminate);
+#endif
+
struct platform_device *msm_fb_add_device(struct platform_device *pdev)
{
struct msm_fb_panel_data *pdata;
@@ -3046,7 +3252,8 @@
* at panel_info
*
*/
- if (type == HDMI_PANEL || type == DTV_PANEL || type == TV_PANEL) {
+ if (type == HDMI_PANEL || type == DTV_PANEL ||
+ type == TV_PANEL || type == WRITEBACK_PANEL) {
#ifdef CONFIG_FB_MSM_HDMI_AS_PRIMARY
pdata->panel_info.fb_num = 2;
#else
diff --git a/drivers/video/msm/msm_fb.h b/drivers/video/msm/msm_fb.h
index 43802a2..a650e73 100644
--- a/drivers/video/msm/msm_fb.h
+++ b/drivers/video/msm/msm_fb.h
@@ -35,7 +35,10 @@
#include <linux/hrtimer.h>
#include <linux/fb.h>
+#include <linux/list.h>
+#include <linux/types.h>
+#include <linux/msm_mdp.h>
#ifdef CONFIG_HAS_EARLYSUSPEND
#include <linux/earlysuspend.h>
#endif
@@ -53,6 +56,17 @@
boolean panel_power_on;
};
+struct msmfb_writeback_data_list {
+ struct list_head registered_entry;
+ struct list_head active_entry;
+ void *addr;
+ struct file *pmem_file;
+ struct msmfb_data buf_info;
+ struct msmfb_img img;
+ int state;
+};
+
+
struct msm_fb_data_type {
__u32 key;
__u32 index;
@@ -151,6 +165,13 @@
struct completion msmfb_update_notify;
struct completion msmfb_no_update_notify;
u32 ov_start, ov_end;
+
+ struct mutex writeback_mutex;
+ struct mutex unregister_mutex;
+ struct list_head writeback_busy_queue;
+ struct list_head writeback_free_queue;
+ struct list_head writeback_register_queue;
+ wait_queue_head_t wait_q;
};
struct dentry *msm_fb_get_debugfs_root(void);
@@ -159,7 +180,17 @@
void msm_fb_set_backlight(struct msm_fb_data_type *mfd, __u32 bkl_lvl);
struct platform_device *msm_fb_add_device(struct platform_device *pdev);
-
+struct fb_info *msm_fb_get_writeback_fb(void);
+int msm_fb_writeback_init(struct fb_info *info);
+int msm_fb_writeback_register_buffer(struct fb_info *info,
+ struct msmfb_writeback_data *data);
+int msm_fb_writeback_queue_buffer(struct fb_info *info,
+ struct msmfb_data *data);
+int msm_fb_writeback_dequeue_buffer(struct fb_info *info,
+ struct msmfb_data *data);
+int msm_fb_writeback_unregister_buffer(struct fb_info *info,
+ struct msmfb_writeback_data *data);
+int msm_fb_writeback_terminate(struct fb_info *info);
int msm_fb_detect_client(const char *name);
#ifdef CONFIG_FB_BACKLIGHT
diff --git a/drivers/video/msm/msm_fb_panel.c b/drivers/video/msm/msm_fb_panel.c
index 84de095..d8eaea2 100644
--- a/drivers/video/msm/msm_fb_panel.c
+++ b/drivers/video/msm/msm_fb_panel.c
@@ -114,6 +114,9 @@
case MIPI_CMD_PANEL:
snprintf(dev_name, sizeof(dev_name), "mipi_dsi");
break;
+ case WRITEBACK_PANEL:
+ snprintf(dev_name, sizeof(dev_name), "writeback");
+ break;
default:
return NULL;
diff --git a/drivers/video/msm/msm_fb_panel.h b/drivers/video/msm/msm_fb_panel.h
index 4c415b6..82ac915 100644
--- a/drivers/video/msm/msm_fb_panel.h
+++ b/drivers/video/msm/msm_fb_panel.h
@@ -37,6 +37,7 @@
#define DTV_PANEL 7 /* DTV */
#define MIPI_VIDEO_PANEL 8 /* MIPI */
#define MIPI_CMD_PANEL 9 /* MIPI */
+#define WRITEBACK_PANEL 10 /* Wifi display */
/* panel class */
typedef enum {
@@ -122,7 +123,7 @@
char dma_trigger;
uint32 dsi_pclk_rate;
/* The packet-size should not bet changed */
- char fixed_packet_size;
+ char no_max_pkt_size;
/* Clock required during LP commands */
char force_clk_lane_hs;
/* Pad width */
diff --git a/include/linux/cyttsp.h b/include/linux/cyttsp.h
index 8d69031..0e5cac7 100644
--- a/include/linux/cyttsp.h
+++ b/include/linux/cyttsp.h
@@ -87,9 +87,11 @@
#define CY_TMA300_VTG_MAX_UV 5500000
#define CY_TMA300_VTG_MIN_UV 1710000
#define CY_TMA300_CURR_24HZ_UA 17500
+#define CY_TMA300_SLEEP_CURR_UA 10
#define CY_I2C_VTG_MAX_UV 1800000
#define CY_I2C_VTG_MIN_UV 1800000
#define CY_I2C_CURR_UA 9630
+#define CY_I2C_SLEEP_CURR_UA 10
/* define for inclusion of TTSP App Update Load File
@@ -445,9 +447,10 @@
struct cyttsp_regulator {
const char *name;
- u32 min_uV;
u32 max_uV;
- u32 load_uA;
+ u32 min_uV;
+ u32 hpm_load_uA;
+ u32 lpm_load_uA;
};
struct cyttsp_platform_data {
@@ -484,6 +487,7 @@
#ifdef CY_USE_I2C_DRIVER
s32 (*init)(struct i2c_client *client);
s32 (*resume)(struct i2c_client *client);
+ s32 (*suspend)(struct i2c_client *client);
#endif
#ifdef CY_USE_SPI_DRIVER
s32 (*init)(struct spi_device *spi);
diff --git a/include/linux/ion.h b/include/linux/ion.h
index 9f220f8..4b7b8b7d1 100644
--- a/include/linux/ion.h
+++ b/include/linux/ion.h
@@ -65,6 +65,7 @@
#define ION_VMALLOC_HEAP_NAME "vmalloc"
#define ION_EBI1_HEAP_NAME "EBI1"
#define ION_ADSP_HEAP_NAME "adsp"
+#define ION_SMI_HEAP_NAME "smi"
#define CACHED 1
#define UNCACHED 0
diff --git a/include/linux/mfd/pm8xxx/pm8921-adc.h b/include/linux/mfd/pm8xxx/pm8921-adc.h
index 2d81134..c66ae84 100644
--- a/include/linux/mfd/pm8xxx/pm8921-adc.h
+++ b/include/linux/mfd/pm8xxx/pm8921-adc.h
@@ -221,6 +221,8 @@
* @offset: Offset with respect to the actual curve
* @dy: Numerator slope to calculate the gain
* @dx: Denominator slope to calculate the gain
+ * @adc_vref: A/D word of the Voltage reference used for the channel
+ * @adc_gnd: A/D word of the Ground reference used for the channel
*
* Each ADC device has different offset and gain parameters which are computed
* to calibrate the device.
@@ -229,6 +231,8 @@
int32_t offset;
int32_t dy;
int32_t dx;
+ int32_t adc_vref;
+ int32_t adc_gnd;
};
/**
@@ -453,8 +457,8 @@
* levels once the thresholds are reached
*/
struct pm8921_adc_arb_btm_param {
- uint32_t low_thr_temp;
- uint32_t high_thr_temp;
+ int32_t low_thr_temp;
+ int32_t high_thr_temp;
uint64_t low_thr_voltage;
uint64_t high_thr_voltage;
int32_t interval;
@@ -462,8 +466,9 @@
void (*btm_cool_fn) (bool);
};
-int32_t pm8921_adc_batt_scaler(struct pm8921_adc_arb_btm_param *);
-
+int32_t pm8921_adc_batt_scaler(struct pm8921_adc_arb_btm_param *,
+ const struct pm8921_adc_properties *adc_prop,
+ const struct pm8921_adc_chan_properties *chan_prop);
/**
* struct pm8921_adc_platform_data - PM8921 ADC platform data
* @adc_prop: ADC specific parameters, voltage and channel setup
diff --git a/include/linux/mfd/pm8xxx/pm8921-charger.h b/include/linux/mfd/pm8xxx/pm8921-charger.h
index aeb88b2..73067b7 100644
--- a/include/linux/mfd/pm8xxx/pm8921-charger.h
+++ b/include/linux/mfd/pm8xxx/pm8921-charger.h
@@ -35,8 +35,10 @@
/**
* struct pm8921_charger_platform_data -
- * @safety_time: max charging time in minutes
+ * @safety_time: max charging time in minutes incl. fast and trkl
+ * valid range 4 to 512 min. PON default 120 min
* @ttrkl_time: max trckl charging time in minutes
+ * valid range 1 to 64 mins. PON default 15 min
* @update_time: how often the userland be updated of the charging (msec)
* @max_voltage: the max voltage (mV) the battery should be charged up to
* @min_voltage: the voltage (mV) where charging method switches from
diff --git a/include/linux/mfd/wcd9310/pdata.h b/include/linux/mfd/wcd9310/pdata.h
index 13d52fb..9ca6a8c 100644
--- a/include/linux/mfd/wcd9310/pdata.h
+++ b/include/linux/mfd/wcd9310/pdata.h
@@ -25,6 +25,23 @@
#define TABLA_CFILT2_SEL 0x1
#define TABLA_CFILT3_SEL 0x2
+#define MAX_AMIC_CHANNEL 7
+
+struct tabla_amic {
+ /*legacy mode, txfe_enable and txfe_buff take 7 input
+ * each bit represent the channel / TXFE number
+ * and numbered as below
+ * bit 0 = channel 1 / TXFE1_ENABLE / TXFE1_BUFF
+ * bit 1 = channel 2 / TXFE2_ENABLE / TXFE2_BUFF
+ * ...
+ * bit 7 = channel 7 / TXFE7_ENABLE / TXFE7_BUFF
+ */
+ u8 legacy_mode:MAX_AMIC_CHANNEL;
+ u8 txfe_enable:MAX_AMIC_CHANNEL;
+ u8 txfe_buff:MAX_AMIC_CHANNEL;
+ u8 use_pdata:MAX_AMIC_CHANNEL;
+};
+
/* Each micbias can be assigned to one of three cfilters
* Vbatt_min >= .15V + ldoh_v
* ldoh_v >= .15v + cfiltx_mv
@@ -50,6 +67,7 @@
int irq_base;
int num_irqs;
int reset_gpio;
+ struct tabla_amic amic_settings;
struct slim_device slimbus_slave_device;
struct tabla_micbias_setting micbias;
};
diff --git a/include/linux/mmc/host.h b/include/linux/mmc/host.h
index de90088..312b17b 100644
--- a/include/linux/mmc/host.h
+++ b/include/linux/mmc/host.h
@@ -218,10 +218,12 @@
int clk_requests; /* internal reference counter */
unsigned int clk_delay; /* number of MCI clk hold cycles */
bool clk_gated; /* clock gated */
- struct work_struct clk_gate_work; /* delayed clock gate */
+ struct delayed_work clk_gate_work; /* delayed clock gate */
unsigned int clk_old; /* old clock value cache */
spinlock_t clk_lock; /* lock for clk fields */
struct mutex clk_gate_mutex; /* mutex for clock gating */
+ struct device_attribute clkgate_delay_attr;
+ unsigned long clkgate_delay;
#endif
/* host specific block data */
diff --git a/include/linux/msm_kgsl.h b/include/linux/msm_kgsl.h
index b55cfe1..84e8564 100644
--- a/include/linux/msm_kgsl.h
+++ b/include/linux/msm_kgsl.h
@@ -41,7 +41,8 @@
enum kgsl_user_mem_type {
KGSL_USER_MEM_TYPE_PMEM = 0x00000000,
KGSL_USER_MEM_TYPE_ASHMEM = 0x00000001,
- KGSL_USER_MEM_TYPE_ADDR = 0x00000002
+ KGSL_USER_MEM_TYPE_ADDR = 0x00000002,
+ KGSL_USER_MEM_TYPE_ION = 0x00000003,
};
struct kgsl_devinfo {
diff --git a/include/linux/msm_mdp.h b/include/linux/msm_mdp.h
index ac18939..d909c8b 100644
--- a/include/linux/msm_mdp.h
+++ b/include/linux/msm_mdp.h
@@ -55,6 +55,17 @@
#define MSMFB_OVERLAY_PLAY_WAIT _IOWR(MSMFB_IOCTL_MAGIC, 149, \
struct msmfb_overlay_data)
+#define MSMFB_WRITEBACK_INIT _IO(MSMFB_IOCTL_MAGIC, 150)
+#define MSMFB_WRITEBACK_REGISTER_BUFFER _IOW(MSMFB_IOCTL_MAGIC, 151, \
+ struct msmfb_writeback_data)
+#define MSMFB_WRITEBACK_UNREGISTER_BUFFER _IOW(MSMFB_IOCTL_MAGIC, 152, \
+ struct msmfb_writeback_data)
+#define MSMFB_WRITEBACK_QUEUE_BUFFER _IOW(MSMFB_IOCTL_MAGIC, 153, \
+ struct msmfb_data)
+#define MSMFB_WRITEBACK_DEQUEUE_BUFFER _IOW(MSMFB_IOCTL_MAGIC, 154, \
+ struct msmfb_data)
+#define MSMFB_WRITEBACK_TERMINATE _IO(MSMFB_IOCTL_MAGIC, 155)
+
#define FB_TYPE_3D_PANEL 0x10101010
#define MDP_IMGTYPE2_START 0x10000
#define MSMFB_DRIVER_VERSION 0xF9E8D701
@@ -224,6 +235,12 @@
uint32_t format;
};
+#define MSMFB_WRITEBACK_DEQUEUE_BLOCKING 0x1
+struct msmfb_writeback_data {
+ struct msmfb_data buf_info;
+ struct msmfb_img img;
+};
+
struct dpp_ctrl {
/*
*'sharp_strength' has inputs = -128 <-> 127
@@ -297,7 +314,17 @@
/* get the framebuffer physical address information */
int get_fb_phys_info(unsigned long *start, unsigned long *len, int fb_num);
-
+struct fb_info *msm_fb_get_writeback_fb(void);
+int msm_fb_writeback_init(struct fb_info *info);
+int msm_fb_writeback_register_buffer(struct fb_info *info,
+ struct msmfb_writeback_data *data);
+int msm_fb_writeback_queue_buffer(struct fb_info *info,
+ struct msmfb_data *data);
+int msm_fb_writeback_dequeue_buffer(struct fb_info *info,
+ struct msmfb_data *data);
+int msm_fb_writeback_unregister_buffer(struct fb_info *info,
+ struct msmfb_writeback_data *data);
+int msm_fb_writeback_terminate(struct fb_info *info);
#endif
#endif /*_MSM_MDP_H_*/
diff --git a/include/linux/of.h b/include/linux/of.h
index bd716f8..6a1272c 100644
--- a/include/linux/of.h
+++ b/include/linux/of.h
@@ -253,6 +253,13 @@
return -ENOSYS;
}
+static inline const void *of_get_property(const struct device_node *node,
+ const char *name,
+ int *lenp)
+{
+ return NULL;
+}
+
#endif /* CONFIG_OF */
static inline int of_property_read_u32(const struct device_node *np,
diff --git a/include/linux/usb/msm_hsusb.h b/include/linux/usb/msm_hsusb.h
index d776718..62d58de 100644
--- a/include/linux/usb/msm_hsusb.h
+++ b/include/linux/usb/msm_hsusb.h
@@ -240,6 +240,7 @@
struct msm_hsic_host_platform_data {
unsigned strobe;
unsigned data;
+ unsigned hub_reset;
};
#endif
diff --git a/include/media/msm_camera.h b/include/media/msm_camera.h
index 327aee4..fa19613 100644
--- a/include/media/msm_camera.h
+++ b/include/media/msm_camera.h
@@ -381,9 +381,11 @@
#define CMD_AXI_CFG_ZSL 43
#define CMD_AXI_CFG_SNAP_VPE 44
#define CMD_AXI_CFG_SNAP_THUMB_VPE 45
-#define CMD_CONFIG_PING_ADDR 46
-#define CMD_CONFIG_PONG_ADDR 47
-#define CMD_CONFIG_FREE_BUF_ADDR 48
+#define CMD_AXI_CFG_VIDEO_ALL_CHNLS 46
+#define CMD_AXI_CFG_ZSL_ALL_CHNLS 47
+#define CMD_CONFIG_PING_ADDR 48
+#define CMD_CONFIG_PONG_ADDR 49
+#define CMD_CONFIG_FREE_BUF_ADDR 50
/* vfe config command: config command(from config thread)*/
struct msm_vfe_cfg_cmd {
@@ -469,7 +471,9 @@
#define OUTPUT_1_AND_CAMIF_TO_AXI_VIA_OUTPUT_2 5
#define OUTPUT_2_AND_CAMIF_TO_AXI_VIA_OUTPUT_1 6
#define OUTPUT_1_2_AND_3 7
-#define LAST_AXI_OUTPUT_MODE_ENUM = OUTPUT_1_2_AND_3 7
+#define OUTPUT_ALL_CHNLS 8
+#define OUTPUT_ZSL_ALL_CHNLS 9
+#define LAST_AXI_OUTPUT_MODE_ENUM OUTPUT_ZSL_ALL_CHNLS
#define MSM_FRAME_PREV_1 0
#define MSM_FRAME_PREV_2 1
diff --git a/include/media/msm_isp.h b/include/media/msm_isp.h
index d4fe4ca..b4e1981 100644
--- a/include/media/msm_isp.h
+++ b/include/media/msm_isp.h
@@ -171,6 +171,7 @@
#define VFE_CMD_GET_PCA_ROLLOFF_TABLE 125
#define VFE_CMD_GET_RGB_G_TABLE 126
#define VFE_CMD_GET_LA_TABLE 127
+#define VFE_CMD_DEMOSAICV3_UPDATE 128
struct msm_isp_cmd {
int32_t id;
diff --git a/include/media/radio-iris.h b/include/media/radio-iris.h
index e96d513..d9687ba 100644
--- a/include/media/radio-iris.h
+++ b/include/media/radio-iris.h
@@ -128,6 +128,7 @@
#define HCI_OCF_FM_RDS_GRP_PROCESS 0x0013
#define HCI_OCF_FM_EN_WAN_AVD_CTRL 0x0014
#define HCI_OCF_FM_EN_NOTCH_CTRL 0x0015
+#define HCI_OCF_FM_SET_EVENT_MASK 0x0016
/* HCI trans control commans opcode*/
#define HCI_OCF_FM_ENABLE_TRANS_REQ 0x0001
@@ -738,6 +739,12 @@
__u8 mode;
__u8 data[MAX_CALIB_SIZE];
} __packed;
+
+/* Low Power mode*/
+#define SIG_LEVEL_INTR (1 << 0)
+#define RDS_SYNC_INTR (1 << 1)
+#define AUDIO_CTRL_INTR (1 << 2)
+#define AF_JUMP_ENABLE (1 << 4)
int hci_def_data_read(struct hci_fm_def_data_rd_req *arg,
struct radio_hci_dev *hdev);
int hci_def_data_write(struct hci_fm_def_data_wr_req *arg,
diff --git a/include/net/bluetooth/hci.h b/include/net/bluetooth/hci.h
index b67803a..744eb72 100644
--- a/include/net/bluetooth/hci.h
+++ b/include/net/bluetooth/hci.h
@@ -124,7 +124,7 @@
#define HCI_PAIRING_TIMEOUT (60000) /* 60 seconds */
#define HCI_IDLE_TIMEOUT (6000) /* 6 seconds */
#define HCI_INIT_TIMEOUT (10000) /* 10 seconds */
-#define HCI_CMD_TIMEOUT (1000) /* 1 seconds */
+#define HCI_CMD_TIMEOUT (5000) /* 5 seconds */
/* HCI data types */
#define HCI_COMMAND_PKT 0x01
diff --git a/include/net/bluetooth/mgmt.h b/include/net/bluetooth/mgmt.h
index 127c7ca..ce7ecf1 100644
--- a/include/net/bluetooth/mgmt.h
+++ b/include/net/bluetooth/mgmt.h
@@ -219,6 +219,15 @@
#define MGMT_OP_SET_LIMIT_DISCOVERABLE 0x001F
+#define MGMT_OP_SET_CONNECTION_PARAMS 0x0020
+struct mgmt_cp_set_connection_params {
+ bdaddr_t bdaddr;
+ __le16 interval_min;
+ __le16 interval_max;
+ __le16 slave_latency;
+ __le16 timeout_multiplier;
+} __packed;
+
#define MGMT_EV_CMD_COMPLETE 0x0001
struct mgmt_ev_cmd_complete {
__le16 opcode;
diff --git a/include/sound/apr_audio.h b/include/sound/apr_audio.h
index d2a7dba..aff1ce8 100644
--- a/include/sound/apr_audio.h
+++ b/include/sound/apr_audio.h
@@ -768,6 +768,11 @@
u16 dtx_mode;
};
+struct asm_amrwb_read_cfg {
+ u16 mode;
+ u16 dtx_mode;
+};
+
struct asm_evrc_read_cfg {
u16 max_rate;
u16 min_rate;
@@ -819,6 +824,7 @@
struct asm_evrc_read_cfg evrc;
struct asm_qcelp13_read_cfg qcelp13;
struct asm_sbc_read_cfg sbc;
+ struct asm_amrwb_read_cfg amrwb;
} __attribute__((packed)) cfg;
};
@@ -849,6 +855,7 @@
#define MP3 0x00010BE9
#define MPEG4_AAC 0x00010BEA
#define AMRNB_FS 0x00010BEB
+#define AMRWB_FS 0x00010BEC
#define V13K_FS 0x00010BED
#define EVRC_FS 0x00010BEE
#define EVRCB_FS 0x00010BEF
diff --git a/include/sound/q6asm.h b/include/sound/q6asm.h
index fc7e521..f146684 100644
--- a/include/sound/q6asm.h
+++ b/include/sound/q6asm.h
@@ -236,6 +236,9 @@
int q6asm_enc_cfg_blk_amrnb(struct audio_client *ac, uint32_t frames_per_buf,
uint16_t band_mode, uint16_t dtx_enable);
+int q6asm_enc_cfg_blk_amrwb(struct audio_client *ac, uint32_t frames_per_buf,
+ uint16_t band_mode, uint16_t dtx_enable);
+
int q6asm_media_format_block_pcm(struct audio_client *ac,
uint32_t rate, uint32_t channels);
@@ -281,4 +284,8 @@
int q6asm_get_apr_service_id(int session_id);
#endif
+/* Common format block without any payload
+*/
+int q6asm_media_format_block(struct audio_client *ac, uint32_t format);
+
#endif /* __Q6_ASM_H__ */
diff --git a/include/sound/soc.h b/include/sound/soc.h
index e5f2bf0..2fcde6f 100644
--- a/include/sound/soc.h
+++ b/include/sound/soc.h
@@ -138,6 +138,14 @@
.private_value = (unsigned long)&(struct soc_mixer_control) \
{.reg = xreg, .shift = shift_left, .rshift = shift_right, \
.max = xmax, .platform_max = xmax, .invert = xinvert} }
+#define SOC_SINGLE_MULTI_EXT(xname, xreg, xshift, xmax, xinvert, xcount,\
+ xhandler_get, xhandler_put) \
+{ .iface = SNDRV_CTL_ELEM_IFACE_MIXER, .name = xname, \
+ .info = snd_soc_info_multi_ext, \
+ .get = xhandler_get, .put = xhandler_put, \
+ .private_value = (unsigned long)&(struct soc_multi_mixer_control) \
+ {.reg = xreg, .shift = xshift, .rshift = xshift, .max = xmax, \
+ .count = xcount, .platform_max = xmax, .invert = xinvert} }
#define SOC_SINGLE_EXT_TLV(xname, xreg, xshift, xmax, xinvert,\
xhandler_get, xhandler_put, tlv_array) \
{ .iface = SNDRV_CTL_ELEM_IFACE_MIXER, .name = xname, \
@@ -432,6 +440,8 @@
struct snd_ctl_elem_value *ucontrol);
int snd_soc_put_volsw_s8(struct snd_kcontrol *kcontrol,
struct snd_ctl_elem_value *ucontrol);
+int snd_soc_info_multi_ext(struct snd_kcontrol *kcontrol,
+ struct snd_ctl_elem_info *uinfo);
int snd_soc_limit_volume(struct snd_soc_codec *codec,
const char *name, int max);
int snd_soc_info_volsw_2r_sx(struct snd_kcontrol *kcontrol,
@@ -927,6 +937,12 @@
unsigned int reg, rreg, shift, rshift, invert;
};
+/* mixer multiple input control */
+struct soc_multi_mixer_control {
+ int min, max, platform_max, count;
+ unsigned int reg, rreg, shift, rshift, invert;
+};
+
/* enumerated kcontrol */
struct soc_enum {
unsigned short reg;
diff --git a/mm/page_alloc.c b/mm/page_alloc.c
index fef8dc3..18f239c 100644
--- a/mm/page_alloc.c
+++ b/mm/page_alloc.c
@@ -4652,6 +4652,9 @@
unsigned long totalpages = early_calculate_totalpages();
int usable_nodes = nodes_weight(node_states[N_HIGH_MEMORY]);
+#ifdef CONFIG_FIX_MOVABLE_ZONE
+ required_movablecore = movable_reserved_size >> PAGE_SHIFT;
+#endif
/*
* If movablecore was specified, calculate what size of
* kernelcore that corresponds so that memory usable for
diff --git a/mm/slub.c b/mm/slub.c
index 35f351f..adf609e 100644
--- a/mm/slub.c
+++ b/mm/slub.c
@@ -557,10 +557,10 @@
memset(p + s->objsize, val, s->inuse - s->objsize);
}
-static u8 *check_bytes(u8 *start, unsigned int value, unsigned int bytes)
+static u8 *check_bytes8(u8 *start, u8 value, unsigned int bytes)
{
while (bytes) {
- if (*start != (u8)value)
+ if (*start != value)
return start;
start++;
bytes--;
@@ -568,6 +568,38 @@
return NULL;
}
+static u8 *check_bytes(u8 *start, u8 value, unsigned int bytes)
+{
+ u64 value64;
+ unsigned int words, prefix;
+
+ if (bytes <= 16)
+ return check_bytes8(start, value, bytes);
+
+ value64 = value | value << 8 | value << 16 | value << 24;
+ value64 = (value64 & 0xffffffff) | value64 << 32;
+ prefix = 8 - ((unsigned long)start) % 8;
+
+ if (prefix) {
+ u8 *r = check_bytes8(start, value, prefix);
+ if (r)
+ return r;
+ start += prefix;
+ bytes -= prefix;
+ }
+
+ words = bytes / 8;
+
+ while (words) {
+ if (*(u64 *)start != value64)
+ return check_bytes8(start, value, 8);
+ start += 8;
+ words--;
+ }
+
+ return check_bytes8(start, value, bytes % 8);
+}
+
static void restore_bytes(struct kmem_cache *s, char *message, u8 data,
void *from, void *to)
{
diff --git a/net/bluetooth/hci_core.c b/net/bluetooth/hci_core.c
index 0fa1262..b7bbe02 100644
--- a/net/bluetooth/hci_core.c
+++ b/net/bluetooth/hci_core.c
@@ -193,6 +193,7 @@
/* Reset device */
set_bit(HCI_RESET, &hdev->flags);
+ memset(&hdev->features, 0, sizeof(hdev->features));
hci_send_cmd(hdev, HCI_OP_RESET, 0, NULL);
}
diff --git a/net/bluetooth/mgmt.c b/net/bluetooth/mgmt.c
index 77845f2..094bfdb 100644
--- a/net/bluetooth/mgmt.c
+++ b/net/bluetooth/mgmt.c
@@ -1699,6 +1699,48 @@
return err;
}
+static int set_connection_params(struct sock *sk, u16 index,
+ unsigned char *data, u16 len)
+{
+ struct mgmt_cp_set_connection_params *cp = (void *) data;
+ struct hci_dev *hdev;
+ struct hci_conn *conn;
+ int err;
+
+ BT_DBG("");
+
+ if (len != sizeof(*cp))
+ return cmd_status(sk, index, MGMT_OP_SET_CONNECTION_PARAMS,
+ EINVAL);
+
+ hdev = hci_dev_get(index);
+ if (!hdev)
+ return cmd_status(sk, index, MGMT_OP_SET_CONNECTION_PARAMS,
+ ENODEV);
+
+ hci_dev_lock(hdev);
+
+ conn = hci_conn_hash_lookup_ba(hdev, LE_LINK, &cp->bdaddr);
+ if (!conn) {
+ err = cmd_status(sk, index, MGMT_OP_SET_CONNECTION_PARAMS,
+ ENOTCONN);
+ goto failed;
+ }
+
+ hci_le_conn_update(conn, le16_to_cpu(cp->interval_min),
+ le16_to_cpu(cp->interval_max),
+ le16_to_cpu(cp->slave_latency),
+ le16_to_cpu(cp->timeout_multiplier));
+
+ err = cmd_status(sk, index, MGMT_OP_SET_CONNECTION_PARAMS, 0);
+
+failed:
+ hci_dev_unlock(hdev);
+ hci_dev_put(hdev);
+
+ return err;
+}
+
static int set_local_name(struct sock *sk, u16 index, unsigned char *data,
u16 len)
{
@@ -2262,6 +2304,9 @@
case MGMT_OP_RESOLVE_NAME:
err = resolve_name(sk, index, buf + sizeof(*hdr), len);
break;
+ case MGMT_OP_SET_CONNECTION_PARAMS:
+ err = set_connection_params(sk, index, buf + sizeof(*hdr), len);
+ break;
case MGMT_OP_READ_LOCAL_OOB_DATA:
err = read_local_oob_data(sk, index);
break;
diff --git a/net/bluetooth/smp.c b/net/bluetooth/smp.c
index e725148..a88f4a5 100644
--- a/net/bluetooth/smp.c
+++ b/net/bluetooth/smp.c
@@ -31,6 +31,11 @@
#define SMP_TIMEOUT 30000 /* 30 seconds */
+#define SMP_MIN_CONN_INTERVAL 40 /* 50ms (40 * 1.25ms) */
+#define SMP_MAX_CONN_INTERVAL 56 /* 70ms (56 * 1.25ms) */
+#define SMP_MAX_CONN_LATENCY 0 /* 0ms (0 * 1.25ms) */
+#define SMP_SUPERVISION_TIMEOUT 500 /* 5 seconds (500 * 10ms) */
+
#ifndef FALSE
#define FALSE 0
#define TRUE (!FALSE)
@@ -696,6 +701,10 @@
invalid_key:
hcon->sec_req = FALSE;
+ /* Switch to Pairing Connection Parameters */
+ hci_le_conn_update(hcon, SMP_MIN_CONN_INTERVAL, SMP_MAX_CONN_INTERVAL,
+ SMP_MAX_CONN_LATENCY, SMP_SUPERVISION_TIMEOUT);
+
skb_pull(skb, sizeof(*rp));
memset(&cp, 0, sizeof(cp));
@@ -763,6 +772,11 @@
if (hcon->link_mode & HCI_LM_MASTER) {
struct smp_cmd_pairing cp;
+ /* Switch to Pairing Connection Parameters */
+ hci_le_conn_update(hcon, SMP_MIN_CONN_INTERVAL,
+ SMP_MAX_CONN_INTERVAL, SMP_MAX_CONN_LATENCY,
+ SMP_SUPERVISION_TIMEOUT);
+
build_pairing_cmd(conn, &cp, NULL, authreq);
hcon->preq[0] = SMP_CMD_PAIRING_REQ;
memcpy(&hcon->preq[1], &cp, sizeof(cp));
diff --git a/sound/soc/codecs/wcd9310.c b/sound/soc/codecs/wcd9310.c
index 620822c..ad8190c 100644
--- a/sound/soc/codecs/wcd9310.c
+++ b/sound/soc/codecs/wcd9310.c
@@ -2801,6 +2801,12 @@
struct snd_soc_codec *codec = tabla->codec;
struct tabla_pdata *pdata = tabla->pdata;
int k1, k2, k3, rc = 0;
+ u8 leg_mode = pdata->amic_settings.legacy_mode;
+ u8 txfe_bypass = pdata->amic_settings.txfe_enable;
+ u8 txfe_buff = pdata->amic_settings.txfe_buff;
+ u8 flag = pdata->amic_settings.use_pdata;
+ u8 i = 0, j = 0;
+ u8 val_txfe = 0, value = 0;
if (!pdata) {
rc = -ENODEV;
@@ -2850,6 +2856,38 @@
snd_soc_update_bits(codec, TABLA_A_MICB_4_CTL, 0x60,
(pdata->micbias.bias4_cfilt_sel << 5));
+ for (i = 0; i < 6; j++, i += 2) {
+ if (flag & (0x01 << i)) {
+ value = (leg_mode & (0x01 << i)) ? 0x10 : 0x00;
+ val_txfe = (txfe_bypass & (0x01 << i)) ? 0x20 : 0x00;
+ val_txfe = val_txfe |
+ ((txfe_buff & (0x01 << i)) ? 0x10 : 0x00);
+ snd_soc_update_bits(codec, TABLA_A_TX_1_2_EN + j * 10,
+ 0x10, value);
+ snd_soc_update_bits(codec,
+ TABLA_A_TX_1_2_TEST_EN + j * 10,
+ 0x30, val_txfe);
+ }
+ if (flag & (0x01 << (i + 1))) {
+ value = (leg_mode & (0x01 << (i + 1))) ? 0x01 : 0x00;
+ val_txfe = (txfe_bypass &
+ (0x01 << (i + 1))) ? 0x02 : 0x00;
+ val_txfe |= (txfe_buff &
+ (0x01 << (i + 1))) ? 0x01 : 0x00;
+ snd_soc_update_bits(codec, TABLA_A_TX_1_2_EN + j * 10,
+ 0x01, value);
+ snd_soc_update_bits(codec,
+ TABLA_A_TX_1_2_TEST_EN + j * 10,
+ 0x03, val_txfe);
+ }
+ }
+ if (flag & 0x40) {
+ value = (leg_mode & 0x40) ? 0x10 : 0x00;
+ value = value | ((txfe_bypass & 0x40) ? 0x02 : 0x00);
+ value = value | ((txfe_buff & 0x40) ? 0x01 : 0x00);
+ snd_soc_update_bits(codec, TABLA_A_TX_7_MBHC_EN,
+ 0x13, value);
+ }
done:
return rc;
}
@@ -2919,6 +2957,8 @@
static const struct tabla_reg_mask_val tabla_codec_reg_init_val[] = {
+ {TABLA_A_QFUSE_CTL, 0xFF, 0x03},
+
/* Initialize gain registers to use register gain */
{TABLA_A_RX_HPH_L_GAIN, 0x10, 0x10},
{TABLA_A_RX_HPH_R_GAIN, 0x10, 0x10},
@@ -3010,16 +3050,15 @@
tabla->codec = codec;
tabla->pdata = dev_get_platdata(codec->dev->parent);
- ret = tabla_handle_pdata(tabla);
+ tabla_update_reg_defaults(codec);
+ tabla_codec_init_reg(codec);
+ ret = tabla_handle_pdata(tabla);
if (IS_ERR_VALUE(ret)) {
pr_err("%s: bad pdata\n", __func__);
goto err_pdata;
}
- tabla_update_reg_defaults(codec);
- tabla_codec_init_reg(codec);
-
/* TODO only enable bandgap when necessary in order to save power */
tabla_codec_enable_bandgap(codec, TABLA_BANDGAP_AUDIO_MODE);
tabla_codec_enable_clock_block(codec, 0);
diff --git a/sound/soc/msm/msm-pcm-lpa.c b/sound/soc/msm/msm-pcm-lpa.c
index a3c311c..29f89ce 100644
--- a/sound/soc/msm/msm-pcm-lpa.c
+++ b/sound/soc/msm/msm-pcm-lpa.c
@@ -390,16 +390,24 @@
static int msm_pcm_mmap(struct snd_pcm_substream *substream,
struct vm_area_struct *vma)
{
+ int result = 0;
struct snd_pcm_runtime *runtime = substream->runtime;
struct msm_audio *prtd = runtime->private_data;
pr_debug("%s\n", __func__);
prtd->mmap_flag = 1;
- dma_mmap_coherent(substream->pcm->card->dev, vma,
- runtime->dma_area,
- runtime->dma_addr,
- runtime->dma_bytes);
- return 0;
+
+ if (runtime->dma_addr && runtime->dma_bytes) {
+ vma->vm_page_prot = pgprot_noncached(vma->vm_page_prot);
+ result = remap_pfn_range(vma, vma->vm_start,
+ runtime->dma_addr >> PAGE_SHIFT,
+ runtime->dma_bytes,
+ vma->vm_page_prot);
+ } else {
+ pr_err("Physical address or size of buf is NULL");
+ return -EINVAL;
+ }
+ return result;
}
static int msm_pcm_hw_params(struct snd_pcm_substream *substream,
diff --git a/sound/soc/msm/msm-pcm-q6.c b/sound/soc/msm/msm-pcm-q6.c
index 49324a9..115453c 100644
--- a/sound/soc/msm/msm-pcm-q6.c
+++ b/sound/soc/msm/msm-pcm-q6.c
@@ -588,16 +588,25 @@
static int msm_pcm_mmap(struct snd_pcm_substream *substream,
struct vm_area_struct *vma)
{
+ int result = 0;
struct snd_pcm_runtime *runtime = substream->runtime;
struct msm_audio *prtd = runtime->private_data;
pr_debug("%s\n", __func__);
prtd->mmap_flag = 1;
- dma_mmap_coherent(substream->pcm->card->dev, vma,
- runtime->dma_area,
- runtime->dma_addr,
- runtime->dma_bytes);
- return 0;
+
+ if (runtime->dma_addr && runtime->dma_bytes) {
+ vma->vm_page_prot = pgprot_noncached(vma->vm_page_prot);
+ result = remap_pfn_range(vma, vma->vm_start,
+ runtime->dma_addr >> PAGE_SHIFT,
+ runtime->dma_bytes,
+ vma->vm_page_prot);
+ } else {
+ pr_err("Physical address or size of buf is NULL");
+ return -EINVAL;
+ }
+
+ return result;
}
static int msm_pcm_hw_params(struct snd_pcm_substream *substream,
diff --git a/sound/soc/msm/msm-pcm-routing.c b/sound/soc/msm/msm-pcm-routing.c
index 3c92514..70e081c 100644
--- a/sound/soc/msm/msm-pcm-routing.c
+++ b/sound/soc/msm/msm-pcm-routing.c
@@ -913,6 +913,12 @@
bedai = &msm_bedais[be_id];
+ if (bedai->hw_params == NULL) {
+ pr_err("%s: HW param is not configured", __func__);
+ return -EINVAL;
+ }
+
+
if (substream->stream == SNDRV_PCM_STREAM_PLAYBACK) {
path_type = ADM_PATH_PLAYBACK;
session_type = SESSION_TYPE_RX;
diff --git a/sound/soc/msm/msm-pcm-voip.c b/sound/soc/msm/msm-pcm-voip.c
index c49574c..dd02c98 100644
--- a/sound/soc/msm/msm-pcm-voip.c
+++ b/sound/soc/msm/msm-pcm-voip.c
@@ -32,6 +32,7 @@
#define VOIP_MAX_Q_LEN 10
#define VOIP_MAX_VOC_PKT_SIZE 640
+#define VOIP_MIN_VOC_PKT_SIZE 320
enum voip_state {
VOIP_STOPPED,
@@ -61,6 +62,7 @@
struct list_head free_out_queue;
wait_queue_head_t out_wait;
+ wait_queue_head_t in_wait;
struct mutex lock;
struct mutex in_lock;
@@ -103,7 +105,7 @@
.channels_min = 1,
.channels_max = 1,
.buffer_bytes_max = VOIP_MAX_VOC_PKT_SIZE * VOIP_MAX_Q_LEN,
- .period_bytes_min = VOIP_MAX_VOC_PKT_SIZE,
+ .period_bytes_min = VOIP_MIN_VOC_PKT_SIZE,
.period_bytes_max = VOIP_MAX_VOC_PKT_SIZE,
.periods_min = VOIP_MAX_Q_LEN,
.periods_max = VOIP_MAX_Q_LEN,
@@ -111,6 +113,59 @@
};
+static int msm_voip_mute_put(struct snd_kcontrol *kcontrol,
+ struct snd_ctl_elem_value *ucontrol)
+{
+ int mute = ucontrol->value.integer.value[0];
+
+ pr_debug("%s: mute=%d\n", __func__, mute);
+
+ voc_set_tx_mute(voc_get_session_id(VOIP_SESSION_NAME), TX_PATH, mute);
+
+ return 0;
+}
+
+static int msm_voip_mute_get(struct snd_kcontrol *kcontrol,
+ struct snd_ctl_elem_value *ucontrol)
+{
+ ucontrol->value.integer.value[0] = 0;
+ return 0;
+}
+
+static int msm_voip_volume_put(struct snd_kcontrol *kcontrol,
+ struct snd_ctl_elem_value *ucontrol)
+{
+ int volume = ucontrol->value.integer.value[0];
+
+ pr_debug("%s: volume: %d\n", __func__, volume);
+
+ voc_set_rx_vol_index(voc_get_session_id(VOIP_SESSION_NAME),
+ RX_PATH,
+ volume);
+ return 0;
+}
+static int msm_voip_volume_get(struct snd_kcontrol *kcontrol,
+ struct snd_ctl_elem_value *ucontrol)
+{
+ ucontrol->value.integer.value[0] = 0;
+ return 0;
+}
+
+static struct snd_kcontrol_new msm_voip_controls[] = {
+ SOC_SINGLE_EXT("Voip Tx Mute", SND_SOC_NOPM, 0, 1, 0,
+ msm_voip_mute_get, msm_voip_mute_put),
+ SOC_SINGLE_EXT("Voip Rx Volume", SND_SOC_NOPM, 0, 5, 0,
+ msm_voip_volume_get, msm_voip_volume_put),
+};
+
+static int msm_pcm_voip_probe(struct snd_soc_platform *platform)
+{
+ snd_soc_add_platform_controls(platform, msm_voip_controls,
+ ARRAY_SIZE(msm_voip_controls));
+
+ return 0;
+}
+
/* sample rate supported */
static unsigned int supported_sample_rates[] = {8000, 16000};
@@ -187,6 +242,7 @@
spin_unlock_irqrestore(&prtd->dsp_lock, dsp_flags);
pr_err("DL data not available\n");
}
+ wake_up(&prtd->in_wait);
}
static struct snd_pcm_hw_constraint_list constraints_sample_rates = {
@@ -300,12 +356,15 @@
struct voip_drv_info *prtd = runtime->private_data;
int count = frames_to_bytes(runtime, frames);
- pr_debug("%s: count = %d\n", __func__, count);
+ pr_debug("%s: count = %d, frames=%d\n", __func__, count, (int)frames);
- mutex_lock(&prtd->in_lock);
-
- if (count == VOIP_MAX_VOC_PKT_SIZE) {
- if (!list_empty(&prtd->free_in_queue)) {
+ ret = wait_event_interruptible_timeout(prtd->in_wait,
+ (!list_empty(&prtd->free_in_queue) ||
+ prtd->state == VOIP_STOPPED),
+ 1 * HZ);
+ if (ret > 0) {
+ mutex_lock(&prtd->in_lock);
+ if (count <= VOIP_MAX_VOC_PKT_SIZE) {
buf_node =
list_first_entry(&prtd->free_in_queue,
struct voip_buf_node, list);
@@ -315,15 +374,19 @@
buf, count);
buf_node->frame.len = count;
list_add_tail(&buf_node->list, &prtd->in_queue);
- } else
- pr_err("%s: No free DL buffs\n", __func__);
- } else {
- pr_err("%s: Write count %d is not VOIP_MAX_VOC_PKT_SIZE\n",
- __func__, count);
- ret = -ENOMEM;
- }
+ } else {
+ pr_err("%s: Write cnt %d is > VOIP_MAX_VOC_PKT_SIZE\n",
+ __func__, count);
+ ret = -ENOMEM;
+ }
- mutex_unlock(&prtd->in_lock);
+ mutex_unlock(&prtd->in_lock);
+ } else if (ret == 0) {
+ pr_err("%s: No free DL buffs\n", __func__);
+ ret = -ETIMEDOUT;
+ } else {
+ pr_err("%s: playback copy was interrupted\n", __func__);
+ }
return ret;
}
@@ -349,7 +412,7 @@
if (ret > 0) {
mutex_lock(&prtd->out_lock);
- if (count == VOIP_MAX_VOC_PKT_SIZE) {
+ if (count <= VOIP_MAX_VOC_PKT_SIZE) {
buf_node = list_first_entry(&prtd->out_queue,
struct voip_buf_node, list);
list_del(&buf_node->list);
@@ -366,9 +429,9 @@
list_add_tail(&buf_node->list,
&prtd->free_out_queue);
} else {
- pr_err("%s: Read count %d < VOIP_MAX_VOC_PKT_SIZE\n",
- __func__, count);
- ret = -ENOMEM;
+ pr_err("%s: Read count %d > VOIP_MAX_VOC_PKT_SIZE\n",
+ __func__, count);
+ ret = -ENOMEM;
}
mutex_unlock(&prtd->out_lock);
@@ -666,6 +729,7 @@
static struct snd_soc_platform_driver msm_soc_platform = {
.ops = &msm_pcm_ops,
.pcm_new = msm_asoc_pcm_new,
+ .probe = msm_pcm_voip_probe,
};
static __devinit int msm_pcm_probe(struct platform_device *pdev)
@@ -701,6 +765,7 @@
spin_lock_init(&voip_info.dsp_lock);
init_waitqueue_head(&voip_info.out_wait);
+ init_waitqueue_head(&voip_info.in_wait);
INIT_LIST_HEAD(&voip_info.in_queue);
INIT_LIST_HEAD(&voip_info.free_in_queue);
diff --git a/sound/soc/msm/msm8960.c b/sound/soc/msm/msm8960.c
index 0f08682..f5f5893 100644
--- a/sound/soc/msm/msm8960.c
+++ b/sound/soc/msm/msm8960.c
@@ -577,6 +577,8 @@
pr_debug("%s()\n", __func__);
+ rtd->pmdown_time = 0;
+
err = snd_soc_add_controls(codec, tabla_msm8960_controls,
ARRAY_SIZE(tabla_msm8960_controls));
if (err < 0)
diff --git a/sound/soc/msm/qdsp6/q6asm.c b/sound/soc/msm/qdsp6/q6asm.c
index 9fcee70..eb55f77 100644
--- a/sound/soc/msm/qdsp6/q6asm.c
+++ b/sound/soc/msm/qdsp6/q6asm.c
@@ -295,16 +295,26 @@
}
if (port->buf[0].data) {
- pr_debug("%s:data[%p]phys[%p][%p] cnt[%d]\n",
- __func__,
- (void *)port->buf[0].data,
- (void *)port->buf[0].phys,
- (void *)&port->buf[0].phys, cnt);
- dma_free_coherent(NULL,
- port->buf[0].size * port->max_buf_cnt,
- port->buf[0].data,
- port->buf[0].phys);
+ pr_debug("%s:data[%p]phys[%p][%p]"
+ "mem_buffer[%p]\n",
+ __func__,
+ (void *)port->buf[0].data,
+ (void *)port->buf[0].phys,
+ (void *)&port->buf[0].phys,
+ (void *)port->buf[0].mem_buffer);
+ if (IS_ERR((void *)port->buf[0].mem_buffer))
+ pr_err("%s:mem buffer invalid, error ="
+ "%ld\n", __func__,
+ PTR_ERR((void *)port->buf[0].mem_buffer));
+ else {
+ if (msm_subsystem_unmap_buffer(
+ port->buf[0].mem_buffer) < 0)
+ pr_err("%s: unmap buffer"
+ " failed\n", __func__);
+ }
+ free_contiguous_memory_by_paddr(port->buf[0].phys);
}
+
while (cnt >= 0) {
port->buf[cnt].data = NULL;
port->buf[cnt].phys = 0;
@@ -533,6 +543,7 @@
{
int cnt = 0;
int rc = 0;
+ int flags = 0;
struct audio_buffer *buf;
if (!(ac) || ((dir != IN) && (dir != OUT)))
@@ -560,8 +571,35 @@
ac->port[dir].buf = buf;
- buf[0].data = dma_alloc_coherent(NULL, bufsz * bufcnt,
- &buf[0].phys, GFP_KERNEL);
+ buf[0].phys = allocate_contiguous_ebi_nomap(bufsz * bufcnt,
+ SZ_4K);
+ if (!buf[0].phys) {
+ pr_err("%s:Buf alloc failed "
+ " size=%d, bufcnt=%d\n", __func__,
+ bufsz, bufcnt);
+ mutex_unlock(&ac->cmd_lock);
+ goto fail;
+ }
+
+ flags = MSM_SUBSYSTEM_MAP_KADDR | MSM_SUBSYSTEM_MAP_CACHED;
+ buf[0].mem_buffer = msm_subsystem_map_buffer(buf[0].phys,
+ bufsz * bufcnt, flags, NULL, 0);
+ if (IS_ERR((void *)buf[cnt].mem_buffer)) {
+ pr_err("%s:map_buffer failed,"
+ "error = %ld\n",
+ __func__, PTR_ERR((void *)buf[0].mem_buffer));
+
+ mutex_unlock(&ac->cmd_lock);
+ goto fail;
+ }
+ buf[0].data = buf[0].mem_buffer->vaddr;
+ if (!buf[0].data) {
+ pr_err("%s:invalid vaddr,"
+ " iomap failed\n", __func__);
+ mutex_unlock(&ac->cmd_lock);
+ goto fail;
+ }
+
buf[0].used = dir ^ 1;
buf[0].size = bufsz;
buf[0].actual_size = bufsz;
@@ -1081,6 +1119,10 @@
open.uMode = BUFFER_META_ENABLE | STREAM_PRIORITY_HIGH;
open.format = AMRNB_FS;
break;
+ case FORMAT_AMRWB:
+ open.uMode = BUFFER_META_ENABLE | STREAM_PRIORITY_HIGH;
+ open.format = AMRWB_FS;
+ break;
default:
pr_err("Invalid format[%d]\n", format);
goto fail_cmd;
@@ -1205,6 +1247,27 @@
case FORMAT_WMA_V10PRO:
open.write_format = WMA_V10PRO;
break;
+ case FORMAT_AMRNB:
+ open.write_format = AMRNB_FS;
+ break;
+ case FORMAT_AMRWB:
+ open.write_format = AMRWB_FS;
+ break;
+ case FORMAT_V13K:
+ open.write_format = V13K_FS;
+ break;
+ case FORMAT_EVRC:
+ open.write_format = EVRC_FS;
+ break;
+ case FORMAT_EVRCB:
+ open.write_format = EVRCB_FS;
+ break;
+ case FORMAT_EVRCWB:
+ open.write_format = EVRCWB_FS;
+ break;
+ case FORMAT_MP3:
+ open.write_format = MP3;
+ break;
default:
pr_err("Invalid format[%d]\n", wr_format);
goto fail_cmd;
@@ -1226,6 +1289,9 @@
case FORMAT_AMRNB:
open.read_format = AMRNB_FS;
break;
+ case FORMAT_AMRWB:
+ open.read_format = AMRWB_FS;
+ break;
default:
pr_err("Invalid format[%d]\n", rd_format);
goto fail_cmd;
@@ -1597,6 +1663,44 @@
return -EINVAL;
}
+int q6asm_enc_cfg_blk_amrwb(struct audio_client *ac, uint32_t frames_per_buf,
+ uint16_t band_mode, uint16_t dtx_enable)
+{
+ struct asm_stream_cmd_encdec_cfg_blk enc_cfg;
+ int rc = 0;
+
+ pr_debug("%s:session[%d]frames[%d]band_mode[0x%4x]dtx_enable[0x%4x]",
+ __func__, ac->session, frames_per_buf, band_mode, dtx_enable);
+
+ q6asm_add_hdr(ac, &enc_cfg.hdr, sizeof(enc_cfg), TRUE);
+
+ enc_cfg.hdr.opcode = ASM_STREAM_CMD_SET_ENCDEC_PARAM;
+
+ enc_cfg.param_id = ASM_ENCDEC_CFG_BLK_ID;
+ enc_cfg.param_size = sizeof(struct asm_encode_cfg_blk);
+
+ enc_cfg.enc_blk.frames_per_buf = frames_per_buf;
+ enc_cfg.enc_blk.format_id = AMRWB_FS;
+ enc_cfg.enc_blk.cfg_size = sizeof(struct asm_amrwb_read_cfg);
+ enc_cfg.enc_blk.cfg.amrwb.mode = band_mode;
+ enc_cfg.enc_blk.cfg.amrwb.dtx_mode = dtx_enable;
+
+ rc = apr_send_pkt(ac->apr, (uint32_t *) &enc_cfg);
+ if (rc < 0) {
+ pr_err("Comamnd %d failed\n", ASM_STREAM_CMD_SET_ENCDEC_PARAM);
+ goto fail_cmd;
+ }
+ rc = wait_event_timeout(ac->cmd_wait,
+ (atomic_read(&ac->cmd_state) == 0), 5*HZ);
+ if (!rc) {
+ pr_err("timeout. waited for FORMAT_UPDATE\n");
+ goto fail_cmd;
+ }
+ return 0;
+fail_cmd:
+ return -EINVAL;
+}
+
int q6asm_media_format_block_pcm(struct audio_client *ac,
uint32_t rate, uint32_t channels)
{
@@ -1732,6 +1836,37 @@
}
+
+int q6asm_media_format_block(struct audio_client *ac, uint32_t format)
+{
+
+ struct asm_stream_media_format_update fmt;
+ int rc = 0;
+
+ pr_debug("%s:session[%d] format[0x%x]\n", __func__,
+ ac->session, format);
+
+ q6asm_add_hdr(ac, &fmt.hdr, sizeof(fmt), TRUE);
+ fmt.hdr.opcode = ASM_DATA_CMD_MEDIA_FORMAT_UPDATE;
+ fmt.format = format;
+ fmt.cfg_size = 0;
+
+ rc = apr_send_pkt(ac->apr, (uint32_t *) &fmt);
+ if (rc < 0) {
+ pr_err("%s:Comamnd open failed\n", __func__);
+ goto fail_cmd;
+ }
+ rc = wait_event_timeout(ac->cmd_wait,
+ (atomic_read(&ac->cmd_state) == 0), 5*HZ);
+ if (!rc) {
+ pr_err("%s:timeout. waited for FORMAT_UPDATE\n", __func__);
+ goto fail_cmd;
+ }
+ return 0;
+fail_cmd:
+ return -EINVAL;
+}
+
int q6asm_media_format_block_wma(struct audio_client *ac,
void *cfg)
{
diff --git a/sound/soc/soc-core.c b/sound/soc/soc-core.c
index fa709a7..219ae10 100644
--- a/sound/soc/soc-core.c
+++ b/sound/soc/soc-core.c
@@ -794,9 +794,15 @@
if (substream->stream == SNDRV_PCM_STREAM_PLAYBACK) {
/* start delayed pop wq here for playback streams */
- codec_dai->pop_wait = 1;
- schedule_delayed_work(&rtd->delayed_work,
+ if (rtd->pmdown_time) {
+ codec_dai->pop_wait = 1;
+ schedule_delayed_work(&rtd->delayed_work,
msecs_to_jiffies(rtd->pmdown_time));
+ } else {
+ snd_soc_dapm_stream_event(rtd,
+ codec_dai->driver->playback.stream_name,
+ SND_SOC_DAPM_STREAM_STOP);
+ }
} else {
/* capture streams can be powered down now */
snd_soc_dapm_stream_event(rtd,
@@ -3047,6 +3053,39 @@
EXPORT_SYMBOL_GPL(snd_soc_info_volsw);
/**
+ * snd_soc_info_multi_ext - external single mixer info callback
+ * @kcontrol: mixer control
+ * @uinfo: control element information
+ *
+ * Callback to provide information about a single external mixer control.
+ * that accepts multiple input.
+ *
+ * Returns 0 for success.
+ */
+int snd_soc_info_multi_ext(struct snd_kcontrol *kcontrol,
+ struct snd_ctl_elem_info *uinfo)
+{
+ struct soc_multi_mixer_control *mc =
+ (struct soc_multi_mixer_control *)kcontrol->private_value;
+ int platform_max;
+
+ if (!mc->platform_max)
+ mc->platform_max = mc->max;
+ platform_max = mc->platform_max;
+
+ if (platform_max == 1 && !strnstr(kcontrol->id.name, " Volume", 30))
+ uinfo->type = SNDRV_CTL_ELEM_TYPE_BOOLEAN;
+ else
+ uinfo->type = SNDRV_CTL_ELEM_TYPE_INTEGER;
+
+ uinfo->count = mc->count;
+ uinfo->value.integer.min = 0;
+ uinfo->value.integer.max = platform_max;
+ return 0;
+}
+EXPORT_SYMBOL_GPL(snd_soc_info_multi_ext);
+
+/**
* snd_soc_get_volsw - single mixer get callback
* @kcontrol: mixer control
* @ucontrol: control element information