| commit | efa10f1cc389b0b43733677f69d8e5c545c21045 | [log] [tgz] |
|---|---|---|
| author | Mingcheng Zhu <mingchen@codeaurora.org> | Mon Apr 01 14:55:35 2013 -0700 |
| committer | Mingcheng Zhu <mingchen@codeaurora.org> | Mon Apr 01 15:00:17 2013 -0700 |
| tree | 901a9ad857c9512c433348a15c7ab10b2dc8db43 | |
| parent | 536864e41b25462aed6997b1d3536ac40730aa9a [diff] |
msm: camera:v2: config PIX0 line buffer enable bit When enable dual VFE crop, the VFE0's PIX interface's line buffer needs to be enabled. Change-Id: I64fed15d0326ba40d2ad84d04e9f7270a0a07d75 Signed-off-by: Mingcheng Zhu <mingchen@codeaurora.org>
diff --git a/drivers/media/platform/msm/camera_v2/ispif/msm_ispif.c b/drivers/media/platform/msm/camera_v2/ispif/msm_ispif.c index 22ce35b..7c88b0c 100644 --- a/drivers/media/platform/msm/camera_v2/ispif/msm_ispif.c +++ b/drivers/media/platform/msm/camera_v2/ispif/msm_ispif.c
@@ -380,6 +380,8 @@ data = msm_camera_io_r(ispif->base + ISPIF_VFE_m_CTRL_0(vfe_intf)); data |= (1 << (intftype + 7)); + if (intftype == PIX0) + data |= 1 << PIX0_LINE_BUF_EN_BIT; msm_camera_io_w(data, ispif->base + ISPIF_VFE_m_CTRL_0(vfe_intf));
diff --git a/drivers/media/platform/msm/camera_v2/ispif/msm_ispif_hwreg_v1.h b/drivers/media/platform/msm/camera_v2/ispif/msm_ispif_hwreg_v1.h index afd91d1..9f8b2fa 100644 --- a/drivers/media/platform/msm/camera_v2/ispif/msm_ispif_hwreg_v1.h +++ b/drivers/media/platform/msm/camera_v2/ispif/msm_ispif_hwreg_v1.h
@@ -16,6 +16,7 @@ /* common registers */ #define ISPIF_RST_CMD_ADDR 0x0000 #define ISPIF_IRQ_GLOBAL_CLEAR_CMD_ADDR 0x0124 +#define PIX0_LINE_BUF_EN_BIT 0 #define ISPIF_VFE(m) (0x0)
diff --git a/drivers/media/platform/msm/camera_v2/ispif/msm_ispif_hwreg_v2.h b/drivers/media/platform/msm/camera_v2/ispif/msm_ispif_hwreg_v2.h index 80b32d4..5e61a4d 100644 --- a/drivers/media/platform/msm/camera_v2/ispif/msm_ispif_hwreg_v2.h +++ b/drivers/media/platform/msm/camera_v2/ispif/msm_ispif_hwreg_v2.h
@@ -17,6 +17,7 @@ #define ISPIF_RST_CMD_ADDR 0x008 #define ISPIF_RST_CMD_1_ADDR 0x00C #define ISPIF_IRQ_GLOBAL_CLEAR_CMD_ADDR 0x01C +#define PIX0_LINE_BUF_EN_BIT 6 #define ISPIF_VFE(m) ((m) * 0x200)