| commit | f0d5375e3c7b5d7f128af03c5271c328faeb3ae7 | [log] [tgz] |
|---|---|---|
| author | Will Deacon <will.deacon@arm.com> | Fri Jan 20 11:55:54 2012 +0100 |
| committer | Russell King <rmk+kernel@arm.linux.org.uk> | Mon Jan 23 10:20:04 2012 +0000 |
| tree | 6d1a621761d37727a7c88415824fb9736d3f19d5 | |
| parent | 06e9905152cd124c53f571296e9904ea89c1a39a [diff] |
ARM: 7289/1: vmlinux.lds.S: do not hardcode cacheline size as 32 bytes The linker script assumes a cacheline size of 32 bytes when aligning the .data..cacheline_aligned and .data..percpu sections. This patch updates the script to use L1_CACHE_BYTES, which should be set to 64 on platforms that require it. Signed-off-by: Will Deacon <will.deacon@arm.com> Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>