Merge "msm: acpuclock-8960: Activate 8064 acpu frequency scaling" into msm-3.0
diff --git a/arch/arm/mach-msm/acpuclock-8960.c b/arch/arm/mach-msm/acpuclock-8960.c
index 87c5047..9082b07 100644
--- a/arch/arm/mach-msm/acpuclock-8960.c
+++ b/arch/arm/mach-msm/acpuclock-8960.c
@@ -741,20 +741,18 @@
{
int rc;
- if (cpu_is_msm8960() || cpu_is_msm8930() || cpu_is_msm8627()) {
- rc = rpm_vreg_set_voltage(sc->vreg[VREG_HFPLL_A].rpm_vreg_id,
- sc->vreg[VREG_HFPLL_A].rpm_vreg_voter, 2100000,
- sc->vreg[VREG_HFPLL_A].max_vdd, 0);
- if (rc)
- pr_err("%s regulator enable failed (%d)\n",
- sc->vreg[VREG_HFPLL_A].name, rc);
- rc = rpm_vreg_set_voltage(sc->vreg[VREG_HFPLL_B].rpm_vreg_id,
- sc->vreg[VREG_HFPLL_B].rpm_vreg_voter, 1800000,
- sc->vreg[VREG_HFPLL_B].max_vdd, 0);
- if (rc)
- pr_err("%s regulator enable failed (%d)\n",
- sc->vreg[VREG_HFPLL_B].name, rc);
- }
+ rc = rpm_vreg_set_voltage(sc->vreg[VREG_HFPLL_A].rpm_vreg_id,
+ sc->vreg[VREG_HFPLL_A].rpm_vreg_voter, 2100000,
+ sc->vreg[VREG_HFPLL_A].max_vdd, 0);
+ if (rc)
+ pr_err("%s regulator enable failed (%d)\n",
+ sc->vreg[VREG_HFPLL_A].name, rc);
+ rc = rpm_vreg_set_voltage(sc->vreg[VREG_HFPLL_B].rpm_vreg_id,
+ sc->vreg[VREG_HFPLL_B].rpm_vreg_voter, 1800000,
+ sc->vreg[VREG_HFPLL_B].max_vdd, 0);
+ if (rc)
+ pr_err("%s regulator enable failed (%d)\n",
+ sc->vreg[VREG_HFPLL_B].name, rc);
/* Disable PLL bypass mode. */
writel_relaxed(0x2, sc->hfpll_base + HFPLL_MODE);
@@ -788,20 +786,18 @@
*/
writel_relaxed(0, sc->hfpll_base + HFPLL_MODE);
- if (cpu_is_msm8960() || cpu_is_msm8930() || cpu_is_msm8627()) {
- rc = rpm_vreg_set_voltage(sc->vreg[VREG_HFPLL_B].rpm_vreg_id,
- sc->vreg[VREG_HFPLL_B].rpm_vreg_voter, 0,
- 0, 0);
- if (rc)
- pr_err("%s regulator enable failed (%d)\n",
- sc->vreg[VREG_HFPLL_B].name, rc);
- rc = rpm_vreg_set_voltage(sc->vreg[VREG_HFPLL_A].rpm_vreg_id,
- sc->vreg[VREG_HFPLL_A].rpm_vreg_voter, 0,
- 0, 0);
- if (rc)
- pr_err("%s regulator enable failed (%d)\n",
- sc->vreg[VREG_HFPLL_A].name, rc);
- }
+ rc = rpm_vreg_set_voltage(sc->vreg[VREG_HFPLL_B].rpm_vreg_id,
+ sc->vreg[VREG_HFPLL_B].rpm_vreg_voter, 0,
+ 0, 0);
+ if (rc)
+ pr_err("%s regulator enable failed (%d)\n",
+ sc->vreg[VREG_HFPLL_B].name, rc);
+ rc = rpm_vreg_set_voltage(sc->vreg[VREG_HFPLL_A].rpm_vreg_id,
+ sc->vreg[VREG_HFPLL_A].rpm_vreg_voter, 0,
+ 0, 0);
+ if (rc)
+ pr_err("%s regulator enable failed (%d)\n",
+ sc->vreg[VREG_HFPLL_A].name, rc);
}
/* Program the HFPLL rate. Assumes HFPLL is already disabled. */
@@ -1459,3 +1455,7 @@
struct acpuclk_soc_data acpuclk_8930_soc_data __initdata = {
.init = acpuclk_8960_init,
};
+
+struct acpuclk_soc_data acpuclk_8064_soc_data __initdata = {
+ .init = acpuclk_8960_init,
+};
diff --git a/arch/arm/mach-msm/acpuclock.h b/arch/arm/mach-msm/acpuclock.h
index 6ea691b..ef6c359 100644
--- a/arch/arm/mach-msm/acpuclock.h
+++ b/arch/arm/mach-msm/acpuclock.h
@@ -2,7 +2,7 @@
* MSM architecture CPU clock driver header
*
* Copyright (C) 2007 Google, Inc.
- * Copyright (c) 2007-2011, Code Aurora Forum. All rights reserved.
+ * Copyright (c) 2007-2012, Code Aurora Forum. All rights reserved.
* Author: San Mehat <san@android.com>
*
* This software is licensed under the terms of the GNU General Public
@@ -109,5 +109,6 @@
extern struct acpuclk_soc_data acpuclk_9xxx_soc_data;
extern struct acpuclk_soc_data acpuclk_9615_soc_data;
extern struct acpuclk_soc_data acpuclk_8930_soc_data;
+extern struct acpuclk_soc_data acpuclk_8064_soc_data;
#endif
diff --git a/arch/arm/mach-msm/board-8064-regulator.c b/arch/arm/mach-msm/board-8064-regulator.c
index 5df252c..0808a54 100644
--- a/arch/arm/mach-msm/board-8064-regulator.c
+++ b/arch/arm/mach-msm/board-8064-regulator.c
@@ -1,5 +1,5 @@
/*
- * Copyright (c) 2011, Code Aurora Forum. All rights reserved.
+ * Copyright (c) 2011-2012, Code Aurora Forum. All rights reserved.
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License version 2 and
@@ -133,9 +133,11 @@
};
VREG_CONSUMERS(S5) = {
REGULATOR_SUPPLY("8921_s5", NULL),
+ REGULATOR_SUPPLY("krait0", NULL),
};
VREG_CONSUMERS(S6) = {
REGULATOR_SUPPLY("8921_s6", NULL),
+ REGULATOR_SUPPLY("krait1", NULL),
};
VREG_CONSUMERS(S7) = {
REGULATOR_SUPPLY("8921_s7", NULL),
@@ -174,9 +176,11 @@
};
VREG_CONSUMERS(8821_S0) = {
REGULATOR_SUPPLY("8821_s0", NULL),
+ REGULATOR_SUPPLY("krait2", NULL),
};
VREG_CONSUMERS(8821_S1) = {
REGULATOR_SUPPLY("8821_s1", NULL),
+ REGULATOR_SUPPLY("krait3", NULL),
};
#define PM8XXX_VREG_INIT(_id, _name, _min_uV, _max_uV, _modes, _ops, \
diff --git a/arch/arm/mach-msm/board-8064.c b/arch/arm/mach-msm/board-8064.c
index 0f1550d..187b92e 100644
--- a/arch/arm/mach-msm/board-8064.c
+++ b/arch/arm/mach-msm/board-8064.c
@@ -51,6 +51,7 @@
#include "msm_watchdog.h"
#include "board-8064.h"
+#include "acpuclock.h"
#define MSM_PMEM_ADSP_SIZE 0x7800000
#define MSM_PMEM_AUDIO_SIZE 0x2B4000
@@ -791,6 +792,7 @@
apq8064_init_mmc();
slim_register_board_info(apq8064_slim_devices,
ARRAY_SIZE(apq8064_slim_devices));
+ acpuclk_init(&acpuclk_8064_soc_data);
}
static void __init apq8064_sim_init(void)
diff --git a/arch/arm/mach-msm/cpufreq.c b/arch/arm/mach-msm/cpufreq.c
index 2477221..9bc8eb3 100644
--- a/arch/arm/mach-msm/cpufreq.c
+++ b/arch/arm/mach-msm/cpufreq.c
@@ -3,7 +3,7 @@
* MSM architecture cpufreq driver
*
* Copyright (C) 2007 Google, Inc.
- * Copyright (c) 2007-2010, Code Aurora Forum. All rights reserved.
+ * Copyright (c) 2007-2012, Code Aurora Forum. All rights reserved.
* Author: Mike A. Chan <mikechan@google.com>
*
* This software is licensed under the terms of the GNU General Public
@@ -173,9 +173,6 @@
struct cpufreq_work_struct *cpu_work = NULL;
#endif
- if (cpu_is_apq8064())
- return -ENODEV;
-
table = cpufreq_frequency_get_table(policy->cpu);
if (cpufreq_frequency_table_cpuinfo(policy, table)) {
#ifdef CONFIG_MSM_CPU_FREQ_SET_MIN_MAX