| commit | f11928ab13299a459b53fc881349b3a279e8c863 | [log] [tgz] |
|---|---|---|
| author | Matt Wagantall <mattw@codeaurora.org> | Fri Jul 27 15:47:59 2012 -0700 |
| committer | QuIC Gerrit Code Review <code-review@localhost> | Fri Jul 27 18:26:16 2012 -0700 |
| tree | fba6ac0b3aa6cd7828485cf0d6881a9deb2a7a14 | |
| parent | 29f4b0c2dd17d1c2ebe2a2e0bef9bc783c245741 [diff] |
msm: pil-q6v5-mss: Add memory barrier after RMB_MBA_IMAGE write Ensure the write of the image address in the RMB_MBA_IMAGE RMB register occurs before the writes to the QDSP6SS that releases the Q6 processor from reset. Change-Id: I7efbe4e0b81153cc2dc15d8ec60173008478b826 Signed-off-by: Matt Wagantall <mattw@codeaurora.org>