sh: intc - initial SMP support.
This implements initial support for the SMP INTC (particularly
INTC2) controllers.
These are largely implemented as conventional blocks, with
register sets grouped together at fixed strides relative to
the CPU id.
Signed-off-by: Magnus Damm <damm@igel.co.jp>
Signed-off-by: Paul Mundt <lethal@linux-sh.org>
diff --git a/include/asm-sh/hw_irq.h b/include/asm-sh/hw_irq.h
index 96d9710..cb0b6c9 100644
--- a/include/asm-sh/hw_irq.h
+++ b/include/asm-sh/hw_irq.h
@@ -50,11 +50,17 @@
struct intc_mask_reg {
unsigned long set_reg, clr_reg, reg_width;
intc_enum enum_ids[32];
+#ifdef CONFIG_SMP
+ unsigned long smp;
+#endif
};
struct intc_prio_reg {
unsigned long set_reg, clr_reg, reg_width, field_width;
intc_enum enum_ids[16];
+#ifdef CONFIG_SMP
+ unsigned long smp;
+#endif
};
struct intc_sense_reg {
@@ -62,6 +68,12 @@
intc_enum enum_ids[16];
};
+#ifdef CONFIG_SMP
+#define INTC_SMP(stride, nr) .smp = (stride) | ((nr) << 8)
+#else
+#define INTC_SMP(stride, nr)
+#endif
+
struct intc_desc {
struct intc_vect *vectors;
unsigned int nr_vectors;