Documentation: Add memory mapped ARM architected timer binding
Add a binding for the arm architected timer hardware's memory
mapped interface. The mmio timer hardware is made up of one base
frame and a collection of up to 8 timer frames, where each of the
8 timer frames can have either one or two views. A frame
typically maps to a privilege level (user/kernel, hypervisor,
secure). The first view has full access to the registers within a
frame, while the second view can be restricted to particular
registers within a frame. Each frame must support a physical
timer. It's optional for a frame to support a virtual timer.
Change-Id: I6de73d47da16ed78b33367045d24e178500d5cdd
Signed-off-by: Stephen Boyd <sboyd@codeaurora.org>
1 file changed