commit f5764e84f969801b6752dfb6a56f8f714cf5e7e4
author Sahitya Tummala <stummala@codeaurora.org> Mon Oct 03 13:46:00 2011 +0530
committer Bryan Huntsman <bryanh@codeaurora.org> Tue Oct 04 17:14:18 2011 -0700
tree e1b65029af077915e7df2018f1e35f51145ee044
parent 71aef188b28ed06c44bebbe9d2c02be7296a0597

msm: 8064: configure SDC1 and SDC3 clock pin to NO PULL mode

At power on, by default SDC1 and SDC3 clock pins are configured
in NO PULL mode and currently driver depends on this power
on default state to keep the clock lines in NO PULL mode.
But this change explicitly configures the clock pins to
NO PULL mode.

Signed-off-by: Sahitya Tummala <stummala@codeaurora.org>

arch/arm/mach-msm/board-apq8064.c

diff --git a/arch/arm/mach-msm/board-apq8064.c b/arch/arm/mach-msm/board-apq8064.c
index be9698a..ea54a8b 100644
--- a/arch/arm/mach-msm/board-apq8064.c
+++ b/arch/arm/mach-msm/board-apq8064.c
@@ -129,11 +129,13 @@
 };
 
 static struct msm_mmc_pad_pull sdc1_pad_pull_on_cfg[] = {
+	{TLMM_PULL_SDC1_CLK, GPIO_CFG_NO_PULL},
 	{TLMM_PULL_SDC1_CMD, GPIO_CFG_PULL_UP},
 	{TLMM_PULL_SDC1_DATA, GPIO_CFG_PULL_UP}
 };
 
 static struct msm_mmc_pad_pull sdc1_pad_pull_off_cfg[] = {
+	{TLMM_PULL_SDC1_CLK, GPIO_CFG_NO_PULL},
 	{TLMM_PULL_SDC1_CMD, GPIO_CFG_PULL_DOWN},
 	{TLMM_PULL_SDC1_DATA, GPIO_CFG_PULL_DOWN}
 };
@@ -152,11 +154,13 @@
 };
 
 static struct msm_mmc_pad_pull sdc3_pad_pull_on_cfg[] = {
+	{TLMM_PULL_SDC3_CLK, GPIO_CFG_NO_PULL},
 	{TLMM_PULL_SDC3_CMD, GPIO_CFG_PULL_UP},
 	{TLMM_PULL_SDC3_DATA, GPIO_CFG_PULL_UP}
 };
 
 static struct msm_mmc_pad_pull sdc3_pad_pull_off_cfg[] = {
+	{TLMM_PULL_SDC3_CLK, GPIO_CFG_NO_PULL},
 	{TLMM_PULL_SDC3_CMD, GPIO_CFG_PULL_DOWN},
 	{TLMM_PULL_SDC3_DATA, GPIO_CFG_PULL_DOWN}
 };