msm: Support DEBUG_LL on MSM Copper
Use new config MSM_HAS_DEBUG_UART_HS instead of SERIAL_MSM_HSL so
as to remove dependency on serial driver to be enabled for DEBUG_LL
functionality.
Update register mappings to support UARTDM core v1.4 in
debug-macro.S and uncompress.h and add IO mappings for
debug uart.
Change-Id: If7a95d568cc4128b229e8f20a398fa63efb34924
Signed-off-by: Sathish Ambley <sambley@codeaurora.org>
diff --git a/arch/arm/mach-msm/include/mach/debug-macro.S b/arch/arm/mach-msm/include/mach/debug-macro.S
index 5112888..deeb883 100644
--- a/arch/arm/mach-msm/include/mach/debug-macro.S
+++ b/arch/arm/mach-msm/include/mach/debug-macro.S
@@ -18,6 +18,7 @@
#include <mach/hardware.h>
#include <mach/msm_iomap.h>
+#include <mach/msm_serial_hsl_regs.h>
#ifdef MSM_DEBUG_UART_PHYS
.macro addruart, rp, rv
@@ -26,17 +27,17 @@
.endm
.macro senduart,rd,rx
-#ifdef CONFIG_SERIAL_MSM_HSL
+#ifdef CONFIG_MSM_HAS_DEBUG_UART_HS
@ Clear TX_READY by writing to the UARTDM_CR register
mov r12, #0x300
- str r12, [\rx, #0x10]
+ str r12, [\rx, #UARTDM_CR_OFFSET]
@ Write 0x1 to NCF register
mov r12, #0x1
- str r12, [\rx, #0x40]
+ str r12, [\rx, #UARTDM_NCF_TX_OFFSET]
@ UARTDM reg. Read to induce delay
- ldr r12, [\rx, #0x08]
+ ldr r12, [\rx, #UARTDM_SR_OFFSET]
@ Write the 1 character to UARTDM_TF
- str \rd, [\rx, #0x70]
+ str \rd, [\rx, #UARTDM_TF_OFFSET]
#else
teq \rx, #0
strne \rd, [\rx, #0x0C]
@@ -44,13 +45,13 @@
.endm
.macro waituart,rd,rx
-#ifdef CONFIG_SERIAL_MSM_HSL
+#ifdef CONFIG_MSM_HAS_DEBUG_UART_HS
@ check for TX_EMT in UARTDM_SR
- ldr \rd, [\rx, #0x08]
+ ldr \rd, [\rx, #UARTDM_SR_OFFSET]
tst \rd, #0x08
bne 1002f
@ wait for TXREADY in UARTDM_ISR
-1001: ldreq \rd, [\rx, #0x14]
+1001: ldreq \rd, [\rx, #UARTDM_ISR_OFFSET]
tst \rd, #0x80
dsb
beq 1001b
diff --git a/arch/arm/mach-msm/include/mach/msm_iomap-copper.h b/arch/arm/mach-msm/include/mach/msm_iomap-copper.h
index 3999982..57758c3 100644
--- a/arch/arm/mach-msm/include/mach/msm_iomap-copper.h
+++ b/arch/arm/mach-msm/include/mach/msm_iomap-copper.h
@@ -38,4 +38,9 @@
#define COPPER_TMR0_PHYS 0xF908A000
#define COPPER_TMR0_SIZE SZ_4K
+#ifdef CONFIG_DEBUG_MSMCOPPER_UART
+#define MSM_DEBUG_UART_BASE IOMEM(0xFA782000)
+#define MSM_DEBUG_UART_PHYS 0xF9682000
+#endif
+
#endif
diff --git a/arch/arm/mach-msm/include/mach/msm_serial_hsl_regs.h b/arch/arm/mach-msm/include/mach/msm_serial_hsl_regs.h
new file mode 100644
index 0000000..b465b56
--- /dev/null
+++ b/arch/arm/mach-msm/include/mach/msm_serial_hsl_regs.h
@@ -0,0 +1,35 @@
+/*
+ * Copyright (c) 2011, Code Aurora Forum. All rights reserved.
+ *
+ * This software is licensed under the terms of the GNU General Public
+ * License version 2, as published by the Free Software Foundation, and
+ * may be copied, distributed, and modified under those terms.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ */
+
+#ifndef __ASM_ARCH_MSM_SERIAL_HSL_REGS_H
+#define __ASM_ARCH_MSM_SERIAL_HSL_REGS_H
+
+#ifdef CONFIG_MSM_HAS_DEBUG_UART_HS_V14
+#define UARTDM_MR2_OFFSET 0x4
+#define UARTDM_CSR_OFFSET 0xa0
+#define UARTDM_SR_OFFSET 0xa4
+#define UARTDM_CR_OFFSET 0xa8
+#define UARTDM_ISR_OFFSET 0xb4
+#define UARTDM_NCF_TX_OFFSET 0x40
+#define UARTDM_TF_OFFSET 0x100
+#else
+#define UARTDM_MR2_OFFSET 0x4
+#define UARTDM_CSR_OFFSET 0x8
+#define UARTDM_SR_OFFSET 0x8
+#define UARTDM_CR_OFFSET 0x10
+#define UARTDM_ISR_OFFSET 0x14
+#define UARTDM_NCF_TX_OFFSET 0x40
+#define UARTDM_TF_OFFSET 0x70
+#endif
+
+#endif
diff --git a/arch/arm/mach-msm/include/mach/uncompress.h b/arch/arm/mach-msm/include/mach/uncompress.h
index 74cbda1..7560dc2 100644
--- a/arch/arm/mach-msm/include/mach/uncompress.h
+++ b/arch/arm/mach-msm/include/mach/uncompress.h
@@ -21,6 +21,7 @@
#include <asm/processor.h>
#include <mach/msm_iomap.h>
+#include <mach/msm_serial_hsl_regs.h>
#ifndef CONFIG_DEBUG_ICEDCC
static void putc(int c)
@@ -28,18 +29,18 @@
#if defined(MSM_DEBUG_UART_PHYS)
unsigned long base = MSM_DEBUG_UART_PHYS;
-#ifdef CONFIG_SERIAL_MSM_HSL
+#ifdef CONFIG_MSM_HAS_DEBUG_UART_HS
/*
* Wait for TX_READY to be set; but skip it if we have a
* TX underrun.
*/
- if (__raw_readl(base + 0x08) & 0x08)
- while (!(__raw_readl(base + 0x14) & 0x80))
+ if (!(__raw_readl(base + UARTDM_SR_OFFSET) & 0x08))
+ while (!(__raw_readl(base + UARTDM_ISR_OFFSET) & 0x80))
cpu_relax();
- __raw_writel(0x300, base + 0x10);
- __raw_writel(0x1, base + 0x40);
- __raw_writel(c, base + 0x70);
+ __raw_writel(0x300, base + UARTDM_CR_OFFSET);
+ __raw_writel(0x1, base + UARTDM_NCF_TX_OFFSET);
+ __raw_writel(c, base + UARTDM_TF_OFFSET);
#else
/* Wait for TX_READY to be set */
while (!(__raw_readl(base + 0x08) & 0x04))