tree 670c4f92388a946f13e0fcfa7fe1361b70a316de
parent 787f9fd23283d7103c65371f7b108ecf1020cddf
author Manjunathappa, Prakash <prakash.pm@ti.com> 1325594451 +0530
committer Florian Tobias Schandinat <FlorianSchandinat@gmx.de> 1327780534 +0000

video: da8xx-fb: reset LCDC only if functional clock changes with DVFS

LCDC functional clock may or may not be derived from CPU/MPU DPLL,
For example,
AM335x => Separate independent DPLL for LCDC
Davinci => Same DPLL as MPU

So, on platforms where LCDC functional clock is not derived from CPU/MPU
PLL it is not required to reset LCDC module as its functional clock does
not change with DVFS.

This patch adds check to do reset only if functional clock changes
between pre and post notifier callbacks with DVFS.

Signed-off-by: Manjunathappa, Prakash <prakash.pm@ti.com>
Signed-off-by: Florian Tobias Schandinat <FlorianSchandinat@gmx.de>