| commit | f84c39da766b4c8f13872282f58286a57ad05b3e | [log] [tgz] |
|---|---|---|
| author | Liu Dave-r63238 <DaveLiu@freescale.com> | Wed Oct 18 16:36:56 2006 +0800 |
| committer | Paul Mackerras <paulus@samba.org> | Wed Oct 25 13:49:22 2006 +1000 |
| tree | 22241d3e48d2d765b7f6c92467956e6d0cb1763d | |
| parent | b910ecf6bf221bb06f37e44765307c42b20db205 [diff] |
[POWERPC] Fix the UCC rx/tx clock of QE MPC8323EMDS board ethernet interface with RMII uses the CLK16 divisor for the rx and tx clock, but the ucc_set_qe_mux_rxtx() function doesn't handle the CLK16 setting of the CMXUCR3 and CMXUCR4 registers. This fixes it. Signed-off-by: Dave Liu <daveliu@freescale.com> Signed-off-by: Paul Mackerras <paulus@samba.org>