Merge "msm: tty: update receive room just before writing data to the ldisc" into msm-3.4
diff --git a/arch/arm/boot/dts/msm9625.dts b/arch/arm/boot/dts/msm9625.dts
index 42425ed..09d54b1 100644
--- a/arch/arm/boot/dts/msm9625.dts
+++ b/arch/arm/boot/dts/msm9625.dts
@@ -42,6 +42,7 @@
interrupt-controller;
#interrupt-cells = <2>;
reg = <0xfd510000 0x4000>;
+ #gpio-cells = <2>;
};
timer: msm-qtimer@f9021000 {
@@ -76,4 +77,26 @@
interrupts = <0 247 0>;
interrupt-names = "bam_irq";
};
+
+ spi@f9928000 {
+ compatible = "qcom,spi-qup-v2";
+ reg = <0xf9928000 0x1000>;
+ interrupts = <0 100 0>;
+ spi-max-frequency = <24000000>;
+ #address-cells = <1>;
+ #size-cells = <0>;
+ gpios = <&msmgpio 23 0>, /* CLK */
+ <&msmgpio 21 0>, /* MISO */
+ <&msmgpio 20 0>; /* MOSI */
+
+ cs-gpios = <&msmgpio 69 0>;
+
+ ethernet-switch@0 {
+ compatible = "simtec,ks8851";
+ reg = <0>;
+ interrupt-parent = <&msmgpio>;
+ interrupts = <75 0>;
+ spi-max-frequency = <5000000>;
+ };
+ };
};
diff --git a/arch/arm/configs/msm8974_defconfig b/arch/arm/configs/msm8974_defconfig
index c73c62e..e231db6 100644
--- a/arch/arm/configs/msm8974_defconfig
+++ b/arch/arm/configs/msm8974_defconfig
@@ -55,6 +55,7 @@
CONFIG_MSM_OCMEM_DEBUG=y
CONFIG_MSM_OCMEM_POWER_DISABLE=y
CONFIG_MSM_MEMORY_DUMP=y
+CONFIG_MSM_WATCHDOG_V2=y
CONFIG_MSM_CACHE_ERP=y
CONFIG_MSM_L1_ERR_PANIC=y
CONFIG_MSM_L2_ERP_PRINT_ACCESS_ERRORS=y
diff --git a/arch/arm/configs/msm9625_defconfig b/arch/arm/configs/msm9625_defconfig
index 9094db7..446734f 100644
--- a/arch/arm/configs/msm9625_defconfig
+++ b/arch/arm/configs/msm9625_defconfig
@@ -56,9 +56,28 @@
CONFIG_MTD_BLOCK=y
# CONFIG_MTD_MSM_NAND is not set
CONFIG_MTD_MSM_QPIC_NAND=y
+CONFIG_NET=y
+CONFIG_PACKET=y
+CONFIG_UNIX=y
+CONFIG_INET=y
+CONFIG_IPV6=y
+# CONFIG_WIRELESS is not set
CONFIG_BLK_DEV_LOOP=y
CONFIG_BLK_DEV_RAM=y
# CONFIG_ANDROID_PMEM is not set
+CONFIG_NETDEVICES=y
+# CONFIG_NET_VENDOR_BROADCOM is not set
+# CONFIG_NET_VENDOR_CIRRUS is not set
+# CONFIG_NET_VENDOR_FARADAY is not set
+# CONFIG_NET_VENDOR_INTEL is not set
+CONFIG_KS8851=y
+# CONFIG_NET_VENDOR_MICROCHIP is not set
+# CONFIG_MSM_RMNET is not set
+# CONFIG_NET_VENDOR_NATSEMI is not set
+# CONFIG_NET_VENDOR_SEEQ is not set
+# CONFIG_NET_VENDOR_SMSC is not set
+# CONFIG_NET_VENDOR_STMICRO is not set
+# CONFIG_WLAN is not set
# CONFIG_INPUT_MOUSEDEV is not set
# CONFIG_INPUT_KEYBOARD is not set
# CONFIG_INPUT_MOUSE is not set
@@ -70,6 +89,9 @@
CONFIG_SERIAL_MSM_HSL=y
CONFIG_SERIAL_MSM_HSL_CONSOLE=y
CONFIG_HW_RANDOM=y
+CONFIG_SPI=y
+CONFIG_SPI_QUP=y
+CONFIG_SPI_SPIDEV=m
CONFIG_DEBUG_GPIO=y
CONFIG_GPIO_SYSFS=y
# CONFIG_HWMON is not set
diff --git a/arch/arm/mach-msm/Makefile b/arch/arm/mach-msm/Makefile
index ce19336..7fea137 100644
--- a/arch/arm/mach-msm/Makefile
+++ b/arch/arm/mach-msm/Makefile
@@ -264,7 +264,7 @@
obj-$(CONFIG_MACH_MSM7X25_FFA) += board-msm7x27.o devices-msm7x25.o
obj-$(CONFIG_ARCH_MSM8960) += clock-local.o clock-dss-8960.o clock-8960.o clock-rpm.o clock-pll.o
obj-$(CONFIG_ARCH_MSM8960) += footswitch-8x60.o
-obj-$(CONFIG_ARCH_MSM8960) += acpuclock-8960.o
+obj-$(CONFIG_ARCH_MSM8960) += acpuclock-8960.o acpuclock-8960ab.o
obj-$(CONFIG_ARCH_MSM8960) += memory_topology.o
obj-$(CONFIG_ARCH_MSM8960) += saw-regulator.o
obj-$(CONFIG_ARCH_MSM8960) += devices-8960.o
diff --git a/arch/arm/mach-msm/acpuclock-8960ab.c b/arch/arm/mach-msm/acpuclock-8960ab.c
new file mode 100644
index 0000000..6366376
--- /dev/null
+++ b/arch/arm/mach-msm/acpuclock-8960ab.c
@@ -0,0 +1,164 @@
+/*
+ * Copyright (c) 2011-2012, Code Aurora Forum. All rights reserved.
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License version 2 and
+ * only version 2 as published by the Free Software Foundation.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ */
+
+#include <linux/kernel.h>
+#include <linux/module.h>
+#include <linux/platform_device.h>
+#include <mach/rpm-regulator.h>
+#include <mach/msm_bus_board.h>
+#include <mach/msm_bus.h>
+
+#include "acpuclock.h"
+#include "acpuclock-krait.h"
+
+static struct hfpll_data hfpll_data __initdata = {
+ .mode_offset = 0x00,
+ .l_offset = 0x08,
+ .m_offset = 0x0C,
+ .n_offset = 0x10,
+ .config_offset = 0x04,
+ .config_val = 0x7845C665,
+ .has_droop_ctl = true,
+ .droop_offset = 0x14,
+ .droop_val = 0x0108C000,
+ .low_vdd_l_max = 37,
+ .nom_vdd_l_max = 74,
+ .vdd[HFPLL_VDD_NONE] = 0,
+ .vdd[HFPLL_VDD_LOW] = 945000,
+ .vdd[HFPLL_VDD_NOM] = 1050000,
+ .vdd[HFPLL_VDD_HIGH] = 1150000,
+};
+
+static struct scalable scalable[] __initdata = {
+ [CPU0] = {
+ .hfpll_phys_base = 0x00903200,
+ .aux_clk_sel_phys = 0x02088014,
+ .aux_clk_sel = 3,
+ .l2cpmr_iaddr = 0x4501,
+ .vreg[VREG_CORE] = { "krait0", 1300000 },
+ .vreg[VREG_MEM] = { "krait0_mem", 1150000 },
+ .vreg[VREG_DIG] = { "krait0_dig", 1150000 },
+ .vreg[VREG_HFPLL_A] = { "krait0_s8", 2050000 },
+ .vreg[VREG_HFPLL_B] = { "krait0_l23", 1800000 },
+ },
+ [CPU1] = {
+ .hfpll_phys_base = 0x00903300,
+ .aux_clk_sel_phys = 0x02098014,
+ .aux_clk_sel = 3,
+ .l2cpmr_iaddr = 0x5501,
+ .vreg[VREG_CORE] = { "krait1", 1300000 },
+ .vreg[VREG_MEM] = { "krait1_mem", 1150000 },
+ .vreg[VREG_DIG] = { "krait1_dig", 1150000 },
+ .vreg[VREG_HFPLL_A] = { "krait1_s8", 2050000 },
+ .vreg[VREG_HFPLL_B] = { "krait1_l23", 1800000 },
+ },
+ [L2] = {
+ .hfpll_phys_base = 0x00903400,
+ .aux_clk_sel_phys = 0x02011028,
+ .aux_clk_sel = 3,
+ .l2cpmr_iaddr = 0x0500,
+ .vreg[VREG_HFPLL_A] = { "l2_s8", 2050000 },
+ .vreg[VREG_HFPLL_B] = { "l2_l23", 1800000 },
+ },
+};
+
+static struct msm_bus_paths bw_level_tbl[] __initdata = {
+ [0] = BW_MBPS(640), /* At least 80 MHz on bus. */
+ [1] = BW_MBPS(1064), /* At least 133 MHz on bus. */
+ [2] = BW_MBPS(1600), /* At least 200 MHz on bus. */
+ [3] = BW_MBPS(2128), /* At least 266 MHz on bus. */
+ [4] = BW_MBPS(3200), /* At least 400 MHz on bus. */
+ [5] = BW_MBPS(4264), /* At least 533 MHz on bus. */
+};
+
+static struct msm_bus_scale_pdata bus_scale_data __initdata = {
+ .usecase = bw_level_tbl,
+ .num_usecases = ARRAY_SIZE(bw_level_tbl),
+ .active_only = 1,
+ .name = "acpuclk-8960ab",
+};
+
+static struct l2_level l2_freq_tbl[] __initdata = {
+ [0] = { { 384000, PLL_8, 0, 2, 0x00 }, 1050000, 1050000, 1 },
+ [1] = { { 486000, HFPLL, 2, 0, 0x24 }, 1050000, 1050000, 2 },
+ [2] = { { 594000, HFPLL, 1, 0, 0x16 }, 1050000, 1050000, 2 },
+ [3] = { { 702000, HFPLL, 1, 0, 0x1A }, 1050000, 1050000, 4 },
+ [4] = { { 810000, HFPLL, 1, 0, 0x1E }, 1050000, 1050000, 4 },
+ [5] = { { 918000, HFPLL, 1, 0, 0x22 }, 1150000, 1150000, 5 },
+ [6] = { { 1026000, HFPLL, 1, 0, 0x26 }, 1150000, 1150000, 5 },
+ [7] = { { 1134000, HFPLL, 1, 0, 0x2A }, 1150000, 1150000, 5 },
+ [8] = { { 1242000, HFPLL, 1, 0, 0x2E }, 1150000, 1150000, 5 },
+ [9] = { { 1350000, HFPLL, 1, 0, 0x32 }, 1150000, 1150000, 5 },
+};
+
+static struct acpu_level acpu_freq_tbl_slow[] __initdata = {
+ { 1, { 384000, PLL_8, 0, 2, 0x00 }, L2(0), 950000 },
+ { 0, { 432000, HFPLL, 2, 0, 0x20 }, L2(3), 975000 },
+ { 1, { 486000, HFPLL, 2, 0, 0x24 }, L2(3), 975000 },
+ { 0, { 540000, HFPLL, 2, 0, 0x28 }, L2(3), 1000000 },
+ { 1, { 594000, HFPLL, 1, 0, 0x16 }, L2(3), 1000000 },
+ { 0, { 648000, HFPLL, 1, 0, 0x18 }, L2(3), 1025000 },
+ { 1, { 702000, HFPLL, 1, 0, 0x1A }, L2(3), 1025000 },
+ { 0, { 756000, HFPLL, 1, 0, 0x1C }, L2(3), 1075000 },
+ { 1, { 810000, HFPLL, 1, 0, 0x1E }, L2(3), 1075000 },
+ { 0, { 864000, HFPLL, 1, 0, 0x20 }, L2(3), 1100000 },
+ { 1, { 918000, HFPLL, 1, 0, 0x22 }, L2(3), 1100000 },
+ { 0, { 972000, HFPLL, 1, 0, 0x24 }, L2(3), 1125000 },
+ { 1, { 1026000, HFPLL, 1, 0, 0x26 }, L2(3), 1125000 },
+ { 0, { 1080000, HFPLL, 1, 0, 0x28 }, L2(9), 1175000 },
+ { 1, { 1134000, HFPLL, 1, 0, 0x2A }, L2(9), 1175000 },
+ { 0, { 1188000, HFPLL, 1, 0, 0x2C }, L2(9), 1200000 },
+ { 1, { 1242000, HFPLL, 1, 0, 0x2E }, L2(9), 1200000 },
+ { 0, { 1296000, HFPLL, 1, 0, 0x30 }, L2(9), 1225000 },
+ { 1, { 1350000, HFPLL, 1, 0, 0x32 }, L2(9), 1225000 },
+ { 0, { 1404000, HFPLL, 1, 0, 0x34 }, L2(9), 1237500 },
+ { 1, { 1458000, HFPLL, 1, 0, 0x36 }, L2(9), 1237500 },
+ { 1, { 1512000, HFPLL, 1, 0, 0x38 }, L2(9), 1250000 },
+ { 0, { 0 } }
+};
+
+static struct pvs_table pvs_tables[NUM_PVS] __initdata = {
+[PVS_SLOW] = { acpu_freq_tbl_slow, sizeof(acpu_freq_tbl_slow), 0 },
+[PVS_NOMINAL] = { acpu_freq_tbl_slow, sizeof(acpu_freq_tbl_slow), 0 },
+[PVS_FAST] = { acpu_freq_tbl_slow, sizeof(acpu_freq_tbl_slow), 0 },
+};
+
+static struct acpuclk_krait_params acpuclk_8960ab_params __initdata = {
+ .scalable = scalable,
+ .scalable_size = sizeof(scalable),
+ .hfpll_data = &hfpll_data,
+ .pvs_tables = pvs_tables,
+ .l2_freq_tbl = l2_freq_tbl,
+ .l2_freq_tbl_size = sizeof(l2_freq_tbl),
+ .bus_scale = &bus_scale_data,
+ .qfprom_phys_base = 0x00700000,
+};
+
+static int __init acpuclk_8960ab_probe(struct platform_device *pdev)
+{
+ return acpuclk_krait_init(&pdev->dev, &acpuclk_8960ab_params);
+}
+
+static struct platform_driver acpuclk_8960ab_driver = {
+ .driver = {
+ .name = "acpuclk-8960ab",
+ .owner = THIS_MODULE,
+ },
+};
+
+static int __init acpuclk_8960ab_init(void)
+{
+ return platform_driver_probe(&acpuclk_8960ab_driver,
+ acpuclk_8960ab_probe);
+}
+device_initcall(acpuclk_8960ab_init);
diff --git a/arch/arm/mach-msm/board-8064.c b/arch/arm/mach-msm/board-8064.c
index 665b861..37bd16b 100644
--- a/arch/arm/mach-msm/board-8064.c
+++ b/arch/arm/mach-msm/board-8064.c
@@ -1022,7 +1022,7 @@
.micbias = {
.ldoh_v = TABLA_LDOH_2P85_V,
.cfilt1_mv = 1800,
- .cfilt2_mv = 1800,
+ .cfilt2_mv = 2700,
.cfilt3_mv = 1800,
.bias1_cfilt_sel = TABLA_CFILT1_SEL,
.bias2_cfilt_sel = TABLA_CFILT2_SEL,
@@ -1089,7 +1089,7 @@
.micbias = {
.ldoh_v = TABLA_LDOH_2P85_V,
.cfilt1_mv = 1800,
- .cfilt2_mv = 1800,
+ .cfilt2_mv = 2700,
.cfilt3_mv = 1800,
.bias1_cfilt_sel = TABLA_CFILT1_SEL,
.bias2_cfilt_sel = TABLA_CFILT2_SEL,
diff --git a/arch/arm/mach-msm/board-8960-regulator.c b/arch/arm/mach-msm/board-8960-regulator.c
index 6ad44d8..bcfd558 100644
--- a/arch/arm/mach-msm/board-8960-regulator.c
+++ b/arch/arm/mach-msm/board-8960-regulator.c
@@ -182,10 +182,12 @@
VREG_CONSUMERS(S5) = {
REGULATOR_SUPPLY("8921_s5", NULL),
REGULATOR_SUPPLY("krait0", "acpuclk-8960"),
+ REGULATOR_SUPPLY("krait0", "acpuclk-8960ab"),
};
VREG_CONSUMERS(S6) = {
REGULATOR_SUPPLY("8921_s6", NULL),
REGULATOR_SUPPLY("krait1", "acpuclk-8960"),
+ REGULATOR_SUPPLY("krait1", "acpuclk-8960ab"),
};
VREG_CONSUMERS(S7) = {
REGULATOR_SUPPLY("8921_s7", NULL),
@@ -581,6 +583,17 @@
RPM_REG_MAP(S8, 0, 1, "krait0_s8", "acpuclk-8960"),
RPM_REG_MAP(S8, 0, 2, "krait1_s8", "acpuclk-8960"),
RPM_REG_MAP(S8, 0, 6, "l2_s8", "acpuclk-8960"),
+
+ RPM_REG_MAP(L23, 0, 1, "krait0_l23", "acpuclk-8960ab"),
+ RPM_REG_MAP(L23, 0, 2, "krait1_l23", "acpuclk-8960ab"),
+ RPM_REG_MAP(L23, 0, 6, "l2_l23", "acpuclk-8960ab"),
+ RPM_REG_MAP(L24, 0, 1, "krait0_mem", "acpuclk-8960ab"),
+ RPM_REG_MAP(L24, 0, 2, "krait1_mem", "acpuclk-8960ab"),
+ RPM_REG_MAP(S3, 0, 1, "krait0_dig", "acpuclk-8960ab"),
+ RPM_REG_MAP(S3, 0, 2, "krait1_dig", "acpuclk-8960ab"),
+ RPM_REG_MAP(S8, 0, 1, "krait0_s8", "acpuclk-8960ab"),
+ RPM_REG_MAP(S8, 0, 2, "krait1_s8", "acpuclk-8960ab"),
+ RPM_REG_MAP(S8, 0, 6, "l2_s8", "acpuclk-8960ab"),
};
struct rpm_regulator_platform_data msm_rpm_regulator_pdata __devinitdata = {
diff --git a/arch/arm/mach-msm/board-8960.c b/arch/arm/mach-msm/board-8960.c
index ad788bc..541bf85 100644
--- a/arch/arm/mach-msm/board-8960.c
+++ b/arch/arm/mach-msm/board-8960.c
@@ -2594,7 +2594,6 @@
#endif
static struct platform_device *common_devices[] __initdata = {
- &msm8960_device_acpuclk,
&msm8960_device_dmov,
&msm_device_smd,
&msm_device_uart_dm6,
@@ -3148,7 +3147,12 @@
msm_device_uart_dm8.dev.platform_data = &msm_uart_dm8_pdata;
platform_device_register(&msm_device_uart_dm8);
}
+ if (cpu_is_msm8960ab())
+ platform_device_register(&msm8960ab_device_acpuclk);
+ else
+ platform_device_register(&msm8960_device_acpuclk);
platform_add_devices(common_devices, ARRAY_SIZE(common_devices));
+
msm8960_pm8921_gpio_mpp_init();
platform_add_devices(cdp_devices, ARRAY_SIZE(cdp_devices));
msm8960_init_smsc_hub();
diff --git a/arch/arm/mach-msm/board-9625-gpiomux.c b/arch/arm/mach-msm/board-9625-gpiomux.c
index e28c734..2919f06 100644
--- a/arch/arm/mach-msm/board-9625-gpiomux.c
+++ b/arch/arm/mach-msm/board-9625-gpiomux.c
@@ -24,6 +24,18 @@
.dir = GPIOMUX_OUT_HIGH,
};
+static struct gpiomux_setting gpio_spi_cs_config = {
+ .func = GPIOMUX_FUNC_9,
+ .drv = GPIOMUX_DRV_12MA,
+ .pull = GPIOMUX_PULL_NONE,
+};
+
+static struct gpiomux_setting gpio_spi_config = {
+ .func = GPIOMUX_FUNC_2,
+ .drv = GPIOMUX_DRV_12MA,
+ .pull = GPIOMUX_PULL_NONE,
+};
+
static struct msm_gpiomux_config msm_blsp_configs[] __initdata = {
{
.gpio = 45, /* BLSP1 UART TX */
@@ -37,6 +49,31 @@
[GPIOMUX_SUSPENDED] = &gpio_uart_config,
},
},
+ {
+ .gpio = 69, /* BLSP6 QUP SPI_CS_N */
+ .settings = {
+ [GPIOMUX_SUSPENDED] = &gpio_spi_cs_config,
+ },
+ },
+ {
+ .gpio = 20, /* BLSP6 QUP SPI_DATA_MOSI */
+ .settings = {
+ [GPIOMUX_SUSPENDED] = &gpio_spi_config,
+ },
+ },
+ {
+ .gpio = 21, /* BLSP6 QUP SPI_DATA_MISO */
+ .settings = {
+ [GPIOMUX_SUSPENDED] = &gpio_spi_config,
+ },
+ },
+ {
+ .gpio = 23, /* BLSP6 QUP SPI_CLK */
+ .settings = {
+ [GPIOMUX_SUSPENDED] = &gpio_spi_config,
+ },
+ },
+
};
void __init msm9625_init_gpiomux(void)
diff --git a/arch/arm/mach-msm/board-9625.c b/arch/arm/mach-msm/board-9625.c
index 4a9bbcd..e7ef1a9 100644
--- a/arch/arm/mach-msm/board-9625.c
+++ b/arch/arm/mach-msm/board-9625.c
@@ -46,8 +46,8 @@
CLK_DUMMY("dfab_clk", DFAB_CLK, NULL, 0),
CLK_DUMMY("dma_bam_pclk", DMA_BAM_P_CLK, NULL, 0),
CLK_DUMMY("mem_clk", NULL, NULL, 0),
- CLK_DUMMY("core_clk", NULL, "spi_qsd.1", OFF),
- CLK_DUMMY("iface_clk", NULL, "spi_qsd.1", OFF),
+ CLK_DUMMY("core_clk", SPI_CLK, "spi_qsd.1", OFF),
+ CLK_DUMMY("iface_clk", SPI_P_CLK, "spi_qsd.1", OFF),
CLK_DUMMY("core_clk", NULL, "f9966000.i2c", 0),
CLK_DUMMY("iface_clk", NULL, "f9966000.i2c", 0),
CLK_DUMMY("core_clk", NULL, "fe12f000.slim", OFF),
@@ -72,6 +72,8 @@
static struct of_dev_auxdata msm9625_auxdata_lookup[] __initdata = {
OF_DEV_AUXDATA("qcom,msm-lsuart-v14", 0xF991F000, \
"msm_serial_hsl.0", NULL),
+ OF_DEV_AUXDATA("qcom,spi-qup-v2", 0xF9928000, \
+ "spi_qsd.1", NULL),
{}
};
@@ -94,6 +96,8 @@
{
if (socinfo_init() < 0)
pr_err("%s: socinfo_init() failed\n", __func__);
+
+ msm9625_init_gpiomux();
msm_clock_init(&msm_dummy_clock_init_data);
of_platform_populate(NULL, of_default_bus_match_table,
msm9625_auxdata_lookup, NULL);
diff --git a/arch/arm/mach-msm/clock-8974.c b/arch/arm/mach-msm/clock-8974.c
index 8ac1c88..91e9272 100644
--- a/arch/arm/mach-msm/clock-8974.c
+++ b/arch/arm/mach-msm/clock-8974.c
@@ -23,6 +23,7 @@
#include <mach/clk.h>
#include <mach/rpm-regulator-smd.h>
#include <mach/socinfo.h>
+#include <mach/rpm-smd.h>
#include "clock-local2.h"
#include "clock-pll.h"
@@ -615,13 +616,16 @@
#define RPM_BUS_CLK_TYPE 0x316b6c63
#define RPM_MEM_CLK_TYPE 0x326b6c63
-#define CXO_ID 0x0
-#define QDSS_ID 0x1
+#define RPM_SMD_KEY_ENABLE 0x62616E45
+
+#define CXO_ID 0x0
+#define QDSS_ID 0x1
+#define RPM_SCALING_ENABLE_ID 0x2
#define PNOC_ID 0x0
#define SNOC_ID 0x1
#define CNOC_ID 0x2
-#define MMSSNOC_AHB_ID 0x4
+#define MMSSNOC_AHB_ID 0x3
#define BIMC_ID 0x0
#define OCMEM_ID 0x1
@@ -4532,6 +4536,16 @@
{&camss_vfe_vfe_ahb_clk.c, MMSS_BASE, 0x003c},
{&camss_vfe_vfe_axi_clk.c, MMSS_BASE, 0x003d},
{&camss_vfe_vfe_ocmemnoc_clk.c, MMSS_BASE, 0x003e},
+ {&oxilicx_axi_clk.c, MMSS_BASE, 0x000b},
+ {&oxilicx_ahb_clk.c, MMSS_BASE, 0x000c},
+ {&ocmemcx_ocmemnoc_clk.c, MMSS_BASE, 0x0009},
+ {&oxili_gfx3d_clk.c, MMSS_BASE, 0x000d},
+ {&venus0_axi_clk.c, MMSS_BASE, 0x000f},
+ {&venus0_ocmemnoc_clk.c, MMSS_BASE, 0x0010},
+ {&venus0_ahb_clk.c, MMSS_BASE, 0x0011},
+ {&venus0_vcodec0_clk.c, MMSS_BASE, 0x000e},
+ {&mmss_s0_axi_clk.c, MMSS_BASE, 0x0005},
+ {&mmssnoc_ahb_clk.c, MMSS_BASE, 0x0001},
{&mdss_ahb_clk.c, MMSS_BASE, 0x0022},
{&mdss_hdmi_clk.c, MMSS_BASE, 0x001d},
{&mdss_mdp_clk.c, MMSS_BASE, 0x0014},
@@ -5432,6 +5446,24 @@
#define APCS_GCC_CC_PHYS 0xF9011000
#define APCS_GCC_CC_SIZE SZ_4K
+static void __init enable_rpm_scaling(void)
+{
+ int rc, value = 0x1;
+ struct msm_rpm_kvp kvp = {
+ .key = RPM_SMD_KEY_ENABLE,
+ .data = (void *)&value,
+ .length = sizeof(value),
+ };
+
+ rc = msm_rpm_send_message_noirq(MSM_RPM_CTX_SLEEP_SET,
+ RPM_MISC_CLK_TYPE, RPM_SCALING_ENABLE_ID, &kvp, 1);
+ WARN(rc < 0, "RPM clock scaling (sleep set) did not enable!\n");
+
+ rc = msm_rpm_send_message_noirq(MSM_RPM_CTX_ACTIVE_SET,
+ RPM_MISC_CLK_TYPE, RPM_SCALING_ENABLE_ID, &kvp, 1);
+ WARN(rc < 0, "RPM clock scaling (active set) did not enable!\n");
+}
+
static void __init msm8974_clock_pre_init(void)
{
virt_bases[GCC_BASE] = ioremap(GCC_CC_PHYS, GCC_CC_SIZE);
@@ -5469,6 +5501,8 @@
vote_vdd_level(&vdd_dig, VDD_DIG_HIGH);
rpm_regulator_enable(vdd_dig_reg);
+ enable_rpm_scaling();
+
reg_init();
}
diff --git a/arch/arm/mach-msm/devices-8960.c b/arch/arm/mach-msm/devices-8960.c
index 8347580..ecfafa8 100644
--- a/arch/arm/mach-msm/devices-8960.c
+++ b/arch/arm/mach-msm/devices-8960.c
@@ -207,6 +207,11 @@
.id = -1,
};
+struct platform_device msm8960ab_device_acpuclk = {
+ .name = "acpuclk-8960ab",
+ .id = -1,
+};
+
#define SHARED_IMEM_TZ_BASE 0x2a03f720
static struct resource tzlog_resources[] = {
{
diff --git a/arch/arm/mach-msm/devices.h b/arch/arm/mach-msm/devices.h
index 8e2ab7d..4e08465 100644
--- a/arch/arm/mach-msm/devices.h
+++ b/arch/arm/mach-msm/devices.h
@@ -435,6 +435,7 @@
extern struct platform_device msm8930_device_acpuclk;
extern struct platform_device msm8930aa_device_acpuclk;
extern struct platform_device msm8960_device_acpuclk;
+extern struct platform_device msm8960ab_device_acpuclk;
extern struct platform_device msm9615_device_acpuclk;
extern struct platform_device msm_gpio_device;
diff --git a/arch/arm/mach-msm/include/mach/board.h b/arch/arm/mach-msm/include/mach/board.h
index 1770b97..f53ee09 100644
--- a/arch/arm/mach-msm/include/mach/board.h
+++ b/arch/arm/mach-msm/include/mach/board.h
@@ -583,6 +583,7 @@
void msm_8974_reserve(void);
void msm_8974_very_early(void);
void msm_8974_init_gpiomux(void);
+void msm9625_init_gpiomux(void);
struct mmc_platform_data;
int msm_add_sdcc(unsigned int controller,
diff --git a/arch/arm/mach-msm/msm_bus/msm_bus_fabric.c b/arch/arm/mach-msm/msm_bus/msm_bus_fabric.c
index e035e35..9dcd51f 100644
--- a/arch/arm/mach-msm/msm_bus/msm_bus_fabric.c
+++ b/arch/arm/mach-msm/msm_bus/msm_bus_fabric.c
@@ -139,7 +139,7 @@
for (i = 0; i < fabric->pdata->len; i++) {
struct msm_bus_inode_info *info;
- int ctx;
+ int ctx, j;
info = kzalloc(sizeof(struct msm_bus_inode_info), GFP_KERNEL);
if (info == NULL) {
@@ -189,11 +189,17 @@
if (fabric->fabdev.hw_algo.node_init == NULL)
continue;
+ for (j = 0; j < NUM_CTX; j++)
+ clk_prepare_enable(fabric->info.nodeclk[j].clk);
+
fabric->fabdev.hw_algo.node_init(fabric->hw_data, info);
if (ret) {
MSM_BUS_ERR("Unable to init node info, ret: %d\n", ret);
kfree(info);
}
+
+ for (j = 0; j < NUM_CTX; j++)
+ clk_disable_unprepare(fabric->info.nodeclk[j].clk);
}
MSM_BUS_DBG("Fabric: %d nmasters: %d nslaves: %d\n"
@@ -337,6 +343,7 @@
{
struct msm_bus_fabric *fabric = to_msm_bus_fabric(fabdev);
void *sel_cdata;
+ int i;
/* Temporarily stub out arbitration settings for msm8974 */
if (machine_is_msm8974())
@@ -354,8 +361,14 @@
return;
}
+ for (i = 0; i < NUM_CTX; i++)
+ clk_prepare_enable(fabric->info.nodeclk[i].clk);
+
fabdev->hw_algo.update_bw(hop, info, fabric->pdata, sel_cdata,
master_tiers, add_bw);
+ for (i = 0; i < NUM_CTX; i++)
+ clk_disable_unprepare(fabric->info.nodeclk[i].clk);
+
fabric->arb_dirty = true;
}
diff --git a/arch/arm/mach-msm/msm_bus/msm_bus_noc.c b/arch/arm/mach-msm/msm_bus/msm_bus_noc.c
index 2597e27..e6ec722 100644
--- a/arch/arm/mach-msm/msm_bus/msm_bus_noc.c
+++ b/arch/arm/mach-msm/msm_bus/msm_bus_noc.c
@@ -388,7 +388,8 @@
(struct msm_bus_noc_info *)hw_data;
if (!IS_SLAVE(info->node_info->priv_id))
- msm_bus_noc_mas_init(ninfo, info);
+ if (info->node_info->hw_sel != MSM_BUS_RPM)
+ msm_bus_noc_mas_init(ninfo, info);
}
static int msm_bus_noc_allocate_commit_data(struct msm_bus_fabric_registration
diff --git a/arch/arm/mach-msm/rpm-smd.c b/arch/arm/mach-msm/rpm-smd.c
index 0faafc8..1225fec 100644
--- a/arch/arm/mach-msm/rpm-smd.c
+++ b/arch/arm/mach-msm/rpm-smd.c
@@ -64,7 +64,8 @@
#define GFP_FLAG(noirq) (noirq ? GFP_ATOMIC : GFP_KERNEL)
#define INV_HDR "resource does not exist"
#define ERR "err\0"
-#define MAX_ERR_BUFFER_SIZE 60
+#define MAX_ERR_BUFFER_SIZE 128
+#define INIT_ERROR 1
static ATOMIC_NOTIFIER_HEAD(msm_rpm_sleep_notifier);
static bool standalone;
@@ -388,6 +389,7 @@
init_completion(&data->ack);
data->ack_recd = false;
data->msg_id = msg_id;
+ data->errno = INIT_ERROR;
spin_lock_irqsave(&msm_rpm_list_lock, flags);
list_add(&data->list, &msm_rpm_wait_list);
spin_unlock_irqrestore(&msm_rpm_list_lock, flags);
@@ -463,7 +465,7 @@
return rc;
}
-static void msm_rpm_read_smd_data(char *buf)
+static int msm_rpm_read_smd_data(char *buf)
{
int pkt_sz;
int bytes_read = 0;
@@ -473,7 +475,7 @@
BUG_ON(pkt_sz > MAX_ERR_BUFFER_SIZE);
if (pkt_sz != smd_read_avail(msm_rpm_data.ch_info))
- return;
+ return -EAGAIN;
BUG_ON(pkt_sz == 0);
@@ -487,6 +489,8 @@
} while (pkt_sz > 0);
BUG_ON(pkt_sz < 0);
+
+ return 0;
}
static void msm_rpm_smd_work(struct work_struct *work)
@@ -498,11 +502,15 @@
while (smd_is_pkt_avail(msm_rpm_data.ch_info) && !irq_process) {
spin_lock_irqsave(&msm_rpm_data.smd_lock_read, flags);
- msm_rpm_read_smd_data(buf);
- spin_unlock_irqrestore(&msm_rpm_data.smd_lock_read, flags);
+ if (msm_rpm_read_smd_data(buf)) {
+ spin_unlock_irqrestore(&msm_rpm_data.smd_lock_read,
+ flags);
+ break;
+ }
msg_id = msm_rpm_get_msg_id_from_ack(buf);
errno = msm_rpm_get_error_from_ack(buf);
msm_rpm_process_ack(msg_id, errno);
+ spin_unlock_irqrestore(&msm_rpm_data.smd_lock_read, flags);
}
}
@@ -814,6 +822,12 @@
*/
goto wait_ack_cleanup;
+ if (elem->errno != INIT_ERROR) {
+ rc = elem->errno;
+ msm_rpm_free_list_entry(elem);
+ goto wait_ack_cleanup;
+ }
+
while ((id != msg_id) && (count++ < 10)) {
if (smd_is_pkt_avail(msm_rpm_data.ch_info)) {
int errno;
diff --git a/drivers/bluetooth/hci_ath.c b/drivers/bluetooth/hci_ath.c
index b117309..cfcacff 100644
--- a/drivers/bluetooth/hci_ath.c
+++ b/drivers/bluetooth/hci_ath.c
@@ -44,7 +44,7 @@
#include "hci_uart.h"
-unsigned int enableuartsleep;
+unsigned int enableuartsleep = 1;
module_param(enableuartsleep, uint, 0644);
/*
* Global variables
@@ -110,9 +110,9 @@
int status = 0;
if (test_bit(BT_TXEXPIRED, &flags)) {
printk(KERN_INFO "wakeup device\n");
- gpio_set_value(bsi->ext_wake, 1);
- msleep(20);
gpio_set_value(bsi->ext_wake, 0);
+ msleep(20);
+ gpio_set_value(bsi->ext_wake, 1);
}
modify_timer_task();
return status;
@@ -353,7 +353,7 @@
gpio_free(bsi->ext_wake);
goto free_bt_host_wake;
}
- gpio_set_value(bsi->ext_wake, 0);
+ gpio_set_value(bsi->ext_wake, 1);
bsi->host_wake_irq = platform_get_irq_byname(pdev, "host_wake");
if (bsi->host_wake_irq < 0) {
diff --git a/drivers/gpio/gpio-msm-v3.c b/drivers/gpio/gpio-msm-v3.c
index e0b01cd..977619b 100644
--- a/drivers/gpio/gpio-msm-v3.c
+++ b/drivers/gpio/gpio-msm-v3.c
@@ -141,7 +141,7 @@
void __msm_gpio_set_intr_status(unsigned gpio)
{
- __raw_writel(BIT(INTR_STATUS_BIT), GPIO_INTR_STATUS(gpio));
+ __raw_writel(0, GPIO_INTR_STATUS(gpio));
}
unsigned __msm_gpio_get_intr_config(unsigned gpio)
diff --git a/drivers/gpio/qpnp-pin.c b/drivers/gpio/qpnp-pin.c
index ccbbd67..6511c95 100644
--- a/drivers/gpio/qpnp-pin.c
+++ b/drivers/gpio/qpnp-pin.c
@@ -39,17 +39,17 @@
/* gpio peripheral type and subtype values */
#define Q_GPIO_TYPE 0x10
-#define Q_GPIO_SUBTYPE_GPIO_4CH 0x0
-#define Q_GPIO_SUBTYPE_GPIOC_4CH 0x2
-#define Q_GPIO_SUBTYPE_GPIO_8CH 0x4
-#define Q_GPIO_SUBTYPE_GPIOC_8CH 0x6
+#define Q_GPIO_SUBTYPE_GPIO_4CH 0x1
+#define Q_GPIO_SUBTYPE_GPIOC_4CH 0x5
+#define Q_GPIO_SUBTYPE_GPIO_8CH 0x9
+#define Q_GPIO_SUBTYPE_GPIOC_8CH 0xD
/* mpp peripheral type and subtype values */
#define Q_MPP_TYPE 0x11
#define Q_MPP_SUBTYPE_4CH_NO_ANA_OUT 0x3
#define Q_MPP_SUBTYPE_4CH_NO_SINK 0x5
-#define Q_MPP_SUBTYPE_4CH_FULL_FUNC 0x2
-#define Q_MPP_SUBTYPE_8CH_FULL_FUNC 0x4
+#define Q_MPP_SUBTYPE_4CH_FULL_FUNC 0x7
+#define Q_MPP_SUBTYPE_8CH_FULL_FUNC 0xF
/* control register base address offsets */
#define Q_REG_MODE_CTL 0x40
@@ -129,7 +129,8 @@
#define Q_NUM_PARAMS Q_PIN_CFG_INVALID
/* param error checking */
-#define QPNP_PIN_MODE_INVALID 3
+#define QPNP_PIN_GPIO_MODE_INVALID 3
+#define QPNP_PIN_MPP_MODE_INVALID 7
#define QPNP_PIN_INVERT_INVALID 2
#define QPNP_PIN_OUT_BUF_INVALID 3
#define QPNP_PIN_VIN_4CH_INVALID 5
@@ -225,8 +226,12 @@
{
switch (idx) {
case Q_PIN_CFG_MODE:
- if (val >= QPNP_PIN_MODE_INVALID)
- return -EINVAL;
+ if (q_spec->type == Q_GPIO_TYPE &&
+ val >= QPNP_PIN_GPIO_MODE_INVALID)
+ return -EINVAL;
+ else if (q_spec->type == Q_MPP_TYPE &&
+ val >= QPNP_PIN_MPP_MODE_INVALID)
+ return -EINVAL;
break;
case Q_PIN_CFG_OUTPUT_TYPE:
if (q_spec->type != Q_GPIO_TYPE)
@@ -327,29 +332,40 @@
name = (q_spec->type == Q_GPIO_TYPE) ? "gpio" : "mpp";
if (Q_CHK_INVALID(Q_PIN_CFG_MODE, q_spec, param->mode))
- pr_err("invalid direction for %s %d\n", name, pin);
+ pr_err("invalid direction value %d for %s %d\n",
+ param->mode, name, pin);
else if (Q_CHK_INVALID(Q_PIN_CFG_INVERT, q_spec, param->invert))
- pr_err("invalid invert polarity for %s %d\n", name, pin);
+ pr_err("invalid invert polarity value %d for %s %d\n",
+ param->invert, name, pin);
else if (Q_CHK_INVALID(Q_PIN_CFG_SELECT, q_spec, param->select))
- pr_err("invalid source select for %s %d\n", name, pin);
+ pr_err("invalid source select value %d for %s %d\n",
+ param->select, name, pin);
else if (Q_CHK_INVALID(Q_PIN_CFG_OUT_STRENGTH,
q_spec, param->out_strength))
- pr_err("invalid out strength for %s %d\n", name, pin);
+ pr_err("invalid out strength value %d for %s %d\n",
+ param->out_strength, name, pin);
else if (Q_CHK_INVALID(Q_PIN_CFG_OUTPUT_TYPE,
q_spec, param->output_type))
- pr_err("invalid out type for %s %d\n", name, pin);
+ pr_err("invalid out type value %d for %s %d\n",
+ param->output_type, name, pin);
else if (Q_CHK_INVALID(Q_PIN_CFG_VIN_SEL, q_spec, param->vin_sel))
- pr_err("invalid vin select value for %s %d\n", name, pin);
+ pr_err("invalid vin select %d value for %s %d\n",
+ param->vin_sel, name, pin);
else if (Q_CHK_INVALID(Q_PIN_CFG_PULL, q_spec, param->pull))
- pr_err("invalid pull value for pin %s %d\n", name, pin);
+ pr_err("invalid pull value %d for pin %s %d\n",
+ param->pull, name, pin);
else if (Q_CHK_INVALID(Q_PIN_CFG_MASTER_EN, q_spec, param->master_en))
- pr_err("invalid master_en value for %s %d\n", name, pin);
+ pr_err("invalid master_en value %d for %s %d\n",
+ param->master_en, name, pin);
else if (Q_CHK_INVALID(Q_PIN_CFG_AOUT_REF, q_spec, param->aout_ref))
- pr_err("invalid aout_reg value for %s %d\n", name, pin);
+ pr_err("invalid aout_reg value %d for %s %d\n",
+ param->aout_ref, name, pin);
else if (Q_CHK_INVALID(Q_PIN_CFG_AIN_ROUTE, q_spec, param->ain_route))
- pr_err("invalid ain_route value for %s %d\n", name, pin);
+ pr_err("invalid ain_route value %d for %s %d\n",
+ param->ain_route, name, pin);
else if (Q_CHK_INVALID(Q_PIN_CFG_CS_OUT, q_spec, param->cs_out))
- pr_err("invalid cs_out value for %s %d\n", name, pin);
+ pr_err("invalid cs_out value %d for %s %d\n",
+ param->cs_out, name, pin);
else
return 0;
@@ -532,7 +548,7 @@
return 0;
gpio_cfg:
- dev_err(dev, "%s: unable to set default config for pmic gpio %d\n",
+ dev_err(dev, "%s: unable to set default config for pmic pin %d\n",
__func__, q_spec->pmic_pin);
return rc;
@@ -688,7 +704,7 @@
if (!q_chip || !q_spec)
return -EINVAL;
- if (mode >= QPNP_PIN_MODE_INVALID) {
+ if (qpnp_pin_check_config(Q_PIN_CFG_MODE, q_spec, mode)) {
pr_err("invalid mode specification %d\n", mode);
return -EINVAL;
}
diff --git a/drivers/gpu/msm/adreno.c b/drivers/gpu/msm/adreno.c
index 6a894c8..3d1fbc8 100644
--- a/drivers/gpu/msm/adreno.c
+++ b/drivers/gpu/msm/adreno.c
@@ -111,7 +111,7 @@
.gmem_size = SZ_256K,
.pfp_fw = NULL,
.pm4_fw = NULL,
- .wait_timeout = 10000, /* in milliseconds */
+ .wait_timeout = 0, /* in milliseconds, 0 means disabled */
.ib_check_level = 0,
};
@@ -1481,7 +1481,7 @@
* them to pass */
adreno_ringbuffer_restore(rb, rec_data->bad_rb_buffer,
rec_data->bad_rb_size);
- idle_ret = adreno_idle(device, KGSL_TIMEOUT_DEFAULT);
+ idle_ret = adreno_idle(device);
if (idle_ret) {
ret = adreno_stop(device);
if (ret) {
@@ -1524,7 +1524,7 @@
if (ret || !rec_data->bad_rb_size) {
adreno_ringbuffer_restore(rb, rec_data->rb_buffer,
rec_data->rb_size);
- ret = adreno_idle(device, KGSL_TIMEOUT_DEFAULT);
+ ret = adreno_idle(device);
if (ret) {
/* If we fail here we can try to invalidate another
* context and try recovering again */
@@ -1806,61 +1806,74 @@
adreno_regwrite(device, REG_CP_RB_WPTR, adreno_dev->ringbuffer.wptr);
}
-/* Caller must hold the device mutex. */
-int adreno_idle(struct kgsl_device *device, unsigned int timeout)
+static int adreno_ringbuffer_drain(struct kgsl_device *device,
+ unsigned int *regs)
{
struct adreno_device *adreno_dev = ADRENO_DEVICE(device);
struct adreno_ringbuffer *rb = &adreno_dev->ringbuffer;
+ unsigned long wait;
+ unsigned long timeout = jiffies + msecs_to_jiffies(ADRENO_IDLE_TIMEOUT);
+
+ if (!(rb->flags & KGSL_FLAGS_STARTED))
+ return 0;
+
+ /*
+ * The first time into the loop, wait for 100 msecs and kick wptr again
+ * to ensure that the hardware has updated correctly. After that, kick
+ * it periodically every KGSL_TIMEOUT_PART msecs until the timeout
+ * expires
+ */
+
+ wait = jiffies + msecs_to_jiffies(100);
+
+ adreno_poke(device);
+
+ do {
+ if (time_after(jiffies, wait)) {
+ adreno_poke(device);
+
+ /* Check to see if the core is hung */
+ if (adreno_hang_detect(device, regs))
+ return -ETIMEDOUT;
+
+ wait = jiffies + msecs_to_jiffies(KGSL_TIMEOUT_PART);
+ }
+ GSL_RB_GET_READPTR(rb, &rb->rptr);
+
+ if (time_after(jiffies, timeout)) {
+ KGSL_DRV_ERR(device, "rptr: %x, wptr: %x\n",
+ rb->rptr, rb->wptr);
+ return -ETIMEDOUT;
+ }
+ } while (rb->rptr != rb->wptr);
+
+ return 0;
+}
+
+/* Caller must hold the device mutex. */
+int adreno_idle(struct kgsl_device *device)
+{
+ struct adreno_device *adreno_dev = ADRENO_DEVICE(device);
unsigned int rbbm_status;
- unsigned long wait_timeout =
- msecs_to_jiffies(adreno_dev->wait_timeout);
unsigned long wait_time;
unsigned long wait_time_part;
- unsigned int msecs;
- unsigned int msecs_first;
- unsigned int msecs_part = KGSL_TIMEOUT_PART;
unsigned int prev_reg_val[hang_detect_regs_count];
memset(prev_reg_val, 0, sizeof(prev_reg_val));
- /* Restrict timeout value between adreno_dev->wait_timeout and 0 */
- if ((timeout == 0) || (timeout > adreno_dev->wait_timeout))
- msecs = adreno_dev->wait_timeout;
- else
- msecs = timeout;
-
kgsl_cffdump_regpoll(device->id,
adreno_dev->gpudev->reg_rbbm_status << 2,
0x00000000, 0x80000000);
- /* first, wait until the CP has consumed all the commands in
- * the ring buffer
- */
+
retry:
- if (rb->flags & KGSL_FLAGS_STARTED) {
- msecs_first = (msecs <= 100) ? ((msecs + 4) / 5) : 100;
- wait_time = jiffies + wait_timeout;
- wait_time_part = jiffies + msecs_to_jiffies(msecs_first);
- adreno_poke(device);
- do {
- if (time_after(jiffies, wait_time_part)) {
- adreno_poke(device);
- wait_time_part = jiffies +
- msecs_to_jiffies(msecs_part);
- if ((adreno_hang_detect(device, prev_reg_val)))
- goto err;
- }
- GSL_RB_GET_READPTR(rb, &rb->rptr);
- if (time_after(jiffies, wait_time)) {
- KGSL_DRV_ERR(device, "rptr: %x, wptr: %x\n",
- rb->rptr, rb->wptr);
- goto err;
- }
- } while (rb->rptr != rb->wptr);
- }
+ /* First, wait for the ringbuffer to drain */
+ if (adreno_ringbuffer_drain(device, prev_reg_val))
+ goto err;
/* now, wait for the GPU to finish its operations */
- wait_time = jiffies + wait_timeout;
- wait_time_part = jiffies + msecs_to_jiffies(msecs_part);
+ wait_time = jiffies + ADRENO_IDLE_TIMEOUT;
+ wait_time_part = jiffies + msecs_to_jiffies(KGSL_TIMEOUT_PART);
+
while (time_before(jiffies, wait_time)) {
adreno_regread(device, adreno_dev->gpudev->reg_rbbm_status,
&rbbm_status);
@@ -1876,7 +1889,7 @@
*/
if (time_after(jiffies, wait_time_part)) {
wait_time_part = jiffies +
- msecs_to_jiffies(msecs_part);
+ msecs_to_jiffies(KGSL_TIMEOUT_PART);
if ((adreno_hang_detect(device, prev_reg_val)))
goto err;
}
@@ -1887,7 +1900,7 @@
KGSL_DRV_ERR(device, "spun too long waiting for RB to idle\n");
if (KGSL_STATE_DUMP_AND_RECOVER != device->state &&
!adreno_dump_and_recover(device)) {
- wait_time = jiffies + wait_timeout;
+ wait_time = jiffies + ADRENO_IDLE_TIMEOUT;
goto retry;
}
return -ETIMEDOUT;
@@ -1934,7 +1947,7 @@
/* switch to NULL ctxt */
if (adreno_dev->drawctxt_active != NULL) {
adreno_drawctxt_switch(adreno_dev, NULL, 0);
- status = adreno_idle(device, KGSL_TIMEOUT_DEFAULT);
+ status = adreno_idle(device);
}
return status;
@@ -2184,12 +2197,11 @@
struct adreno_device *adreno_dev = ADRENO_DEVICE(device);
struct kgsl_pwrctrl *pwr = &device->pwrctrl;
int retries = 0;
- unsigned int msecs_first;
- unsigned int msecs_part = KGSL_TIMEOUT_PART;
unsigned int ts_issued;
unsigned int context_id = _get_context_id(context);
unsigned int time_elapsed = 0;
unsigned int prev_reg_val[hang_detect_regs_count];
+ unsigned int wait;
memset(prev_reg_val, 0, sizeof(prev_reg_val));
@@ -2207,11 +2219,18 @@
goto done;
}
- /* Keep the first timeout as 100msecs before rewriting
- * the WPTR. Less visible impact if the WPTR has not
- * been updated properly.
+ /*
+ * Make the first timeout interval 100 msecs and then try to kick the
+ * wptr again. This helps to ensure the wptr is updated properly. If
+ * the requested timeout is less than 100 msecs, then wait 20msecs which
+ * is the minimum amount of time we can safely wait at 100HZ
*/
- msecs_first = (msecs <= 100) ? ((msecs + 4) / 5) : 100;
+
+ if (msecs == 0 || msecs >= 100)
+ wait = 100;
+ else
+ wait = 20;
+
do {
/*
* If the context ID is invalid, we are in a race with
@@ -2250,8 +2269,8 @@
device->wait_queue,
kgsl_check_interrupt_timestamp(device,
context, timestamp),
- msecs_to_jiffies(retries ?
- msecs_part : msecs_first), io);
+ msecs_to_jiffies(wait), io);
+
mutex_lock(&device->mutex);
if (status > 0) {
@@ -2264,11 +2283,12 @@
}
/*this wait timed out*/
- time_elapsed = time_elapsed +
- (retries ? msecs_part : msecs_first);
+ time_elapsed += wait;
+ wait = KGSL_TIMEOUT_PART;
+
retries++;
- } while (time_elapsed < msecs);
+ } while (!msecs || time_elapsed < msecs);
hang_dump:
/*
diff --git a/drivers/gpu/msm/adreno.h b/drivers/gpu/msm/adreno.h
index b923049e..26d5eaa 100644
--- a/drivers/gpu/msm/adreno.h
+++ b/drivers/gpu/msm/adreno.h
@@ -55,6 +55,12 @@
#define ADRENO_NUM_CTX_SWITCH_ALLOWED_BEFORE_DRAW 50
+/* One cannot wait forever for the core to idle, so set an upper limit to the
+ * amount of time to wait for the core to go idle
+ */
+
+#define ADRENO_IDLE_TIMEOUT (20 * 1000)
+
enum adreno_gpurev {
ADRENO_REV_UNKNOWN = 0,
ADRENO_REV_A200 = 200,
@@ -162,7 +168,7 @@
extern const unsigned int hang_detect_regs_count;
-int adreno_idle(struct kgsl_device *device, unsigned int timeout);
+int adreno_idle(struct kgsl_device *device);
void adreno_regread(struct kgsl_device *device, unsigned int offsetwords,
unsigned int *value);
void adreno_regwrite(struct kgsl_device *device, unsigned int offsetwords,
diff --git a/drivers/gpu/msm/adreno_a3xx.c b/drivers/gpu/msm/adreno_a3xx.c
index 2dbfd8f..205c9ff 100644
--- a/drivers/gpu/msm/adreno_a3xx.c
+++ b/drivers/gpu/msm/adreno_a3xx.c
@@ -2290,9 +2290,6 @@
build_quad_vtxbuff(drawctxt, &drawctxt->context_gmem_shadow,
&tmp_ctx.cmd);
- /* Dow we need to idle? */
- /* adreno_idle(&adreno_dev->dev, KGSL_TIMEOUT_DEFAULT); */
-
tmp_ctx.cmd = build_gmem2sys_cmds(adreno_dev, drawctxt,
&drawctxt->context_gmem_shadow);
tmp_ctx.cmd = build_sys2gmem_cmds(adreno_dev, drawctxt,
diff --git a/drivers/gpu/msm/adreno_drawctxt.c b/drivers/gpu/msm/adreno_drawctxt.c
index 6c74dfa..bd22233 100644
--- a/drivers/gpu/msm/adreno_drawctxt.c
+++ b/drivers/gpu/msm/adreno_drawctxt.c
@@ -224,7 +224,7 @@
adreno_drawctxt_switch(adreno_dev, NULL, 0);
}
- adreno_idle(device, KGSL_TIMEOUT_DEFAULT);
+ adreno_idle(device);
kgsl_sharedmem_free(&drawctxt->gpustate);
kgsl_sharedmem_free(&drawctxt->context_gmem_shadow.gmemshadow);
diff --git a/drivers/gpu/msm/adreno_ringbuffer.c b/drivers/gpu/msm/adreno_ringbuffer.c
index ca9e335..ad9007f 100644
--- a/drivers/gpu/msm/adreno_ringbuffer.c
+++ b/drivers/gpu/msm/adreno_ringbuffer.c
@@ -52,11 +52,9 @@
unsigned int freecmds;
unsigned int *cmds;
uint cmds_gpu;
- struct adreno_device *adreno_dev = ADRENO_DEVICE(rb->device);
- unsigned long wait_timeout = msecs_to_jiffies(adreno_dev->wait_timeout);
unsigned long wait_time;
+ unsigned long wait_timeout = msecs_to_jiffies(ADRENO_IDLE_TIMEOUT);
unsigned long wait_time_part;
- unsigned int msecs_part = KGSL_TIMEOUT_PART;
unsigned int prev_reg_val[hang_detect_regs_count];
memset(prev_reg_val, 0, sizeof(prev_reg_val));
@@ -87,7 +85,7 @@
}
wait_time = jiffies + wait_timeout;
- wait_time_part = jiffies + msecs_to_jiffies(msecs_part);
+ wait_time_part = jiffies + msecs_to_jiffies(KGSL_TIMEOUT_PART);
/* wait for space in ringbuffer */
while (1) {
GSL_RB_GET_READPTR(rb, &rb->rptr);
@@ -101,7 +99,7 @@
*/
if (time_after(jiffies, wait_time_part)) {
wait_time_part = jiffies +
- msecs_to_jiffies(msecs_part);
+ msecs_to_jiffies(KGSL_TIMEOUT_PART);
if ((adreno_hang_detect(rb->device,
prev_reg_val))){
KGSL_DRV_ERR(rb->device,
@@ -393,7 +391,7 @@
adreno_dev->gpudev->rb_init(adreno_dev, rb);
/* idle device to validate ME INIT */
- status = adreno_idle(device, KGSL_TIMEOUT_DEFAULT);
+ status = adreno_idle(device);
if (status == 0)
rb->flags |= KGSL_FLAGS_STARTED;
@@ -961,7 +959,7 @@
* this is conservative but works reliably and is ok
* even for performance simulations
*/
- adreno_idle(device, KGSL_TIMEOUT_DEFAULT);
+ adreno_idle(device);
#endif
/* If context hung and recovered then return error so that the
* application may handle it */
diff --git a/drivers/gpu/msm/kgsl.c b/drivers/gpu/msm/kgsl.c
index 3d83508..e7a1c13 100644
--- a/drivers/gpu/msm/kgsl.c
+++ b/drivers/gpu/msm/kgsl.c
@@ -559,7 +559,7 @@
break;
case KGSL_STATE_ACTIVE:
/* Wait for the device to become idle */
- device->ftbl->idle(device, KGSL_TIMEOUT_DEFAULT);
+ device->ftbl->idle(device);
case KGSL_STATE_NAP:
case KGSL_STATE_SLEEP:
/* Get the completion ready to be waited upon. */
@@ -2605,7 +2605,7 @@
}
if (device->state == KGSL_STATE_ACTIVE)
- kgsl_idle(device, KGSL_TIMEOUT_DEFAULT);
+ kgsl_idle(device);
}
KGSL_LOG_DUMP(device, "|%s| Dump Started\n", device->name);
diff --git a/drivers/gpu/msm/kgsl_device.h b/drivers/gpu/msm/kgsl_device.h
index d0932ef..2a2e916 100644
--- a/drivers/gpu/msm/kgsl_device.h
+++ b/drivers/gpu/msm/kgsl_device.h
@@ -67,7 +67,7 @@
unsigned int offsetwords, unsigned int *value);
void (*regwrite) (struct kgsl_device *device,
unsigned int offsetwords, unsigned int value);
- int (*idle) (struct kgsl_device *device, unsigned int timeout);
+ int (*idle) (struct kgsl_device *device);
unsigned int (*isidle) (struct kgsl_device *device);
int (*suspend_context) (struct kgsl_device *device);
int (*start) (struct kgsl_device *device, unsigned int init_ram);
@@ -287,9 +287,9 @@
device->ftbl->regwrite(device, offsetwords, value);
}
-static inline int kgsl_idle(struct kgsl_device *device, unsigned int timeout)
+static inline int kgsl_idle(struct kgsl_device *device)
{
- return device->ftbl->idle(device, timeout);
+ return device->ftbl->idle(device);
}
static inline unsigned int kgsl_gpuid(struct kgsl_device *device,
diff --git a/drivers/gpu/msm/kgsl_gpummu.c b/drivers/gpu/msm/kgsl_gpummu.c
index d8472f2..8cf00ea 100644
--- a/drivers/gpu/msm/kgsl_gpummu.c
+++ b/drivers/gpu/msm/kgsl_gpummu.c
@@ -472,7 +472,7 @@
return;
if (flags & KGSL_MMUFLAGS_PTUPDATE) {
- kgsl_idle(mmu->device, KGSL_TIMEOUT_DEFAULT);
+ kgsl_idle(mmu->device);
gpummu_pt = mmu->hwpagetable->priv;
kgsl_regwrite(mmu->device, MH_MMU_PT_BASE,
gpummu_pt->base.gpuaddr);
@@ -552,7 +552,7 @@
kgsl_regwrite(device, MH_MMU_CONFIG, mmu->config);
/* idle device */
- kgsl_idle(device, KGSL_TIMEOUT_DEFAULT);
+ kgsl_idle(device);
/* enable axi interrupts */
kgsl_regwrite(device, MH_INTERRUPT_MASK,
diff --git a/drivers/gpu/msm/kgsl_iommu.c b/drivers/gpu/msm/kgsl_iommu.c
index e858651..1eb671f 100644
--- a/drivers/gpu/msm/kgsl_iommu.c
+++ b/drivers/gpu/msm/kgsl_iommu.c
@@ -966,7 +966,7 @@
/* Mask off the lsb of the pt base address since lsb will not change */
pt_base &= (KGSL_IOMMU_TTBR0_PA_MASK << KGSL_IOMMU_TTBR0_PA_SHIFT);
if (flags & KGSL_MMUFLAGS_PTUPDATE) {
- kgsl_idle(mmu->device, KGSL_TIMEOUT_DEFAULT);
+ kgsl_idle(mmu->device);
for (i = 0; i < iommu->unit_count; i++) {
/* get the lsb value which should not change when
* changing ttbr0 */
diff --git a/drivers/gpu/msm/kgsl_mmu.c b/drivers/gpu/msm/kgsl_mmu.c
index 8e6c5c0..e7f5935 100644
--- a/drivers/gpu/msm/kgsl_mmu.c
+++ b/drivers/gpu/msm/kgsl_mmu.c
@@ -560,7 +560,7 @@
struct kgsl_mh *mh = &device->mh;
/* force mmu off to for now*/
kgsl_regwrite(device, MH_MMU_CONFIG, 0);
- kgsl_idle(device, KGSL_TIMEOUT_DEFAULT);
+ kgsl_idle(device);
/* define physical memory range accessible by the core */
kgsl_regwrite(device, MH_MMU_MPU_BASE, mh->mpu_base);
diff --git a/drivers/gpu/msm/kgsl_pwrctrl.c b/drivers/gpu/msm/kgsl_pwrctrl.c
index 4b5021d..e4d7141 100644
--- a/drivers/gpu/msm/kgsl_pwrctrl.c
+++ b/drivers/gpu/msm/kgsl_pwrctrl.c
@@ -80,8 +80,8 @@
* Idle the gpu core before changing the clock freq.
*/
if (pwr->idle_needed == true)
- device->ftbl->idle(device,
- KGSL_TIMEOUT_DEFAULT);
+ device->ftbl->idle(device);
+
/* Don't shift by more than one level at a time to
* avoid glitches.
*/
diff --git a/drivers/gpu/msm/z180.c b/drivers/gpu/msm/z180.c
index 9037f3c..8ddc991 100644
--- a/drivers/gpu/msm/z180.c
+++ b/drivers/gpu/msm/z180.c
@@ -358,7 +358,7 @@
return ts_diff < Z180_PACKET_COUNT;
}
-static int z180_idle(struct kgsl_device *device, unsigned int timeout)
+static int z180_idle(struct kgsl_device *device)
{
int status = 0;
struct z180_device *z180_dev = Z180_DEVICE(device);
@@ -366,7 +366,8 @@
if (timestamp_cmp(z180_dev->current_timestamp,
z180_dev->timestamp) > 0)
status = z180_wait(device, NULL,
- z180_dev->current_timestamp, timeout);
+ z180_dev->current_timestamp,
+ Z180_IDLE_TIMEOUT);
if (status)
KGSL_DRV_ERR(device, "z180_waittimestamp() timed out\n");
@@ -583,7 +584,7 @@
static int z180_stop(struct kgsl_device *device)
{
device->ftbl->irqctrl(device, 0);
- z180_idle(device, KGSL_TIMEOUT_DEFAULT);
+ z180_idle(device);
del_timer_sync(&device->idle_timer);
@@ -852,7 +853,7 @@
{
struct z180_device *z180_dev = Z180_DEVICE(device);
- z180_idle(device, KGSL_TIMEOUT_DEFAULT);
+ z180_idle(device);
if (z180_dev->ringbuffer.prevctx == context->id) {
z180_dev->ringbuffer.prevctx = Z180_INVALID_CONTEXT;
diff --git a/drivers/gpu/msm/z180.h b/drivers/gpu/msm/z180.h
index 6e81a9d..a8973d2 100644
--- a/drivers/gpu/msm/z180.h
+++ b/drivers/gpu/msm/z180.h
@@ -28,6 +28,9 @@
#define Z180_DEFAULT_PWRSCALE_POLICY NULL
+/* Wait a maximum of 10 seconds when trying to idle the core */
+#define Z180_IDLE_TIMEOUT (10 * 1000)
+
struct z180_ringbuffer {
unsigned int prevctx;
struct kgsl_memdesc cmdbufdesc;
diff --git a/drivers/i2c/busses/i2c-qup.c b/drivers/i2c/busses/i2c-qup.c
index 297afa7..c1617bff 100644
--- a/drivers/i2c/busses/i2c-qup.c
+++ b/drivers/i2c/busses/i2c-qup.c
@@ -1339,8 +1339,10 @@
}
free_irq(dev->err_irq, dev);
} else {
- if (dev->dev->of_node)
+ if (dev->dev->of_node) {
+ dev->adapter.dev.of_node = pdev->dev.of_node;
of_i2c_register_devices(&dev->adapter);
+ }
return 0;
}
diff --git a/drivers/input/touchscreen/atmel_mxt_ts.c b/drivers/input/touchscreen/atmel_mxt_ts.c
index 1c70527..49a081e 100644
--- a/drivers/input/touchscreen/atmel_mxt_ts.c
+++ b/drivers/input/touchscreen/atmel_mxt_ts.c
@@ -36,7 +36,9 @@
/* Family ID */
#define MXT224_ID 0x80
#define MXT224E_ID 0x81
+#define MXT336S_ID 0x82
#define MXT1386_ID 0xA0
+#define MXT1664S_ID 0xA2
/* Version */
#define MXT_VER_20 20
@@ -94,6 +96,7 @@
#define MXT_TOUCH_PROXKEY_T52 52
#define MXT_PROCI_GRIPFACE_T20 20
#define MXT_PROCG_NOISE_T22 22
+#define MXT_PROCG_NOISE_T62 62
#define MXT_PROCI_ONETOUCH_T24 24
#define MXT_PROCI_TWOTOUCH_T27 27
#define MXT_PROCI_GRIP_T40 40
@@ -102,6 +105,7 @@
#define MXT_PROCI_STYLUS_T47 47
#define MXT_PROCI_ADAPTIVETHRESHOLD_T55 55
#define MXT_PROCI_SHIELDLESS_T56 56
+#define MXT_PROCI_EXTRATSDATA_T57 57
#define MXT_PROCG_NOISESUPPRESSION_T48 48
#define MXT_SPT_COMMSCONFIG_T18 18
#define MXT_SPT_GPIOPWM_T19 19
@@ -111,6 +115,7 @@
#define MXT_SPT_DIGITIZER_T43 43
#define MXT_SPT_MESSAGECOUNT_T44 44
#define MXT_SPT_CTECONFIG_T46 46
+#define MXT_SPT_TIMER_T61 61
/* MXT_GEN_COMMAND_T6 field */
#define MXT_COMMAND_RESET 0
@@ -231,6 +236,8 @@
#define MXT224_RESET_TIME 65 /* msec */
#define MXT224E_RESET_TIME 150 /* msec */
#define MXT1386_RESET_TIME 250 /* msec */
+#define MXT336S_RESET_TIME 25 /* msec */
+#define MXT1664S_RESET_TIME 65 /* msec */
#define MXT_RESET_TIME 250 /* msec */
#define MXT_RESET_NOCHGREAD 400 /* msec */
@@ -372,6 +379,7 @@
case MXT_TOUCH_PROXKEY_T52:
case MXT_PROCI_GRIPFACE_T20:
case MXT_PROCG_NOISE_T22:
+ case MXT_PROCG_NOISE_T62:
case MXT_PROCI_ONETOUCH_T24:
case MXT_PROCI_TWOTOUCH_T27:
case MXT_PROCI_GRIP_T40:
@@ -379,6 +387,7 @@
case MXT_PROCI_TOUCHSUPPRESSION_T42:
case MXT_PROCI_STYLUS_T47:
case MXT_PROCI_SHIELDLESS_T56:
+ case MXT_PROCI_EXTRATSDATA_T57:
case MXT_PROCG_NOISESUPPRESSION_T48:
case MXT_SPT_COMMSCONFIG_T18:
case MXT_SPT_GPIOPWM_T19:
@@ -387,6 +396,7 @@
case MXT_SPT_USERDATA_T38:
case MXT_SPT_DIGITIZER_T43:
case MXT_SPT_CTECONFIG_T46:
+ case MXT_SPT_TIMER_T61:
case MXT_PROCI_ADAPTIVETHRESHOLD_T55:
return true;
default:
@@ -406,6 +416,7 @@
case MXT_TOUCH_PROXKEY_T52:
case MXT_PROCI_GRIPFACE_T20:
case MXT_PROCG_NOISE_T22:
+ case MXT_PROCG_NOISE_T62:
case MXT_PROCI_ONETOUCH_T24:
case MXT_PROCI_TWOTOUCH_T27:
case MXT_PROCI_GRIP_T40:
@@ -413,6 +424,7 @@
case MXT_PROCI_TOUCHSUPPRESSION_T42:
case MXT_PROCI_STYLUS_T47:
case MXT_PROCI_SHIELDLESS_T56:
+ case MXT_PROCI_EXTRATSDATA_T57:
case MXT_PROCG_NOISESUPPRESSION_T48:
case MXT_SPT_COMMSCONFIG_T18:
case MXT_SPT_GPIOPWM_T19:
@@ -421,6 +433,7 @@
case MXT_SPT_USERDATA_T38:
case MXT_SPT_DIGITIZER_T43:
case MXT_SPT_CTECONFIG_T46:
+ case MXT_SPT_TIMER_T61:
case MXT_PROCI_ADAPTIVETHRESHOLD_T55:
return true;
default:
@@ -1293,8 +1306,12 @@
case MXT224E_ID:
msleep(MXT224E_RESET_TIME);
break;
+ case MXT336S_ID:
+ msleep(MXT336S_RESET_TIME);
case MXT1386_ID:
msleep(MXT1386_RESET_TIME);
+ case MXT1664S_ID:
+ msleep(MXT1664S_RESET_TIME);
break;
default:
msleep(MXT_RESET_TIME);
diff --git a/drivers/media/dvb/mpq/demux/mpq_dmx_plugin_tspp_v1.c b/drivers/media/dvb/mpq/demux/mpq_dmx_plugin_tspp_v1.c
index 372c612..c1d1462 100644
--- a/drivers/media/dvb/mpq/demux/mpq_dmx_plugin_tspp_v1.c
+++ b/drivers/media/dvb/mpq/demux/mpq_dmx_plugin_tspp_v1.c
@@ -65,6 +65,11 @@
/* Channel timeout in msec */
#define TSPP_CHANNEL_TIMEOUT 16
+/* module parameters for load time configuration */
+static int tsif0_mode = TSPP_TSIF_MODE_2;
+static int tsif1_mode = TSPP_TSIF_MODE_2;
+module_param(tsif0_mode, int, S_IRUGO);
+module_param(tsif1_mode, int, S_IRUGO);
/*
* Work scheduled each time TSPP notifies dmx
@@ -273,14 +278,17 @@
int ret;
int channel_id;
int *channel_ref_count;
+ enum tspp_tsif_mode mode;
/* determine the TSIF we are reading from */
if (mpq_demux->source == DMX_SOURCE_FRONT0) {
tsif = 0;
tspp_source = TSPP_SOURCE_TSIF0;
+ mode = (enum tspp_tsif_mode)tsif0_mode;
} else if (mpq_demux->source == DMX_SOURCE_FRONT1) {
tsif = 1;
tspp_source = TSPP_SOURCE_TSIF1;
+ mode = (enum tspp_tsif_mode)tsif1_mode;
} else {
/* invalid source */
MPQ_DVB_ERR_PRINT(
@@ -333,7 +341,7 @@
}
/* set TSPP source */
- ret = tspp_open_stream(0, channel_id, tspp_source);
+ ret = tspp_open_stream(0, channel_id, tspp_source, mode);
if (ret < 0) {
MPQ_DVB_ERR_PRINT(
"%s: tspp_select_source(%d,%d) failed (%d)\n",
diff --git a/drivers/media/video/msm/eeprom/msm_camera_eeprom.c b/drivers/media/video/msm/eeprom/msm_camera_eeprom.c
index 96a6e04..effae8b 100644
--- a/drivers/media/video/msm/eeprom/msm_camera_eeprom.c
+++ b/drivers/media/video/msm/eeprom/msm_camera_eeprom.c
@@ -100,7 +100,7 @@
}
rc = e_ctrl->func_tbl.eeprom_get_info(e_ctrl,
&cdata.cfg.get_info);
-
+ cdata.is_eeprom_supported = 1;
if (copy_to_user((void *)argp,
&cdata,
sizeof(struct msm_eeprom_cfg_data)))
diff --git a/drivers/media/video/msm/msm_mctl.c b/drivers/media/video/msm/msm_mctl.c
index b7f6b08..d876f12 100644
--- a/drivers/media/video/msm/msm_mctl.c
+++ b/drivers/media/video/msm/msm_mctl.c
@@ -341,7 +341,6 @@
case MSM_CAM_IOCTL_EEPROM_IO_CFG: {
struct msm_eeprom_cfg_data eeprom_data;
if (p_mctl->eeprom_sdev) {
- eeprom_data.is_eeprom_supported = 1;
rc = v4l2_subdev_call(p_mctl->eeprom_sdev,
core, ioctl, VIDIOC_MSM_EEPROM_CFG, argp);
} else {
diff --git a/drivers/media/video/msm_vidc/msm_vdec.c b/drivers/media/video/msm_vidc/msm_vdec.c
index c87211a..d47bdb0 100644
--- a/drivers/media/video/msm_vidc/msm_vdec.c
+++ b/drivers/media/video/msm_vidc/msm_vdec.c
@@ -648,6 +648,11 @@
pr_err("Failed to set scratch buffers: %d\n", rc);
goto fail_start;
}
+ rc = msm_comm_set_persist_buffers(inst);
+ if (rc) {
+ pr_err("Failed to set persist buffers: %d\n", rc);
+ goto fail_start;
+ }
rc = msm_comm_try_state(inst, MSM_VIDC_START_DONE);
if (rc) {
pr_err("Failed to move inst: %p to start done state\n",
diff --git a/drivers/media/video/msm_vidc/msm_venc.c b/drivers/media/video/msm_vidc/msm_venc.c
index 14baf79..5b1928b 100644
--- a/drivers/media/video/msm_vidc/msm_venc.c
+++ b/drivers/media/video/msm_vidc/msm_venc.c
@@ -626,6 +626,11 @@
pr_err("Failed to set scratch buffers: %d\n", rc);
goto fail_start;
}
+ rc = msm_comm_set_persist_buffers(inst);
+ if (rc) {
+ pr_err("Failed to set persist buffers: %d\n", rc);
+ goto fail_start;
+ }
rc = msm_comm_try_state(inst, MSM_VIDC_START_DONE);
if (rc) {
pr_err("Failed to move inst: %p to start done state\n",
diff --git a/drivers/media/video/msm_vidc/msm_vidc.c b/drivers/media/video/msm_vidc/msm_vidc.c
index 4d4cec5..72f30ea 100644
--- a/drivers/media/video/msm_vidc/msm_vidc.c
+++ b/drivers/media/video/msm_vidc/msm_vidc.c
@@ -243,6 +243,7 @@
inst->session_type = session_type;
INIT_LIST_HEAD(&inst->pendingq);
INIT_LIST_HEAD(&inst->internalbufs);
+ INIT_LIST_HEAD(&inst->persistbufs);
inst->state = MSM_VIDC_CORE_UNINIT_DONE;
inst->core = core;
for (i = SESSION_MSG_INDEX(SESSION_MSG_START);
@@ -316,6 +317,15 @@
kfree(buf);
}
}
+ if (!list_empty(&inst->persistbufs)) {
+ list_for_each_safe(ptr, next, &inst->persistbufs) {
+ buf = list_entry(ptr, struct internal_buf,
+ list);
+ list_del(&buf->list);
+ msm_smem_free(inst->mem_client, buf->handle);
+ kfree(buf);
+ }
+ }
if (inst->extradata_handle)
msm_smem_free(inst->mem_client, inst->extradata_handle);
spin_unlock_irqrestore(&inst->lock, flags);
diff --git a/drivers/media/video/msm_vidc/msm_vidc_common.c b/drivers/media/video/msm_vidc/msm_vidc_common.c
index b07c63b..763477a 100644
--- a/drivers/media/video/msm_vidc/msm_vidc_common.c
+++ b/drivers/media/video/msm_vidc/msm_vidc_common.c
@@ -1549,3 +1549,62 @@
err_no_mem:
return rc;
}
+
+int msm_comm_set_persist_buffers(struct msm_vidc_inst *inst)
+{
+ int rc = 0;
+ struct msm_smem *handle;
+ struct internal_buf *binfo;
+ struct vidc_buffer_addr_info buffer_info;
+ unsigned long flags;
+ struct hal_buffer_requirements *persist_buf =
+ &inst->buff_req.buffer[HAL_BUFFER_INTERNAL_PERSIST];
+ int i;
+ pr_debug("persist: num = %d, size = %d\n",
+ persist_buf->buffer_count_actual,
+ persist_buf->buffer_size);
+ if (!list_empty(&inst->persistbufs)) {
+ pr_err("Persist buffers already allocated\n");
+ return rc;
+ }
+
+ if (persist_buf->buffer_size) {
+ for (i = 0; i < persist_buf->buffer_count_actual; i++) {
+ handle = msm_smem_alloc(inst->mem_client,
+ persist_buf->buffer_size, 1, 0,
+ inst->core->resources.io_map[NS_MAP].domain, 0);
+ if (!handle) {
+ pr_err("Failed to allocate persist memory\n");
+ rc = -ENOMEM;
+ goto err_no_mem;
+ }
+ binfo = kzalloc(sizeof(*binfo), GFP_KERNEL);
+ if (!binfo) {
+ pr_err("Out of memory\n");
+ rc = -ENOMEM;
+ goto fail_kzalloc;
+ }
+ binfo->handle = handle;
+ buffer_info.buffer_size = persist_buf->buffer_size;
+ buffer_info.buffer_type = HAL_BUFFER_INTERNAL_PERSIST;
+ buffer_info.num_buffers = 1;
+ buffer_info.align_device_addr = handle->device_addr;
+ rc = vidc_hal_session_set_buffers(
+ (void *) inst->session, &buffer_info);
+ if (rc) {
+ pr_err("vidc_hal_session_set_buffers failed");
+ goto fail_set_buffers;
+ }
+ spin_lock_irqsave(&inst->lock, flags);
+ list_add_tail(&binfo->list, &inst->persistbufs);
+ spin_unlock_irqrestore(&inst->lock, flags);
+ }
+ }
+ return rc;
+fail_set_buffers:
+ kfree(binfo);
+fail_kzalloc:
+ msm_smem_free(inst->mem_client, handle);
+err_no_mem:
+ return rc;
+}
diff --git a/drivers/media/video/msm_vidc/msm_vidc_common.h b/drivers/media/video/msm_vidc/msm_vidc_common.h
index 2009ca6..9430d5f 100644
--- a/drivers/media/video/msm_vidc/msm_vidc_common.h
+++ b/drivers/media/video/msm_vidc/msm_vidc_common.h
@@ -28,6 +28,7 @@
int msm_comm_try_state(struct msm_vidc_inst *inst, int state);
int msm_comm_try_get_bufreqs(struct msm_vidc_inst *inst);
int msm_comm_set_scratch_buffers(struct msm_vidc_inst *inst);
+int msm_comm_set_persist_buffers(struct msm_vidc_inst *inst);
int msm_comm_qbuf(struct vb2_buffer *vb);
int msm_comm_scale_clocks(struct msm_vidc_core *core);
#define IS_PRIV_CTRL(idx) (\
diff --git a/drivers/media/video/msm_vidc/msm_vidc_internal.h b/drivers/media/video/msm_vidc/msm_vidc_internal.h
index 8c11de8..630f383 100644
--- a/drivers/media/video/msm_vidc/msm_vidc_internal.h
+++ b/drivers/media/video/msm_vidc/msm_vidc_internal.h
@@ -207,6 +207,7 @@
spinlock_t lock;
struct list_head pendingq;
struct list_head internalbufs;
+ struct list_head persistbufs;
struct buffer_requirements buff_req;
void *mem_client;
struct v4l2_ctrl_handler ctrl_handler;
diff --git a/drivers/thermal/msm8974-tsens.c b/drivers/thermal/msm8974-tsens.c
index 2dd698a..7d0583c 100644
--- a/drivers/thermal/msm8974-tsens.c
+++ b/drivers/thermal/msm8974-tsens.c
@@ -97,7 +97,7 @@
#define TSENS_THRESHOLD_MAX_CODE 0x3ff
#define TSENS_THRESHOLD_MIN_CODE 0x0
-#define TSENS_CTRL_INIT_DATA1 0x3fffff9
+#define TSENS_CTRL_INIT_DATA1 0x1cfff9
#define TSENS_GLOBAL_INIT_DATA 0x302f16c
#define TSENS_S0_MAIN_CFG_INIT_DATA 0x1c3
#define TSENS_SN_MIN_MAX_STATUS_CTRL_DATA 0x3ffc00
@@ -141,27 +141,24 @@
static int tsens_tz_code_to_degc(int adc_code, int sensor_num)
{
int degcbeforefactor, degc;
- degcbeforefactor = (adc_code *
- tmdev->sensor[sensor_num].slope_mul_tsens_factor
- + tmdev->sensor[sensor_num].offset);
+ degcbeforefactor = ((adc_code * tmdev->tsens_factor) -
+ tmdev->sensor[sensor_num].offset)/
+ tmdev->sensor[sensor_num].slope_mul_tsens_factor;
if (degcbeforefactor == 0)
degc = degcbeforefactor;
else if (degcbeforefactor > 0)
- degc = (degcbeforefactor + tmdev->tsens_factor/2)
- / tmdev->tsens_factor;
+ degc = degcbeforefactor;
else
- degc = (degcbeforefactor - tmdev->tsens_factor/2)
- / tmdev->tsens_factor;
+ degc = degcbeforefactor;
+
return degc;
}
static int tsens_tz_degc_to_code(int degc, int sensor_num)
{
- int code = (degc * tmdev->tsens_factor -
- tmdev->sensor[sensor_num].offset
- + tmdev->sensor[sensor_num].slope_mul_tsens_factor/2)
- / tmdev->sensor[sensor_num].slope_mul_tsens_factor;
+ int code = ((degc * tmdev->sensor[sensor_num].slope_mul_tsens_factor)
+ + tmdev->sensor[sensor_num].offset)/tmdev->tsens_factor;
if (code > TSENS_THRESHOLD_MAX_CODE)
code = TSENS_THRESHOLD_MAX_CODE;
@@ -498,10 +495,10 @@
if (!tsens_calibration_mode) {
pr_debug("TSENS is calibrationless mode\n");
for (i = 0; i < tmdev->tsens_num_sensor; i++) {
- tmdev->sensor[i].calib_data_point2 = 78000;
- tmdev->sensor[i].calib_data_point1 = 49200;
- goto compute_intercept_slope;
+ tmdev->sensor[i].calib_data_point2 = 780;
+ tmdev->sensor[i].calib_data_point1 = 492;
}
+ goto compute_intercept_slope;
} else if (tsens_calibration_mode == TSENS_ONE_POINT_CALIB ||
TSENS_TWO_POINT_CALIB) {
tsens_base1_data = calib_data[0] & TSENS_BASE1_MASK;
@@ -595,10 +592,9 @@
num *= tmdev->tsens_factor;
tmdev->sensor[i].slope_mul_tsens_factor = num/den;
}
- tmdev->sensor[i].offset = (TSENS_CAL_DEGC_POINT1 *
- tmdev->tsens_factor)
- - (tmdev->sensor[i].calib_data_point1 *
- tmdev->sensor[i].slope_mul_tsens_factor);
+ tmdev->sensor[i].offset = (tmdev->sensor[i].calib_data_point1 *
+ tmdev->tsens_factor) - (TSENS_CAL_DEGC_POINT1 *
+ tmdev->sensor[i].slope_mul_tsens_factor);
INIT_WORK(&tmdev->sensor[i].work, notify_uspace_tsens_fn);
tmdev->prev_reading_avail = false;
}
@@ -747,6 +743,7 @@
goto fail;
tsens_hw_init();
+
tmdev->prev_reading_avail = true;
platform_set_drvdata(pdev, tmdev);
@@ -796,6 +793,7 @@
goto fail;
}
}
+
rc = request_irq(tmdev->tsens_irq, tsens_isr,
IRQF_TRIGGER_RISING, "tsens_interrupt", tmdev);
if (rc < 0) {
diff --git a/include/linux/diagchar.h b/include/linux/diagchar.h
index 7769950..c953613 100644
--- a/include/linux/diagchar.h
+++ b/include/linux/diagchar.h
@@ -112,7 +112,7 @@
#define EVENT_LAST_ID 0x08AD
#define MSG_SSID_0 0
-#define MSG_SSID_0_LAST 91
+#define MSG_SSID_0_LAST 93
#define MSG_SSID_1 500
#define MSG_SSID_1_LAST 506
#define MSG_SSID_2 1000
diff --git a/include/linux/irqdesc.h b/include/linux/irqdesc.h
index f1e2527..771cb35 100644
--- a/include/linux/irqdesc.h
+++ b/include/linux/irqdesc.h
@@ -154,6 +154,14 @@
return desc->status_use_accessors & IRQ_NO_BALANCING_MASK;
}
+static inline int irq_is_per_cpu(unsigned int irq)
+{
+ struct irq_desc *desc;
+
+ desc = irq_to_desc(irq);
+ return desc->status_use_accessors & IRQ_PER_CPU;
+}
+
static inline void
irq_set_lockdep_class(unsigned int irq, struct lock_class_key *class)
{
diff --git a/sound/soc/codecs/wcd9304.c b/sound/soc/codecs/wcd9304.c
index f4f55fa..36b7794 100644
--- a/sound/soc/codecs/wcd9304.c
+++ b/sound/soc/codecs/wcd9304.c
@@ -1573,10 +1573,22 @@
switch (event) {
case SND_SOC_DAPM_PRE_PMU:
+ if (w->reg == SITAR_A_RX_HPH_L_DAC_CTL) {
+ snd_soc_update_bits(codec, SITAR_A_CDC_CONN_CLSG_CTL,
+ 0x30, 0x20);
+ snd_soc_update_bits(codec, SITAR_A_CDC_CONN_CLSG_CTL,
+ 0x0C, 0x08);
+ }
snd_soc_update_bits(codec, w->reg, 0x40, 0x40);
break;
case SND_SOC_DAPM_POST_PMD:
snd_soc_update_bits(codec, w->reg, 0x40, 0x00);
+ if (w->reg == SITAR_A_RX_HPH_L_DAC_CTL) {
+ snd_soc_update_bits(codec, SITAR_A_CDC_CONN_CLSG_CTL,
+ 0x30, 0x10);
+ snd_soc_update_bits(codec, SITAR_A_CDC_CONN_CLSG_CTL,
+ 0x0C, 0x04);
+ }
break;
}
return 0;
@@ -2018,13 +2030,16 @@
{"HEADPHONE", NULL, "HPHL"},
{"HEADPHONE", NULL, "HPHR"},
+
{"HPHL DAC", NULL, "CP"},
{"HPHR DAC", NULL, "CP"},
{"HPHL", NULL, "HPHL DAC"},
- {"HPHL DAC", "NULL", "DAC4 MUX"},
+ {"HPHL DAC", "NULL", "RX2 CHAIN"},
+ {"RX2 CHAIN", NULL, "DAC4 MUX"},
{"HPHR", NULL, "HPHR DAC"},
- {"HPHR DAC", NULL, "RX3 MIX1"},
+ {"HPHR DAC", NULL, "RX3 CHAIN"},
+ {"RX3 CHAIN", NULL, "RX3 MIX1"},
{"DAC1 MUX", "RX1", "RX1 CHAIN"},
{"DAC2 MUX", "RX1", "RX1 CHAIN"},
diff --git a/sound/soc/msm/apq8064.c b/sound/soc/msm/apq8064.c
index a596f03..81bde3f 100644
--- a/sound/soc/msm/apq8064.c
+++ b/sound/soc/msm/apq8064.c
@@ -796,7 +796,7 @@
#undef S
#define S(X, Y) ((TABLA_MBHC_CAL_PLUG_TYPE_PTR(tabla_cal)->X) = (Y))
S(v_no_mic, 30);
- S(v_hs_max, 1550);
+ S(v_hs_max, 2400);
#undef S
#define S(X, Y) ((TABLA_MBHC_CAL_BTN_DET_PTR(tabla_cal)->X) = (Y))
S(c[0], 62);
@@ -814,24 +814,24 @@
btn_low = tabla_mbhc_cal_btn_det_mp(btn_cfg, TABLA_BTN_DET_V_BTN_LOW);
btn_high = tabla_mbhc_cal_btn_det_mp(btn_cfg, TABLA_BTN_DET_V_BTN_HIGH);
btn_low[0] = -50;
- btn_high[0] = 10;
- btn_low[1] = 11;
- btn_high[1] = 38;
- btn_low[2] = 39;
- btn_high[2] = 64;
- btn_low[3] = 65;
- btn_high[3] = 91;
- btn_low[4] = 92;
- btn_high[4] = 115;
- btn_low[5] = 116;
- btn_high[5] = 141;
- btn_low[6] = 142;
- btn_high[6] = 163;
- btn_low[7] = 164;
- btn_high[7] = 250;
+ btn_high[0] = 20;
+ btn_low[1] = 21;
+ btn_high[1] = 62;
+ btn_low[2] = 62;
+ btn_high[2] = 104;
+ btn_low[3] = 105;
+ btn_high[3] = 143;
+ btn_low[4] = 144;
+ btn_high[4] = 181;
+ btn_low[5] = 182;
+ btn_high[5] = 218;
+ btn_low[6] = 219;
+ btn_high[6] = 254;
+ btn_low[7] = 255;
+ btn_high[7] = 330;
n_ready = tabla_mbhc_cal_btn_det_mp(btn_cfg, TABLA_BTN_DET_N_READY);
- n_ready[0] = 48;
- n_ready[1] = 38;
+ n_ready[0] = 80;
+ n_ready[1] = 68;
n_cic = tabla_mbhc_cal_btn_det_mp(btn_cfg, TABLA_BTN_DET_N_CIC);
n_cic[0] = 60;
n_cic[1] = 47;