/* Copyright (c) 2013, The Linux Foundation. All rights reserved.
 *
 * This program is free software; you can redistribute it and/or modify
 * it under the terms of the GNU General Public License version 2 and
 * only version 2 as published by the Free Software Foundation.
 *
 * This program is distributed in the hope that it will be useful,
 * but WITHOUT ANY WARRANTY; without even the implied warranty of
 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
 * GNU General Public License for more details.
 */

/include/ "skeleton.dtsi"

/ {
	model = "Qualcomm MSM KRYPTON";
	compatible = "qcom,msmkrypton";
	interrupt-parent = <&intc>;

	soc: soc { };
};

&soc {
	#address-cells = <1>;
	#size-cells = <1>;
	ranges;

	intc: interrupt-controller@f9000000 {
		compatible = "qcom,msm-qgic2";
		interrupt-controller;
		#interrupt-cells = <3>;
		reg = <0xf9000000 0x1000>,
		      <0xf9002000 0x1000>;
	};

	msmgpio: gpio@fd510000 {
		compatible = "qcom,msm-gpio";
		gpio-controller;
		#gpio-cells = <2>;
		interrupt-controller;
		#interrupt-cells = <2>;
		reg = <0xfd510000 0x4000>;
		ngpio = <89>;
		interrupts = <0 208 0>;
		qcom,direct-connect-irqs = <8>;
	};

	qcom,msm-imem@fe805000 {
		compatible = "qcom,msm-imem";
		reg = <0xfe807800 0x1000>; /* Address and size of IMEM */
	};

	qcom,msm-mem-hole {
		compatible = "qcom,msm-mem-hole";
		qcom,memblock-remove = <0x02000000 0x06000000>; /* Address and Size of Hole */
	};

	timer@f9020000 {
		#address-cells = <1>;
		#size-cells = <1>;
		ranges;
		compatible = "arm,armv7-timer-mem";
		reg = <0xf9020000 0x1000>;
		clock-frequency = <19200000>;

		frame@f9021000 {
			frame-number = <0>;
			interrupts = <0 7 0x4>,
				     <0 6 0x4>;
			reg = <0xf9021000 0x1000>,
			      <0xf9022000 0x1000>;
		};

		frame@f9023000 {
			frame-number = <1>;
			interrupts = <0 8 0x4>;
			reg = <0xf9023000 0x1000>;
			status = "disabled";
		};

		frame@f9024000 {
			frame-number = <2>;
			interrupts = <0 9 0x4>;
			reg = <0xf9024000 0x1000>;
			status = "disabled";
		};

		frame@f9025000 {
			frame-number = <3>;
			interrupts = <0 10 0x4>;
			reg = <0xf9025000 0x1000>;
			status = "disabled";
		};

		frame@f9026000 {
			frame-number = <4>;
			interrupts = <0 11 0x4>;
			reg = <0xf9026000 0x1000>;
			status = "disabled";
		};

		frame@f9027000 {
			frame-number = <5>;
			interrupts = <0 12 0x4>;
			reg = <0xf9027000 0x1000>;
			status = "disabled";
		};

		frame@f9028000 {
			frame-number = <6>;
			interrupts = <0 13 0x4>;
			reg = <0xf9028000 0x1000>;
			status = "disabled";
		};

		frame@f9029000 {
			frame-number = <7>;
			interrupts = <0 14 0x4>;
			reg = <0xf9029000 0x1000>;
			status = "disabled";
		};
	};

	uartdm3: serial@f991f000 {
		compatible = "qcom,msm-lsuart-v14";
		reg = <0xf991f000 0x1000>;
		interrupts = <0 109 0>;
		status = "disabled";
	};

	qcom,sps@f9980000 {
		compatible = "qcom,msm_sps";
		reg = <0xf9984000 0x15000>,
		      <0xf9999000 0xb000>,
		      <0xfe803000 0xd000>,
			  <0xfe805000 0x1000>;
		interrupts = <0 94 0>;
	};

	spi_6: spi@f9928000 { /* BLSP1 QUP6 */
		cell-index = <0>;
		compatible = "qcom,spi-qup-v2";
		#address-cells = <1>;
		#size-cells = <0>;
		reg = <0xf9928000 0x1000>;
		interrupts = <0 100 0>;
		spi-max-frequency = <19200000>;

		gpios = <&msmgpio 23 0>, /* CLK  */
		<&msmgpio 21 0>, /* MISO */
		<&msmgpio 20 0>; /* MOSI */
		cs-gpios = <&msmgpio 22 0>;
	};
};