commit fd40e5f6313fbc74e8897927be1004faa5d9df08
author Saket Saurabh <ssaurabh@codeaurora.org> Tue Oct 16 15:41:02 2012 +0530
committer Saket Saurabh <ssaurabh@codeaurora.org> Wed Oct 17 12:18:42 2012 +0530
tree 23beea8f1cdce05c3dbbdb8e8840115a5ba69934
parent b8f1cfe674843c6adca0541487c91b48c5988d3d

msm_serial_hs_hwreg.h: Correcting the even parity and odd parity bits

Currently parity bits are defined to be used with UART_DM_MR2
register with PARITY_MODE Bit as below :
EVEN_PARTIY = 1 and ODD_PARITY = 2
With these values, UART functionality doesn't work after enabling parity.
Hence adding correct used PARITY_MODE bits value as
EVEN_PARITY = 2 and ODD_PARITY = 1
after confirming with UART hardware programming guide.

CRs-Fixed: 410377
Change-Id: I1eeb599504285b4c153ad98f4b49fa2bfe6899b6
Signed-off-by: Saket Saurabh <ssaurabh@codeaurora.org>

drivers/tty/serial/msm_serial_hs_hwreg.h

diff --git a/drivers/tty/serial/msm_serial_hs_hwreg.h b/drivers/tty/serial/msm_serial_hs_hwreg.h
index 81f3d54..8debc36 100644
--- a/drivers/tty/serial/msm_serial_hs_hwreg.h
+++ b/drivers/tty/serial/msm_serial_hs_hwreg.h
@@ -183,8 +183,8 @@
 
 /* Parity configuration */
 #define NO_PARITY 0x0
-#define EVEN_PARITY 0x1
-#define ODD_PARITY 0x2
+#define EVEN_PARITY 0x2
+#define ODD_PARITY 0x1
 #define SPACE_PARITY 0x3
 
 #define UARTDM_IPR_STALE_TIMEOUT_MSB_BMSK 0xffffff80