msm: clock-8960: Move vcodec_axi_{a,b}_clk reset control to vcodec_axi_clk
Whenever one needs to be reset the others do too, so just control
them all in one place. This avoids the need to manage all three
AXI clocks in drivers that need to assert these resets.
Signed-off-by: Matt Wagantall <mattw@codeaurora.org>
diff --git a/arch/arm/mach-msm/clock-8960.c b/arch/arm/mach-msm/clock-8960.c
index ad984ab..97411c8 100644
--- a/arch/arm/mach-msm/clock-8960.c
+++ b/arch/arm/mach-msm/clock-8960.c
@@ -527,8 +527,6 @@
.b = {
.ctl_reg = MAXI_EN4_REG,
.en_mask = BIT(23),
- .reset_reg = SW_RESET_AXI_REG,
- .reset_mask = BIT(4),
.halt_reg = DBG_BUS_VEC_I_REG,
.halt_bit = 25,
},
@@ -543,8 +541,6 @@
.b = {
.ctl_reg = MAXI_EN4_REG,
.en_mask = BIT(25),
- .reset_reg = SW_RESET_AXI_REG,
- .reset_mask = BIT(5),
.halt_reg = DBG_BUS_VEC_I_REG,
.halt_bit = 26,
},
@@ -561,7 +557,7 @@
.ctl_reg = MAXI_EN_REG,
.en_mask = BIT(19),
.reset_reg = SW_RESET_AXI_REG,
- .reset_mask = BIT(7),
+ .reset_mask = BIT(4)|BIT(5)|BIT(7),
.halt_reg = DBG_BUS_VEC_E_REG,
.halt_bit = 3,
},