msm: clock-8974: Add reset support for venus0_vcodec_clk
The video driver needs to be able to reset the video core between
clips, even if power is not collapsed at the GDSC. Add support for
use of clk_reset() to control the VENUS0_BCR register.
Change-Id: Iccafdd148dccadd2a3770ac4fe999009e0d298bf
Signed-off-by: Matt Wagantall <mattw@codeaurora.org>
diff --git a/arch/arm/mach-msm/clock-8974.c b/arch/arm/mach-msm/clock-8974.c
index 4a16b42..7cf4ff0 100644
--- a/arch/arm/mach-msm/clock-8974.c
+++ b/arch/arm/mach-msm/clock-8974.c
@@ -4212,6 +4212,7 @@
static struct branch_clk venus0_vcodec0_clk = {
.cbcr_reg = VENUS0_VCODEC0_CBCR,
+ .bcr_reg = VENUS0_BCR,
.has_sibling = 0,
.base = &virt_bases[MMSS_BASE],
.c = {