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Sam Ravnborga439fe52008-07-27 23:00:59 +02001#ifndef ___ASM_SPARC_DMA_MAPPING_H
2#define ___ASM_SPARC_DMA_MAPPING_H
FUJITA Tomonorid6986412009-05-14 16:23:11 +00003
4#include <linux/scatterlist.h>
5#include <linux/mm.h>
FUJITA Tomonorib9f69f42009-05-14 16:23:08 +00006
7#define DMA_ERROR_CODE (~(dma_addr_t)0x0)
8
9extern int dma_supported(struct device *dev, u64 mask);
10extern int dma_set_mask(struct device *dev, u64 dma_mask);
11
FUJITA Tomonorib9f69f42009-05-14 16:23:08 +000012#define dma_alloc_noncoherent(d, s, h, f) dma_alloc_coherent(d, s, h, f)
13#define dma_free_noncoherent(d, s, v, h) dma_free_coherent(d, s, v, h)
14#define dma_is_consistent(d, h) (1)
15
FUJITA Tomonoribc0a14f2009-08-10 11:53:12 +090016extern const struct dma_map_ops *dma_ops;
FUJITA Tomonorid6986412009-05-14 16:23:11 +000017
18static inline void *dma_alloc_coherent(struct device *dev, size_t size,
19 dma_addr_t *dma_handle, gfp_t flag)
20{
21 return dma_ops->alloc_coherent(dev, size, dma_handle, flag);
22}
23
24static inline void dma_free_coherent(struct device *dev, size_t size,
25 void *cpu_addr, dma_addr_t dma_handle)
26{
27 dma_ops->free_coherent(dev, size, cpu_addr, dma_handle);
28}
29
30static inline dma_addr_t dma_map_single(struct device *dev, void *cpu_addr,
31 size_t size,
32 enum dma_data_direction direction)
33{
34 return dma_ops->map_page(dev, virt_to_page(cpu_addr),
35 (unsigned long)cpu_addr & ~PAGE_MASK, size,
FUJITA Tomonoribc0a14f2009-08-10 11:53:12 +090036 direction, NULL);
FUJITA Tomonorid6986412009-05-14 16:23:11 +000037}
38
39static inline void dma_unmap_single(struct device *dev, dma_addr_t dma_addr,
40 size_t size,
41 enum dma_data_direction direction)
42{
FUJITA Tomonoribc0a14f2009-08-10 11:53:12 +090043 dma_ops->unmap_page(dev, dma_addr, size, direction, NULL);
FUJITA Tomonorid6986412009-05-14 16:23:11 +000044}
45
46static inline dma_addr_t dma_map_page(struct device *dev, struct page *page,
47 unsigned long offset, size_t size,
48 enum dma_data_direction direction)
49{
FUJITA Tomonoribc0a14f2009-08-10 11:53:12 +090050 return dma_ops->map_page(dev, page, offset, size, direction, NULL);
FUJITA Tomonorid6986412009-05-14 16:23:11 +000051}
52
53static inline void dma_unmap_page(struct device *dev, dma_addr_t dma_address,
54 size_t size,
55 enum dma_data_direction direction)
56{
FUJITA Tomonoribc0a14f2009-08-10 11:53:12 +090057 dma_ops->unmap_page(dev, dma_address, size, direction, NULL);
FUJITA Tomonorid6986412009-05-14 16:23:11 +000058}
59
60static inline int dma_map_sg(struct device *dev, struct scatterlist *sg,
61 int nents, enum dma_data_direction direction)
62{
FUJITA Tomonoribc0a14f2009-08-10 11:53:12 +090063 return dma_ops->map_sg(dev, sg, nents, direction, NULL);
FUJITA Tomonorid6986412009-05-14 16:23:11 +000064}
65
66static inline void dma_unmap_sg(struct device *dev, struct scatterlist *sg,
67 int nents, enum dma_data_direction direction)
68{
FUJITA Tomonoribc0a14f2009-08-10 11:53:12 +090069 dma_ops->unmap_sg(dev, sg, nents, direction, NULL);
FUJITA Tomonorid6986412009-05-14 16:23:11 +000070}
71
72static inline void dma_sync_single_for_cpu(struct device *dev,
73 dma_addr_t dma_handle, size_t size,
74 enum dma_data_direction direction)
75{
76 dma_ops->sync_single_for_cpu(dev, dma_handle, size, direction);
77}
78
79static inline void dma_sync_single_for_device(struct device *dev,
80 dma_addr_t dma_handle,
81 size_t size,
82 enum dma_data_direction direction)
83{
84 if (dma_ops->sync_single_for_device)
85 dma_ops->sync_single_for_device(dev, dma_handle, size,
86 direction);
87}
88
89static inline void dma_sync_sg_for_cpu(struct device *dev,
90 struct scatterlist *sg, int nelems,
91 enum dma_data_direction direction)
92{
93 dma_ops->sync_sg_for_cpu(dev, sg, nelems, direction);
94}
95
96static inline void dma_sync_sg_for_device(struct device *dev,
97 struct scatterlist *sg, int nelems,
98 enum dma_data_direction direction)
99{
100 if (dma_ops->sync_sg_for_device)
101 dma_ops->sync_sg_for_device(dev, sg, nelems, direction);
102}
103
FUJITA Tomonorib9f69f42009-05-14 16:23:08 +0000104static inline void dma_sync_single_range_for_cpu(struct device *dev,
105 dma_addr_t dma_handle,
106 unsigned long offset,
107 size_t size,
108 enum dma_data_direction dir)
109{
110 dma_sync_single_for_cpu(dev, dma_handle+offset, size, dir);
111}
112
113static inline void dma_sync_single_range_for_device(struct device *dev,
114 dma_addr_t dma_handle,
115 unsigned long offset,
116 size_t size,
117 enum dma_data_direction dir)
118{
119 dma_sync_single_for_device(dev, dma_handle+offset, size, dir);
120}
121
FUJITA Tomonorid6986412009-05-14 16:23:11 +0000122
123static inline int dma_mapping_error(struct device *dev, dma_addr_t dma_addr)
124{
125 return (dma_addr == DMA_ERROR_CODE);
126}
127
128static inline int dma_get_cache_alignment(void)
129{
130 /*
131 * no easy way to get cache size on all processors, so return
132 * the maximum possible, to be safe
133 */
134 return (1 << INTERNODE_CACHE_SHIFT);
135}
136
Sam Ravnborga439fe52008-07-27 23:00:59 +0200137#endif