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Brian Swetland2eb44eb2008-09-29 16:00:48 -07001/* arch/arm/mach-msm/smd_private.h
2 *
3 * Copyright (C) 2007 Google, Inc.
4 * Copyright (c) 2007 QUALCOMM Incorporated
5 *
6 * This software is licensed under the terms of the GNU General Public
7 * License version 2, as published by the Free Software Foundation, and
8 * may be copied, distributed, and modified under those terms.
9 *
10 * This program is distributed in the hope that it will be useful,
11 * but WITHOUT ANY WARRANTY; without even the implied warranty of
12 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
13 * GNU General Public License for more details.
14 *
15 */
16#ifndef _ARCH_ARM_MACH_MSM_MSM_SMD_PRIVATE_H_
17#define _ARCH_ARM_MACH_MSM_MSM_SMD_PRIVATE_H_
18
Brian Swetland03e00cd2009-07-01 17:58:37 -070019#include <linux/platform_device.h>
20#include <linux/spinlock.h>
21#include <linux/list.h>
22
Brian Swetland2eb44eb2008-09-29 16:00:48 -070023struct smem_heap_info
24{
25 unsigned initialized;
26 unsigned free_offset;
27 unsigned heap_remaining;
28 unsigned reserved;
29};
30
31struct smem_heap_entry
32{
33 unsigned allocated;
34 unsigned offset;
35 unsigned size;
36 unsigned reserved;
37};
38
39struct smem_proc_comm
40{
41 unsigned command;
42 unsigned status;
43 unsigned data1;
44 unsigned data2;
45};
46
47#define PC_APPS 0
48#define PC_MODEM 1
49
Brian Swetland5b0f5a32009-04-26 18:38:49 -070050#define VERSION_SMD 0
Brian Swetland2eb44eb2008-09-29 16:00:48 -070051#define VERSION_QDSP6 4
52#define VERSION_APPS_SBL 6
53#define VERSION_MODEM_SBL 7
54#define VERSION_APPS 8
55#define VERSION_MODEM 9
56
57struct smem_shared
58{
59 struct smem_proc_comm proc_comm[4];
60 unsigned version[32];
61 struct smem_heap_info heap_info;
Brian Swetland5b0f5a32009-04-26 18:38:49 -070062 struct smem_heap_entry heap_toc[512];
Brian Swetland2eb44eb2008-09-29 16:00:48 -070063};
64
Brian Swetland5b0f5a32009-04-26 18:38:49 -070065#define SMSM_V1_SIZE (sizeof(unsigned) * 8)
Brian Swetland5b0f5a32009-04-26 18:38:49 -070066#define SMSM_V2_SIZE (sizeof(unsigned) * 4)
Brian Swetland2eb44eb2008-09-29 16:00:48 -070067
Arve Hjønnevågec9d3d12009-06-16 14:48:21 -070068#ifndef CONFIG_ARCH_MSM_SCORPION
Brian Swetland2eb44eb2008-09-29 16:00:48 -070069struct smsm_interrupt_info
70{
Arve Hjønnevågec9d3d12009-06-16 14:48:21 -070071 uint32_t interrupt_mask;
72 uint32_t pending_interrupts;
73 uint32_t wakeup_reason;
Brian Swetland2eb44eb2008-09-29 16:00:48 -070074};
Arve Hjønnevågec9d3d12009-06-16 14:48:21 -070075#else
76#define DEM_MAX_PORT_NAME_LEN (20)
77struct msm_dem_slave_data {
78 uint32_t sleep_time;
79 uint32_t interrupt_mask;
80 uint32_t resources_used;
81 uint32_t reserved1;
82
83 uint32_t wakeup_reason;
84 uint32_t pending_interrupts;
85 uint32_t rpc_prog;
86 uint32_t rpc_proc;
87 char smd_port_name[DEM_MAX_PORT_NAME_LEN];
88 uint32_t reserved2;
89};
90#endif
Brian Swetland2eb44eb2008-09-29 16:00:48 -070091
92#define SZ_DIAG_ERR_MSG 0xC8
93#define ID_DIAG_ERR_MSG SMEM_DIAG_ERR_MESSAGE
94#define ID_SMD_CHANNELS SMEM_SMD_BASE_ID
95#define ID_SHARED_STATE SMEM_SMSM_SHARED_STATE
96#define ID_CH_ALLOC_TBL SMEM_CHANNEL_ALLOC_TBL
97
Brian Swetland5b0f5a32009-04-26 18:38:49 -070098#define SMSM_INIT 0x00000001
99#define SMSM_SMDINIT 0x00000008
100#define SMSM_RPCINIT 0x00000020
101#define SMSM_RESET 0x00000040
102#define SMSM_RSA 0x00000080
103#define SMSM_RUN 0x00000100
104#define SMSM_PWRC 0x00000200
105#define SMSM_TIMEWAIT 0x00000400
106#define SMSM_TIMEINIT 0x00000800
107#define SMSM_PWRC_EARLY_EXIT 0x00001000
108#define SMSM_WFPI 0x00002000
109#define SMSM_SLEEP 0x00004000
110#define SMSM_SLEEPEXIT 0x00008000
111#define SMSM_APPS_REBOOT 0x00020000
112#define SMSM_SYSTEM_POWER_DOWN 0x00040000
113#define SMSM_SYSTEM_REBOOT 0x00080000
114#define SMSM_SYSTEM_DOWNLOAD 0x00100000
115#define SMSM_PWRC_SUSPEND 0x00200000
116#define SMSM_APPS_SHUTDOWN 0x00400000
117#define SMSM_SMD_LOOPBACK 0x00800000
118#define SMSM_RUN_QUIET 0x01000000
119#define SMSM_MODEM_WAIT 0x02000000
120#define SMSM_MODEM_BREAK 0x04000000
121#define SMSM_MODEM_CONTINUE 0x08000000
122#define SMSM_UNKNOWN 0x80000000
Brian Swetland2eb44eb2008-09-29 16:00:48 -0700123
124#define SMSM_WKUP_REASON_RPC 0x00000001
125#define SMSM_WKUP_REASON_INT 0x00000002
126#define SMSM_WKUP_REASON_GPIO 0x00000004
127#define SMSM_WKUP_REASON_TIMER 0x00000008
128#define SMSM_WKUP_REASON_ALARM 0x00000010
129#define SMSM_WKUP_REASON_RESET 0x00000020
130
Arve Hjønnevåg28379412009-05-20 16:52:36 -0700131#ifndef CONFIG_ARCH_MSM_SCORPION
132enum smsm_state_item {
133 SMSM_STATE_APPS = 1,
134 SMSM_STATE_MODEM = 3,
135 SMSM_STATE_COUNT,
136};
137#else
138enum smsm_state_item {
139 SMSM_STATE_APPS,
140 SMSM_STATE_MODEM,
141 SMSM_STATE_HEXAGON,
142 SMSM_STATE_APPS_DEM,
143 SMSM_STATE_MODEM_DEM,
144 SMSM_STATE_QDSP6_DEM,
145 SMSM_STATE_POWER_MASTER_DEM,
146 SMSM_STATE_TIME_MASTER_DEM,
147 SMSM_STATE_COUNT,
148};
149#endif
150
Brian Swetland2eb44eb2008-09-29 16:00:48 -0700151void *smem_alloc(unsigned id, unsigned size);
Arve Hjønnevåg28379412009-05-20 16:52:36 -0700152int smsm_change_state(enum smsm_state_item item, uint32_t clear_mask, uint32_t set_mask);
153uint32_t smsm_get_state(enum smsm_state_item item);
Brian Swetland2eb44eb2008-09-29 16:00:48 -0700154int smsm_set_sleep_duration(uint32_t delay);
Brian Swetland2eb44eb2008-09-29 16:00:48 -0700155void smsm_print_sleep_info(void);
156
157#define SMEM_NUM_SMD_CHANNELS 64
158
159typedef enum
160{
161 /* fixed items */
162 SMEM_PROC_COMM = 0,
163 SMEM_HEAP_INFO,
164 SMEM_ALLOCATION_TABLE,
165 SMEM_VERSION_INFO,
166 SMEM_HW_RESET_DETECT,
167 SMEM_AARM_WARM_BOOT,
168 SMEM_DIAG_ERR_MESSAGE,
169 SMEM_SPINLOCK_ARRAY,
170 SMEM_MEMORY_BARRIER_LOCATION,
171
172 /* dynamic items */
173 SMEM_AARM_PARTITION_TABLE,
174 SMEM_AARM_BAD_BLOCK_TABLE,
175 SMEM_RESERVE_BAD_BLOCKS,
176 SMEM_WM_UUID,
177 SMEM_CHANNEL_ALLOC_TBL,
178 SMEM_SMD_BASE_ID,
179 SMEM_SMEM_LOG_IDX = SMEM_SMD_BASE_ID + SMEM_NUM_SMD_CHANNELS,
180 SMEM_SMEM_LOG_EVENTS,
181 SMEM_SMEM_STATIC_LOG_IDX,
182 SMEM_SMEM_STATIC_LOG_EVENTS,
183 SMEM_SMEM_SLOW_CLOCK_SYNC,
184 SMEM_SMEM_SLOW_CLOCK_VALUE,
185 SMEM_BIO_LED_BUF,
186 SMEM_SMSM_SHARED_STATE,
187 SMEM_SMSM_INT_INFO,
188 SMEM_SMSM_SLEEP_DELAY,
189 SMEM_SMSM_LIMIT_SLEEP,
190 SMEM_SLEEP_POWER_COLLAPSE_DISABLED,
191 SMEM_KEYPAD_KEYS_PRESSED,
192 SMEM_KEYPAD_STATE_UPDATED,
193 SMEM_KEYPAD_STATE_IDX,
194 SMEM_GPIO_INT,
195 SMEM_MDDI_LCD_IDX,
196 SMEM_MDDI_HOST_DRIVER_STATE,
197 SMEM_MDDI_LCD_DISP_STATE,
198 SMEM_LCD_CUR_PANEL,
199 SMEM_MARM_BOOT_SEGMENT_INFO,
200 SMEM_AARM_BOOT_SEGMENT_INFO,
201 SMEM_SLEEP_STATIC,
202 SMEM_SCORPION_FREQUENCY,
203 SMEM_SMD_PROFILES,
204 SMEM_TSSC_BUSY,
205 SMEM_HS_SUSPEND_FILTER_INFO,
206 SMEM_BATT_INFO,
207 SMEM_APPS_BOOT_MODE,
208 SMEM_VERSION_FIRST,
209 SMEM_VERSION_LAST = SMEM_VERSION_FIRST + 24,
210 SMEM_OSS_RRCASN1_BUF1,
211 SMEM_OSS_RRCASN1_BUF2,
212 SMEM_ID_VENDOR0,
213 SMEM_ID_VENDOR1,
214 SMEM_ID_VENDOR2,
215 SMEM_HW_SW_BUILD_ID,
Brian Swetland5b0f5a32009-04-26 18:38:49 -0700216 SMEM_SMD_BLOCK_PORT_BASE_ID,
217 SMEM_SMD_BLOCK_PORT_PROC0_HEAP = SMEM_SMD_BLOCK_PORT_BASE_ID + SMEM_NUM_SMD_CHANNELS,
218 SMEM_SMD_BLOCK_PORT_PROC1_HEAP = SMEM_SMD_BLOCK_PORT_PROC0_HEAP + SMEM_NUM_SMD_CHANNELS,
219 SMEM_I2C_MUTEX = SMEM_SMD_BLOCK_PORT_PROC1_HEAP + SMEM_NUM_SMD_CHANNELS,
220 SMEM_SCLK_CONVERSION,
221 SMEM_SMD_SMSM_INTR_MUX,
222 SMEM_SMSM_CPU_INTR_MASK,
223 SMEM_APPS_DEM_SLAVE_DATA,
224 SMEM_QDSP6_DEM_SLAVE_DATA,
225 SMEM_CLKREGIM_BSP,
226 SMEM_CLKREGIM_SOURCES,
227 SMEM_SMD_FIFO_BASE_ID,
228 SMEM_USABLE_RAM_PARTITION_TABLE = SMEM_SMD_FIFO_BASE_ID + SMEM_NUM_SMD_CHANNELS,
229 SMEM_POWER_ON_STATUS_INFO,
230 SMEM_DAL_AREA,
231 SMEM_SMEM_LOG_POWER_IDX,
232 SMEM_SMEM_LOG_POWER_WRAP,
233 SMEM_SMEM_LOG_POWER_EVENTS,
234 SMEM_ERR_CRASH_LOG,
235 SMEM_ERR_F3_TRACE_LOG,
Brian Swetland2eb44eb2008-09-29 16:00:48 -0700236 SMEM_NUM_ITEMS,
237} smem_mem_type;
238
Brian Swetland03e00cd2009-07-01 17:58:37 -0700239
240#define SMD_SS_CLOSED 0x00000000
241#define SMD_SS_OPENING 0x00000001
242#define SMD_SS_OPENED 0x00000002
243#define SMD_SS_FLUSHING 0x00000003
244#define SMD_SS_CLOSING 0x00000004
245#define SMD_SS_RESET 0x00000005
246#define SMD_SS_RESET_OPENING 0x00000006
247
248#define SMD_BUF_SIZE 8192
249#define SMD_CHANNELS 64
250
251#define SMD_HEADER_SIZE 20
252
253struct smd_alloc_elm {
254 char name[20];
255 uint32_t cid;
256 uint32_t ctype;
257 uint32_t ref_count;
258};
259
260struct smd_half_channel {
261 unsigned state;
262 unsigned char fDSR;
263 unsigned char fCTS;
264 unsigned char fCD;
265 unsigned char fRI;
266 unsigned char fHEAD;
267 unsigned char fTAIL;
268 unsigned char fSTATE;
269 unsigned char fUNUSED;
270 unsigned tail;
271 unsigned head;
272} __attribute__((packed));
273
274struct smd_shared_v1 {
275 struct smd_half_channel ch0;
276 unsigned char data0[SMD_BUF_SIZE];
277 struct smd_half_channel ch1;
278 unsigned char data1[SMD_BUF_SIZE];
279};
280
281struct smd_shared_v2 {
282 struct smd_half_channel ch0;
283 struct smd_half_channel ch1;
284};
285
286struct smd_channel {
287 volatile struct smd_half_channel *send;
288 volatile struct smd_half_channel *recv;
289 unsigned char *send_data;
290 unsigned char *recv_data;
291
292 unsigned fifo_mask;
293 unsigned fifo_size;
294 unsigned current_packet;
295 unsigned n;
296
297 struct list_head ch_list;
298
299 void *priv;
300 void (*notify)(void *priv, unsigned flags);
301
302 int (*read)(struct smd_channel *ch, void *data, int len);
303 int (*write)(struct smd_channel *ch, const void *data, int len);
304 int (*read_avail)(struct smd_channel *ch);
305 int (*write_avail)(struct smd_channel *ch);
306
307 void (*update_state)(struct smd_channel *ch);
308 unsigned last_state;
309 void (*notify_other_cpu)(void);
310 unsigned type;
311
312 char name[32];
313 struct platform_device pdev;
314};
315
316#define SMD_TYPE_MASK 0x0FF
317#define SMD_TYPE_APPS_MODEM 0x000
318#define SMD_TYPE_APPS_DSP 0x001
319#define SMD_TYPE_MODEM_DSP 0x002
320
321#define SMD_KIND_MASK 0xF00
322#define SMD_KIND_UNKNOWN 0x000
323#define SMD_KIND_STREAM 0x100
324#define SMD_KIND_PACKET 0x200
325
326extern struct list_head smd_ch_closed_list;
327extern struct list_head smd_ch_list;
328
329extern spinlock_t smd_lock;
330extern spinlock_t smem_lock;
331
332void *smem_find(unsigned id, unsigned size);
333void *smem_item(unsigned id, unsigned *size);
334uint32_t raw_smsm_get_state(enum smsm_state_item item);
335
Brian Swetland2eb44eb2008-09-29 16:00:48 -0700336#endif