Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 1 | /* |
| 2 | * linux/arch/arm/mach-sa1100/generic.c |
| 3 | * |
| 4 | * Author: Nicolas Pitre |
| 5 | * |
| 6 | * Code common to all SA11x0 machines. |
| 7 | * |
| 8 | * This program is free software; you can redistribute it and/or modify |
| 9 | * it under the terms of the GNU General Public License version 2 as |
| 10 | * published by the Free Software Foundation. |
| 11 | */ |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 12 | #include <linux/module.h> |
| 13 | #include <linux/kernel.h> |
| 14 | #include <linux/init.h> |
| 15 | #include <linux/delay.h> |
| 16 | #include <linux/pm.h> |
| 17 | #include <linux/cpufreq.h> |
| 18 | #include <linux/ioport.h> |
Tim Schmielau | 4e57b68 | 2005-10-30 15:03:48 -0800 | [diff] [blame] | 19 | #include <linux/sched.h> /* just for sched_clock() - funny that */ |
Russell King | d052d1b | 2005-10-29 19:07:23 +0100 | [diff] [blame] | 20 | #include <linux/platform_device.h> |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 21 | |
| 22 | #include <asm/div64.h> |
Nicolas Pitre | 2f1675c | 2006-12-04 20:25:47 +0100 | [diff] [blame] | 23 | #include <asm/cnt32_to_63.h> |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 24 | #include <asm/hardware.h> |
| 25 | #include <asm/system.h> |
| 26 | #include <asm/pgtable.h> |
| 27 | #include <asm/mach/map.h> |
Russell King | 14e66f7 | 2005-10-29 16:08:31 +0100 | [diff] [blame] | 28 | #include <asm/mach/flash.h> |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 29 | #include <asm/irq.h> |
David Brownell | aeb3f6d | 2007-03-18 01:26:13 -0800 | [diff] [blame] | 30 | #include <asm/gpio.h> |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 31 | |
| 32 | #include "generic.h" |
| 33 | |
| 34 | #define NR_FREQS 16 |
| 35 | |
| 36 | /* |
| 37 | * This table is setup for a 3.6864MHz Crystal. |
| 38 | */ |
| 39 | static const unsigned short cclk_frequency_100khz[NR_FREQS] = { |
| 40 | 590, /* 59.0 MHz */ |
| 41 | 737, /* 73.7 MHz */ |
| 42 | 885, /* 88.5 MHz */ |
| 43 | 1032, /* 103.2 MHz */ |
| 44 | 1180, /* 118.0 MHz */ |
| 45 | 1327, /* 132.7 MHz */ |
| 46 | 1475, /* 147.5 MHz */ |
| 47 | 1622, /* 162.2 MHz */ |
| 48 | 1769, /* 176.9 MHz */ |
| 49 | 1917, /* 191.7 MHz */ |
| 50 | 2064, /* 206.4 MHz */ |
| 51 | 2212, /* 221.2 MHz */ |
| 52 | 2359, /* 235.9 MHz */ |
| 53 | 2507, /* 250.7 MHz */ |
| 54 | 2654, /* 265.4 MHz */ |
| 55 | 2802 /* 280.2 MHz */ |
| 56 | }; |
| 57 | |
| 58 | #if defined(CONFIG_CPU_FREQ_SA1100) || defined(CONFIG_CPU_FREQ_SA1110) |
| 59 | /* rounds up(!) */ |
| 60 | unsigned int sa11x0_freq_to_ppcr(unsigned int khz) |
| 61 | { |
| 62 | int i; |
| 63 | |
| 64 | khz /= 100; |
| 65 | |
| 66 | for (i = 0; i < NR_FREQS; i++) |
| 67 | if (cclk_frequency_100khz[i] >= khz) |
| 68 | break; |
| 69 | |
| 70 | return i; |
| 71 | } |
| 72 | |
| 73 | unsigned int sa11x0_ppcr_to_freq(unsigned int idx) |
| 74 | { |
| 75 | unsigned int freq = 0; |
| 76 | if (idx < NR_FREQS) |
| 77 | freq = cclk_frequency_100khz[idx] * 100; |
| 78 | return freq; |
| 79 | } |
| 80 | |
| 81 | |
| 82 | /* make sure that only the "userspace" governor is run -- anything else wouldn't make sense on |
| 83 | * this platform, anyway. |
| 84 | */ |
| 85 | int sa11x0_verify_speed(struct cpufreq_policy *policy) |
| 86 | { |
| 87 | unsigned int tmp; |
| 88 | if (policy->cpu) |
| 89 | return -EINVAL; |
| 90 | |
| 91 | cpufreq_verify_within_limits(policy, policy->cpuinfo.min_freq, policy->cpuinfo.max_freq); |
| 92 | |
| 93 | /* make sure that at least one frequency is within the policy */ |
| 94 | tmp = cclk_frequency_100khz[sa11x0_freq_to_ppcr(policy->min)] * 100; |
| 95 | if (tmp > policy->max) |
| 96 | policy->max = tmp; |
| 97 | |
| 98 | cpufreq_verify_within_limits(policy, policy->cpuinfo.min_freq, policy->cpuinfo.max_freq); |
| 99 | |
| 100 | return 0; |
| 101 | } |
| 102 | |
| 103 | unsigned int sa11x0_getspeed(unsigned int cpu) |
| 104 | { |
| 105 | if (cpu) |
| 106 | return 0; |
| 107 | return cclk_frequency_100khz[PPCR & 0xf] * 100; |
| 108 | } |
| 109 | |
| 110 | #else |
| 111 | /* |
| 112 | * We still need to provide this so building without cpufreq works. |
| 113 | */ |
| 114 | unsigned int cpufreq_get(unsigned int cpu) |
| 115 | { |
| 116 | return cclk_frequency_100khz[PPCR & 0xf] * 100; |
| 117 | } |
| 118 | EXPORT_SYMBOL(cpufreq_get); |
| 119 | #endif |
| 120 | |
| 121 | /* |
| 122 | * This is the SA11x0 sched_clock implementation. This has |
Nicolas Pitre | 2f1675c | 2006-12-04 20:25:47 +0100 | [diff] [blame] | 123 | * a resolution of 271ns, and a maximum value of 32025597s (370 days). |
| 124 | * |
| 125 | * The return value is guaranteed to be monotonic in that range as |
| 126 | * long as there is always less than 582 seconds between successive |
| 127 | * calls to this function. |
| 128 | * |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 129 | * ( * 1E9 / 3686400 => * 78125 / 288) |
| 130 | */ |
| 131 | unsigned long long sched_clock(void) |
| 132 | { |
Nicolas Pitre | 2f1675c | 2006-12-04 20:25:47 +0100 | [diff] [blame] | 133 | unsigned long long v = cnt32_to_63(OSCR); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 134 | |
Nicolas Pitre | 2f1675c | 2006-12-04 20:25:47 +0100 | [diff] [blame] | 135 | /* the <<1 gets rid of the cnt_32_to_63 top bit saving on a bic insn */ |
| 136 | v *= 78125<<1; |
| 137 | do_div(v, 288<<1); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 138 | |
| 139 | return v; |
| 140 | } |
| 141 | |
| 142 | /* |
| 143 | * Default power-off for SA1100 |
| 144 | */ |
| 145 | static void sa1100_power_off(void) |
| 146 | { |
| 147 | mdelay(100); |
| 148 | local_irq_disable(); |
| 149 | /* disable internal oscillator, float CS lines */ |
| 150 | PCFR = (PCFR_OPDE | PCFR_FP | PCFR_FS); |
| 151 | /* enable wake-up on GPIO0 (Assabet...) */ |
| 152 | PWER = GFER = GRER = 1; |
| 153 | /* |
| 154 | * set scratchpad to zero, just in case it is used as a |
| 155 | * restart address by the bootloader. |
| 156 | */ |
| 157 | PSPR = 0; |
| 158 | /* enter sleep mode */ |
| 159 | PMCR = PMCR_SF; |
| 160 | } |
| 161 | |
| 162 | static struct resource sa11x0udc_resources[] = { |
| 163 | [0] = { |
| 164 | .start = 0x80000000, |
| 165 | .end = 0x8000ffff, |
| 166 | .flags = IORESOURCE_MEM, |
| 167 | }, |
| 168 | }; |
| 169 | |
| 170 | static u64 sa11x0udc_dma_mask = 0xffffffffUL; |
| 171 | |
| 172 | static struct platform_device sa11x0udc_device = { |
| 173 | .name = "sa11x0-udc", |
| 174 | .id = -1, |
| 175 | .dev = { |
| 176 | .dma_mask = &sa11x0udc_dma_mask, |
| 177 | .coherent_dma_mask = 0xffffffff, |
| 178 | }, |
| 179 | .num_resources = ARRAY_SIZE(sa11x0udc_resources), |
| 180 | .resource = sa11x0udc_resources, |
| 181 | }; |
| 182 | |
| 183 | static struct resource sa11x0uart1_resources[] = { |
| 184 | [0] = { |
| 185 | .start = 0x80010000, |
| 186 | .end = 0x8001ffff, |
| 187 | .flags = IORESOURCE_MEM, |
| 188 | }, |
| 189 | }; |
| 190 | |
| 191 | static struct platform_device sa11x0uart1_device = { |
| 192 | .name = "sa11x0-uart", |
| 193 | .id = 1, |
| 194 | .num_resources = ARRAY_SIZE(sa11x0uart1_resources), |
| 195 | .resource = sa11x0uart1_resources, |
| 196 | }; |
| 197 | |
| 198 | static struct resource sa11x0uart3_resources[] = { |
| 199 | [0] = { |
| 200 | .start = 0x80050000, |
| 201 | .end = 0x8005ffff, |
| 202 | .flags = IORESOURCE_MEM, |
| 203 | }, |
| 204 | }; |
| 205 | |
| 206 | static struct platform_device sa11x0uart3_device = { |
| 207 | .name = "sa11x0-uart", |
| 208 | .id = 3, |
| 209 | .num_resources = ARRAY_SIZE(sa11x0uart3_resources), |
| 210 | .resource = sa11x0uart3_resources, |
| 211 | }; |
| 212 | |
| 213 | static struct resource sa11x0mcp_resources[] = { |
| 214 | [0] = { |
| 215 | .start = 0x80060000, |
| 216 | .end = 0x8006ffff, |
| 217 | .flags = IORESOURCE_MEM, |
| 218 | }, |
| 219 | }; |
| 220 | |
| 221 | static u64 sa11x0mcp_dma_mask = 0xffffffffUL; |
| 222 | |
| 223 | static struct platform_device sa11x0mcp_device = { |
| 224 | .name = "sa11x0-mcp", |
| 225 | .id = -1, |
| 226 | .dev = { |
| 227 | .dma_mask = &sa11x0mcp_dma_mask, |
| 228 | .coherent_dma_mask = 0xffffffff, |
| 229 | }, |
| 230 | .num_resources = ARRAY_SIZE(sa11x0mcp_resources), |
| 231 | .resource = sa11x0mcp_resources, |
| 232 | }; |
| 233 | |
Russell King | 323cdfc | 2005-08-18 10:10:46 +0100 | [diff] [blame] | 234 | void sa11x0_set_mcp_data(struct mcp_plat_data *data) |
| 235 | { |
| 236 | sa11x0mcp_device.dev.platform_data = data; |
| 237 | } |
| 238 | |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 239 | static struct resource sa11x0ssp_resources[] = { |
| 240 | [0] = { |
| 241 | .start = 0x80070000, |
| 242 | .end = 0x8007ffff, |
| 243 | .flags = IORESOURCE_MEM, |
| 244 | }, |
| 245 | }; |
| 246 | |
| 247 | static u64 sa11x0ssp_dma_mask = 0xffffffffUL; |
| 248 | |
| 249 | static struct platform_device sa11x0ssp_device = { |
| 250 | .name = "sa11x0-ssp", |
| 251 | .id = -1, |
| 252 | .dev = { |
| 253 | .dma_mask = &sa11x0ssp_dma_mask, |
| 254 | .coherent_dma_mask = 0xffffffff, |
| 255 | }, |
| 256 | .num_resources = ARRAY_SIZE(sa11x0ssp_resources), |
| 257 | .resource = sa11x0ssp_resources, |
| 258 | }; |
| 259 | |
| 260 | static struct resource sa11x0fb_resources[] = { |
| 261 | [0] = { |
| 262 | .start = 0xb0100000, |
| 263 | .end = 0xb010ffff, |
| 264 | .flags = IORESOURCE_MEM, |
| 265 | }, |
| 266 | [1] = { |
| 267 | .start = IRQ_LCD, |
| 268 | .end = IRQ_LCD, |
| 269 | .flags = IORESOURCE_IRQ, |
| 270 | }, |
| 271 | }; |
| 272 | |
| 273 | static struct platform_device sa11x0fb_device = { |
| 274 | .name = "sa11x0-fb", |
| 275 | .id = -1, |
| 276 | .dev = { |
| 277 | .coherent_dma_mask = 0xffffffff, |
| 278 | }, |
| 279 | .num_resources = ARRAY_SIZE(sa11x0fb_resources), |
| 280 | .resource = sa11x0fb_resources, |
| 281 | }; |
| 282 | |
| 283 | static struct platform_device sa11x0pcmcia_device = { |
| 284 | .name = "sa11x0-pcmcia", |
| 285 | .id = -1, |
| 286 | }; |
| 287 | |
| 288 | static struct platform_device sa11x0mtd_device = { |
| 289 | .name = "flash", |
| 290 | .id = -1, |
| 291 | }; |
| 292 | |
| 293 | void sa11x0_set_flash_data(struct flash_platform_data *flash, |
| 294 | struct resource *res, int nr) |
| 295 | { |
Russell King | 14e66f7 | 2005-10-29 16:08:31 +0100 | [diff] [blame] | 296 | flash->name = "sa1100"; |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 297 | sa11x0mtd_device.dev.platform_data = flash; |
| 298 | sa11x0mtd_device.resource = res; |
| 299 | sa11x0mtd_device.num_resources = nr; |
| 300 | } |
| 301 | |
| 302 | static struct resource sa11x0ir_resources[] = { |
| 303 | { |
| 304 | .start = __PREG(Ser2UTCR0), |
| 305 | .end = __PREG(Ser2UTCR0) + 0x24 - 1, |
| 306 | .flags = IORESOURCE_MEM, |
| 307 | }, { |
| 308 | .start = __PREG(Ser2HSCR0), |
| 309 | .end = __PREG(Ser2HSCR0) + 0x1c - 1, |
| 310 | .flags = IORESOURCE_MEM, |
| 311 | }, { |
| 312 | .start = __PREG(Ser2HSCR2), |
| 313 | .end = __PREG(Ser2HSCR2) + 0x04 - 1, |
| 314 | .flags = IORESOURCE_MEM, |
| 315 | }, { |
| 316 | .start = IRQ_Ser2ICP, |
| 317 | .end = IRQ_Ser2ICP, |
| 318 | .flags = IORESOURCE_IRQ, |
| 319 | } |
| 320 | }; |
| 321 | |
| 322 | static struct platform_device sa11x0ir_device = { |
| 323 | .name = "sa11x0-ir", |
| 324 | .id = -1, |
| 325 | .num_resources = ARRAY_SIZE(sa11x0ir_resources), |
| 326 | .resource = sa11x0ir_resources, |
| 327 | }; |
| 328 | |
| 329 | void sa11x0_set_irda_data(struct irda_platform_data *irda) |
| 330 | { |
| 331 | sa11x0ir_device.dev.platform_data = irda; |
| 332 | } |
| 333 | |
Richard Purdie | e842f1c | 2006-03-27 01:16:46 -0800 | [diff] [blame] | 334 | static struct platform_device sa11x0rtc_device = { |
| 335 | .name = "sa1100-rtc", |
| 336 | .id = -1, |
| 337 | }; |
| 338 | |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 339 | static struct platform_device *sa11x0_devices[] __initdata = { |
| 340 | &sa11x0udc_device, |
| 341 | &sa11x0uart1_device, |
| 342 | &sa11x0uart3_device, |
| 343 | &sa11x0mcp_device, |
| 344 | &sa11x0ssp_device, |
| 345 | &sa11x0pcmcia_device, |
| 346 | &sa11x0fb_device, |
| 347 | &sa11x0mtd_device, |
Richard Purdie | e842f1c | 2006-03-27 01:16:46 -0800 | [diff] [blame] | 348 | &sa11x0rtc_device, |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 349 | }; |
| 350 | |
| 351 | static int __init sa1100_init(void) |
| 352 | { |
| 353 | pm_power_off = sa1100_power_off; |
| 354 | |
| 355 | if (sa11x0ir_device.dev.platform_data) |
| 356 | platform_device_register(&sa11x0ir_device); |
| 357 | |
| 358 | return platform_add_devices(sa11x0_devices, ARRAY_SIZE(sa11x0_devices)); |
| 359 | } |
| 360 | |
| 361 | arch_initcall(sa1100_init); |
| 362 | |
| 363 | void (*sa1100fb_backlight_power)(int on); |
| 364 | void (*sa1100fb_lcd_power)(int on); |
| 365 | |
| 366 | EXPORT_SYMBOL(sa1100fb_backlight_power); |
| 367 | EXPORT_SYMBOL(sa1100fb_lcd_power); |
| 368 | |
| 369 | |
| 370 | /* |
| 371 | * Common I/O mapping: |
| 372 | * |
| 373 | * Typically, static virtual address mappings are as follow: |
| 374 | * |
| 375 | * 0xf0000000-0xf3ffffff: miscellaneous stuff (CPLDs, etc.) |
| 376 | * 0xf4000000-0xf4ffffff: SA-1111 |
| 377 | * 0xf5000000-0xf5ffffff: reserved (used by cache flushing area) |
| 378 | * 0xf6000000-0xfffeffff: reserved (internal SA1100 IO defined above) |
| 379 | * 0xffff0000-0xffff0fff: SA1100 exception vectors |
| 380 | * 0xffff2000-0xffff2fff: Minicache copy_user_page area |
| 381 | * |
| 382 | * Below 0xe8000000 is reserved for vm allocation. |
| 383 | * |
| 384 | * The machine specific code must provide the extra mapping beside the |
| 385 | * default mapping provided here. |
| 386 | */ |
| 387 | |
| 388 | static struct map_desc standard_io_desc[] __initdata = { |
Deepak Saxena | 92519d8 | 2005-10-28 15:19:04 +0100 | [diff] [blame] | 389 | { /* PCM */ |
| 390 | .virtual = 0xf8000000, |
| 391 | .pfn = __phys_to_pfn(0x80000000), |
| 392 | .length = 0x00100000, |
| 393 | .type = MT_DEVICE |
| 394 | }, { /* SCM */ |
| 395 | .virtual = 0xfa000000, |
| 396 | .pfn = __phys_to_pfn(0x90000000), |
| 397 | .length = 0x00100000, |
| 398 | .type = MT_DEVICE |
| 399 | }, { /* MER */ |
| 400 | .virtual = 0xfc000000, |
| 401 | .pfn = __phys_to_pfn(0xa0000000), |
| 402 | .length = 0x00100000, |
| 403 | .type = MT_DEVICE |
| 404 | }, { /* LCD + DMA */ |
| 405 | .virtual = 0xfe000000, |
| 406 | .pfn = __phys_to_pfn(0xb0000000), |
| 407 | .length = 0x00200000, |
| 408 | .type = MT_DEVICE |
| 409 | }, |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 410 | }; |
| 411 | |
| 412 | void __init sa1100_map_io(void) |
| 413 | { |
| 414 | iotable_init(standard_io_desc, ARRAY_SIZE(standard_io_desc)); |
| 415 | } |
| 416 | |
| 417 | /* |
| 418 | * Disable the memory bus request/grant signals on the SA1110 to |
| 419 | * ensure that we don't receive spurious memory requests. We set |
| 420 | * the MBGNT signal false to ensure the SA1111 doesn't own the |
| 421 | * SDRAM bus. |
| 422 | */ |
| 423 | void __init sa1110_mb_disable(void) |
| 424 | { |
| 425 | unsigned long flags; |
| 426 | |
| 427 | local_irq_save(flags); |
| 428 | |
| 429 | PGSR &= ~GPIO_MBGNT; |
| 430 | GPCR = GPIO_MBGNT; |
| 431 | GPDR = (GPDR & ~GPIO_MBREQ) | GPIO_MBGNT; |
| 432 | |
| 433 | GAFR &= ~(GPIO_MBGNT | GPIO_MBREQ); |
| 434 | |
| 435 | local_irq_restore(flags); |
| 436 | } |
| 437 | |
| 438 | /* |
| 439 | * If the system is going to use the SA-1111 DMA engines, set up |
| 440 | * the memory bus request/grant pins. |
| 441 | */ |
Kristoffer Ericson | 85e6c7a | 2008-02-03 22:08:10 +0100 | [diff] [blame] | 442 | void __devinit sa1110_mb_enable(void) |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 443 | { |
| 444 | unsigned long flags; |
| 445 | |
| 446 | local_irq_save(flags); |
| 447 | |
| 448 | PGSR &= ~GPIO_MBGNT; |
| 449 | GPCR = GPIO_MBGNT; |
| 450 | GPDR = (GPDR & ~GPIO_MBREQ) | GPIO_MBGNT; |
| 451 | |
| 452 | GAFR |= (GPIO_MBGNT | GPIO_MBREQ); |
| 453 | TUCR |= TUCR_MR; |
| 454 | |
| 455 | local_irq_restore(flags); |
| 456 | } |
| 457 | |