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gerrit-public.fairphone.software / kernel / msm / 075e9c52c49963b83b64d8db72150ef08a689b6a / . / arch / arm / boot / dts / msm8226.dtsi
blob: afdd78e13c0fdff83accc60816df27cdcc27f9aa [file] [log] [blame]
Mitchel Humpherys85d08692012-10-23 12:56:35 -0700[diff] [blame]1/* Copyright (c) 2012-2013, The Linux Foundation. All rights reserved.
Syed Rameez Mustafa332018f2012-10-11 18:01:59 -0700[diff] [blame]2 *
3 * This program is free software; you can redistribute it and/or modify
4 * it under the terms of the GNU General Public License version 2 and
5 * only version 2 as published by the Free Software Foundation.
6 *
7 * This program is distributed in the hope that it will be useful,
8 * but WITHOUT ANY WARRANTY; without even the implied warranty of
9 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
10 * GNU General Public License for more details.
11 */
12
13/include/ "skeleton.dtsi"
Stepan Moskovchenko7d8cdcaa2013-04-25 17:10:55 -0700[diff] [blame]14
Syed Rameez Mustafa332018f2012-10-11 18:01:59 -0700[diff] [blame]15/ {
16 model = "Qualcomm MSM 8226";
17 compatible = "qcom,msm8226";
18 interrupt-parent = <&intc>;
19
Gilad Avidovd59217c2013-02-01 13:45:59 -0700[diff] [blame]20 aliases {
21 spi0 = &spi_0;
Sahitya Tummala9e001362013-03-28 11:00:55 +0530[diff] [blame]22 sdhc1 = &sdhc_1; /* SDC1 eMMC slot */
23 sdhc2 = &sdhc_2; /* SDC2 SD card slot */
Krishna Kondaf92e4262013-07-08 16:21:57 -0700[diff] [blame]24 sdhc3 = &sdhc_3; /* SDC3 SDIO slot */
Gilad Avidovd59217c2013-02-01 13:45:59 -0700[diff] [blame]25 };
26
Laura Abbottf3196b22013-03-11 16:22:34 -0700[diff] [blame]27 memory {
28 secure_mem: secure_region {
29 linux,contiguous-region;
Shalaj Jain5ce2fde2013-05-10 13:22:33 -0700[diff] [blame]30 reg = <0 0x6D00000>;
Laura Abbottf3196b22013-03-11 16:22:34 -0700[diff] [blame]31 label = "secure_mem";
32 };
Laura Abbott429e82b2013-03-25 13:03:06 -0700[diff] [blame]33
Krupal Divvela756ee0f2013-06-12 03:42:55 +0530[diff] [blame]34 adsp_mem: adsp_region {
35 linux,contiguous-region;
36 reg = <0 0x2000000>;
37 label = "adsp_mem";
38 };
39
Laura Abbott429e82b2013-03-25 13:03:06 -0700[diff] [blame]40 qsecom_mem: qsecom_region {
41 linux,contiguous-region;
42 reg = <0 0x780000>;
43 label = "qsecom_mem";
44 };
Stepan Moskovchenko7d8cdcaa2013-04-25 17:10:55 -0700[diff] [blame]45 };
Laura Abbott429e82b2013-03-25 13:03:06 -0700[diff] [blame]46
Stepan Moskovchenko7d8cdcaa2013-04-25 17:10:55 -0700[diff] [blame]47 soc: soc { };
48};
49
50/include/ "msm8226-ion.dtsi"
51/include/ "msm8226-camera.dtsi"
52/include/ "msm-gdsc.dtsi"
53/include/ "msm8226-iommu.dtsi"
54/include/ "msm8226-pm.dtsi"
55/include/ "msm8226-smp2p.dtsi"
56/include/ "msm8226-gpu.dtsi"
57/include/ "msm8226-bus.dtsi"
58/include/ "msm8226-mdss.dtsi"
59/include/ "msm8226-coresight.dtsi"
60/include/ "msm8226-iommu-domains.dtsi"
61
62&soc {
63 #address-cells = <1>;
64 #size-cells = <1>;
65 ranges;
66
67 intc: interrupt-controller@f9000000 {
68 compatible = "qcom,msm-qgic2";
69 interrupt-controller;
70 #interrupt-cells = <3>;
71 reg = <0xF9000000 0x1000>,
72 <0xF9002000 0x1000>;
73 };
74
75 msmgpio: gpio@fd510000 {
76 compatible = "qcom,msm-gpio";
77 interrupt-controller;
78 #interrupt-cells = <2>;
79 reg = <0xfd510000 0x4000>;
80 gpio-controller;
81 #gpio-cells = <2>;
82 ngpio = <117>;
83 interrupts = <0 208 0>;
84 qcom,direct-connect-irqs = <8>;
Laura Abbottf3196b22013-03-11 16:22:34 -0700[diff] [blame]85 };
86
Abhimanyu Kapur58d303a72013-04-30 16:13:41 -0700[diff] [blame]87 qcom,mpm2-sleep-counter@fc4a3000 {
88 compatible = "qcom,mpm2-sleep-counter";
89 reg = <0xfc4a3000 0x1000>;
90 clock-frequency = <32768>;
91 };
92
Syed Rameez Mustafa332018f2012-10-11 18:01:59 -0700[diff] [blame]93 timer {
Syed Rameez Mustafa0824d6c2012-11-29 18:53:56 -0800[diff] [blame]94 compatible = "arm,armv7-timer";
Syed Rameez Mustafa332018f2012-10-11 18:01:59 -0700[diff] [blame]95 interrupts = <1 2 0 1 3 0>;
96 clock-frequency = <19200000>;
97 };
98
Stephen Boyd72759f62013-04-10 14:20:27 -0700[diff] [blame]99 timer@f9020000 {
100 #address-cells = <1>;
101 #size-cells = <1>;
102 ranges;
103 compatible = "arm,armv7-timer-mem";
104 reg = <0xf9020000 0x1000>;
105 clock-frequency = <19200000>;
106
107 frame@f9021000 {
108 frame-number = <0>;
109 interrupts = <0 8 0x4>,
110 <0 7 0x4>;
111 reg = <0xf9021000 0x1000>,
112 <0xf9022000 0x1000>;
113 };
114
115 frame@f9023000 {
116 frame-number = <1>;
117 interrupts = <0 9 0x4>;
118 reg = <0xf9023000 0x1000>;
119 status = "disabled";
120 };
121
122 frame@f9024000 {
123 frame-number = <2>;
124 interrupts = <0 10 0x4>;
125 reg = <0xf9024000 0x1000>;
126 status = "disabled";
127 };
128
129 frame@f9025000 {
130 frame-number = <3>;
131 interrupts = <0 11 0x4>;
132 reg = <0xf9025000 0x1000>;
133 status = "disabled";
134 };
135
136 frame@f9026000 {
137 frame-number = <4>;
138 interrupts = <0 12 0x4>;
139 reg = <0xf9026000 0x1000>;
140 status = "disabled";
141 };
142
143 frame@f9027000 {
144 frame-number = <5>;
145 interrupts = <0 13 0x4>;
146 reg = <0xf9027000 0x1000>;
147 status = "disabled";
148 };
149
150 frame@f9028000 {
151 frame-number = <6>;
152 interrupts = <0 14 0x4>;
153 reg = <0xf9028000 0x1000>;
154 status = "disabled";
155 };
156 };
157
Ashray Kulkarnifbf88dbd2013-02-22 18:02:26 -0800[diff] [blame]158 qcom,vidc@fdc00000 {
159 compatible = "qcom,msm-vidc";
160 reg = <0xfdc00000 0xff000>;
161 interrupts = <0 44 0>;
162 qcom,load-freq-tbl = <352800 160000000>,
163 <244800 133330000>,
164 <108000 66700000>;
165 qcom,hfi = "venus";
166 qcom,bus-ports = <1>;
167 qcom,reg-presets = <0xE0024 0x0>,
168 <0x80124 0x3>,
169 <0xE0020 0x5555556>,
170 <0x800B0 0x10101001>,
171 <0x800B4 0x00101010>,
172 <0x800C0 0x1010100f>,
173 <0x800C4 0x00101010>,
174 <0x800D0 0x00000010>,
175 <0x800D4 0x00000010>,
176 <0x800D8 0x00000707>;
177 qcom,enc-ddr-ab-ib = <0 0>,
178 <129000 142000>,
179 <384000 422000>,
180 <866000 953000>;
181 qcom,dec-ddr-ab-ib = <0 0>,
182 <103000 134000>,
183 <268000 348000>,
184 <505000 657000>;
Ashray Kulkarnifbf88dbd2013-02-22 18:02:26 -0800[diff] [blame]185 qcom,buffer-type-tz-usage-table = <0x1 0x1>,
Eric Hoa00e2da2013-06-20 17:41:57 -0700[diff] [blame]186 <0x2 0x2>,
187 <0x1f0 0x3>;
Deva Ramasubramanian74b1dda2013-03-27 13:16:17 -0700[diff] [blame]188 qcom,max-hw-load = <352800>; /* 720p @ 30 + 1080p @ 30 */
Eric Hoa00e2da2013-06-20 17:41:57 -0700[diff] [blame]189 qcom,vidc-iommu-domains {
190 qcom,domain-ns {
191 qcom,vidc-domain-phandle = <&venus_domain_ns>;
192 qcom,vidc-partition-buffer-types = <0x1ff>,
193 <0x200>;
194 };
195
196 qcom,domain-cp {
197 qcom,vidc-domain-phandle = <&venus_domain_cp>;
198 qcom,vidc-partition-buffer-types = <0x2>,
199 <0x1f1>;
200 };
201 };
Ashray Kulkarnifbf88dbd2013-02-22 18:02:26 -0800[diff] [blame]202 };
203
204 qcom,wfd {
205 compatible = "qcom,msm-wfd";
206 };
207
Syed Rameez Mustafa332018f2012-10-11 18:01:59 -0700[diff] [blame]208 serial@f991f000 {
209 compatible = "qcom,msm-lsuart-v14";
210 reg = <0xf991f000 0x1000>;
211 interrupts = <0 109 0>;
212 status = "disabled";
213 };
214
215 serial@f995e000 {
216 compatible = "qcom,msm-lsuart-v14";
217 reg = <0xf995e000 0x1000>;
218 interrupts = <0 114 0>;
219 status = "disabled";
220 };
221
Abhimanyu Kapur032b1f42013-01-18 00:10:50 -0800[diff] [blame]222 qcom,msm-imem@fe805000 {
223 compatible = "qcom,msm-imem";
224 reg = <0xfe805000 0x1000>; /* Address and size of IMEM */
225 };
226
Yan He7c06ce32012-12-03 17:12:31 -0800[diff] [blame]227 qcom,sps@f9984000 {
228 compatible = "qcom,msm_sps";
229 reg = <0xf9984000 0x15000>,
230 <0xf9999000 0xb000>;
231 interrupts = <0 94 0>;
232 };
233
Vamsi Krishna840835b2013-04-01 22:01:05 -0700[diff] [blame]234 qcom,usbbam@f9a44000 {
235 compatible = "qcom,usb-bam-msm";
236 reg = <0xf9a44000 0x11000>;
237 reg-names = "hsusb";
238 interrupts = <0 135 0>;
239 interrupt-names = "hsusb";
240 qcom,usb-bam-num-pipes = <16>;
241 qcom,usb-bam-fifo-baseaddr = <0xfe803000>;
242 qcom,ignore-core-reset-ack;
243 qcom,disable-clk-gating;
244
245 qcom,pipe0 {
246 label = "hsusb-qdss-in-0";
247 qcom,usb-bam-mem-type = <3>;
248 qcom,bam-type = <1>;
249 qcom,dir = <1>;
250 qcom,pipe-num = <0>;
251 qcom,peer-bam = <1>;
252 qcom,src-bam-physical-address = <0xfc37c000>;
253 qcom,src-bam-pipe-index = <0>;
254 qcom,dst-bam-physical-address = <0xf9a44000>;
255 qcom,dst-bam-pipe-index = <2>;
256 qcom,data-fifo-offset = <0x0>;
257 qcom,data-fifo-size = <0x600>;
258 qcom,descriptor-fifo-offset = <0x600>;
259 qcom,descriptor-fifo-size = <0x200>;
260 };
261 };
262
Manu Gautam41334e92013-06-04 17:49:25 +0530[diff] [blame]263 usb_otg: usb@f9a55000 {
Syed Rameez Mustafa332018f2012-10-11 18:01:59 -0700[diff] [blame]264 compatible = "qcom,hsusb-otg";
265 reg = <0xf9a55000 0x400>;
Mayank Ranaac2a54f2013-01-17 10:14:35 +0530[diff] [blame]266 interrupts = <0 134 0>, <0 140 0>;
267 interrupt-names = "core_irq", "async_irq";
Mayank Rana8335a772013-03-06 10:12:27 +0530[diff] [blame]268 hsusb_vdd_dig-supply = <&pm8226_s1_corner>;
David Keitel7184c6e2013-02-11 13:23:04 -0800[diff] [blame]269 HSUSB_1p8-supply = <&pm8226_l10>;
270 HSUSB_3p3-supply = <&pm8226_l20>;
Mayank Rana8335a772013-03-06 10:12:27 +0530[diff] [blame]271 qcom,vdd-voltage-level = <1 5 7>;
Syed Rameez Mustafa332018f2012-10-11 18:01:59 -0700[diff] [blame]272
Vamsi Krishna1f265912013-04-22 22:50:06 -0700[diff] [blame]273 qcom,hsusb-otg-phy-init-seq =
274 <0x44 0x80 0x68 0x81 0x24 0x82 0x13 0x83 0xffffffff>;
Syed Rameez Mustafa332018f2012-10-11 18:01:59 -0700[diff] [blame]275 qcom,hsusb-otg-phy-type = <2>;
276 qcom,hsusb-otg-mode = <1>;
Vamsi Krishna0d564102013-03-02 15:26:55 -0800[diff] [blame]277 qcom,hsusb-otg-otg-control = <2>;
Syed Rameez Mustafa332018f2012-10-11 18:01:59 -0700[diff] [blame]278 qcom,hsusb-otg-disable-reset;
Mayank Rana15f01b52013-03-08 18:28:56 +0530[diff] [blame]279 qcom,dp-manual-pullup;
Mayank Rana5403e2a2013-02-26 11:18:39 +0530[diff] [blame]280
Manu Gautam41334e92013-06-04 17:49:25 +0530[diff] [blame]281 qcom,msm-bus,name = "usb";
Manu Gautam861c5852013-06-20 16:21:05 +0530[diff] [blame]282 qcom,msm-bus,num-cases = <3>;
Mayank Rana5403e2a2013-02-26 11:18:39 +0530[diff] [blame]283 qcom,msm-bus,num-paths = <1>;
284 qcom,msm-bus,vectors-KBps =
285 <87 512 0 0>,
Manu Gautam861c5852013-06-20 16:21:05 +0530[diff] [blame]286 <87 512 60000 960000>,
287 <87 512 6000 6000>;
Syed Rameez Mustafa332018f2012-10-11 18:01:59 -0700[diff] [blame]288 };
289
Mayank Ranaf8bfadb2013-07-25 12:01:25 +0530[diff] [blame]290 android_usb: android_usb@fe8050c8 {
Syed Rameez Mustafa332018f2012-10-11 18:01:59 -0700[diff] [blame]291 compatible = "qcom,android-usb";
Mayank Rana6bd9a272013-01-29 16:23:23 +0530[diff] [blame]292 reg = <0xfe8050c8 0xc8>;
Manu Gautam1bdb7802013-05-22 12:48:35 +0530[diff] [blame]293 qcom,android-usb-swfi-latency = <1>;
Syed Rameez Mustafa332018f2012-10-11 18:01:59 -0700[diff] [blame]294 };
295
Bhalchandra Gajare555bceb2012-12-12 22:48:34 -0800[diff] [blame]296 wcd9xxx_intc: wcd9xxx-irq {
297 compatible = "qcom,wcd9xxx-irq";
298 interrupt-controller;
299 #interrupt-cells = <1>;
300 interrupt-parent = <&msmgpio>;
301 interrupts = <68 0>;
302 interrupt-names = "cdc-int";
303 };
304
Phani Kumar Uppalapati5f285bf2013-05-05 23:36:57 -0700[diff] [blame]305 slim_msm: slim@fe12f000 {
Bhalchandra Gajarefb785972012-12-06 19:25:10 -0800[diff] [blame]306 cell-index = <1>;
307 compatible = "qcom,slim-ngd";
308 reg = <0xfe12f000 0x35000>,
309 <0xfe104000 0x20000>;
310 reg-names = "slimbus_physical", "slimbus_bam_physical";
311 interrupts = <0 163 0>, <0 164 0>;
312 interrupt-names = "slimbus_irq", "slimbus_bam_irq";
Bhalchandra Gajare555bceb2012-12-12 22:48:34 -0800[diff] [blame]313
314 tapan_codec {
315 compatible = "qcom,tapan-slim-pgd";
316 elemental-addr = [00 01 E0 00 17 02];
317
318 interrupt-parent = <&wcd9xxx_intc>;
319 interrupts = <0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16
320 17 18 19 20 21 22 23 24 25 26 27 28>;
321 qcom,cdc-reset-gpio = <&msmgpio 72 0>;
322
David Keitel7184c6e2013-02-11 13:23:04 -0800[diff] [blame]323 cdc-vdd-buck-supply = <&pm8226_s4>;
Bhalchandra Gajare482ef672013-06-20 15:28:59 -0700[diff] [blame]324 qcom,cdc-vdd-buck-voltage = <1800000 2150000>;
Bhalchandra Gajare555bceb2012-12-12 22:48:34 -0800[diff] [blame]325 qcom,cdc-vdd-buck-current = <650000>;
326
David Keitel7184c6e2013-02-11 13:23:04 -0800[diff] [blame]327 cdc-vdd-h-supply = <&pm8226_l6>;
Bhalchandra Gajare555bceb2012-12-12 22:48:34 -0800[diff] [blame]328 qcom,cdc-vdd-h-voltage = <1800000 1800000>;
329 qcom,cdc-vdd-h-current = <25000>;
330
David Keitel7184c6e2013-02-11 13:23:04 -0800[diff] [blame]331 cdc-vdd-px-supply = <&pm8226_l6>;
Bhalchandra Gajare555bceb2012-12-12 22:48:34 -0800[diff] [blame]332 qcom,cdc-vdd-px-voltage = <1800000 1800000>;
333 qcom,cdc-vdd-px-current = <25000>;
334
David Keitel7184c6e2013-02-11 13:23:04 -0800[diff] [blame]335 cdc-vdd-a-1p2v-supply = <&pm8226_l4>;
Bhalchandra Gajare555bceb2012-12-12 22:48:34 -0800[diff] [blame]336 qcom,cdc-vdd-a-1p2v-voltage = <1200000 1200000>;
337 qcom,cdc-vdd-a-1p2v-current = <10000>;
338
David Keitel7184c6e2013-02-11 13:23:04 -0800[diff] [blame]339 cdc-vdd-cx-supply = <&pm8226_l4>;
Bhalchandra Gajare555bceb2012-12-12 22:48:34 -0800[diff] [blame]340 qcom,cdc-vdd-cx-voltage = <1200000 1200000>;
341 qcom,cdc-vdd-cx-current = <10000>;
342
Bhalchandra Gajare075e9c52013-07-03 14:23:48 -0700[diff] [blame^]343 cdc-vdd-buckhelper-supply = <&pm8226_l25>;
344 qcom,cdc-vdd-buckhelper-voltage = <1775000 2125000>;
345 qcom,cdc-vdd-buckhelper-current = <10000>;
346
347 qcom,cdc-static-supplies = "cdc-vdd-h",
Joonwoo Park73239212013-04-10 15:11:06 -0700[diff] [blame]348 "cdc-vdd-px",
349 "cdc-vdd-a-1p2v",
350 "cdc-vdd-cx";
351
Bhalchandra Gajare075e9c52013-07-03 14:23:48 -0700[diff] [blame^]352 qcom,cdc-cp-supplies = "cdc-vdd-buck",
353 "cdc-vdd-buckhelper";
354
Bhalchandra Gajare555bceb2012-12-12 22:48:34 -0800[diff] [blame]355 qcom,cdc-micbias-ldoh-v = <0x3>;
356 qcom,cdc-micbias-cfilt1-mv = <1800>;
Phani Kumar Uppalapatiab0d98a2013-05-21 23:04:15 -0700[diff] [blame]357 qcom,cdc-micbias-cfilt2-mv = <2700>;
Bhalchandra Gajare555bceb2012-12-12 22:48:34 -0800[diff] [blame]358 qcom,cdc-micbias-cfilt3-mv = <1800>;
359
360 qcom,cdc-micbias1-cfilt-sel = <0x0>;
361 qcom,cdc-micbias2-cfilt-sel = <0x1>;
362 qcom,cdc-micbias3-cfilt-sel = <0x2>;
363
364 qcom,cdc-mclk-clk-rate = <9600000>;
365 qcom,cdc-slim-ifd = "tapan-slim-ifd";
366 qcom,cdc-slim-ifd-elemental-addr = [00 00 E0 00 17 02];
367 };
Bhalchandra Gajarefb785972012-12-06 19:25:10 -0800[diff] [blame]368 };
369
Bhalchandra Gajaree1915b82012-12-12 17:28:39 -0800[diff] [blame]370 qcom,msm-adsp-loader {
371 compatible = "qcom,adsp-loader";
372 qcom,adsp-state = <0>;
373 };
374
Bhalchandra Gajare03a40ec2012-12-17 11:38:28 -0800[diff] [blame]375 sound {
376 compatible = "qcom,msm8226-audio-tapan";
377 qcom,model = "msm8226-tapan-snd-card";
Bhalchandra Gajare03a40ec2012-12-17 11:38:28 -0800[diff] [blame]378 qcom,tapan-mclk-clk-freq = <9600000>;
Banajit Goswamif9921532013-05-10 11:24:52 -0700[diff] [blame]379 qcom,prim-auxpcm-gpio-clk = <&msmgpio 63 0>;
380 qcom,prim-auxpcm-gpio-sync = <&msmgpio 64 0>;
381 qcom,prim-auxpcm-gpio-din = <&msmgpio 65 0>;
382 qcom,prim-auxpcm-gpio-dout = <&msmgpio 66 0>;
383 qcom,prim-auxpcm-gpio-set = "prim-gpio-prim";
Bhalchandra Gajare03a40ec2012-12-17 11:38:28 -0800[diff] [blame]384 };
385
386 qcom,msm-pcm {
387 compatible = "qcom,msm-pcm-dsp";
Bhalchandra Gajare510d4422013-03-01 21:07:12 -0800[diff] [blame]388 qcom,msm-pcm-dsp-id = <0>;
Bhalchandra Gajare03a40ec2012-12-17 11:38:28 -0800[diff] [blame]389 };
390
391 qcom,msm-pcm-routing {
392 compatible = "qcom,msm-pcm-routing";
393 };
394
Bhalchandra Gajare18468a62013-03-11 18:32:49 -0700[diff] [blame]395 qcom,msm-pcm-low-latency {
396 compatible = "qcom,msm-pcm-dsp";
397 qcom,msm-pcm-dsp-id = <1>;
398 qcom,msm-pcm-low-latency;
399 };
400
Bhalchandra Gajare03a40ec2012-12-17 11:38:28 -0800[diff] [blame]401 qcom,msm-pcm-lpa {
402 compatible = "qcom,msm-pcm-lpa";
403 };
404
405 qcom,msm-compr-dsp {
406 compatible = "qcom,msm-compr-dsp";
407 };
408
409 qcom,msm-voip-dsp {
410 compatible = "qcom,msm-voip-dsp";
411 };
412
413 qcom,msm-pcm-voice {
414 compatible = "qcom,msm-pcm-voice";
415 };
416
417 qcom,msm-stub-codec {
418 compatible = "qcom,msm-stub-codec";
419 };
420
421 qcom,msm-dai-fe {
422 compatible = "qcom,msm-dai-fe";
423 };
424
425 qcom,msm-pcm-afe {
426 compatible = "qcom,msm-pcm-afe";
427 };
428
429 qcom,msm-dai-q6-hdmi {
430 compatible = "qcom,msm-dai-q6-hdmi";
431 qcom,msm-dai-q6-dev-id = <8>;
432 };
433
434 qcom,msm-dai-q6 {
435 compatible = "qcom,msm-dai-q6";
436 qcom,msm-dai-q6-sb-0-rx {
437 compatible = "qcom,msm-dai-q6-dev";
438 qcom,msm-dai-q6-dev-id = <16384>;
439 };
440
441 qcom,msm-dai-q6-sb-0-tx {
442 compatible = "qcom,msm-dai-q6-dev";
443 qcom,msm-dai-q6-dev-id = <16385>;
444 };
445
446 qcom,msm-dai-q6-sb-1-rx {
447 compatible = "qcom,msm-dai-q6-dev";
448 qcom,msm-dai-q6-dev-id = <16386>;
449 };
450
451 qcom,msm-dai-q6-sb-1-tx {
452 compatible = "qcom,msm-dai-q6-dev";
453 qcom,msm-dai-q6-dev-id = <16387>;
454 };
455
456 qcom,msm-dai-q6-sb-3-rx {
457 compatible = "qcom,msm-dai-q6-dev";
458 qcom,msm-dai-q6-dev-id = <16390>;
459 };
460
461 qcom,msm-dai-q6-sb-3-tx {
462 compatible = "qcom,msm-dai-q6-dev";
463 qcom,msm-dai-q6-dev-id = <16391>;
464 };
465
466 qcom,msm-dai-q6-sb-4-rx {
467 compatible = "qcom,msm-dai-q6-dev";
468 qcom,msm-dai-q6-dev-id = <16392>;
469 };
470
471 qcom,msm-dai-q6-sb-4-tx {
472 compatible = "qcom,msm-dai-q6-dev";
473 qcom,msm-dai-q6-dev-id = <16393>;
474 };
475
476 qcom,msm-dai-q6-bt-sco-rx {
477 compatible = "qcom,msm-dai-q6-dev";
478 qcom,msm-dai-q6-dev-id = <12288>;
479 };
480
481 qcom,msm-dai-q6-bt-sco-tx {
482 compatible = "qcom,msm-dai-q6-dev";
483 qcom,msm-dai-q6-dev-id = <12289>;
484 };
485
486 qcom,msm-dai-q6-int-fm-rx {
487 compatible = "qcom,msm-dai-q6-dev";
488 qcom,msm-dai-q6-dev-id = <12292>;
489 };
490
491 qcom,msm-dai-q6-int-fm-tx {
492 compatible = "qcom,msm-dai-q6-dev";
493 qcom,msm-dai-q6-dev-id = <12293>;
494 };
495
496 qcom,msm-dai-q6-be-afe-pcm-rx {
497 compatible = "qcom,msm-dai-q6-dev";
498 qcom,msm-dai-q6-dev-id = <224>;
499 };
500
501 qcom,msm-dai-q6-be-afe-pcm-tx {
502 compatible = "qcom,msm-dai-q6-dev";
503 qcom,msm-dai-q6-dev-id = <225>;
504 };
505
506 qcom,msm-dai-q6-afe-proxy-rx {
507 compatible = "qcom,msm-dai-q6-dev";
508 qcom,msm-dai-q6-dev-id = <241>;
509 };
510
511 qcom,msm-dai-q6-afe-proxy-tx {
512 compatible = "qcom,msm-dai-q6-dev";
513 qcom,msm-dai-q6-dev-id = <240>;
514 };
Vicky Sehrawat2ef554c2013-03-12 17:24:20 -0700[diff] [blame]515
516 qcom,msm-dai-q6-incall-record-rx {
517 compatible = "qcom,msm-dai-q6-dev";
518 qcom,msm-dai-q6-dev-id = <32771>;
519 };
520
521 qcom,msm-dai-q6-incall-record-tx {
522 compatible = "qcom,msm-dai-q6-dev";
523 qcom,msm-dai-q6-dev-id = <32772>;
524 };
525
526 qcom,msm-dai-q6-incall-music-rx {
527 compatible = "qcom,msm-dai-q6-dev";
528 qcom,msm-dai-q6-dev-id = <32773>;
529 };
Vicky Sehrawat5ac670f2013-05-17 16:32:13 -0700[diff] [blame]530
531 qcom,msm-dai-q6-incall-music-2-rx {
532 compatible = "qcom,msm-dai-q6-dev";
533 qcom,msm-dai-q6-dev-id = <32770>;
534 };
Bhalchandra Gajare03a40ec2012-12-17 11:38:28 -0800[diff] [blame]535 };
536
537 qcom,msm-pcm-hostless {
538 compatible = "qcom,msm-pcm-hostless";
539 };
540
Patrick Laiafd82122013-06-15 22:50:04 -0700[diff] [blame]541 qcom,msm-pri-auxpcm {
542 compatible = "qcom,msm-auxpcm-dev";
Banajit Goswamif9921532013-05-10 11:24:52 -0700[diff] [blame]543 qcom,msm-cpudai-auxpcm-mode = <0>, <0>;
544 qcom,msm-cpudai-auxpcm-sync = <1>, <1>;
545 qcom,msm-cpudai-auxpcm-frame = <5>, <4>;
546 qcom,msm-cpudai-auxpcm-quant = <2>, <2>;
547 qcom,msm-cpudai-auxpcm-slot = <1>, <1>;
548 qcom,msm-cpudai-auxpcm-data = <0>, <0>;
549 qcom,msm-cpudai-auxpcm-pcm-clk-rate = <2048000>, <2048000>;
Patrick Laiafd82122013-06-15 22:50:04 -0700[diff] [blame]550 qcom,msm-auxpcm-interface = "primary";
Banajit Goswamif9921532013-05-10 11:24:52 -0700[diff] [blame]551 };
552
Sheng Fangb6a06482013-03-20 13:21:36 +0800[diff] [blame]553 qcom,wcnss-wlan@fb000000 {
554 compatible = "qcom,wcnss_wlan";
Sameer Thalappil58281ca2013-04-10 18:50:18 -0700[diff] [blame]555 reg = <0xfb000000 0x280000>,
556 <0xf9011008 0x04>;
557 reg-names = "wcnss_mmio", "wcnss_fiq";
Sheng Fangb6a06482013-03-20 13:21:36 +0800[diff] [blame]558 interrupts = <0 145 0 0 146 0>;
559 interrupt-names = "wcnss_wlantx_irq", "wcnss_wlanrx_irq";
560
561 qcom,pronto-vddmx-supply = <&pm8226_l3>;
562 qcom,pronto-vddcx-supply = <&pm8226_s1>;
563 qcom,pronto-vddpx-supply = <&pm8226_l6>;
564 qcom,iris-vddxo-supply = <&pm8226_l10>;
565 qcom,iris-vddrfa-supply = <&pm8226_l24>;
566 qcom,iris-vddpa-supply = <&pm8226_l16>;
567 qcom,iris-vdddig-supply = <&pm8226_l24>;
568
569 gpios = <&msmgpio 40 0>, <&msmgpio 41 0>, <&msmgpio 42 0>, <&msmgpio 43 0>, <&msmgpio 44 0>;
Sameer Thalappil820f87b2013-05-21 20:40:54 -0700[diff] [blame]570 qcom,has-pronto-hw;
571 qcom,has-autodetect-xo;
Sheng Fangb6a06482013-03-20 13:21:36 +0800[diff] [blame]572 };
rockiec44833a32013-03-21 02:06:14 +0800[diff] [blame]573
574 qcom,msm-adsp-sensors {
575 compatible = "qcom,msm-adsp-sensors";
576 qcom,src-id = <11>;
577 qcom,dst-id = <604>;
578 qcom,ab = <32505856>;
579 qcom,ib = <32505856>;
580 };
581
Mitchel Humpherys5fe1c9b2012-10-09 17:30:19 -0700[diff] [blame]582 qcom,wdt@f9017000 {
583 compatible = "qcom,msm-watchdog";
584 reg = <0xf9017000 0x1000>;
585 interrupts = <0 3 0>, <0 4 0>;
586 qcom,bark-time = <11000>;
587 qcom,pet-time = <10000>;
Mitchel Humpherys1be23802012-11-16 15:52:32 -0800[diff] [blame]588 qcom,ipi-ping;
Mitchel Humpherys5fe1c9b2012-10-09 17:30:19 -0700[diff] [blame]589 };
590
Jeff Hugo7f9705b62012-10-12 10:38:26 -0600[diff] [blame]591 qcom,smem@fa00000 {
592 compatible = "qcom,smem";
Jeff Hugo41e5c2f2013-04-26 11:38:32 -0600[diff] [blame]593 reg = <0xfa00000 0x100000>,
Stepan Moskovchenkod6ee8262013-02-06 11:26:05 -0800[diff] [blame]594 <0xf9011000 0x1000>,
Jeff Hugo7f9705b62012-10-12 10:38:26 -0600[diff] [blame]595 <0xfc428000 0x4000>;
596 reg-names = "smem", "irq-reg-base", "aux-mem1";
597
598 qcom,smd-modem {
599 compatible = "qcom,smd";
600 qcom,smd-edge = <0>;
601 qcom,smd-irq-offset = <0x8>;
602 qcom,smd-irq-bitmask = <0x1000>;
603 qcom,pil-string = "modem";
604 interrupts = <0 25 1>;
David Ngb715e322012-12-01 12:57:08 -0800[diff] [blame]605 };
Jeff Hugo7f9705b62012-10-12 10:38:26 -0600[diff] [blame]606
607 qcom,smsm-modem {
608 compatible = "qcom,smsm";
609 qcom,smsm-edge = <0>;
610 qcom,smsm-irq-offset = <0x8>;
611 qcom,smsm-irq-bitmask = <0x2000>;
612 interrupts = <0 26 1>;
David Ngb715e322012-12-01 12:57:08 -0800[diff] [blame]613 };
Jeff Hugo7f9705b62012-10-12 10:38:26 -0600[diff] [blame]614
615 qcom,smd-adsp {
616 compatible = "qcom,smd";
617 qcom,smd-edge = <1>;
618 qcom,smd-irq-offset = <0x8>;
619 qcom,smd-irq-bitmask = <0x100>;
620 qcom,pil-string = "adsp";
621 interrupts = <0 156 1>;
David Ngb715e322012-12-01 12:57:08 -0800[diff] [blame]622 };
Jeff Hugo7f9705b62012-10-12 10:38:26 -0600[diff] [blame]623
624 qcom,smsm-adsp {
625 compatible = "qcom,smsm";
626 qcom,smsm-edge = <1>;
627 qcom,smsm-irq-offset = <0x8>;
628 qcom,smsm-irq-bitmask = <0x200>;
629 interrupts = <0 157 1>;
David Ngb715e322012-12-01 12:57:08 -0800[diff] [blame]630 };
Jeff Hugo7f9705b62012-10-12 10:38:26 -0600[diff] [blame]631
632 qcom,smd-wcnss {
633 compatible = "qcom,smd";
634 qcom,smd-edge = <6>;
635 qcom,smd-irq-offset = <0x8>;
636 qcom,smd-irq-bitmask = <0x20000>;
637 qcom,pil-string = "wcnss";
638 interrupts = <0 142 1>;
David Ngb715e322012-12-01 12:57:08 -0800[diff] [blame]639 };
Jeff Hugo7f9705b62012-10-12 10:38:26 -0600[diff] [blame]640
641 qcom,smsm-wcnss {
642 compatible = "qcom,smsm";
643 qcom,smsm-edge = <6>;
644 qcom,smsm-irq-offset = <0x8>;
645 qcom,smsm-irq-bitmask = <0x80000>;
646 interrupts = <0 144 1>;
David Ngb715e322012-12-01 12:57:08 -0800[diff] [blame]647 };
Jeff Hugo7f9705b62012-10-12 10:38:26 -0600[diff] [blame]648
649 qcom,smd-rpm {
650 compatible = "qcom,smd";
651 qcom,smd-edge = <15>;
652 qcom,smd-irq-offset = <0x8>;
653 qcom,smd-irq-bitmask = <0x1>;
654 interrupts = <0 168 1>;
655 qcom,irq-no-suspend;
David Ngb715e322012-12-01 12:57:08 -0800[diff] [blame]656 };
Jeff Hugo7f9705b62012-10-12 10:38:26 -0600[diff] [blame]657 };
658
Praveen Chidambaramc8af25e2012-12-19 11:27:36 -0700[diff] [blame]659 rpm_bus: qcom,rpm-smd {
660 compatible = "qcom,rpm-smd";
661 rpm-channel-name = "rpm_requests";
662 rpm-channel-type = <15>; /* SMD_APPS_RPM */
Praveen Chidambaramc8af25e2012-12-19 11:27:36 -0700[diff] [blame]663 };
664
Jennifer Liu86687d52013-05-29 15:51:40 -0700[diff] [blame]665 qcom,bcl {
666 compatible = "qcom,bcl";
667 };
668
Asutosh Das99912e62012-12-06 12:38:46 +0530[diff] [blame]669 sdcc1: qcom,sdcc@f9824000 {
670 cell-index = <1>; /* SDC1 eMMC slot */
671 compatible = "qcom,msm-sdcc";
672
Asutosh Das6b82fc52012-11-23 12:00:26 +0530[diff] [blame]673 reg = <0xf9824000 0x800>,
674 <0xf9824800 0x100>,
675 <0xf9804000 0x7000>;
676 reg-names = "core_mem", "dml_mem", "bam_mem";
677 interrupts = <0 123 0>, <0 137 0>;
678 interrupt-names = "core_irq", "bam_irq";
Asutosh Das99912e62012-12-06 12:38:46 +0530[diff] [blame]679
680 qcom,bus-width = <8>;
Krishna Konda9fc6aeb2013-06-11 20:26:16 -0700[diff] [blame]681
682 qcom,msm-bus,name = "sdcc1";
683 qcom,msm-bus,num-cases = <8>;
684 qcom,msm-bus,num-paths = <1>;
685 qcom,msm-bus,vectors-KBps = <78 512 0 0>, /* No vote */
686 <78 512 1600 3200>, /* 400 KB/s*/
687 <78 512 80000 160000>, /* 20 MB/s */
688 <78 512 100000 200000>, /* 25 MB/s */
689 <78 512 200000 400000>, /* 50 MB/s */
690 <78 512 400000 800000>, /* 100 MB/s */
691 <78 512 400000 800000>, /* 200 MB/s */
692 <78 512 2048000 4096000>; /* Max. bandwidth */
693 qcom,bus-bw-vectors-bps = <0 400000 20000000 25000000 50000000
694 100000000 200000000 4294967295>;
695
Asutosh Das99912e62012-12-06 12:38:46 +0530[diff] [blame]696 status = "disabled";
697 };
698
Sahitya Tummala9e001362013-03-28 11:00:55 +0530[diff] [blame]699 sdhc_1: sdhci@f9824900 {
700 compatible = "qcom,sdhci-msm";
701 reg = <0xf9824900 0x11c>, <0xf9824000 0x800>;
702 reg-names = "hc_mem", "core_mem";
703
704 interrupts = <0 123 0>, <0 138 0>;
705 interrupt-names = "hc_irq", "pwr_irq";
706
707 qcom,bus-width = <8>;
Krishna Konda9fc6aeb2013-06-11 20:26:16 -0700[diff] [blame]708
709 qcom,msm-bus,name = "sdhc1";
710 qcom,msm-bus,num-cases = <8>;
711 qcom,msm-bus,num-paths = <1>;
712 qcom,msm-bus,vectors-KBps = <78 512 0 0>, /* No vote */
713 <78 512 1600 3200>, /* 400 KB/s*/
714 <78 512 80000 160000>, /* 20 MB/s */
715 <78 512 100000 200000>, /* 25 MB/s */
716 <78 512 200000 400000>, /* 50 MB/s */
717 <78 512 400000 800000>, /* 100 MB/s */
718 <78 512 400000 800000>, /* 200 MB/s */
719 <78 512 2048000 4096000>; /* Max. bandwidth */
720 qcom,bus-bw-vectors-bps = <0 400000 20000000 25000000 50000000
721 100000000 200000000 4294967295>;
722
Sahitya Tummala9e001362013-03-28 11:00:55 +0530[diff] [blame]723 status = "disabled";
724 };
725
Asutosh Das99912e62012-12-06 12:38:46 +0530[diff] [blame]726 sdcc2: qcom,sdcc@f98a4000 {
727 cell-index = <2>; /* SDC2 SD card slot */
728 compatible = "qcom,msm-sdcc";
729
Asutosh Das6b82fc52012-11-23 12:00:26 +0530[diff] [blame]730 reg = <0xf98a4000 0x800>,
731 <0xf98a4800 0x100>,
732 <0xf9884000 0x7000>;
733 reg-names = "core_mem", "dml_mem", "bam_mem";
734 interrupts = <0 125 0>, <0 220 0>;
735 interrupt-names = "core_irq", "bam_irq";
Asutosh Das99912e62012-12-06 12:38:46 +0530[diff] [blame]736
737 qcom,bus-width = <4>;
Krishna Konda9fc6aeb2013-06-11 20:26:16 -0700[diff] [blame]738
739 qcom,msm-bus,name = "sdcc2";
740 qcom,msm-bus,num-cases = <8>;
741 qcom,msm-bus,num-paths = <1>;
742 qcom,msm-bus,vectors-KBps = <81 512 0 0>, /* No vote */
743 <81 512 1600 3200>, /* 400 KB/s*/
744 <81 512 80000 160000>, /* 20 MB/s */
745 <81 512 100000 200000>, /* 25 MB/s */
746 <81 512 200000 400000>, /* 50 MB/s */
747 <81 512 400000 800000>, /* 100 MB/s */
748 <81 512 400000 800000>, /* 200 MB/s */
749 <81 512 2048000 4096000>; /* Max. bandwidth */
750 qcom,bus-bw-vectors-bps = <0 400000 20000000 25000000 50000000
751 100000000 200000000 4294967295>;
752
Asutosh Das99912e62012-12-06 12:38:46 +0530[diff] [blame]753 status = "disabled";
754 };
Kenneth Heitkee5804002012-11-15 17:50:07 -0700[diff] [blame]755
Sahitya Tummala9e001362013-03-28 11:00:55 +0530[diff] [blame]756 sdhc_2: sdhci@f98a4900 {
757 compatible = "qcom,sdhci-msm";
758 reg = <0xf98a4900 0x11c>, <0xf98a4000 0x800>;
759 reg-names = "hc_mem", "core_mem";
760
761 interrupts = <0 125 0>, <0 221 0>;
762 interrupt-names = "hc_irq", "pwr_irq";
763
764 qcom,bus-width = <4>;
Krishna Konda9fc6aeb2013-06-11 20:26:16 -0700[diff] [blame]765
766 qcom,msm-bus,name = "sdhc2";
767 qcom,msm-bus,num-cases = <8>;
768 qcom,msm-bus,num-paths = <1>;
769 qcom,msm-bus,vectors-KBps = <81 512 0 0>, /* No vote */
770 <81 512 1600 3200>, /* 400 KB/s*/
771 <81 512 80000 160000>, /* 20 MB/s */
772 <81 512 100000 200000>, /* 25 MB/s */
773 <81 512 200000 400000>, /* 50 MB/s */
774 <81 512 400000 800000>, /* 100 MB/s */
775 <81 512 400000 800000>, /* 200 MB/s */
776 <81 512 2048000 4096000>; /* Max. bandwidth */
777 qcom,bus-bw-vectors-bps = <0 400000 20000000 25000000 50000000
778 100000000 200000000 4294967295>;
779
Sahitya Tummala9e001362013-03-28 11:00:55 +0530[diff] [blame]780 status = "disabled";
781 };
782
Krishna Kondaf92e4262013-07-08 16:21:57 -0700[diff] [blame]783 sdcc3: qcom,sdcc@f9864000 {
784 cell-index = <3>;
785 compatible = "qcom,msm-sdcc";
786 reg = <0xf9864000 0x800>,
787 <0xf9864800 0x100>,
788 <0xf9844000 0x7000>;
789 reg-names = "core_mem", "dml_mem", "bam_mem";
790
791 qcom,bus-width = <4>;
792 gpios = <&msmgpio 44 0>, /* CLK */
793 <&msmgpio 43 0>, /* CMD */
794 <&msmgpio 42 0>, /* DATA0 */
795 <&msmgpio 41 0>, /* DATA1 */
796 <&msmgpio 40 0>, /* DATA2 */
797 <&msmgpio 39 0>; /* DATA3 */
798 qcom,gpio-names = "CLK", "CMD", "DAT0", "DAT1", "DAT2", "DAT3";
799
800 qcom,clk-rates = <400000 20000000 25000000 50000000 100000000>;
801
802 qcom,msm-bus,name = "sdcc3";
803 qcom,msm-bus,num-cases = <8>;
804 qcom,msm-bus,num-paths = <1>;
805 qcom,msm-bus,vectors-KBps = <79 512 0 0>, /* No vote */
806 <79 512 1600 3200>, /* 400 KB/s*/
807 <79 512 80000 160000>, /* 20 MB/s */
808 <79 512 100000 200000>, /* 25 MB/s */
809 <79 512 200000 400000>, /* 50 MB/s */
810 <79 512 400000 800000>, /* 100 MB/s */
811 <79 512 400000 800000>, /* 200 MB/s */
812 <79 512 2048000 4096000>; /* Max. bandwidth */
813 qcom,bus-bw-vectors-bps = <0 400000 20000000 25000000 50000000
814 100000000 200000000 4294967295>;
815
816 #address-cells = <0>;
817 interrupt-parent = <&sdcc3>;
818 interrupts = <0 1 2>;
819 #interrupt-cells = <1>;
820 interrupt-map-mask = <0xffffffff>;
821 interrupt-map = <0 &intc 0 127 0
822 1 &intc 0 223 0
823 2 &msmgpio 41 0x8>;
824 interrupt-names = "core_irq", "bam_irq", "sdiowakeup_irq";
825
826 status = "disabled";
827 };
828
829 sdhc_3: sdhci@f9864900 {
830 compatible = "qcom,sdhci-msm";
831 reg = <0xf9864900 0x11c>, <0xf9864000 0x800>;
832 reg-names = "hc_mem", "core_mem";
833
834 qcom,bus-width = <4>;
835 gpios = <&msmgpio 44 0>, /* CLK */
836 <&msmgpio 43 0>, /* CMD */
837 <&msmgpio 42 0>, /* DATA0 */
838 <&msmgpio 41 0>, /* DATA1 */
839 <&msmgpio 40 0>, /* DATA2 */
840 <&msmgpio 39 0>; /* DATA3 */
841 qcom,gpio-names = "CLK", "CMD", "DAT0", "DAT1", "DAT2", "DAT3";
842
843 qcom,clk-rates = <400000 20000000 25000000 50000000 100000000>;
844
845 qcom,msm-bus,name = "sdhc3";
846 qcom,msm-bus,num-cases = <8>;
847 qcom,msm-bus,num-paths = <1>;
848 qcom,msm-bus,vectors-KBps = <79 512 0 0>, /* No vote */
849 <79 512 1600 3200>, /* 400 KB/s*/
850 <79 512 80000 160000>, /* 20 MB/s */
851 <79 512 100000 200000>, /* 25 MB/s */
852 <79 512 200000 400000>, /* 50 MB/s */
853 <79 512 400000 800000>, /* 100 MB/s */
854 <79 512 400000 800000>, /* 200 MB/s */
855 <79 512 2048000 4096000>; /* Max. bandwidth */
856 qcom,bus-bw-vectors-bps = <0 400000 20000000 25000000 50000000
857 100000000 200000000 4294967295>;
858
859 #address-cells = <0>;
860 interrupt-parent = <&sdhc_3>;
861 interrupts = <0 1 2>;
862 #interrupt-cells = <1>;
863 interrupt-map-mask = <0xffffffff>;
864 interrupt-map = <0 &intc 0 127 0
865 1 &intc 0 224 0
866 2 &msmgpio 41 0x8>;
867 interrupt-names = "hc_irq", "pwr_irq", "sdiowakeup_irq";
868
869 status = "disabled";
870 };
871
Kenneth Heitkee5804002012-11-15 17:50:07 -0700[diff] [blame]872 spmi_bus: qcom,spmi@fc4c0000 {
873 cell-index = <0>;
874 compatible = "qcom,spmi-pmic-arb";
Kenneth Heitke366b8a42012-12-18 13:51:37 -0700[diff] [blame]875 reg-names = "core", "intr", "cnfg";
Kenneth Heitkee5804002012-11-15 17:50:07 -0700[diff] [blame]876 reg = <0xfc4cf000 0x1000>,
Kenneth Heitke366b8a42012-12-18 13:51:37 -0700[diff] [blame]877 <0Xfc4cb000 0x1000>,
878 <0Xfc4ca000 0x1000>;
Kenneth Heitkee5804002012-11-15 17:50:07 -0700[diff] [blame]879 /* 190,ee0_krait_hlos_spmi_periph_irq */
880 /* 187,channel_0_krait_hlos_trans_done_irq */
881 interrupts = <0 190 0>, <0 187 0>;
Kenneth Heitkee5804002012-11-15 17:50:07 -0700[diff] [blame]882 qcom,pmic-arb-ee = <0>;
883 qcom,pmic-arb-channel = <0>;
Kenneth Heitkee5804002012-11-15 17:50:07 -0700[diff] [blame]884 };
885
Madan Mohan Koyyalamudi2d7c6f52013-06-19 17:49:45 -0700[diff] [blame]886 i2c@f9925000 { /* BLSP-1 QUP-3 */
887 cell-index = <2>;
888 compatible = "qcom,i2c-qup";
889 reg = <0xf9925000 0x1000>;
890 #address-cells = <1>;
891 #size-cells = <0>;
892 reg-names = "qup_phys_addr";
893 interrupts = <0 97 0>;
894 interrupt-names = "qup_err_intr";
895 qcom,i2c-bus-freq = <400000>;
896 qcom,i2c-src-freq = <19200000>;
897 };
Gilad Avidov28e18eb2012-11-21 18:13:25 -0700[diff] [blame]898 i2c@f9926000 { /* BLSP-1 QUP-4 */
899 cell-index = <0>;
900 compatible = "qcom,i2c-qup";
901 reg = <0xf9926000 0x1000>;
902 #address-cells = <1>;
903 #size-cells = <0>;
904 reg-names = "qup_phys_addr";
905 interrupts = <0 98 0>;
906 interrupt-names = "qup_err_intr";
907 qcom,i2c-bus-freq = <100000>;
908 };
Patrick Daly99a52ca2012-10-23 12:00:45 -0700[diff] [blame]909
Amy Maloche41708ba2013-03-03 15:19:27 -0800[diff] [blame]910 i2c@f9927000 { /* BLSP1 QUP5 */
911 cell-index = <5>;
912 compatible = "qcom,i2c-qup";
913 #address-cells = <1>;
914 #size-cells = <0>;
915 reg-names = "qup_phys_addr";
916 reg = <0xf9927000 0x1000>;
917 interrupt-names = "qup_err_intr";
918 interrupts = <0 99 0>;
Amy Maloche118e5d62013-05-01 14:53:35 -0700[diff] [blame]919 qcom,i2c-bus-freq = <384000>;
Amy Maloche41708ba2013-03-03 15:19:27 -0800[diff] [blame]920 qcom,i2c-src-freq = <19200000>;
921 };
922
Patrick Daly99a52ca2012-10-23 12:00:45 -0700[diff] [blame]923 qcom,acpuclk@f9011050 {
924 compatible = "qcom,acpuclk-a7";
Patrick Daly4fd80f42013-06-18 11:09:15 -0700[diff] [blame]925 reg = <0xf9011050 0x8>;
926 reg-names = "rcg_base";
Patrick Dalyf9451d22013-03-20 14:20:12 -0700[diff] [blame]927 a7_cpu-supply = <&apc_vreg_corner>;
Patrick Daly99a52ca2012-10-23 12:00:45 -0700[diff] [blame]928 };
Mitchel Humpherys00beacf2012-10-11 13:53:43 -0700[diff] [blame]929
930 qcom,ocmem@fdd00000 {
931 compatible = "qcom,msm-ocmem";
932 reg = <0xfdd00000 0x2000>,
933 <0xfdd02000 0x2000>,
934 <0xfe039000 0x400>,
Mitchel Humpherys1da744d2013-03-08 17:20:41 -0800[diff] [blame]935 <0xfec00000 0x20000>;
Mitchel Humpherys00beacf2012-10-11 13:53:43 -0700[diff] [blame]936 reg-names = "ocmem_ctrl_physical", "dm_ctrl_physical", "br_ctrl_physical", "ocmem_physical";
937 interrupts = <0 76 0 0 77 0>;
938 interrupt-names = "ocmem_irq", "dm_irq";
939 qcom,ocmem-num-regions = <0x1>;
940 qcom,ocmem-num-macros = <0x2>;
941 qcom,resource-type = <0x706d636f>;
942 #address-cells = <1>;
943 #size-cells = <1>;
Mitchel Humpherys1da744d2013-03-08 17:20:41 -0800[diff] [blame]944 ranges = <0x0 0xfec00000 0x20000>;
Mitchel Humpherys00beacf2012-10-11 13:53:43 -0700[diff] [blame]945
946 partition@0 {
Mitchel Humpherys1da744d2013-03-08 17:20:41 -0800[diff] [blame]947 reg = <0x0 0x20000>;
Mitchel Humpherys00beacf2012-10-11 13:53:43 -0700[diff] [blame]948 qcom,ocmem-part-name = "graphics";
Mitchel Humpherys1da744d2013-03-08 17:20:41 -0800[diff] [blame]949 qcom,ocmem-part-min = <0x20000>;
Mitchel Humpherys00beacf2012-10-11 13:53:43 -0700[diff] [blame]950 };
951 };
952
Patrick Dalyb83f0b02013-01-09 12:36:19 -0800[diff] [blame]953 qcom,venus@fdce0000 {
954 compatible = "qcom,pil-venus";
955 reg = <0xfdce0000 0x4000>,
956 <0xfdc80000 0x400>;
957 reg-names = "wrapper_base", "vbif_base";
958 vdd-supply = <&gdsc_venus>;
959
960 qcom,firmware-name = "venus";
961 };
Patrick Daly1e3bc6c2013-01-09 12:34:25 -0800[diff] [blame]962
963 qcom,pronto@fb21b000 {
964 compatible = "qcom,pil-pronto";
965 reg = <0xfb21b000 0x3000>,
966 <0xfc401700 0x4>,
967 <0xfd485300 0xc>;
968 reg-names = "pmu_base", "clk_base", "halt_base";
969 interrupts = <0 149 1>;
David Keitel7184c6e2013-02-11 13:23:04 -0800[diff] [blame]970 vdd_pronto_pll-supply = <&pm8226_l8>;
Patrick Daly1e3bc6c2013-01-09 12:34:25 -0800[diff] [blame]971
972 qcom,firmware-name = "wcnss";
Sameer Thalappil5c2c41b2013-04-02 11:08:21 -0700[diff] [blame]973
Sameer Thalappil4ba86302013-04-05 17:36:54 -0700[diff] [blame]974 /* GPIO inputs from wcnss */
Sameer Thalappil5c2c41b2013-04-02 11:08:21 -0700[diff] [blame]975 qcom,gpio-err-fatal = <&smp2pgpio_ssr_smp2p_4_in 0 0>;
Sameer Thalappilb1e03c02013-04-29 14:52:00 -0700[diff] [blame]976 qcom,gpio-err-ready = <&smp2pgpio_ssr_smp2p_4_in 1 0>;
Sameer Thalappil4ba86302013-04-05 17:36:54 -0700[diff] [blame]977 qcom,gpio-proxy-unvote = <&smp2pgpio_ssr_smp2p_4_in 2 0>;
Sameer Thalappil5c2c41b2013-04-02 11:08:21 -0700[diff] [blame]978
979 /* GPIO output to wcnss */
980 qcom,gpio-force-stop = <&smp2pgpio_ssr_smp2p_4_out 0 0>;
Patrick Daly1e3bc6c2013-01-09 12:34:25 -0800[diff] [blame]981 };
Neeti Desai1f7ca2d2012-11-21 13:25:57 -0800[diff] [blame]982
Sheng Fang0a85b0d2013-03-19 08:16:51 +0800[diff] [blame]983 qcom,iris-fm {
984 compatible = "qcom,iris_fm";
985 };
986
Patrick Daly4df59842013-01-09 12:31:40 -0800[diff] [blame]987 qcom,lpass@fe200000 {
988 compatible = "qcom,pil-q6v5-lpass";
989 reg = <0xfe200000 0x00100>,
Matt Wagantall015b50af2013-03-05 18:51:16 -0800[diff] [blame]990 <0xfd485100 0x00010>,
991 <0xfc4016c0 0x00004>;
992 reg-names = "qdsp6_base", "halt_base", "restart_reg";
David Keitelf4c8b8b2013-02-25 15:25:27 -0800[diff] [blame]993 vdd_cx-supply = <&pm8226_s1_corner>;
Patrick Daly4df59842013-01-09 12:31:40 -0800[diff] [blame]994 interrupts = <0 162 1>;
995
996 qcom,firmware-name = "adsp";
Ravishankar Sarawadi2e8ac7d2013-03-28 15:23:30 -0700[diff] [blame]997
Ravishankar Sarawadiab203a82013-04-09 18:46:11 -0700[diff] [blame]998 /* GPIO inputs from lpass */
Ravishankar Sarawadi2e8ac7d2013-03-28 15:23:30 -0700[diff] [blame]999 qcom,gpio-err-fatal = <&smp2pgpio_ssr_smp2p_2_in 0 0>;
Ravishankar Sarawadiab203a82013-04-09 18:46:11 -0700[diff] [blame]1000 qcom,gpio-proxy-unvote = <&smp2pgpio_ssr_smp2p_2_in 2 0>;
Ravishankar Sarawadi7edc9d72013-04-09 18:15:03 -0700[diff] [blame]1001 qcom,gpio-err-ready = <&smp2pgpio_ssr_smp2p_2_in 1 0>;
Ravishankar Sarawadi2e8ac7d2013-03-28 15:23:30 -0700[diff] [blame]1002
1003 /* GPIO output to lpass */
1004 qcom,gpio-force-stop = <&smp2pgpio_ssr_smp2p_2_out 0 0>;
Patrick Daly4df59842013-01-09 12:31:40 -0800[diff] [blame]1005 };
1006
Patrick Daly742337f2013-01-29 12:06:06 -0800[diff] [blame]1007 qcom,mss@fc880000 {
1008 compatible = "qcom,pil-q6v5-mss";
1009 reg = <0xfc880000 0x100>,
1010 <0xfd485000 0x400>,
1011 <0xfc820000 0x020>,
1012 <0xfc401680 0x004>,
Patrick Daly742337f2013-01-29 12:06:06 -0800[diff] [blame]1013 <0xfd485194 0x4>;
1014 reg-names = "qdsp6_base", "halt_base", "rmb_base",
Matt Wagantall724b2bb2013-03-18 14:54:06 -0700[diff] [blame]1015 "restart_reg", "cxrail_bhs_reg";
Patrick Daly742337f2013-01-29 12:06:06 -0800[diff] [blame]1016
1017 interrupts = <0 24 1>;
Patrick Daly742337f2013-01-29 12:06:06 -0800[diff] [blame]1018 vdd_cx-supply = <&pm8226_s1_corner>;
1019 vdd_mx-supply = <&pm8226_l3>;
1020 vdd_pll-supply = <&pm8226_l8>;
1021 qcom,vdd_pll = <1800000>;
1022
1023 qcom,is-loadable;
1024 qcom,firmware-name = "mba";
1025 qcom,pil-self-auth;
Patrick Dalyfe258e22013-03-22 21:02:14 -0700[diff] [blame]1026
Seemanta Duttaa0f253e2013-01-16 18:54:40 -0800[diff] [blame]1027 /* GPIO inputs from mss */
Patrick Dalyfe258e22013-03-22 21:02:14 -0700[diff] [blame]1028 qcom,gpio-err-fatal = <&smp2pgpio_ssr_smp2p_1_in 0 0>;
Seemanta Dutta9fb72ed2013-01-25 14:22:15 -0800[diff] [blame]1029 qcom,gpio-err-ready = <&smp2pgpio_ssr_smp2p_1_in 1 0>;
Seemanta Duttaa0f253e2013-01-16 18:54:40 -0800[diff] [blame]1030 qcom,gpio-proxy-unvote = <&smp2pgpio_ssr_smp2p_1_in 2 0>;
Seemanta Dutta0adbbf02013-03-12 17:26:17 -0700[diff] [blame]1031 qcom,gpio-stop-ack = <&smp2pgpio_ssr_smp2p_1_in 3 0>;
Patrick Dalyfe258e22013-03-22 21:02:14 -0700[diff] [blame]1032
1033 /* GPIO output to mss */
1034 qcom,gpio-force-stop = <&smp2pgpio_ssr_smp2p_1_out 0 0>;
Patrick Daly742337f2013-01-29 12:06:06 -0800[diff] [blame]1035 };
1036
Neeti Desai1f7ca2d2012-11-21 13:25:57 -0800[diff] [blame]1037 qcom,msm-mem-hole {
1038 compatible = "qcom,msm-mem-hole";
Neeti Desai3d0a98b2013-04-10 10:41:03 -0700[diff] [blame]1039 qcom,memblock-remove = <0x6400000 0x9b00000>; /* Address and Size of Hole */
Neeti Desai1f7ca2d2012-11-21 13:25:57 -0800[diff] [blame]1040 };
Siddartha Mohanadossfcd98562013-02-13 08:53:22 -0800[diff] [blame]1041
1042 tsens: tsens@fc4a8000 {
1043 compatible = "qcom,msm-tsens";
1044 reg = <0xfc4a8000 0x2000>,
Siddartha Mohanadoss6ddc1922013-07-08 17:40:11 -0700[diff] [blame]1045 <0xfc4bc000 0x1000>;
Siddartha Mohanadossfcd98562013-02-13 08:53:22 -0800[diff] [blame]1046 reg-names = "tsens_physical", "tsens_eeprom_physical";
1047 interrupts = <0 184 0>;
Siddartha Mohanadoss9a4e94a2013-03-06 19:15:59 -0800[diff] [blame]1048 qcom,sensors = <4>;
1049 qcom,slope = <2901 2846 3038 2955>;
Siddartha Mohanadossfcd98562013-02-13 08:53:22 -0800[diff] [blame]1050 qcom,calib-mode = "fuse_map2";
1051 };
Praveen Chidambarama03bda52013-02-12 21:23:13 -0700[diff] [blame]1052
1053 qcom,msm-thermal {
1054 compatible = "qcom,msm-thermal";
1055 qcom,sensor-id = <0>;
1056 qcom,poll-ms = <250>;
1057 qcom,limit-temp = <60>;
1058 qcom,temp-hysteresis = <10>;
1059 qcom,freq-step = <2>;
Praveen Chidambarama7435ce2013-05-03 12:52:42 -0600[diff] [blame]1060 qcom,freq-control-mask = <0xf>;
Jennifer Liu003438d2013-06-21 11:24:20 -0700[diff] [blame]1061 qcom,core-limit-temp = <80>;
1062 qcom,core-temp-hysteresis = <10>;
1063 qcom,core-control-mask = <0xe>;
Jennifer Liu53bb5642013-06-26 10:42:42 -0700[diff] [blame]1064 qcom,vdd-restriction-temp = <5>;
1065 qcom,vdd-restriction-temp-hysteresis = <10>;
1066 vdd-dig-supply = <&pm8226_s1_floor_corner>;
1067
1068 qcom,vdd-dig-rstr{
1069 qcom,vdd-rstr-reg = "vdd-dig";
1070 qcom,levels = <5 7 7>; /* Nominal, Super Turbo, Super Turbo */
1071 qcom,min-level = <1>; /* No Request */
1072 };
1073
1074 qcom,vdd-apps-rstr{
1075 qcom,vdd-rstr-reg = "vdd-apps";
1076 qcom,levels = <600000 787200 998400>;
1077 qcom,freq-req;
1078 };
Praveen Chidambarama03bda52013-02-12 21:23:13 -0700[diff] [blame]1079 };
1080
Gilad Avidovd59217c2013-02-01 13:45:59 -0700[diff] [blame]1081 spi_0: spi@f9923000 { /* BLSP1 QUP1 */
1082 compatible = "qcom,spi-qup-v2";
1083 #address-cells = <1>;
1084 #size-cells = <0>;
1085 reg-names = "spi_physical", "spi_bam_physical";
1086 reg = <0xf9923000 0x1000>,
1087 <0xf9904000 0xF000>;
1088 interrupt-names = "spi_irq", "spi_bam_irq";
1089 interrupts = <0 95 0>, <0 238 0>;
1090 spi-max-frequency = <19200000>;
1091
Gilad Avidovcff4ca72013-07-01 17:35:36 -0600[diff] [blame]1092 qcom,gpio-mosi = <&msmgpio 0 0>;
1093 qcom,gpio-miso = <&msmgpio 1 0>;
1094 qcom,gpio-clk = <&msmgpio 3 0>;
1095 qcom,gpio-cs0 = <&msmgpio 22 0>;
Gilad Avidovd59217c2013-02-01 13:45:59 -0700[diff] [blame]1096
1097 qcom,infinite-mode = <0>;
1098 qcom,use-bam;
1099 qcom,ver-reg-exists;
1100 qcom,bam-consumer-pipe-index = <12>;
1101 qcom,bam-producer-pipe-index = <13>;
Gilad Avidovcff4ca72013-07-01 17:35:36 -0600[diff] [blame]1102 qcom,master-id = <86>;
Gilad Avidovd59217c2013-02-01 13:45:59 -0700[diff] [blame]1103 };
1104
Jeff Hugo72e10912013-03-05 11:17:38 -0700[diff] [blame]1105 qcom,bam_dmux@fc834000 {
1106 compatible = "qcom,bam_dmux";
1107 reg = <0xfc834000 0x7000>;
1108 interrupts = <0 29 1>;
1109 };
Pushkar Joshi4f3aa0b2013-03-07 22:44:04 -0800[diff] [blame]1110
1111 qcom,msm-rtb {
1112 compatible = "qcom,msm-rtb";
1113 qcom,memory-reservation-type = "EBI1";
1114 qcom,memory-reservation-size = <0x100000>; /* 1M EBI1 buffer */
1115 };
Hariprasad Dhalinarasimhaadf89cc2013-03-13 13:41:05 -0700[diff] [blame]1116
Hariprasad Dhalinarasimhab548ee52013-03-11 19:06:30 -0700[diff] [blame]1117 qcom,msm-rng@f9bff000 {
1118 compatible = "qcom,msm-rng";
1119 reg = <0xf9bff000 0x200>;
1120 qcom,msm-rng-iface-clk;
Hariprasad Dhalinarasimhae799fb72013-06-03 13:51:38 -0700[diff] [blame]1121 qcom,msm-bus,name = "msm-rng-noc";
1122 qcom,msm-bus,num-cases = <2>;
1123 qcom,msm-bus,num-paths = <1>;
1124 qcom,msm-bus,vectors-KBps =
1125 <1 618 0 0>,
1126 <1 618 0 800>;
Hariprasad Dhalinarasimhab548ee52013-03-11 19:06:30 -0700[diff] [blame]1127 };
Hariprasad Dhalinarasimhaadf89cc2013-03-13 13:41:05 -0700[diff] [blame]1128
Hariprasad Dhalinarasimha4ba4d802013-03-21 13:03:09 -0700[diff] [blame]1129 qcom,tz-log@fe805720 {
Hariprasad Dhalinarasimhaadf89cc2013-03-13 13:41:05 -0700[diff] [blame]1130 compatible = "qcom,tz-log";
Hariprasad Dhalinarasimha4ba4d802013-03-21 13:03:09 -0700[diff] [blame]1131 reg = <0x0fe805720 0x1000>;
Hariprasad Dhalinarasimhaadf89cc2013-03-13 13:41:05 -0700[diff] [blame]1132 };
Pushkar Joshi85a53192013-03-11 11:15:15 -0700[diff] [blame]1133
Pratik Patelf2945ef2013-06-13 23:52:05 -0700[diff] [blame]1134 jtag_fuse: jtagfuse@fc4be024 {
1135 compatible = "qcom,jtag-fuse";
1136 reg = <0xfc4be024 0x8>;
1137 reg-names = "fuse-base";
1138 };
1139
Pushkar Joshi85a53192013-03-11 11:15:15 -0700[diff] [blame]1140 jtag_mm0: jtagmm@fc33c000 {
1141 compatible = "qcom,jtag-mm";
1142 reg = <0xfc33c000 0x1000>,
1143 <0xfc330000 0x1000>;
1144 reg-names = "etm-base","debug-base";
1145 };
1146
1147 jtag_mm1: jtagmm@fc33d000 {
1148 compatible = "qcom,jtag-mm";
1149 reg = <0xfc33d000 0x1000>,
1150 <0xfc332000 0x1000>;
1151 reg-names = "etm-base","debug-base";
1152 };
1153
1154 jtag_mm2: jtagmm@fc33e000 {
1155 compatible = "qcom,jtag-mm";
1156 reg = <0xfc33e000 0x1000>,
1157 <0xfc334000 0x1000>;
1158 reg-names = "etm-base","debug-base";
1159 };
1160
1161 jtag_mm3: jtagmm@fc33f000 {
1162 compatible = "qcom,jtag-mm";
1163 reg = <0xfc33f000 0x1000>,
1164 <0xfc336000 0x1000>;
1165 reg-names = "etm-base","debug-base";
1166 };
Jeff Hugo2be6bb022013-03-11 10:17:34 -0600[diff] [blame]1167
1168 qcom,ipc-spinlock@fd484000 {
1169 compatible = "qcom,ipc-spinlock-sfpb";
1170 reg = <0xfd484000 0x400>;
1171 qcom,num-locks = <8>;
1172 };
Hariprasad Dhalinarasimha805ea4d2013-03-14 11:16:12 -0700[diff] [blame]1173
1174 qcom,qseecom@d980000 {
1175 compatible = "qcom,qseecom";
1176 reg = <0xd980000 0x256000>;
1177 reg-names = "secapp-region";
1178 qcom,disk-encrypt-pipe-pair = <2>;
1179 qcom,hlos-ce-hw-instance = <0>;
1180 qcom,qsee-ce-hw-instance = <0>;
1181 qcom,msm-bus,name = "qseecom-noc";
1182 qcom,msm-bus,num-cases = <4>;
1183 qcom,msm-bus,active-only = <0>;
1184 qcom,msm-bus,num-paths = <1>;
1185 qcom,msm-bus,vectors-KBps =
1186 <55 512 0 0>,
1187 <55 512 3936000 393600>,
1188 <55 512 3936000 393600>,
1189 <55 512 3936000 393600>;
1190 };
Hariprasad Dhalinarasimha75051f22013-03-19 15:08:50 -0700[diff] [blame]1191
1192 qcom,qcrypto@fd404000 {
1193 compatible = "qcom,qcrypto";
1194 reg = <0xfd400000 0x20000>,
1195 <0xfd404000 0x8000>;
1196 reg-names = "crypto-base","crypto-bam-base";
1197 interrupts = <0 207 0>;
1198 qcom,bam-pipe-pair = <2>;
1199 qcom,ce-hw-instance = <0>;
1200 qcom,ce-hw-shared;
1201 qcom,msm-bus,name = "qcrypto-noc";
1202 qcom,msm-bus,num-cases = <2>;
1203 qcom,msm-bus,active-only = <0>;
1204 qcom,msm-bus,num-paths = <1>;
1205 qcom,msm-bus,vectors-KBps =
Hariprasad Dhalinarasimhaa2d749e2013-05-14 13:00:06 -0700[diff] [blame]1206 <55 512 0 0>,
1207 <55 512 3936000 393600>;
Hariprasad Dhalinarasimha75051f22013-03-19 15:08:50 -0700[diff] [blame]1208 };
1209
1210 qcom,qcedev@fd400000 {
1211 compatible = "qcom,qcedev";
1212 reg = <0xfd400000 0x20000>,
1213 <0xfd404000 0x8000>;
1214 reg-names = "crypto-base","crypto-bam-base";
1215 interrupts = <0 207 0>;
1216 qcom,bam-pipe-pair = <1>;
1217 qcom,ce-hw-instance = <0>;
1218 qcom,ce-hw-shared;
1219 qcom,msm-bus,name = "qcedev-noc";
1220 qcom,msm-bus,num-cases = <2>;
1221 qcom,msm-bus,active-only = <0>;
1222 qcom,msm-bus,num-paths = <1>;
1223 qcom,msm-bus,vectors-KBps =
Hariprasad Dhalinarasimhaa2d749e2013-05-14 13:00:06 -0700[diff] [blame]1224 <55 512 0 0>,
1225 <55 512 3936000 393600>;
Hariprasad Dhalinarasimha75051f22013-03-19 15:08:50 -0700[diff] [blame]1226 };
Neil Leeder45fb9f62013-06-04 10:46:41 -0400[diff] [blame]1227
1228 cpu-pmu {
1229 compatible = "arm,cortex-a7-pmu";
1230 qcom,irq-is-percpu;
1231 interrupts = <1 7 0xf00>;
1232 };
Syed Rameez Mustafa332018f2012-10-11 18:01:59 -0700[diff] [blame]1233};
David Collins37ddb972012-10-17 15:00:26 -0700[diff] [blame]1234
Patrick Dalye8977aa2012-11-06 15:25:58 -0800[diff] [blame]1235&gdsc_venus {
Matt Wagantallb8cba292013-04-11 15:45:17 -0700[diff] [blame]1236 qcom,clock-names = "core_clk";
Patrick Dalye8977aa2012-11-06 15:25:58 -0800[diff] [blame]1237 status = "ok";
1238};
1239
1240&gdsc_mdss {
Matt Wagantallb8cba292013-04-11 15:45:17 -0700[diff] [blame]1241 qcom,clock-names = "core_clk", "lut_clk";
Patrick Dalye8977aa2012-11-06 15:25:58 -0800[diff] [blame]1242 status = "ok";
1243};
1244
1245&gdsc_jpeg {
Matt Wagantallb8cba292013-04-11 15:45:17 -0700[diff] [blame]1246 qcom,clock-names = "core_clk";
Patrick Dalye8977aa2012-11-06 15:25:58 -0800[diff] [blame]1247 status = "ok";
1248};
1249
1250&gdsc_vfe {
Matt Wagantallb8cba292013-04-11 15:45:17 -0700[diff] [blame]1251 qcom,clock-names = "core_clk", "csi_clk", "cpp_clk";
Patrick Dalye8977aa2012-11-06 15:25:58 -0800[diff] [blame]1252 status = "ok";
1253};
1254
1255&gdsc_oxili_cx {
Matt Wagantallb8cba292013-04-11 15:45:17 -0700[diff] [blame]1256 qcom,clock-names = "core_clk";
Patrick Dalye8977aa2012-11-06 15:25:58 -0800[diff] [blame]1257 status = "ok";
1258};
1259
1260&gdsc_usb_hsic {
1261 status = "ok";
1262};
1263
David Keitel376b2682013-03-05 18:40:01 -0800[diff] [blame]1264/include/ "msm-pm8226-rpm-regulator.dtsi"
Kenneth Heitkebea6ca22013-02-07 17:23:21 -0700[diff] [blame]1265/include/ "msm-pm8226.dtsi"
David Keitel7184c6e2013-02-11 13:23:04 -0800[diff] [blame]1266/include/ "msm8226-regulator.dtsi"
Siddartha Mohanadossae99e772013-02-19 15:44:40 -0800[diff] [blame]1267
1268&pm8226_vadc {
1269 chan@0 {
1270 label = "usb_in";
1271 reg = <0>;
1272 qcom,decimation = <0>;
1273 qcom,pre-div-channel-scaling = <4>;
1274 qcom,calibration-type = "absolute";
1275 qcom,scale-function = <0>;
1276 qcom,hw-settle-time = <0>;
1277 qcom,fast-avg-setup = <0>;
1278 };
1279
1280 chan@2 {
1281 label = "vchg_sns";
1282 reg = <2>;
1283 qcom,decimation = <0>;
1284 qcom,pre-div-channel-scaling = <3>;
1285 qcom,calibration-type = "absolute";
1286 qcom,scale-function = <0>;
1287 qcom,hw-settle-time = <0>;
1288 qcom,fast-avg-setup = <0>;
1289 };
1290
1291 chan@5 {
1292 label = "vcoin";
1293 reg = <5>;
1294 qcom,decimation = <0>;
1295 qcom,pre-div-channel-scaling = <1>;
1296 qcom,calibration-type = "absolute";
1297 qcom,scale-function = <0>;
1298 qcom,hw-settle-time = <0>;
1299 qcom,fast-avg-setup = <0>;
1300 };
1301
1302 chan@6 {
1303 label = "vbat_sns";
1304 reg = <6>;
1305 qcom,decimation = <0>;
1306 qcom,pre-div-channel-scaling = <1>;
1307 qcom,calibration-type = "absolute";
1308 qcom,scale-function = <0>;
1309 qcom,hw-settle-time = <0>;
1310 qcom,fast-avg-setup = <0>;
1311 };
1312
1313 chan@7 {
1314 label = "vph_pwr";
1315 reg = <7>;
1316 qcom,decimation = <0>;
1317 qcom,pre-div-channel-scaling = <1>;
1318 qcom,calibration-type = "absolute";
1319 qcom,scale-function = <0>;
1320 qcom,hw-settle-time = <0>;
1321 qcom,fast-avg-setup = <0>;
1322 };
1323
1324 chan@30 {
1325 label = "batt_therm";
1326 reg = <0x30>;
1327 qcom,decimation = <0>;
1328 qcom,pre-div-channel-scaling = <0>;
1329 qcom,calibration-type = "ratiometric";
1330 qcom,scale-function = <1>;
Siddartha Mohanadoss74cece62013-02-22 10:07:30 -0800[diff] [blame]1331 qcom,hw-settle-time = <2>;
Siddartha Mohanadossae99e772013-02-19 15:44:40 -0800[diff] [blame]1332 qcom,fast-avg-setup = <0>;
1333 };
1334
1335 chan@31 {
1336 label = "batt_id";
1337 reg = <0x31>;
1338 qcom,decimation = <0>;
1339 qcom,pre-div-channel-scaling = <0>;
1340 qcom,calibration-type = "ratiometric";
1341 qcom,scale-function = <0>;
1342 qcom,hw-settle-time = <2>;
1343 qcom,fast-avg-setup = <0>;
1344 };
1345
1346 chan@b2 {
1347 label = "xo_therm_pu2";
1348 reg = <0xb2>;
1349 qcom,decimation = <0>;
1350 qcom,pre-div-channel-scaling = <0>;
1351 qcom,calibration-type = "ratiometric";
1352 qcom,scale-function = <4>;
Siddartha Mohanadoss74cece62013-02-22 10:07:30 -0800[diff] [blame]1353 qcom,hw-settle-time = <2>;
Siddartha Mohanadossae99e772013-02-19 15:44:40 -0800[diff] [blame]1354 qcom,fast-avg-setup = <0>;
1355 };
David Keitelc51a7e52013-03-02 00:14:48 -0800[diff] [blame]1356
Siddartha Mohanadoss3cb76152013-04-12 16:17:02 -0700[diff] [blame]1357 chan@39 {
1358 label = "usb_id_nopull";
1359 reg = <0x39>;
1360 qcom,decimation = <0>;
1361 qcom,pre-div-channel-scaling = <0>;
1362 qcom,calibration-type = "ratiometric";
1363 qcom,scale-function = <0>;
1364 qcom,hw-settle-time = <2>;
1365 qcom,fast-avg-setup = <0>;
1366 };
David Keitelc51a7e52013-03-02 00:14:48 -0800[diff] [blame]1367};
1368
Siddartha Mohanadoss8aea3172013-05-09 11:49:37 -0700[diff] [blame]1369&pm8226_adc_tm {
1370 /* Channel Node */
1371 chan@30 {
1372 label = "batt_therm";
1373 reg = <0x30>;
1374 qcom,decimation = <0>;
1375 qcom,pre-div-channel-scaling = <0>;
1376 qcom,calibration-type = "ratiometric";
1377 qcom,scale-function = <1>;
1378 qcom,hw-settle-time = <2>;
1379 qcom,fast-avg-setup = <3>;
1380 qcom,btm-channel-number = <0x48>;
1381 };
1382
1383 chan@8 {
1384 label = "die_temp";
1385 reg = <8>;
1386 qcom,decimation = <0>;
1387 qcom,pre-div-channel-scaling = <0>;
1388 qcom,calibration-type = "absolute";
1389 qcom,scale-function = <3>;
1390 qcom,hw-settle-time = <0>;
1391 qcom,fast-avg-setup = <3>;
1392 qcom,btm-channel-number = <0x68>;
1393 };
1394
1395 chan@6 {
1396 label = "vbat_sns";
1397 reg = <6>;
1398 qcom,decimation = <0>;
1399 qcom,pre-div-channel-scaling = <1>;
1400 qcom,calibration-type = "absolute";
1401 qcom,scale-function = <0>;
1402 qcom,hw-settle-time = <0>;
1403 qcom,fast-avg-setup = <3>;
1404 qcom,btm-channel-number = <0x70>;
1405 };
1406
1407 chan@14 {
1408 label = "pa_therm0";
1409 reg = <0x14>;
1410 qcom,decimation = <0>;
1411 qcom,pre-div-channel-scaling = <0>;
1412 qcom,calibration-type = "ratiometric";
1413 qcom,scale-function = <2>;
1414 qcom,hw-settle-time = <2>;
1415 qcom,fast-avg-setup = <0>;
1416 qcom,btm-channel-number = <0x78>;
1417 qcom,thermal-node;
1418 };
1419
1420 chan@17 {
1421 label = "pa_therm1";
1422 reg = <0x17>;
1423 qcom,decimation = <0>;
1424 qcom,pre-div-channel-scaling = <0>;
1425 qcom,calibration-type = "ratiometric";
1426 qcom,scale-function = <2>;
1427 qcom,hw-settle-time = <2>;
1428 qcom,fast-avg-setup = <0>;
1429 qcom,btm-channel-number = <0x80>;
1430 qcom,thermal-node;
1431 };
1432};
1433
David Keitelc51a7e52013-03-02 00:14:48 -0800[diff] [blame]1434&pm8226_chg {
1435 status = "ok";
1436
David Keitele89d4782013-03-27 11:29:59 -0700[diff] [blame]1437 qcom,chgr@1000 {
David Keitelc51a7e52013-03-02 00:14:48 -0800[diff] [blame]1438 status = "ok";
1439 };
1440
David Keitele89d4782013-03-27 11:29:59 -0700[diff] [blame]1441 qcom,buck@1100 {
David Keitelc51a7e52013-03-02 00:14:48 -0800[diff] [blame]1442 status = "ok";
1443 };
1444
David Keitele89d4782013-03-27 11:29:59 -0700[diff] [blame]1445 qcom,bat-if@1200 {
Fenglin Wu009098a2013-03-08 15:50:51 -0800[diff] [blame]1446 status = "ok";
1447 };
1448
David Keitele89d4782013-03-27 11:29:59 -0700[diff] [blame]1449 qcom,usb-chgpth@1300 {
David Keitelc51a7e52013-03-02 00:14:48 -0800[diff] [blame]1450 status = "ok";
1451 };
1452
David Keitele89d4782013-03-27 11:29:59 -0700[diff] [blame]1453 qcom,boost@1500 {
David Keitelc51a7e52013-03-02 00:14:48 -0800[diff] [blame]1454 status = "ok";
1455 };
1456
1457 qcom,chg-misc@1600 {
1458 status = "ok";
1459 };
Siddartha Mohanadossae99e772013-02-19 15:44:40 -0800[diff] [blame]1460};