blob: da7c0072ad4c0867129df988459b8ac9c41b8d08 [file] [log] [blame]
Linus Torvalds1da177e2005-04-16 15:20:36 -07001/* i915_drv.h -- Private header for the I915 driver -*- linux-c -*-
2 */
Dave Airlie0d6aa602006-01-02 20:14:23 +11003/*
Dave Airliebc54fd12005-06-23 22:46:46 +10004 *
Linus Torvalds1da177e2005-04-16 15:20:36 -07005 * Copyright 2003 Tungsten Graphics, Inc., Cedar Park, Texas.
6 * All Rights Reserved.
Dave Airliebc54fd12005-06-23 22:46:46 +10007 *
8 * Permission is hereby granted, free of charge, to any person obtaining a
9 * copy of this software and associated documentation files (the
10 * "Software"), to deal in the Software without restriction, including
11 * without limitation the rights to use, copy, modify, merge, publish,
12 * distribute, sub license, and/or sell copies of the Software, and to
13 * permit persons to whom the Software is furnished to do so, subject to
14 * the following conditions:
15 *
16 * The above copyright notice and this permission notice (including the
17 * next paragraph) shall be included in all copies or substantial portions
18 * of the Software.
19 *
20 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS
21 * OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
22 * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT.
23 * IN NO EVENT SHALL TUNGSTEN GRAPHICS AND/OR ITS SUPPLIERS BE LIABLE FOR
24 * ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT,
25 * TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE
26 * SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
27 *
Dave Airlie0d6aa602006-01-02 20:14:23 +110028 */
Linus Torvalds1da177e2005-04-16 15:20:36 -070029
30#ifndef _I915_DRV_H_
31#define _I915_DRV_H_
32
Jesse Barnes585fb112008-07-29 11:54:06 -070033#include "i915_reg.h"
34
Linus Torvalds1da177e2005-04-16 15:20:36 -070035/* General customization:
36 */
37
38#define DRIVER_AUTHOR "Tungsten Graphics, Inc."
39
40#define DRIVER_NAME "i915"
41#define DRIVER_DESC "Intel Graphics"
Eric Anholt673a3942008-07-30 12:06:12 -070042#define DRIVER_DATE "20080730"
Linus Torvalds1da177e2005-04-16 15:20:36 -070043
Jesse Barnes317c35d2008-08-25 15:11:06 -070044enum pipe {
45 PIPE_A = 0,
46 PIPE_B,
47};
48
Linus Torvalds1da177e2005-04-16 15:20:36 -070049/* Interface history:
50 *
51 * 1.1: Original.
Dave Airlie0d6aa602006-01-02 20:14:23 +110052 * 1.2: Add Power Management
53 * 1.3: Add vblank support
Dave Airliede227f52006-01-25 15:31:43 +110054 * 1.4: Fix cmdbuffer path, add heap destroy
Dave Airlie702880f2006-06-24 17:07:34 +100055 * 1.5: Add vblank pipe configuration
=?utf-8?q?Michel_D=C3=A4nzer?=2228ed62006-10-25 01:05:09 +100056 * 1.6: - New ioctl for scheduling buffer swaps on vertical blank
57 * - Support vertical blank on secondary display pipe
Linus Torvalds1da177e2005-04-16 15:20:36 -070058 */
59#define DRIVER_MAJOR 1
=?utf-8?q?Michel_D=C3=A4nzer?=2228ed62006-10-25 01:05:09 +100060#define DRIVER_MINOR 6
Linus Torvalds1da177e2005-04-16 15:20:36 -070061#define DRIVER_PATCHLEVEL 0
62
Eric Anholt673a3942008-07-30 12:06:12 -070063#define WATCH_COHERENCY 0
64#define WATCH_BUF 0
65#define WATCH_EXEC 0
66#define WATCH_LRU 0
67#define WATCH_RELOC 0
68#define WATCH_INACTIVE 0
69#define WATCH_PWRITE 0
70
Linus Torvalds1da177e2005-04-16 15:20:36 -070071typedef struct _drm_i915_ring_buffer {
72 int tail_mask;
Linus Torvalds1da177e2005-04-16 15:20:36 -070073 unsigned long Size;
74 u8 *virtual_start;
75 int head;
76 int tail;
77 int space;
78 drm_local_map_t map;
Eric Anholt673a3942008-07-30 12:06:12 -070079 struct drm_gem_object *ring_obj;
Linus Torvalds1da177e2005-04-16 15:20:36 -070080} drm_i915_ring_buffer_t;
81
82struct mem_block {
83 struct mem_block *next;
84 struct mem_block *prev;
85 int start;
86 int size;
Eric Anholt6c340ea2007-08-25 20:23:09 +100087 struct drm_file *file_priv; /* NULL: free, -1: heap, other: real files */
Linus Torvalds1da177e2005-04-16 15:20:36 -070088};
89
=?utf-8?q?Michel_D=C3=A4nzer?=a6b54f32006-10-24 23:37:43 +100090typedef struct _drm_i915_vbl_swap {
91 struct list_head head;
92 drm_drawable_t drw_id;
Jesse Barnes0a3e67a2008-09-30 12:14:26 -070093 unsigned int plane;
=?utf-8?q?Michel_D=C3=A4nzer?=a6b54f32006-10-24 23:37:43 +100094 unsigned int sequence;
95} drm_i915_vbl_swap_t;
96
Jesse Barnes0a3e67a2008-09-30 12:14:26 -070097struct opregion_header;
98struct opregion_acpi;
99struct opregion_swsci;
100struct opregion_asle;
101
Matthew Garrett8ee1c3d2008-08-05 19:37:25 +0100102struct intel_opregion {
103 struct opregion_header *header;
104 struct opregion_acpi *acpi;
105 struct opregion_swsci *swsci;
106 struct opregion_asle *asle;
107 int enabled;
108};
109
Linus Torvalds1da177e2005-04-16 15:20:36 -0700110typedef struct drm_i915_private {
Eric Anholt673a3942008-07-30 12:06:12 -0700111 struct drm_device *dev;
112
Eric Anholt3043c602008-10-02 12:24:47 -0700113 void __iomem *regs;
Linus Torvalds1da177e2005-04-16 15:20:36 -0700114 drm_local_map_t *sarea;
Linus Torvalds1da177e2005-04-16 15:20:36 -0700115
116 drm_i915_sarea_t *sarea_priv;
117 drm_i915_ring_buffer_t ring;
118
Dave Airlie9c8da5e2005-07-10 15:38:56 +1000119 drm_dma_handle_t *status_page_dmah;
Linus Torvalds1da177e2005-04-16 15:20:36 -0700120 void *hw_status_page;
Linus Torvalds1da177e2005-04-16 15:20:36 -0700121 dma_addr_t dma_status_page;
Jesse Barnes0a3e67a2008-09-30 12:14:26 -0700122 uint32_t counter;
Wang Zhenyudc7a9312007-06-10 15:58:19 +1000123 unsigned int status_gfx_addr;
124 drm_local_map_t hws_map;
Eric Anholt673a3942008-07-30 12:06:12 -0700125 struct drm_gem_object *hws_obj;
Linus Torvalds1da177e2005-04-16 15:20:36 -0700126
=?utf-8?q?Michel_D=C3=A4nzer?=a6b54f32006-10-24 23:37:43 +1000127 unsigned int cpp;
Linus Torvalds1da177e2005-04-16 15:20:36 -0700128 int back_offset;
129 int front_offset;
130 int current_page;
131 int page_flipping;
Linus Torvalds1da177e2005-04-16 15:20:36 -0700132
133 wait_queue_head_t irq_queue;
134 atomic_t irq_received;
Eric Anholted4cb412008-07-29 12:10:39 -0700135 /** Protects user_irq_refcount and irq_mask_reg */
136 spinlock_t user_irq_lock;
137 /** Refcount for i915_user_irq_get() versus i915_user_irq_put(). */
138 int user_irq_refcount;
139 /** Cached value of IMR to avoid reads in updating the bitfield */
140 u32 irq_mask_reg;
Linus Torvalds1da177e2005-04-16 15:20:36 -0700141
142 int tex_lru_log_granularity;
143 int allow_batchbuffer;
144 struct mem_block *agp_heap;
Dave Airlie0d6aa602006-01-02 20:14:23 +1100145 unsigned int sr01, adpa, ppcr, dvob, dvoc, lvds;
Dave Airlie702880f2006-06-24 17:07:34 +1000146 int vblank_pipe;
=?utf-8?q?Michel_D=C3=A4nzer?=a6b54f32006-10-24 23:37:43 +1000147
148 spinlock_t swaps_lock;
149 drm_i915_vbl_swap_t vbl_swaps;
150 unsigned int swaps_pending;
Jesse Barnesba8bbcf2007-11-22 14:14:14 +1000151
Matthew Garrett8ee1c3d2008-08-05 19:37:25 +0100152 struct intel_opregion opregion;
153
Jesse Barnesba8bbcf2007-11-22 14:14:14 +1000154 /* Register state */
155 u8 saveLBB;
156 u32 saveDSPACNTR;
157 u32 saveDSPBCNTR;
Keith Packarde948e992008-05-07 12:27:53 +1000158 u32 saveDSPARB;
Jesse Barnesba8bbcf2007-11-22 14:14:14 +1000159 u32 savePIPEACONF;
160 u32 savePIPEBCONF;
161 u32 savePIPEASRC;
162 u32 savePIPEBSRC;
163 u32 saveFPA0;
164 u32 saveFPA1;
165 u32 saveDPLL_A;
166 u32 saveDPLL_A_MD;
167 u32 saveHTOTAL_A;
168 u32 saveHBLANK_A;
169 u32 saveHSYNC_A;
170 u32 saveVTOTAL_A;
171 u32 saveVBLANK_A;
172 u32 saveVSYNC_A;
173 u32 saveBCLRPAT_A;
Jesse Barnes0da3ea12008-02-20 09:39:58 +1000174 u32 savePIPEASTAT;
Jesse Barnesba8bbcf2007-11-22 14:14:14 +1000175 u32 saveDSPASTRIDE;
176 u32 saveDSPASIZE;
177 u32 saveDSPAPOS;
Jesse Barnes585fb112008-07-29 11:54:06 -0700178 u32 saveDSPAADDR;
Jesse Barnesba8bbcf2007-11-22 14:14:14 +1000179 u32 saveDSPASURF;
180 u32 saveDSPATILEOFF;
181 u32 savePFIT_PGM_RATIOS;
182 u32 saveBLC_PWM_CTL;
183 u32 saveBLC_PWM_CTL2;
184 u32 saveFPB0;
185 u32 saveFPB1;
186 u32 saveDPLL_B;
187 u32 saveDPLL_B_MD;
188 u32 saveHTOTAL_B;
189 u32 saveHBLANK_B;
190 u32 saveHSYNC_B;
191 u32 saveVTOTAL_B;
192 u32 saveVBLANK_B;
193 u32 saveVSYNC_B;
194 u32 saveBCLRPAT_B;
Jesse Barnes0da3ea12008-02-20 09:39:58 +1000195 u32 savePIPEBSTAT;
Jesse Barnesba8bbcf2007-11-22 14:14:14 +1000196 u32 saveDSPBSTRIDE;
197 u32 saveDSPBSIZE;
198 u32 saveDSPBPOS;
Jesse Barnes585fb112008-07-29 11:54:06 -0700199 u32 saveDSPBADDR;
Jesse Barnesba8bbcf2007-11-22 14:14:14 +1000200 u32 saveDSPBSURF;
201 u32 saveDSPBTILEOFF;
Jesse Barnes585fb112008-07-29 11:54:06 -0700202 u32 saveVGA0;
203 u32 saveVGA1;
204 u32 saveVGA_PD;
Jesse Barnesba8bbcf2007-11-22 14:14:14 +1000205 u32 saveVGACNTRL;
206 u32 saveADPA;
207 u32 saveLVDS;
Jesse Barnes585fb112008-07-29 11:54:06 -0700208 u32 savePP_ON_DELAYS;
209 u32 savePP_OFF_DELAYS;
Jesse Barnesba8bbcf2007-11-22 14:14:14 +1000210 u32 saveDVOA;
211 u32 saveDVOB;
212 u32 saveDVOC;
213 u32 savePP_ON;
214 u32 savePP_OFF;
215 u32 savePP_CONTROL;
Jesse Barnes585fb112008-07-29 11:54:06 -0700216 u32 savePP_DIVISOR;
Jesse Barnesba8bbcf2007-11-22 14:14:14 +1000217 u32 savePFIT_CONTROL;
218 u32 save_palette_a[256];
219 u32 save_palette_b[256];
220 u32 saveFBC_CFB_BASE;
221 u32 saveFBC_LL_BASE;
222 u32 saveFBC_CONTROL;
223 u32 saveFBC_CONTROL2;
Jesse Barnes0da3ea12008-02-20 09:39:58 +1000224 u32 saveIER;
225 u32 saveIIR;
226 u32 saveIMR;
Keith Packard1f84e552008-02-16 19:19:29 -0800227 u32 saveCACHE_MODE_0;
Keith Packarde948e992008-05-07 12:27:53 +1000228 u32 saveD_STATE;
Jesse Barnes585fb112008-07-29 11:54:06 -0700229 u32 saveCG_2D_DIS;
Keith Packard1f84e552008-02-16 19:19:29 -0800230 u32 saveMI_ARB_STATE;
Jesse Barnesba8bbcf2007-11-22 14:14:14 +1000231 u32 saveSWF0[16];
232 u32 saveSWF1[16];
233 u32 saveSWF2[3];
234 u8 saveMSR;
235 u8 saveSR[8];
Jesse Barnes123f7942008-02-07 11:15:20 -0800236 u8 saveGR[25];
Jesse Barnesba8bbcf2007-11-22 14:14:14 +1000237 u8 saveAR_INDEX;
Jesse Barnesa59e1222008-05-07 12:25:46 +1000238 u8 saveAR[21];
Jesse Barnesba8bbcf2007-11-22 14:14:14 +1000239 u8 saveDACMASK;
240 u8 saveDACDATA[256*3]; /* 256 3-byte colors */
Jesse Barnesa59e1222008-05-07 12:25:46 +1000241 u8 saveCR[37];
Eric Anholt673a3942008-07-30 12:06:12 -0700242
243 struct {
244 struct drm_mm gtt_space;
245
246 /**
247 * List of objects currently involved in rendering from the
248 * ringbuffer.
249 *
250 * A reference is held on the buffer while on this list.
251 */
252 struct list_head active_list;
253
254 /**
255 * List of objects which are not in the ringbuffer but which
256 * still have a write_domain which needs to be flushed before
257 * unbinding.
258 *
259 * A reference is held on the buffer while on this list.
260 */
261 struct list_head flushing_list;
262
263 /**
264 * LRU list of objects which are not in the ringbuffer and
265 * are ready to unbind, but are still in the GTT.
266 *
267 * A reference is not held on the buffer while on this list,
268 * as merely being GTT-bound shouldn't prevent its being
269 * freed, and we'll pull it off the list in the free path.
270 */
271 struct list_head inactive_list;
272
273 /**
274 * List of breadcrumbs associated with GPU requests currently
275 * outstanding.
276 */
277 struct list_head request_list;
278
279 /**
280 * We leave the user IRQ off as much as possible,
281 * but this means that requests will finish and never
282 * be retired once the system goes idle. Set a timer to
283 * fire periodically while the ring is running. When it
284 * fires, go retire requests.
285 */
286 struct delayed_work retire_work;
287
Eric Anholt546b0972008-09-01 16:45:29 -0700288 /** Work task for vblank-related ring access */
289 struct work_struct vblank_work;
290
Eric Anholt673a3942008-07-30 12:06:12 -0700291 uint32_t next_gem_seqno;
292
293 /**
294 * Waiting sequence number, if any
295 */
296 uint32_t waiting_gem_seqno;
297
298 /**
299 * Last seq seen at irq time
300 */
301 uint32_t irq_gem_seqno;
302
303 /**
304 * Flag if the X Server, and thus DRM, is not currently in
305 * control of the device.
306 *
307 * This is set between LeaveVT and EnterVT. It needs to be
308 * replaced with a semaphore. It also needs to be
309 * transitioned away from for kernel modesetting.
310 */
311 int suspended;
312
313 /**
314 * Flag if the hardware appears to be wedged.
315 *
316 * This is set when attempts to idle the device timeout.
317 * It prevents command submission from occuring and makes
318 * every pending request fail
319 */
320 int wedged;
321
322 /** Bit 6 swizzling required for X tiling */
323 uint32_t bit_6_swizzle_x;
324 /** Bit 6 swizzling required for Y tiling */
325 uint32_t bit_6_swizzle_y;
326 } mm;
Linus Torvalds1da177e2005-04-16 15:20:36 -0700327} drm_i915_private_t;
328
Eric Anholt673a3942008-07-30 12:06:12 -0700329/** driver private structure attached to each drm_gem_object */
330struct drm_i915_gem_object {
331 struct drm_gem_object *obj;
332
333 /** Current space allocated to this object in the GTT, if any. */
334 struct drm_mm_node *gtt_space;
335
336 /** This object's place on the active/flushing/inactive lists */
337 struct list_head list;
338
339 /**
340 * This is set if the object is on the active or flushing lists
341 * (has pending rendering), and is not set if it's on inactive (ready
342 * to be unbound).
343 */
344 int active;
345
346 /**
347 * This is set if the object has been written to since last bound
348 * to the GTT
349 */
350 int dirty;
351
352 /** AGP memory structure for our GTT binding. */
353 DRM_AGP_MEM *agp_mem;
354
355 struct page **page_list;
356
357 /**
358 * Current offset of the object in GTT space.
359 *
360 * This is the same as gtt_space->start
361 */
362 uint32_t gtt_offset;
363
364 /** Boolean whether this object has a valid gtt offset. */
365 int gtt_bound;
366
367 /** How many users have pinned this object in GTT space */
368 int pin_count;
369
370 /** Breadcrumb of last rendering to the buffer. */
371 uint32_t last_rendering_seqno;
372
373 /** Current tiling mode for the object. */
374 uint32_t tiling_mode;
375
376 /**
377 * Flagging of which individual pages are valid in GEM_DOMAIN_CPU when
378 * GEM_DOMAIN_CPU is not in the object's read domain.
379 */
380 uint8_t *page_cpu_valid;
381};
382
383/**
384 * Request queue structure.
385 *
386 * The request queue allows us to note sequence numbers that have been emitted
387 * and may be associated with active buffers to be retired.
388 *
389 * By keeping this list, we can avoid having to do questionable
390 * sequence-number comparisons on buffer last_rendering_seqnos, and associate
391 * an emission time with seqnos for tracking how far ahead of the GPU we are.
392 */
393struct drm_i915_gem_request {
394 /** GEM sequence number associated with this request. */
395 uint32_t seqno;
396
397 /** Time at which this request was emitted, in jiffies. */
398 unsigned long emitted_jiffies;
399
400 /** Cache domains that were flushed at the start of the request. */
401 uint32_t flush_domains;
402
403 struct list_head list;
404};
405
406struct drm_i915_file_private {
407 struct {
408 uint32_t last_gem_seqno;
409 uint32_t last_gem_throttle_seqno;
410 } mm;
411};
412
Eric Anholtc153f452007-09-03 12:06:45 +1000413extern struct drm_ioctl_desc i915_ioctls[];
Dave Airlieb3a83632005-09-30 18:37:36 +1000414extern int i915_max_ioctl;
415
Linus Torvalds1da177e2005-04-16 15:20:36 -0700416 /* i915_dma.c */
Dave Airlie84b1fd12007-07-11 15:53:27 +1000417extern void i915_kernel_lost_context(struct drm_device * dev);
Dave Airlie22eae942005-11-10 22:16:34 +1100418extern int i915_driver_load(struct drm_device *, unsigned long flags);
Jesse Barnesba8bbcf2007-11-22 14:14:14 +1000419extern int i915_driver_unload(struct drm_device *);
Eric Anholt673a3942008-07-30 12:06:12 -0700420extern int i915_driver_open(struct drm_device *dev, struct drm_file *file_priv);
Dave Airlie84b1fd12007-07-11 15:53:27 +1000421extern void i915_driver_lastclose(struct drm_device * dev);
Eric Anholt6c340ea2007-08-25 20:23:09 +1000422extern void i915_driver_preclose(struct drm_device *dev,
423 struct drm_file *file_priv);
Eric Anholt673a3942008-07-30 12:06:12 -0700424extern void i915_driver_postclose(struct drm_device *dev,
425 struct drm_file *file_priv);
Dave Airlie84b1fd12007-07-11 15:53:27 +1000426extern int i915_driver_device_is_agp(struct drm_device * dev);
Dave Airlie0d6aa602006-01-02 20:14:23 +1100427extern long i915_compat_ioctl(struct file *filp, unsigned int cmd,
428 unsigned long arg);
Eric Anholt673a3942008-07-30 12:06:12 -0700429extern int i915_emit_box(struct drm_device *dev,
430 struct drm_clip_rect __user *boxes,
431 int i, int DR1, int DR4);
Dave Airlieaf6061a2008-05-07 12:15:39 +1000432
Linus Torvalds1da177e2005-04-16 15:20:36 -0700433/* i915_irq.c */
Eric Anholtc153f452007-09-03 12:06:45 +1000434extern int i915_irq_emit(struct drm_device *dev, void *data,
435 struct drm_file *file_priv);
436extern int i915_irq_wait(struct drm_device *dev, void *data,
437 struct drm_file *file_priv);
Eric Anholt673a3942008-07-30 12:06:12 -0700438void i915_user_irq_get(struct drm_device *dev);
439void i915_user_irq_put(struct drm_device *dev);
Linus Torvalds1da177e2005-04-16 15:20:36 -0700440
Eric Anholt546b0972008-09-01 16:45:29 -0700441extern void i915_gem_vblank_work_handler(struct work_struct *work);
Linus Torvalds1da177e2005-04-16 15:20:36 -0700442extern irqreturn_t i915_driver_irq_handler(DRM_IRQ_ARGS);
Dave Airlie84b1fd12007-07-11 15:53:27 +1000443extern void i915_driver_irq_preinstall(struct drm_device * dev);
Jesse Barnes0a3e67a2008-09-30 12:14:26 -0700444extern int i915_driver_irq_postinstall(struct drm_device *dev);
Dave Airlie84b1fd12007-07-11 15:53:27 +1000445extern void i915_driver_irq_uninstall(struct drm_device * dev);
Eric Anholtc153f452007-09-03 12:06:45 +1000446extern int i915_vblank_pipe_set(struct drm_device *dev, void *data,
447 struct drm_file *file_priv);
448extern int i915_vblank_pipe_get(struct drm_device *dev, void *data,
449 struct drm_file *file_priv);
Jesse Barnes0a3e67a2008-09-30 12:14:26 -0700450extern int i915_enable_vblank(struct drm_device *dev, int crtc);
451extern void i915_disable_vblank(struct drm_device *dev, int crtc);
452extern u32 i915_get_vblank_counter(struct drm_device *dev, int crtc);
Eric Anholtc153f452007-09-03 12:06:45 +1000453extern int i915_vblank_swap(struct drm_device *dev, void *data,
454 struct drm_file *file_priv);
Matthew Garrett8ee1c3d2008-08-05 19:37:25 +0100455extern void i915_enable_irq(drm_i915_private_t *dev_priv, u32 mask);
Linus Torvalds1da177e2005-04-16 15:20:36 -0700456
457/* i915_mem.c */
Eric Anholtc153f452007-09-03 12:06:45 +1000458extern int i915_mem_alloc(struct drm_device *dev, void *data,
459 struct drm_file *file_priv);
460extern int i915_mem_free(struct drm_device *dev, void *data,
461 struct drm_file *file_priv);
462extern int i915_mem_init_heap(struct drm_device *dev, void *data,
463 struct drm_file *file_priv);
464extern int i915_mem_destroy_heap(struct drm_device *dev, void *data,
465 struct drm_file *file_priv);
Linus Torvalds1da177e2005-04-16 15:20:36 -0700466extern void i915_mem_takedown(struct mem_block **heap);
Dave Airlie84b1fd12007-07-11 15:53:27 +1000467extern void i915_mem_release(struct drm_device * dev,
Eric Anholt6c340ea2007-08-25 20:23:09 +1000468 struct drm_file *file_priv, struct mem_block *heap);
Eric Anholt673a3942008-07-30 12:06:12 -0700469/* i915_gem.c */
470int i915_gem_init_ioctl(struct drm_device *dev, void *data,
471 struct drm_file *file_priv);
472int i915_gem_create_ioctl(struct drm_device *dev, void *data,
473 struct drm_file *file_priv);
474int i915_gem_pread_ioctl(struct drm_device *dev, void *data,
475 struct drm_file *file_priv);
476int i915_gem_pwrite_ioctl(struct drm_device *dev, void *data,
477 struct drm_file *file_priv);
478int i915_gem_mmap_ioctl(struct drm_device *dev, void *data,
479 struct drm_file *file_priv);
480int i915_gem_set_domain_ioctl(struct drm_device *dev, void *data,
481 struct drm_file *file_priv);
482int i915_gem_sw_finish_ioctl(struct drm_device *dev, void *data,
483 struct drm_file *file_priv);
484int i915_gem_execbuffer(struct drm_device *dev, void *data,
485 struct drm_file *file_priv);
486int i915_gem_pin_ioctl(struct drm_device *dev, void *data,
487 struct drm_file *file_priv);
488int i915_gem_unpin_ioctl(struct drm_device *dev, void *data,
489 struct drm_file *file_priv);
490int i915_gem_busy_ioctl(struct drm_device *dev, void *data,
491 struct drm_file *file_priv);
492int i915_gem_throttle_ioctl(struct drm_device *dev, void *data,
493 struct drm_file *file_priv);
494int i915_gem_entervt_ioctl(struct drm_device *dev, void *data,
495 struct drm_file *file_priv);
496int i915_gem_leavevt_ioctl(struct drm_device *dev, void *data,
497 struct drm_file *file_priv);
498int i915_gem_set_tiling(struct drm_device *dev, void *data,
499 struct drm_file *file_priv);
500int i915_gem_get_tiling(struct drm_device *dev, void *data,
501 struct drm_file *file_priv);
502void i915_gem_load(struct drm_device *dev);
503int i915_gem_proc_init(struct drm_minor *minor);
504void i915_gem_proc_cleanup(struct drm_minor *minor);
505int i915_gem_init_object(struct drm_gem_object *obj);
506void i915_gem_free_object(struct drm_gem_object *obj);
507int i915_gem_object_pin(struct drm_gem_object *obj, uint32_t alignment);
508void i915_gem_object_unpin(struct drm_gem_object *obj);
509void i915_gem_lastclose(struct drm_device *dev);
510uint32_t i915_get_gem_seqno(struct drm_device *dev);
511void i915_gem_retire_requests(struct drm_device *dev);
512void i915_gem_retire_work_handler(struct work_struct *work);
513void i915_gem_clflush_object(struct drm_gem_object *obj);
514
515/* i915_gem_tiling.c */
516void i915_gem_detect_bit_6_swizzle(struct drm_device *dev);
517
518/* i915_gem_debug.c */
519void i915_gem_dump_object(struct drm_gem_object *obj, int len,
520 const char *where, uint32_t mark);
521#if WATCH_INACTIVE
522void i915_verify_inactive(struct drm_device *dev, char *file, int line);
523#else
524#define i915_verify_inactive(dev, file, line)
525#endif
526void i915_gem_object_check_coherency(struct drm_gem_object *obj, int handle);
527void i915_gem_dump_object(struct drm_gem_object *obj, int len,
528 const char *where, uint32_t mark);
529void i915_dump_lru(struct drm_device *dev, const char *where);
Linus Torvalds1da177e2005-04-16 15:20:36 -0700530
Jesse Barnes317c35d2008-08-25 15:11:06 -0700531/* i915_suspend.c */
532extern int i915_save_state(struct drm_device *dev);
533extern int i915_restore_state(struct drm_device *dev);
534
Jesse Barnes0a3e67a2008-09-30 12:14:26 -0700535/* i915_suspend.c */
536extern int i915_save_state(struct drm_device *dev);
537extern int i915_restore_state(struct drm_device *dev);
538
Matthew Garrett8ee1c3d2008-08-05 19:37:25 +0100539/* i915_opregion.c */
540extern int intel_opregion_init(struct drm_device *dev);
541extern void intel_opregion_free(struct drm_device *dev);
542extern void opregion_asle_intr(struct drm_device *dev);
543extern void opregion_enable_asle(struct drm_device *dev);
544
Eric Anholt546b0972008-09-01 16:45:29 -0700545/**
546 * Lock test for when it's just for synchronization of ring access.
547 *
548 * In that case, we don't need to do it when GEM is initialized as nobody else
549 * has access to the ring.
550 */
551#define RING_LOCK_TEST_WITH_RETURN(dev, file_priv) do { \
552 if (((drm_i915_private_t *)dev->dev_private)->ring.ring_obj == NULL) \
553 LOCK_TEST_WITH_RETURN(dev, file_priv); \
554} while (0)
555
Eric Anholt3043c602008-10-02 12:24:47 -0700556#define I915_READ(reg) readl(dev_priv->regs + (reg))
557#define I915_WRITE(reg, val) writel(val, dev_priv->regs + (reg))
558#define I915_READ16(reg) readw(dev_priv->regs + (reg))
559#define I915_WRITE16(reg, val) writel(val, dev_priv->regs + (reg))
560#define I915_READ8(reg) readb(dev_priv->regs + (reg))
561#define I915_WRITE8(reg, val) writeb(val, dev_priv->regs + (reg))
Linus Torvalds1da177e2005-04-16 15:20:36 -0700562
563#define I915_VERBOSE 0
564
565#define RING_LOCALS unsigned int outring, ringmask, outcount; \
566 volatile char *virt;
567
568#define BEGIN_LP_RING(n) do { \
569 if (I915_VERBOSE) \
Márton Németh3e684ea2008-01-24 15:58:57 +1000570 DRM_DEBUG("BEGIN_LP_RING(%d)\n", (n)); \
571 if (dev_priv->ring.space < (n)*4) \
Harvey Harrisonbf9d8922008-04-30 00:55:10 -0700572 i915_wait_ring(dev, (n)*4, __func__); \
Linus Torvalds1da177e2005-04-16 15:20:36 -0700573 outcount = 0; \
574 outring = dev_priv->ring.tail; \
575 ringmask = dev_priv->ring.tail_mask; \
576 virt = dev_priv->ring.virtual_start; \
577} while (0)
578
579#define OUT_RING(n) do { \
580 if (I915_VERBOSE) DRM_DEBUG(" OUT_RING %x\n", (int)(n)); \
Alan Hourihanec29b6692006-08-12 16:29:24 +1000581 *(volatile unsigned int *)(virt + outring) = (n); \
Linus Torvalds1da177e2005-04-16 15:20:36 -0700582 outcount++; \
583 outring += 4; \
584 outring &= ringmask; \
585} while (0)
586
587#define ADVANCE_LP_RING() do { \
588 if (I915_VERBOSE) DRM_DEBUG("ADVANCE_LP_RING %x\n", outring); \
589 dev_priv->ring.tail = outring; \
590 dev_priv->ring.space -= outcount * 4; \
Jesse Barnes585fb112008-07-29 11:54:06 -0700591 I915_WRITE(PRB0_TAIL, outring); \
Linus Torvalds1da177e2005-04-16 15:20:36 -0700592} while(0)
593
Jesse Barnes585fb112008-07-29 11:54:06 -0700594/**
595 * Reads a dword out of the status page, which is written to from the command
596 * queue by automatic updates, MI_REPORT_HEAD, MI_STORE_DATA_INDEX, or
597 * MI_STORE_DATA_IMM.
Jesse Barnesba8bbcf2007-11-22 14:14:14 +1000598 *
Jesse Barnes585fb112008-07-29 11:54:06 -0700599 * The following dwords have a reserved meaning:
Keith Packard0cdad7e2008-10-14 17:19:38 -0700600 * 0x00: ISR copy, updated when an ISR bit not set in the HWSTAM changes.
601 * 0x04: ring 0 head pointer
602 * 0x05: ring 1 head pointer (915-class)
603 * 0x06: ring 2 head pointer (915-class)
604 * 0x10-0x1b: Context status DWords (GM45)
605 * 0x1f: Last written status offset. (GM45)
Jesse Barnes585fb112008-07-29 11:54:06 -0700606 *
Keith Packard0cdad7e2008-10-14 17:19:38 -0700607 * The area from dword 0x20 to 0x3ff is available for driver usage.
Jesse Barnesba8bbcf2007-11-22 14:14:14 +1000608 */
Jesse Barnesba8bbcf2007-11-22 14:14:14 +1000609#define READ_HWSP(dev_priv, reg) (((volatile u32*)(dev_priv->hw_status_page))[reg])
Jesse Barnes585fb112008-07-29 11:54:06 -0700610#define READ_BREADCRUMB(dev_priv) READ_HWSP(dev_priv, 5)
Keith Packard0cdad7e2008-10-14 17:19:38 -0700611#define I915_GEM_HWS_INDEX 0x20
Jesse Barnesba8bbcf2007-11-22 14:14:14 +1000612
Jesse Barnes585fb112008-07-29 11:54:06 -0700613extern int i915_wait_ring(struct drm_device * dev, int n, const char *caller);
Jesse Barnesba8bbcf2007-11-22 14:14:14 +1000614
615#define IS_I830(dev) ((dev)->pci_device == 0x3577)
616#define IS_845G(dev) ((dev)->pci_device == 0x2562)
617#define IS_I85X(dev) ((dev)->pci_device == 0x3582)
618#define IS_I855(dev) ((dev)->pci_device == 0x3582)
619#define IS_I865G(dev) ((dev)->pci_device == 0x2572)
620
Carlos Martín4d1f7882008-01-23 16:41:17 +1000621#define IS_I915G(dev) ((dev)->pci_device == 0x2582 || (dev)->pci_device == 0x258a)
Jesse Barnesba8bbcf2007-11-22 14:14:14 +1000622#define IS_I915GM(dev) ((dev)->pci_device == 0x2592)
623#define IS_I945G(dev) ((dev)->pci_device == 0x2772)
Jesse Barnes3bf48462008-04-06 11:55:04 -0700624#define IS_I945GM(dev) ((dev)->pci_device == 0x27A2 ||\
625 (dev)->pci_device == 0x27AE)
Jesse Barnesba8bbcf2007-11-22 14:14:14 +1000626#define IS_I965G(dev) ((dev)->pci_device == 0x2972 || \
627 (dev)->pci_device == 0x2982 || \
628 (dev)->pci_device == 0x2992 || \
629 (dev)->pci_device == 0x29A2 || \
630 (dev)->pci_device == 0x2A02 || \
Zhenyu Wang5f5f9d42008-01-24 16:46:36 +1000631 (dev)->pci_device == 0x2A12 || \
Zhenyu Wangd3adbc02008-06-20 12:12:56 +1000632 (dev)->pci_device == 0x2A42 || \
633 (dev)->pci_device == 0x2E02 || \
634 (dev)->pci_device == 0x2E12 || \
635 (dev)->pci_device == 0x2E22)
Jesse Barnesba8bbcf2007-11-22 14:14:14 +1000636
637#define IS_I965GM(dev) ((dev)->pci_device == 0x2A02)
638
Jesse Barnesb9bfdfe2008-08-25 15:16:19 -0700639#define IS_GM45(dev) ((dev)->pci_device == 0x2A42)
Zhenyu Wang5f5f9d42008-01-24 16:46:36 +1000640
Zhenyu Wangd3adbc02008-06-20 12:12:56 +1000641#define IS_G4X(dev) ((dev)->pci_device == 0x2E02 || \
642 (dev)->pci_device == 0x2E12 || \
643 (dev)->pci_device == 0x2E22)
644
Jesse Barnesba8bbcf2007-11-22 14:14:14 +1000645#define IS_G33(dev) ((dev)->pci_device == 0x29C2 || \
646 (dev)->pci_device == 0x29B2 || \
647 (dev)->pci_device == 0x29D2)
648
649#define IS_I9XX(dev) (IS_I915G(dev) || IS_I915GM(dev) || IS_I945G(dev) || \
650 IS_I945GM(dev) || IS_I965G(dev) || IS_G33(dev))
651
652#define IS_MOBILE(dev) (IS_I830(dev) || IS_I85X(dev) || IS_I915GM(dev) || \
Jesse Barnesb9bfdfe2008-08-25 15:16:19 -0700653 IS_I945GM(dev) || IS_I965GM(dev) || IS_GM45(dev))
Jesse Barnesba8bbcf2007-11-22 14:14:14 +1000654
Jesse Barnesb9bfdfe2008-08-25 15:16:19 -0700655#define I915_NEED_GFX_HWS(dev) (IS_G33(dev) || IS_GM45(dev) || IS_G4X(dev))
Zhenyu Wangb39d50e2008-02-19 20:59:09 +1000656
Jesse Barnesba8bbcf2007-11-22 14:14:14 +1000657#define PRIMARY_RINGBUFFER_SIZE (128*1024)
Dave Airlie0d6aa602006-01-02 20:14:23 +1100658
Linus Torvalds1da177e2005-04-16 15:20:36 -0700659#endif