| Russell King | a09e64f | 2008-08-05 16:14:15 +0100 | [diff] [blame] | 1 | /* |
| 2 | * arch/arm/mach-at91/include/mach/at91_pit.h |
| 3 | * |
| Andrew Victor | 3d73e89 | 2008-09-18 21:44:20 +0100 | [diff] [blame] | 4 | * Copyright (C) 2007 Andrew Victor |
| 5 | * Copyright (C) 2007 Atmel Corporation. |
| 6 | * |
| Russell King | a09e64f | 2008-08-05 16:14:15 +0100 | [diff] [blame] | 7 | * Periodic Interval Timer (PIT) - System peripherals regsters. |
| 8 | * Based on AT91SAM9261 datasheet revision D. |
| 9 | * |
| 10 | * This program is free software; you can redistribute it and/or modify |
| 11 | * it under the terms of the GNU General Public License as published by |
| 12 | * the Free Software Foundation; either version 2 of the License, or |
| 13 | * (at your option) any later version. |
| 14 | */ |
| 15 | |
| 16 | #ifndef AT91_PIT_H |
| 17 | #define AT91_PIT_H |
| 18 | |
| 19 | #define AT91_PIT_MR (AT91_PIT + 0x00) /* Mode Register */ |
| 20 | #define AT91_PIT_PITIEN (1 << 25) /* Timer Interrupt Enable */ |
| 21 | #define AT91_PIT_PITEN (1 << 24) /* Timer Enabled */ |
| 22 | #define AT91_PIT_PIV (0xfffff) /* Periodic Interval Value */ |
| 23 | |
| 24 | #define AT91_PIT_SR (AT91_PIT + 0x04) /* Status Register */ |
| 25 | #define AT91_PIT_PITS (1 << 0) /* Timer Status */ |
| 26 | |
| 27 | #define AT91_PIT_PIVR (AT91_PIT + 0x08) /* Periodic Interval Value Register */ |
| 28 | #define AT91_PIT_PIIR (AT91_PIT + 0x0c) /* Periodic Interval Image Register */ |
| 29 | #define AT91_PIT_PICNT (0xfff << 20) /* Interval Counter */ |
| 30 | #define AT91_PIT_CPIV (0xfffff) /* Inverval Value */ |
| 31 | |
| 32 | #endif |