blob: 0ae96802432561f67a34d260a5dcf75ec3ab7507 [file] [log] [blame]
Kiran Kandi3426e512011-09-13 22:50:10 -07001/* Copyright (c) 2011-2012, Code Aurora Forum. All rights reserved.
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07002 *
3 * This program is free software; you can redistribute it and/or modify
4 * it under the terms of the GNU General Public License version 2 and
5 * only version 2 as published by the Free Software Foundation.
6 *
7 * This program is distributed in the hope that it will be useful,
8 * but WITHOUT ANY WARRANTY; without even the implied warranty of
9 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
10 * GNU General Public License for more details.
11 */
12#include <linux/module.h>
13#include <linux/init.h>
Bradley Rubin229c6a52011-07-12 16:18:48 -070014#include <linux/firmware.h>
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -070015#include <linux/slab.h>
16#include <linux/platform_device.h>
Santosh Mardie15e2302011-11-15 10:39:23 +053017#include <linux/device.h>
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -070018#include <linux/printk.h>
19#include <linux/ratelimit.h>
Bradley Rubincb3950a2011-08-18 13:07:26 -070020#include <linux/debugfs.h>
Asish Bhattacharyab1aeae22012-02-15 08:29:28 +053021#include <linux/mfd/wcd9xxx/core.h>
22#include <linux/mfd/wcd9xxx/wcd9xxx_registers.h>
23#include <linux/mfd/wcd9xxx/wcd9310_registers.h>
24#include <linux/mfd/wcd9xxx/pdata.h>
Santosh Mardie15e2302011-11-15 10:39:23 +053025#include <sound/pcm.h>
26#include <sound/pcm_params.h>
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -070027#include <sound/soc.h>
28#include <sound/soc-dapm.h>
29#include <sound/tlv.h>
30#include <linux/bitops.h>
31#include <linux/delay.h>
Kuirong Wanga545e722012-02-06 19:12:54 -080032#include <linux/pm_runtime.h>
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -070033#include "wcd9310.h"
34
Bhalchandra Gajare9a901fd2011-08-01 10:07:15 -070035#define WCD9310_RATES (SNDRV_PCM_RATE_8000|SNDRV_PCM_RATE_16000|\
36 SNDRV_PCM_RATE_32000|SNDRV_PCM_RATE_48000)
37
38#define NUM_DECIMATORS 10
39#define NUM_INTERPOLATORS 7
40#define BITS_PER_REG 8
Bhalchandra Gajare19d9c132011-11-18 14:57:08 -080041#define TABLA_CFILT_FAST_MODE 0x00
42#define TABLA_CFILT_SLOW_MODE 0x40
Patrick Lai64b43262011-12-06 17:29:15 -080043#define MBHC_FW_READ_ATTEMPTS 15
44#define MBHC_FW_READ_TIMEOUT 2000000
Bhalchandra Gajare9a901fd2011-08-01 10:07:15 -070045
Patrick Lai49efeac2011-11-03 11:01:12 -070046#define TABLA_JACK_MASK (SND_JACK_HEADSET | SND_JACK_OC_HPHL | SND_JACK_OC_HPHR)
47
Santosh Mardie15e2302011-11-15 10:39:23 +053048#define TABLA_I2S_MASTER_MODE_MASK 0x08
49
Patrick Laic7cae882011-11-18 11:52:49 -080050#define TABLA_OCP_ATTEMPT 1
51
Bharath Ramachandramurthy9c79f132011-11-28 11:18:57 -080052#define AIF1_PB 1
53#define AIF1_CAP 2
Neema Shettyd3a89262012-02-16 10:23:50 -080054#define AIF2_PB 3
55#define NUM_CODEC_DAIS 3
Kuirong Wang0f8ade32012-02-27 16:29:45 -080056#define TABLA_COMP_DIGITAL_GAIN_OFFSET 3
Bharath Ramachandramurthy9c79f132011-11-28 11:18:57 -080057
58struct tabla_codec_dai_data {
59 u32 rate;
60 u32 *ch_num;
61 u32 ch_act;
62 u32 ch_tot;
63};
64
Joonwoo Park0976d012011-12-22 11:48:18 -080065#define TABLA_MCLK_RATE_12288KHZ 12288000
66#define TABLA_MCLK_RATE_9600KHZ 9600000
67
Joonwoo Parkf4267c22012-01-10 13:25:24 -080068#define TABLA_FAKE_INS_THRESHOLD_MS 2500
Joonwoo Park6b9b03f2012-01-23 18:48:54 -080069#define TABLA_FAKE_REMOVAL_MIN_PERIOD_MS 50
Joonwoo Parkf4267c22012-01-10 13:25:24 -080070
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -070071static const DECLARE_TLV_DB_SCALE(digital_gain, 0, 1, 0);
72static const DECLARE_TLV_DB_SCALE(line_gain, 0, 7, 1);
73static const DECLARE_TLV_DB_SCALE(analog_gain, 0, 25, 1);
Bharath Ramachandramurthy9c79f132011-11-28 11:18:57 -080074static struct snd_soc_dai_driver tabla_dai[];
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -070075
76enum tabla_bandgap_type {
77 TABLA_BANDGAP_OFF = 0,
78 TABLA_BANDGAP_AUDIO_MODE,
79 TABLA_BANDGAP_MBHC_MODE,
80};
81
Bhalchandra Gajare02d90cd2011-09-30 16:14:00 -070082struct mbhc_micbias_regs {
83 u16 cfilt_val;
84 u16 cfilt_ctl;
85 u16 mbhc_reg;
86 u16 int_rbias;
87 u16 ctl_reg;
Bhalchandra Gajare19d9c132011-11-18 14:57:08 -080088 u8 cfilt_sel;
Bhalchandra Gajare02d90cd2011-09-30 16:14:00 -070089};
90
Ben Romberger1f045a72011-11-04 10:14:57 -070091/* Codec supports 2 IIR filters */
92enum {
93 IIR1 = 0,
94 IIR2,
95 IIR_MAX,
96};
97/* Codec supports 5 bands */
98enum {
99 BAND1 = 0,
100 BAND2,
101 BAND3,
102 BAND4,
103 BAND5,
104 BAND_MAX,
105};
106
Kuirong Wang0f8ade32012-02-27 16:29:45 -0800107enum {
108 COMPANDER_1 = 0,
109 COMPANDER_2,
110 COMPANDER_MAX,
111};
112
113enum {
114 COMPANDER_FS_8KHZ = 0,
115 COMPANDER_FS_16KHZ,
116 COMPANDER_FS_32KHZ,
117 COMPANDER_FS_48KHZ,
118 COMPANDER_FS_MAX,
119};
120
Joonwoo Parka9444452011-12-08 18:48:27 -0800121/* Flags to track of PA and DAC state.
122 * PA and DAC should be tracked separately as AUXPGA loopback requires
123 * only PA to be turned on without DAC being on. */
124enum tabla_priv_ack_flags {
125 TABLA_HPHL_PA_OFF_ACK = 0,
126 TABLA_HPHR_PA_OFF_ACK,
127 TABLA_HPHL_DAC_OFF_ACK,
128 TABLA_HPHR_DAC_OFF_ACK
129};
130
Kuirong Wang0f8ade32012-02-27 16:29:45 -0800131
132struct comp_sample_dependent_params {
133 u32 peak_det_timeout;
134 u32 rms_meter_div_fact;
135 u32 rms_meter_resamp_fact;
136};
137
Joonwoo Park0976d012011-12-22 11:48:18 -0800138/* Data used by MBHC */
139struct mbhc_internal_cal_data {
140 u16 dce_z;
141 u16 dce_mb;
142 u16 sta_z;
143 u16 sta_mb;
Joonwoo Park433149a2012-01-11 09:53:54 -0800144 u32 t_sta_dce;
Joonwoo Park0976d012011-12-22 11:48:18 -0800145 u32 t_dce;
146 u32 t_sta;
147 u32 micb_mv;
148 u16 v_ins_hu;
149 u16 v_ins_h;
150 u16 v_b1_hu;
151 u16 v_b1_h;
152 u16 v_b1_huc;
153 u16 v_brh;
154 u16 v_brl;
155 u16 v_no_mic;
Joonwoo Park0976d012011-12-22 11:48:18 -0800156 u8 npoll;
157 u8 nbounce_wait;
158};
159
Joonwoo Park6c1ebb62012-01-16 19:08:43 -0800160struct tabla_reg_address {
161 u16 micb_4_ctl;
162 u16 micb_4_int_rbias;
163 u16 micb_4_mbhc;
164};
165
Bradley Rubin229c6a52011-07-12 16:18:48 -0700166struct tabla_priv {
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -0700167 struct snd_soc_codec *codec;
Joonwoo Park6c1ebb62012-01-16 19:08:43 -0800168 struct tabla_reg_address reg_addr;
Joonwoo Park0976d012011-12-22 11:48:18 -0800169 u32 mclk_freq;
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -0700170 u32 adc_count;
Patrick Lai3043fba2011-08-01 14:15:57 -0700171 u32 cfilt1_cnt;
172 u32 cfilt2_cnt;
173 u32 cfilt3_cnt;
Kiran Kandi6fae8bf2011-08-15 10:36:42 -0700174 u32 rx_bias_count;
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -0700175 enum tabla_bandgap_type bandgap_type;
Kiran Kandi6fae8bf2011-08-15 10:36:42 -0700176 bool mclk_enabled;
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -0700177 bool clock_active;
178 bool config_mode_active;
179 bool mbhc_polling_active;
Joonwoo Parkf4267c22012-01-10 13:25:24 -0800180 unsigned long mbhc_fake_ins_start;
Bradley Rubincb1e2732011-06-23 16:49:20 -0700181 int buttons_pressed;
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -0700182
Joonwoo Park0976d012011-12-22 11:48:18 -0800183 enum tabla_micbias_num micbias;
184 /* void* calibration contains:
185 * struct tabla_mbhc_general_cfg generic;
186 * struct tabla_mbhc_plug_detect_cfg plug_det;
187 * struct tabla_mbhc_plug_type_cfg plug_type;
188 * struct tabla_mbhc_btn_detect_cfg btn_det;
189 * struct tabla_mbhc_imped_detect_cfg imped_det;
190 * Note: various size depends on btn_det->num_btn
191 */
192 void *calibration;
193 struct mbhc_internal_cal_data mbhc_data;
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -0700194
Bradley Rubincb1e2732011-06-23 16:49:20 -0700195 struct snd_soc_jack *headset_jack;
196 struct snd_soc_jack *button_jack;
Bradley Rubin229c6a52011-07-12 16:18:48 -0700197
Asish Bhattacharyab1aeae22012-02-15 08:29:28 +0530198 struct wcd9xxx_pdata *pdata;
Bradley Rubina7096d02011-08-03 18:29:02 -0700199 u32 anc_slot;
Bradley Rubincb3950a2011-08-18 13:07:26 -0700200
201 bool no_mic_headset_override;
Bhalchandra Gajare0a792b12011-09-06 16:36:58 -0700202 /* Delayed work to report long button press */
203 struct delayed_work btn0_dwork;
Bhalchandra Gajare02d90cd2011-09-30 16:14:00 -0700204
205 struct mbhc_micbias_regs mbhc_bias_regs;
Bhalchandra Gajared9ebb6c2011-10-03 19:54:41 -0700206 u8 cfilt_k_value;
207 bool mbhc_micbias_switched;
Patrick Lai49efeac2011-11-03 11:01:12 -0700208
Joonwoo Parka9444452011-12-08 18:48:27 -0800209 /* track PA/DAC state */
210 unsigned long hph_pa_dac_state;
211
Santosh Mardie15e2302011-11-15 10:39:23 +0530212 /*track tabla interface type*/
213 u8 intf_type;
214
Patrick Lai49efeac2011-11-03 11:01:12 -0700215 u32 hph_status; /* track headhpone status */
216 /* define separate work for left and right headphone OCP to avoid
217 * additional checking on which OCP event to report so no locking
218 * to ensure synchronization is required
219 */
220 struct work_struct hphlocp_work; /* reporting left hph ocp off */
221 struct work_struct hphrocp_work; /* reporting right hph ocp off */
Joonwoo Park8b1f0982011-12-08 17:12:45 -0800222
Patrick Laic7cae882011-11-18 11:52:49 -0800223 u8 hphlocp_cnt; /* headphone left ocp retry */
224 u8 hphrocp_cnt; /* headphone right ocp retry */
Joonwoo Park0976d012011-12-22 11:48:18 -0800225
226 /* Callback function to enable MCLK */
227 int (*mclk_cb) (struct snd_soc_codec*, int);
Patrick Lai64b43262011-12-06 17:29:15 -0800228
229 /* Work to perform MBHC Firmware Read */
230 struct delayed_work mbhc_firmware_dwork;
231 const struct firmware *mbhc_fw;
Bharath Ramachandramurthy9c79f132011-11-28 11:18:57 -0800232
233 /* num of slim ports required */
234 struct tabla_codec_dai_data dai[NUM_CODEC_DAIS];
Kuirong Wang0f8ade32012-02-27 16:29:45 -0800235
236 /*compander*/
237 int comp_enabled[COMPANDER_MAX];
238 u32 comp_fs[COMPANDER_MAX];
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -0700239};
240
Bradley Rubincb3950a2011-08-18 13:07:26 -0700241#ifdef CONFIG_DEBUG_FS
242struct tabla_priv *debug_tabla_priv;
243#endif
244
Kuirong Wang0f8ade32012-02-27 16:29:45 -0800245static const u32 comp_shift[] = {
246 0,
247 2,
248};
249
250static const int comp_rx_path[] = {
251 COMPANDER_1,
252 COMPANDER_1,
253 COMPANDER_2,
254 COMPANDER_2,
255 COMPANDER_2,
256 COMPANDER_2,
257 COMPANDER_MAX,
258};
259
260static const struct comp_sample_dependent_params comp_samp_params[] = {
261 {
262 .peak_det_timeout = 0x2,
263 .rms_meter_div_fact = 0x8 << 4,
264 .rms_meter_resamp_fact = 0x21,
265 },
266 {
267 .peak_det_timeout = 0x3,
268 .rms_meter_div_fact = 0x9 << 4,
269 .rms_meter_resamp_fact = 0x28,
270 },
271
272 {
273 .peak_det_timeout = 0x5,
274 .rms_meter_div_fact = 0xB << 4,
275 .rms_meter_resamp_fact = 0x28,
276 },
277
278 {
279 .peak_det_timeout = 0x5,
280 .rms_meter_div_fact = 0xB << 4,
281 .rms_meter_resamp_fact = 0x28,
282 },
283};
284
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -0700285static int tabla_codec_enable_charge_pump(struct snd_soc_dapm_widget *w,
286 struct snd_kcontrol *kcontrol, int event)
287{
288 struct snd_soc_codec *codec = w->codec;
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -0700289
290 pr_debug("%s %d\n", __func__, event);
291 switch (event) {
292 case SND_SOC_DAPM_POST_PMU:
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -0700293 snd_soc_update_bits(codec, TABLA_A_CDC_CLK_OTHR_CTL, 0x01,
294 0x01);
295 snd_soc_update_bits(codec, TABLA_A_CDC_CLSG_CTL, 0x08, 0x08);
296 usleep_range(200, 200);
297 snd_soc_update_bits(codec, TABLA_A_CP_STATIC, 0x10, 0x00);
298 break;
299 case SND_SOC_DAPM_PRE_PMD:
300 snd_soc_update_bits(codec, TABLA_A_CDC_CLK_OTHR_RESET_CTL, 0x10,
301 0x10);
302 usleep_range(20, 20);
303 snd_soc_update_bits(codec, TABLA_A_CP_STATIC, 0x08, 0x08);
304 snd_soc_update_bits(codec, TABLA_A_CP_STATIC, 0x10, 0x10);
305 snd_soc_update_bits(codec, TABLA_A_CDC_CLSG_CTL, 0x08, 0x00);
306 snd_soc_update_bits(codec, TABLA_A_CDC_CLK_OTHR_CTL, 0x01,
307 0x00);
308 snd_soc_update_bits(codec, TABLA_A_CP_STATIC, 0x08, 0x00);
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -0700309 break;
310 }
311 return 0;
312}
313
Bradley Rubina7096d02011-08-03 18:29:02 -0700314static int tabla_get_anc_slot(struct snd_kcontrol *kcontrol,
315 struct snd_ctl_elem_value *ucontrol)
316{
317 struct snd_soc_codec *codec = snd_kcontrol_chip(kcontrol);
318 struct tabla_priv *tabla = snd_soc_codec_get_drvdata(codec);
319 ucontrol->value.integer.value[0] = tabla->anc_slot;
320 return 0;
321}
322
323static int tabla_put_anc_slot(struct snd_kcontrol *kcontrol,
324 struct snd_ctl_elem_value *ucontrol)
325{
326 struct snd_soc_codec *codec = snd_kcontrol_chip(kcontrol);
327 struct tabla_priv *tabla = snd_soc_codec_get_drvdata(codec);
328 tabla->anc_slot = ucontrol->value.integer.value[0];
329 return 0;
330}
331
Kiran Kandid2d86b52011-09-09 17:44:28 -0700332static int tabla_pa_gain_get(struct snd_kcontrol *kcontrol,
333 struct snd_ctl_elem_value *ucontrol)
334{
335 u8 ear_pa_gain;
336 struct snd_soc_codec *codec = snd_kcontrol_chip(kcontrol);
337
338 ear_pa_gain = snd_soc_read(codec, TABLA_A_RX_EAR_GAIN);
339
340 ear_pa_gain = ear_pa_gain >> 5;
341
342 if (ear_pa_gain == 0x00) {
343 ucontrol->value.integer.value[0] = 0;
344 } else if (ear_pa_gain == 0x04) {
345 ucontrol->value.integer.value[0] = 1;
346 } else {
347 pr_err("%s: ERROR: Unsupported Ear Gain = 0x%x\n",
348 __func__, ear_pa_gain);
349 return -EINVAL;
350 }
351
352 pr_debug("%s: ear_pa_gain = 0x%x\n", __func__, ear_pa_gain);
353
354 return 0;
355}
356
357static int tabla_pa_gain_put(struct snd_kcontrol *kcontrol,
358 struct snd_ctl_elem_value *ucontrol)
359{
360 u8 ear_pa_gain;
361 struct snd_soc_codec *codec = snd_kcontrol_chip(kcontrol);
362
363 pr_debug("%s: ucontrol->value.integer.value[0] = %ld\n", __func__,
364 ucontrol->value.integer.value[0]);
365
366 switch (ucontrol->value.integer.value[0]) {
367 case 0:
368 ear_pa_gain = 0x00;
369 break;
370 case 1:
371 ear_pa_gain = 0x80;
372 break;
373 default:
374 return -EINVAL;
375 }
376
377 snd_soc_update_bits(codec, TABLA_A_RX_EAR_GAIN, 0xE0, ear_pa_gain);
378 return 0;
379}
380
Ben Romberger1f045a72011-11-04 10:14:57 -0700381static int tabla_get_iir_enable_audio_mixer(
382 struct snd_kcontrol *kcontrol,
383 struct snd_ctl_elem_value *ucontrol)
384{
385 struct snd_soc_codec *codec = snd_kcontrol_chip(kcontrol);
386 int iir_idx = ((struct soc_multi_mixer_control *)
387 kcontrol->private_value)->reg;
388 int band_idx = ((struct soc_multi_mixer_control *)
389 kcontrol->private_value)->shift;
390
391 ucontrol->value.integer.value[0] =
392 snd_soc_read(codec, (TABLA_A_CDC_IIR1_CTL + 16 * iir_idx)) &
393 (1 << band_idx);
394
395 pr_debug("%s: IIR #%d band #%d enable %d\n", __func__,
396 iir_idx, band_idx,
397 (uint32_t)ucontrol->value.integer.value[0]);
398 return 0;
399}
400
401static int tabla_put_iir_enable_audio_mixer(
402 struct snd_kcontrol *kcontrol,
403 struct snd_ctl_elem_value *ucontrol)
404{
405 struct snd_soc_codec *codec = snd_kcontrol_chip(kcontrol);
406 int iir_idx = ((struct soc_multi_mixer_control *)
407 kcontrol->private_value)->reg;
408 int band_idx = ((struct soc_multi_mixer_control *)
409 kcontrol->private_value)->shift;
410 int value = ucontrol->value.integer.value[0];
411
412 /* Mask first 5 bits, 6-8 are reserved */
413 snd_soc_update_bits(codec, (TABLA_A_CDC_IIR1_CTL + 16 * iir_idx),
414 (1 << band_idx), (value << band_idx));
415
416 pr_debug("%s: IIR #%d band #%d enable %d\n", __func__,
417 iir_idx, band_idx, value);
418 return 0;
419}
420static uint32_t get_iir_band_coeff(struct snd_soc_codec *codec,
421 int iir_idx, int band_idx,
422 int coeff_idx)
423{
424 /* Address does not automatically update if reading */
Ben Romberger0915aae2012-02-06 23:32:43 -0800425 snd_soc_write(codec,
Ben Romberger1f045a72011-11-04 10:14:57 -0700426 (TABLA_A_CDC_IIR1_COEF_B1_CTL + 16 * iir_idx),
Ben Romberger0915aae2012-02-06 23:32:43 -0800427 (band_idx * BAND_MAX + coeff_idx) & 0x1F);
Ben Romberger1f045a72011-11-04 10:14:57 -0700428
429 /* Mask bits top 2 bits since they are reserved */
430 return ((snd_soc_read(codec,
431 (TABLA_A_CDC_IIR1_COEF_B2_CTL + 16 * iir_idx)) << 24) |
432 (snd_soc_read(codec,
433 (TABLA_A_CDC_IIR1_COEF_B3_CTL + 16 * iir_idx)) << 16) |
434 (snd_soc_read(codec,
435 (TABLA_A_CDC_IIR1_COEF_B4_CTL + 16 * iir_idx)) << 8) |
436 (snd_soc_read(codec,
437 (TABLA_A_CDC_IIR1_COEF_B5_CTL + 16 * iir_idx)))) &
438 0x3FFFFFFF;
439}
440
441static int tabla_get_iir_band_audio_mixer(
442 struct snd_kcontrol *kcontrol,
443 struct snd_ctl_elem_value *ucontrol)
444{
445 struct snd_soc_codec *codec = snd_kcontrol_chip(kcontrol);
446 int iir_idx = ((struct soc_multi_mixer_control *)
447 kcontrol->private_value)->reg;
448 int band_idx = ((struct soc_multi_mixer_control *)
449 kcontrol->private_value)->shift;
450
451 ucontrol->value.integer.value[0] =
452 get_iir_band_coeff(codec, iir_idx, band_idx, 0);
453 ucontrol->value.integer.value[1] =
454 get_iir_band_coeff(codec, iir_idx, band_idx, 1);
455 ucontrol->value.integer.value[2] =
456 get_iir_band_coeff(codec, iir_idx, band_idx, 2);
457 ucontrol->value.integer.value[3] =
458 get_iir_band_coeff(codec, iir_idx, band_idx, 3);
459 ucontrol->value.integer.value[4] =
460 get_iir_band_coeff(codec, iir_idx, band_idx, 4);
461
462 pr_debug("%s: IIR #%d band #%d b0 = 0x%x\n"
463 "%s: IIR #%d band #%d b1 = 0x%x\n"
464 "%s: IIR #%d band #%d b2 = 0x%x\n"
465 "%s: IIR #%d band #%d a1 = 0x%x\n"
466 "%s: IIR #%d band #%d a2 = 0x%x\n",
467 __func__, iir_idx, band_idx,
468 (uint32_t)ucontrol->value.integer.value[0],
469 __func__, iir_idx, band_idx,
470 (uint32_t)ucontrol->value.integer.value[1],
471 __func__, iir_idx, band_idx,
472 (uint32_t)ucontrol->value.integer.value[2],
473 __func__, iir_idx, band_idx,
474 (uint32_t)ucontrol->value.integer.value[3],
475 __func__, iir_idx, band_idx,
476 (uint32_t)ucontrol->value.integer.value[4]);
477 return 0;
478}
479
480static void set_iir_band_coeff(struct snd_soc_codec *codec,
481 int iir_idx, int band_idx,
482 int coeff_idx, uint32_t value)
483{
484 /* Mask top 3 bits, 6-8 are reserved */
485 /* Update address manually each time */
Ben Romberger0915aae2012-02-06 23:32:43 -0800486 snd_soc_write(codec,
Ben Romberger1f045a72011-11-04 10:14:57 -0700487 (TABLA_A_CDC_IIR1_COEF_B1_CTL + 16 * iir_idx),
Ben Romberger0915aae2012-02-06 23:32:43 -0800488 (band_idx * BAND_MAX + coeff_idx) & 0x1F);
Ben Romberger1f045a72011-11-04 10:14:57 -0700489
490 /* Mask top 2 bits, 7-8 are reserved */
Ben Romberger0915aae2012-02-06 23:32:43 -0800491 snd_soc_write(codec,
Ben Romberger1f045a72011-11-04 10:14:57 -0700492 (TABLA_A_CDC_IIR1_COEF_B2_CTL + 16 * iir_idx),
Ben Romberger0915aae2012-02-06 23:32:43 -0800493 (value >> 24) & 0x3F);
Ben Romberger1f045a72011-11-04 10:14:57 -0700494
495 /* Isolate 8bits at a time */
Ben Romberger0915aae2012-02-06 23:32:43 -0800496 snd_soc_write(codec,
Ben Romberger1f045a72011-11-04 10:14:57 -0700497 (TABLA_A_CDC_IIR1_COEF_B3_CTL + 16 * iir_idx),
Ben Romberger0915aae2012-02-06 23:32:43 -0800498 (value >> 16) & 0xFF);
Ben Romberger1f045a72011-11-04 10:14:57 -0700499
Ben Romberger0915aae2012-02-06 23:32:43 -0800500 snd_soc_write(codec,
Ben Romberger1f045a72011-11-04 10:14:57 -0700501 (TABLA_A_CDC_IIR1_COEF_B4_CTL + 16 * iir_idx),
Ben Romberger0915aae2012-02-06 23:32:43 -0800502 (value >> 8) & 0xFF);
Ben Romberger1f045a72011-11-04 10:14:57 -0700503
Ben Romberger0915aae2012-02-06 23:32:43 -0800504 snd_soc_write(codec,
Ben Romberger1f045a72011-11-04 10:14:57 -0700505 (TABLA_A_CDC_IIR1_COEF_B5_CTL + 16 * iir_idx),
Ben Romberger0915aae2012-02-06 23:32:43 -0800506 value & 0xFF);
Ben Romberger1f045a72011-11-04 10:14:57 -0700507}
508
509static int tabla_put_iir_band_audio_mixer(
510 struct snd_kcontrol *kcontrol,
511 struct snd_ctl_elem_value *ucontrol)
512{
513 struct snd_soc_codec *codec = snd_kcontrol_chip(kcontrol);
514 int iir_idx = ((struct soc_multi_mixer_control *)
515 kcontrol->private_value)->reg;
516 int band_idx = ((struct soc_multi_mixer_control *)
517 kcontrol->private_value)->shift;
518
519 set_iir_band_coeff(codec, iir_idx, band_idx, 0,
520 ucontrol->value.integer.value[0]);
521 set_iir_band_coeff(codec, iir_idx, band_idx, 1,
522 ucontrol->value.integer.value[1]);
523 set_iir_band_coeff(codec, iir_idx, band_idx, 2,
524 ucontrol->value.integer.value[2]);
525 set_iir_band_coeff(codec, iir_idx, band_idx, 3,
526 ucontrol->value.integer.value[3]);
527 set_iir_band_coeff(codec, iir_idx, band_idx, 4,
528 ucontrol->value.integer.value[4]);
529
530 pr_debug("%s: IIR #%d band #%d b0 = 0x%x\n"
531 "%s: IIR #%d band #%d b1 = 0x%x\n"
532 "%s: IIR #%d band #%d b2 = 0x%x\n"
533 "%s: IIR #%d band #%d a1 = 0x%x\n"
534 "%s: IIR #%d band #%d a2 = 0x%x\n",
535 __func__, iir_idx, band_idx,
536 get_iir_band_coeff(codec, iir_idx, band_idx, 0),
537 __func__, iir_idx, band_idx,
538 get_iir_band_coeff(codec, iir_idx, band_idx, 1),
539 __func__, iir_idx, band_idx,
540 get_iir_band_coeff(codec, iir_idx, band_idx, 2),
541 __func__, iir_idx, band_idx,
542 get_iir_band_coeff(codec, iir_idx, band_idx, 3),
543 __func__, iir_idx, band_idx,
544 get_iir_band_coeff(codec, iir_idx, band_idx, 4));
545 return 0;
546}
547
Kuirong Wang0f8ade32012-02-27 16:29:45 -0800548static int tabla_compander_gain_offset(
549 struct snd_soc_codec *codec, u32 enable,
550 unsigned int reg, int mask, int event)
551{
552 int pa_mode = snd_soc_read(codec, reg) & mask;
553 int gain_offset = 0;
554 /* if PMU && enable is 1-> offset is 3
555 * if PMU && enable is 0-> offset is 0
556 * if PMD && pa_mode is PA -> offset is 0: PMU compander is off
557 * if PMD && pa_mode is comp -> offset is -3: PMU compander is on.
558 */
559
560 if (SND_SOC_DAPM_EVENT_ON(event) && (enable != 0))
561 gain_offset = TABLA_COMP_DIGITAL_GAIN_OFFSET;
562 if (SND_SOC_DAPM_EVENT_OFF(event) && (pa_mode == 0))
563 gain_offset = -TABLA_COMP_DIGITAL_GAIN_OFFSET;
564 return gain_offset;
565}
566
567
568static int tabla_config_gain_compander(
569 struct snd_soc_codec *codec,
570 u32 compander, u32 enable, int event)
571{
572 int value = 0;
573 int mask = 1 << 4;
574 int gain = 0;
575 int gain_offset;
576 if (compander >= COMPANDER_MAX) {
577 pr_err("%s: Error, invalid compander channel\n", __func__);
578 return -EINVAL;
579 }
580
581 if ((enable == 0) || SND_SOC_DAPM_EVENT_OFF(event))
582 value = 1 << 4;
583
584 if (compander == COMPANDER_1) {
585 gain_offset = tabla_compander_gain_offset(codec, enable,
586 TABLA_A_RX_HPH_L_GAIN, mask, event);
587 snd_soc_update_bits(codec, TABLA_A_RX_HPH_L_GAIN, mask, value);
588 gain = snd_soc_read(codec, TABLA_A_CDC_RX1_VOL_CTL_B2_CTL);
589 snd_soc_update_bits(codec, TABLA_A_CDC_RX1_VOL_CTL_B2_CTL,
590 0xFF, gain - gain_offset);
591 gain_offset = tabla_compander_gain_offset(codec, enable,
592 TABLA_A_RX_HPH_R_GAIN, mask, event);
593 snd_soc_update_bits(codec, TABLA_A_RX_HPH_R_GAIN, mask, value);
594 gain = snd_soc_read(codec, TABLA_A_CDC_RX2_VOL_CTL_B2_CTL);
595 snd_soc_update_bits(codec, TABLA_A_CDC_RX2_VOL_CTL_B2_CTL,
596 0xFF, gain - gain_offset);
597 } else if (compander == COMPANDER_2) {
598 gain_offset = tabla_compander_gain_offset(codec, enable,
599 TABLA_A_RX_LINE_1_GAIN, mask, event);
600 snd_soc_update_bits(codec, TABLA_A_RX_LINE_1_GAIN, mask, value);
601 gain = snd_soc_read(codec, TABLA_A_CDC_RX3_VOL_CTL_B2_CTL);
602 snd_soc_update_bits(codec, TABLA_A_CDC_RX3_VOL_CTL_B2_CTL,
603 0xFF, gain - gain_offset);
604 gain_offset = tabla_compander_gain_offset(codec, enable,
605 TABLA_A_RX_LINE_3_GAIN, mask, event);
606 snd_soc_update_bits(codec, TABLA_A_RX_LINE_3_GAIN, mask, value);
607 gain = snd_soc_read(codec, TABLA_A_CDC_RX4_VOL_CTL_B2_CTL);
608 snd_soc_update_bits(codec, TABLA_A_CDC_RX4_VOL_CTL_B2_CTL,
609 0xFF, gain - gain_offset);
610 gain_offset = tabla_compander_gain_offset(codec, enable,
611 TABLA_A_RX_LINE_2_GAIN, mask, event);
612 snd_soc_update_bits(codec, TABLA_A_RX_LINE_2_GAIN, mask, value);
613 gain = snd_soc_read(codec, TABLA_A_CDC_RX5_VOL_CTL_B2_CTL);
614 snd_soc_update_bits(codec, TABLA_A_CDC_RX5_VOL_CTL_B2_CTL,
615 0xFF, gain - gain_offset);
616 gain_offset = tabla_compander_gain_offset(codec, enable,
617 TABLA_A_RX_LINE_4_GAIN, mask, event);
618 snd_soc_update_bits(codec, TABLA_A_RX_LINE_4_GAIN, mask, value);
619 gain = snd_soc_read(codec, TABLA_A_CDC_RX6_VOL_CTL_B2_CTL);
620 snd_soc_update_bits(codec, TABLA_A_CDC_RX6_VOL_CTL_B2_CTL,
621 0xFF, gain - gain_offset);
622 }
623 return 0;
624}
625static int tabla_get_compander(struct snd_kcontrol *kcontrol,
626 struct snd_ctl_elem_value *ucontrol)
627{
628
629 struct snd_soc_codec *codec = snd_kcontrol_chip(kcontrol);
630 int comp = ((struct soc_multi_mixer_control *)
631 kcontrol->private_value)->max;
632 struct tabla_priv *tabla = snd_soc_codec_get_drvdata(codec);
633
634 ucontrol->value.integer.value[0] = tabla->comp_enabled[comp];
635
636 return 0;
637}
638
639static int tabla_set_compander(struct snd_kcontrol *kcontrol,
640 struct snd_ctl_elem_value *ucontrol)
641{
642 struct snd_soc_codec *codec = snd_kcontrol_chip(kcontrol);
643 struct tabla_priv *tabla = snd_soc_codec_get_drvdata(codec);
644 int comp = ((struct soc_multi_mixer_control *)
645 kcontrol->private_value)->max;
646 int value = ucontrol->value.integer.value[0];
647
648 if (value == tabla->comp_enabled[comp]) {
649 pr_debug("%s: compander #%d enable %d no change\n",
650 __func__, comp, value);
651 return 0;
652 }
653 tabla->comp_enabled[comp] = value;
654 return 0;
655}
656
657
658static int tabla_config_compander(struct snd_soc_dapm_widget *w,
659 struct snd_kcontrol *kcontrol,
660 int event)
661{
662 struct snd_soc_codec *codec = w->codec;
663 struct tabla_priv *tabla = snd_soc_codec_get_drvdata(codec);
664 u32 rate = tabla->comp_fs[w->shift];
665
666 switch (event) {
667 case SND_SOC_DAPM_PRE_PMU:
668 if (tabla->comp_enabled[w->shift] != 0) {
669 /* Enable both L/R compander clocks */
670 snd_soc_update_bits(codec,
671 TABLA_A_CDC_CLK_RX_B2_CTL,
672 0x03 << comp_shift[w->shift],
673 0x03 << comp_shift[w->shift]);
674 /* Clar the HALT for the compander*/
675 snd_soc_update_bits(codec,
676 TABLA_A_CDC_COMP1_B1_CTL +
677 w->shift * 8, 1 << 2, 0);
678 /* Toggle compander reset bits*/
679 snd_soc_update_bits(codec,
680 TABLA_A_CDC_CLK_OTHR_RESET_CTL,
681 0x03 << comp_shift[w->shift],
682 0x03 << comp_shift[w->shift]);
683 snd_soc_update_bits(codec,
684 TABLA_A_CDC_CLK_OTHR_RESET_CTL,
685 0x03 << comp_shift[w->shift], 0);
686 tabla_config_gain_compander(codec, w->shift, 1, event);
687 /* Update the RMS meter resampling*/
688 snd_soc_update_bits(codec,
689 TABLA_A_CDC_COMP1_B3_CTL +
690 w->shift * 8, 0xFF, 0x01);
691 /* Wait for 1ms*/
692 usleep_range(1000, 1000);
693 }
694 break;
695 case SND_SOC_DAPM_POST_PMU:
696 /* Set sample rate dependent paramater*/
697 if (tabla->comp_enabled[w->shift] != 0) {
698 snd_soc_update_bits(codec, TABLA_A_CDC_COMP1_FS_CFG +
699 w->shift * 8, 0x03, rate);
700 snd_soc_update_bits(codec, TABLA_A_CDC_COMP1_B2_CTL +
701 w->shift * 8, 0x0F,
702 comp_samp_params[rate].peak_det_timeout);
703 snd_soc_update_bits(codec, TABLA_A_CDC_COMP1_B2_CTL +
704 w->shift * 8, 0xF0,
705 comp_samp_params[rate].rms_meter_div_fact);
706 snd_soc_update_bits(codec, TABLA_A_CDC_COMP1_B3_CTL +
707 w->shift * 8, 0xFF,
708 comp_samp_params[rate].rms_meter_resamp_fact);
709 /* Compander enable -> 0x370/0x378*/
710 snd_soc_update_bits(codec, TABLA_A_CDC_COMP1_B1_CTL +
711 w->shift * 8, 0x03, 0x03);
712 }
713 break;
714 case SND_SOC_DAPM_PRE_PMD:
715 /* Halt the compander*/
716 snd_soc_update_bits(codec, TABLA_A_CDC_COMP1_B1_CTL +
717 w->shift * 8, 1 << 2, 1 << 2);
718 break;
719 case SND_SOC_DAPM_POST_PMD:
720 /* Restore the gain */
721 tabla_config_gain_compander(codec, w->shift,
722 tabla->comp_enabled[w->shift], event);
723 /* Disable the compander*/
724 snd_soc_update_bits(codec, TABLA_A_CDC_COMP1_B1_CTL +
725 w->shift * 8, 0x03, 0x00);
726 /* Turn off the clock for compander in pair*/
727 snd_soc_update_bits(codec, TABLA_A_CDC_CLK_RX_B2_CTL,
728 0x03 << comp_shift[w->shift], 0);
729 break;
730 }
731 return 0;
732}
733
Kiran Kandid2d86b52011-09-09 17:44:28 -0700734static const char *tabla_ear_pa_gain_text[] = {"POS_6_DB", "POS_2_DB"};
735static const struct soc_enum tabla_ear_pa_gain_enum[] = {
736 SOC_ENUM_SINGLE_EXT(2, tabla_ear_pa_gain_text),
737};
738
Santosh Mardi024010f2011-10-18 06:27:21 +0530739/*cut of frequency for high pass filter*/
740static const char *cf_text[] = {
741 "MIN_3DB_4Hz", "MIN_3DB_75Hz", "MIN_3DB_150Hz"
742};
743
744static const struct soc_enum cf_dec1_enum =
745 SOC_ENUM_SINGLE(TABLA_A_CDC_TX1_MUX_CTL, 4, 3, cf_text);
746
747static const struct soc_enum cf_dec2_enum =
748 SOC_ENUM_SINGLE(TABLA_A_CDC_TX2_MUX_CTL, 4, 3, cf_text);
749
750static const struct soc_enum cf_dec3_enum =
751 SOC_ENUM_SINGLE(TABLA_A_CDC_TX3_MUX_CTL, 4, 3, cf_text);
752
753static const struct soc_enum cf_dec4_enum =
754 SOC_ENUM_SINGLE(TABLA_A_CDC_TX4_MUX_CTL, 4, 3, cf_text);
755
756static const struct soc_enum cf_dec5_enum =
757 SOC_ENUM_SINGLE(TABLA_A_CDC_TX5_MUX_CTL, 4, 3, cf_text);
758
759static const struct soc_enum cf_dec6_enum =
760 SOC_ENUM_SINGLE(TABLA_A_CDC_TX6_MUX_CTL, 4, 3, cf_text);
761
762static const struct soc_enum cf_dec7_enum =
763 SOC_ENUM_SINGLE(TABLA_A_CDC_TX7_MUX_CTL, 4, 3, cf_text);
764
765static const struct soc_enum cf_dec8_enum =
766 SOC_ENUM_SINGLE(TABLA_A_CDC_TX8_MUX_CTL, 4, 3, cf_text);
767
768static const struct soc_enum cf_dec9_enum =
769 SOC_ENUM_SINGLE(TABLA_A_CDC_TX9_MUX_CTL, 4, 3, cf_text);
770
771static const struct soc_enum cf_dec10_enum =
772 SOC_ENUM_SINGLE(TABLA_A_CDC_TX10_MUX_CTL, 4, 3, cf_text);
773
774static const struct soc_enum cf_rxmix1_enum =
775 SOC_ENUM_SINGLE(TABLA_A_CDC_RX1_B4_CTL, 1, 3, cf_text);
776
777static const struct soc_enum cf_rxmix2_enum =
778 SOC_ENUM_SINGLE(TABLA_A_CDC_RX2_B4_CTL, 1, 3, cf_text);
779
780static const struct soc_enum cf_rxmix3_enum =
781 SOC_ENUM_SINGLE(TABLA_A_CDC_RX3_B4_CTL, 1, 3, cf_text);
782
783static const struct soc_enum cf_rxmix4_enum =
784 SOC_ENUM_SINGLE(TABLA_A_CDC_RX4_B4_CTL, 1, 3, cf_text);
785
786static const struct soc_enum cf_rxmix5_enum =
787 SOC_ENUM_SINGLE(TABLA_A_CDC_RX5_B4_CTL, 1, 3, cf_text)
788;
789static const struct soc_enum cf_rxmix6_enum =
790 SOC_ENUM_SINGLE(TABLA_A_CDC_RX6_B4_CTL, 1, 3, cf_text);
791
792static const struct soc_enum cf_rxmix7_enum =
793 SOC_ENUM_SINGLE(TABLA_A_CDC_RX7_B4_CTL, 1, 3, cf_text);
794
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -0700795static const struct snd_kcontrol_new tabla_snd_controls[] = {
Kiran Kandid2d86b52011-09-09 17:44:28 -0700796
797 SOC_ENUM_EXT("EAR PA Gain", tabla_ear_pa_gain_enum[0],
798 tabla_pa_gain_get, tabla_pa_gain_put),
799
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -0700800 SOC_SINGLE_TLV("LINEOUT1 Volume", TABLA_A_RX_LINE_1_GAIN, 0, 12, 1,
801 line_gain),
Bradley Rubin74a9b4a2011-06-13 15:03:43 -0700802 SOC_SINGLE_TLV("LINEOUT2 Volume", TABLA_A_RX_LINE_2_GAIN, 0, 12, 1,
803 line_gain),
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -0700804 SOC_SINGLE_TLV("LINEOUT3 Volume", TABLA_A_RX_LINE_3_GAIN, 0, 12, 1,
805 line_gain),
Bradley Rubin74a9b4a2011-06-13 15:03:43 -0700806 SOC_SINGLE_TLV("LINEOUT4 Volume", TABLA_A_RX_LINE_4_GAIN, 0, 12, 1,
807 line_gain),
Bhalchandra Gajare0a8ad172011-08-12 13:32:22 -0700808 SOC_SINGLE_TLV("LINEOUT5 Volume", TABLA_A_RX_LINE_5_GAIN, 0, 12, 1,
809 line_gain),
Bradley Rubin74a9b4a2011-06-13 15:03:43 -0700810
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -0700811 SOC_SINGLE_TLV("HPHL Volume", TABLA_A_RX_HPH_L_GAIN, 0, 12, 1,
812 line_gain),
813 SOC_SINGLE_TLV("HPHR Volume", TABLA_A_RX_HPH_R_GAIN, 0, 12, 1,
814 line_gain),
815
Bradley Rubin410383f2011-07-22 13:44:23 -0700816 SOC_SINGLE_S8_TLV("RX1 Digital Volume", TABLA_A_CDC_RX1_VOL_CTL_B2_CTL,
817 -84, 40, digital_gain),
818 SOC_SINGLE_S8_TLV("RX2 Digital Volume", TABLA_A_CDC_RX2_VOL_CTL_B2_CTL,
819 -84, 40, digital_gain),
820 SOC_SINGLE_S8_TLV("RX3 Digital Volume", TABLA_A_CDC_RX3_VOL_CTL_B2_CTL,
821 -84, 40, digital_gain),
822 SOC_SINGLE_S8_TLV("RX4 Digital Volume", TABLA_A_CDC_RX4_VOL_CTL_B2_CTL,
823 -84, 40, digital_gain),
824 SOC_SINGLE_S8_TLV("RX5 Digital Volume", TABLA_A_CDC_RX5_VOL_CTL_B2_CTL,
825 -84, 40, digital_gain),
826 SOC_SINGLE_S8_TLV("RX6 Digital Volume", TABLA_A_CDC_RX6_VOL_CTL_B2_CTL,
827 -84, 40, digital_gain),
Neema Shettyd3a89262012-02-16 10:23:50 -0800828 SOC_SINGLE_S8_TLV("RX7 Digital Volume", TABLA_A_CDC_RX7_VOL_CTL_B2_CTL,
829 -84, 40, digital_gain),
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -0700830
Bradley Rubin410383f2011-07-22 13:44:23 -0700831 SOC_SINGLE_S8_TLV("DEC1 Volume", TABLA_A_CDC_TX1_VOL_CTL_GAIN, -84, 40,
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -0700832 digital_gain),
Bradley Rubin410383f2011-07-22 13:44:23 -0700833 SOC_SINGLE_S8_TLV("DEC2 Volume", TABLA_A_CDC_TX2_VOL_CTL_GAIN, -84, 40,
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -0700834 digital_gain),
Bradley Rubin410383f2011-07-22 13:44:23 -0700835 SOC_SINGLE_S8_TLV("DEC3 Volume", TABLA_A_CDC_TX3_VOL_CTL_GAIN, -84, 40,
836 digital_gain),
837 SOC_SINGLE_S8_TLV("DEC4 Volume", TABLA_A_CDC_TX4_VOL_CTL_GAIN, -84, 40,
838 digital_gain),
839 SOC_SINGLE_S8_TLV("DEC5 Volume", TABLA_A_CDC_TX5_VOL_CTL_GAIN, -84, 40,
840 digital_gain),
841 SOC_SINGLE_S8_TLV("DEC6 Volume", TABLA_A_CDC_TX6_VOL_CTL_GAIN, -84, 40,
842 digital_gain),
843 SOC_SINGLE_S8_TLV("DEC7 Volume", TABLA_A_CDC_TX7_VOL_CTL_GAIN, -84, 40,
844 digital_gain),
845 SOC_SINGLE_S8_TLV("DEC8 Volume", TABLA_A_CDC_TX8_VOL_CTL_GAIN, -84, 40,
846 digital_gain),
847 SOC_SINGLE_S8_TLV("DEC9 Volume", TABLA_A_CDC_TX9_VOL_CTL_GAIN, -84, 40,
848 digital_gain),
849 SOC_SINGLE_S8_TLV("DEC10 Volume", TABLA_A_CDC_TX10_VOL_CTL_GAIN, -84,
850 40, digital_gain),
Patrick Lai29006372011-09-28 17:57:42 -0700851 SOC_SINGLE_S8_TLV("IIR1 INP1 Volume", TABLA_A_CDC_IIR1_GAIN_B1_CTL, -84,
852 40, digital_gain),
853 SOC_SINGLE_S8_TLV("IIR1 INP2 Volume", TABLA_A_CDC_IIR1_GAIN_B2_CTL, -84,
854 40, digital_gain),
855 SOC_SINGLE_S8_TLV("IIR1 INP3 Volume", TABLA_A_CDC_IIR1_GAIN_B3_CTL, -84,
856 40, digital_gain),
857 SOC_SINGLE_S8_TLV("IIR1 INP4 Volume", TABLA_A_CDC_IIR1_GAIN_B4_CTL, -84,
858 40, digital_gain),
Bhalchandra Gajare0d77e1b2011-07-08 10:54:14 -0700859 SOC_SINGLE_TLV("ADC1 Volume", TABLA_A_TX_1_2_EN, 5, 3, 0, analog_gain),
860 SOC_SINGLE_TLV("ADC2 Volume", TABLA_A_TX_1_2_EN, 1, 3, 0, analog_gain),
Bhalchandra Gajarecc6ffa02011-07-14 18:35:41 -0700861 SOC_SINGLE_TLV("ADC3 Volume", TABLA_A_TX_3_4_EN, 5, 3, 0, analog_gain),
862 SOC_SINGLE_TLV("ADC4 Volume", TABLA_A_TX_3_4_EN, 1, 3, 0, analog_gain),
Bhalchandra Gajare0d77e1b2011-07-08 10:54:14 -0700863 SOC_SINGLE_TLV("ADC5 Volume", TABLA_A_TX_5_6_EN, 5, 3, 0, analog_gain),
864 SOC_SINGLE_TLV("ADC6 Volume", TABLA_A_TX_5_6_EN, 1, 3, 0, analog_gain),
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -0700865
866 SOC_SINGLE("MICBIAS1 CAPLESS Switch", TABLA_A_MICB_1_CTL, 4, 1, 1),
Santosh Mardi680b41e2011-11-22 16:51:16 -0800867 SOC_SINGLE("MICBIAS2 CAPLESS Switch", TABLA_A_MICB_2_CTL, 4, 1, 1),
Bhalchandra Gajarecc6ffa02011-07-14 18:35:41 -0700868 SOC_SINGLE("MICBIAS3 CAPLESS Switch", TABLA_A_MICB_3_CTL, 4, 1, 1),
Bradley Rubina7096d02011-08-03 18:29:02 -0700869
870 SOC_SINGLE_EXT("ANC Slot", SND_SOC_NOPM, 0, 0, 100, tabla_get_anc_slot,
871 tabla_put_anc_slot),
Santosh Mardi024010f2011-10-18 06:27:21 +0530872 SOC_ENUM("TX1 HPF cut off", cf_dec1_enum),
873 SOC_ENUM("TX2 HPF cut off", cf_dec2_enum),
874 SOC_ENUM("TX3 HPF cut off", cf_dec3_enum),
875 SOC_ENUM("TX4 HPF cut off", cf_dec4_enum),
876 SOC_ENUM("TX5 HPF cut off", cf_dec5_enum),
877 SOC_ENUM("TX6 HPF cut off", cf_dec6_enum),
878 SOC_ENUM("TX7 HPF cut off", cf_dec7_enum),
879 SOC_ENUM("TX8 HPF cut off", cf_dec8_enum),
880 SOC_ENUM("TX9 HPF cut off", cf_dec9_enum),
881 SOC_ENUM("TX10 HPF cut off", cf_dec10_enum),
882
883 SOC_SINGLE("TX1 HPF Switch", TABLA_A_CDC_TX1_MUX_CTL, 3, 1, 0),
884 SOC_SINGLE("TX2 HPF Switch", TABLA_A_CDC_TX2_MUX_CTL, 3, 1, 0),
885 SOC_SINGLE("TX3 HPF Switch", TABLA_A_CDC_TX3_MUX_CTL, 3, 1, 0),
886 SOC_SINGLE("TX4 HPF Switch", TABLA_A_CDC_TX4_MUX_CTL, 3, 1, 0),
887 SOC_SINGLE("TX5 HPF Switch", TABLA_A_CDC_TX5_MUX_CTL, 3, 1, 0),
888 SOC_SINGLE("TX6 HPF Switch", TABLA_A_CDC_TX6_MUX_CTL, 3, 1, 0),
889 SOC_SINGLE("TX7 HPF Switch", TABLA_A_CDC_TX7_MUX_CTL, 3, 1, 0),
890 SOC_SINGLE("TX8 HPF Switch", TABLA_A_CDC_TX8_MUX_CTL, 3, 1, 0),
891 SOC_SINGLE("TX9 HPF Switch", TABLA_A_CDC_TX9_MUX_CTL, 3, 1, 0),
892 SOC_SINGLE("TX10 HPF Switch", TABLA_A_CDC_TX10_MUX_CTL, 3, 1, 0),
893
894 SOC_SINGLE("RX1 HPF Switch", TABLA_A_CDC_RX1_B5_CTL, 2, 1, 0),
895 SOC_SINGLE("RX2 HPF Switch", TABLA_A_CDC_RX2_B5_CTL, 2, 1, 0),
896 SOC_SINGLE("RX3 HPF Switch", TABLA_A_CDC_RX3_B5_CTL, 2, 1, 0),
897 SOC_SINGLE("RX4 HPF Switch", TABLA_A_CDC_RX4_B5_CTL, 2, 1, 0),
898 SOC_SINGLE("RX5 HPF Switch", TABLA_A_CDC_RX5_B5_CTL, 2, 1, 0),
899 SOC_SINGLE("RX6 HPF Switch", TABLA_A_CDC_RX6_B5_CTL, 2, 1, 0),
900 SOC_SINGLE("RX7 HPF Switch", TABLA_A_CDC_RX7_B5_CTL, 2, 1, 0),
901
902 SOC_ENUM("RX1 HPF cut off", cf_rxmix1_enum),
903 SOC_ENUM("RX2 HPF cut off", cf_rxmix2_enum),
904 SOC_ENUM("RX3 HPF cut off", cf_rxmix3_enum),
905 SOC_ENUM("RX4 HPF cut off", cf_rxmix4_enum),
906 SOC_ENUM("RX5 HPF cut off", cf_rxmix5_enum),
907 SOC_ENUM("RX6 HPF cut off", cf_rxmix6_enum),
908 SOC_ENUM("RX7 HPF cut off", cf_rxmix7_enum),
Ben Romberger1f045a72011-11-04 10:14:57 -0700909
910 SOC_SINGLE_EXT("IIR1 Enable Band1", IIR1, BAND1, 1, 0,
911 tabla_get_iir_enable_audio_mixer, tabla_put_iir_enable_audio_mixer),
912 SOC_SINGLE_EXT("IIR1 Enable Band2", IIR1, BAND2, 1, 0,
913 tabla_get_iir_enable_audio_mixer, tabla_put_iir_enable_audio_mixer),
914 SOC_SINGLE_EXT("IIR1 Enable Band3", IIR1, BAND3, 1, 0,
915 tabla_get_iir_enable_audio_mixer, tabla_put_iir_enable_audio_mixer),
916 SOC_SINGLE_EXT("IIR1 Enable Band4", IIR1, BAND4, 1, 0,
917 tabla_get_iir_enable_audio_mixer, tabla_put_iir_enable_audio_mixer),
918 SOC_SINGLE_EXT("IIR1 Enable Band5", IIR1, BAND5, 1, 0,
919 tabla_get_iir_enable_audio_mixer, tabla_put_iir_enable_audio_mixer),
920 SOC_SINGLE_EXT("IIR2 Enable Band1", IIR2, BAND1, 1, 0,
921 tabla_get_iir_enable_audio_mixer, tabla_put_iir_enable_audio_mixer),
922 SOC_SINGLE_EXT("IIR2 Enable Band2", IIR2, BAND2, 1, 0,
923 tabla_get_iir_enable_audio_mixer, tabla_put_iir_enable_audio_mixer),
924 SOC_SINGLE_EXT("IIR2 Enable Band3", IIR2, BAND3, 1, 0,
925 tabla_get_iir_enable_audio_mixer, tabla_put_iir_enable_audio_mixer),
926 SOC_SINGLE_EXT("IIR2 Enable Band4", IIR2, BAND4, 1, 0,
927 tabla_get_iir_enable_audio_mixer, tabla_put_iir_enable_audio_mixer),
928 SOC_SINGLE_EXT("IIR2 Enable Band5", IIR2, BAND5, 1, 0,
929 tabla_get_iir_enable_audio_mixer, tabla_put_iir_enable_audio_mixer),
930
931 SOC_SINGLE_MULTI_EXT("IIR1 Band1", IIR1, BAND1, 255, 0, 5,
932 tabla_get_iir_band_audio_mixer, tabla_put_iir_band_audio_mixer),
933 SOC_SINGLE_MULTI_EXT("IIR1 Band2", IIR1, BAND2, 255, 0, 5,
934 tabla_get_iir_band_audio_mixer, tabla_put_iir_band_audio_mixer),
935 SOC_SINGLE_MULTI_EXT("IIR1 Band3", IIR1, BAND3, 255, 0, 5,
936 tabla_get_iir_band_audio_mixer, tabla_put_iir_band_audio_mixer),
937 SOC_SINGLE_MULTI_EXT("IIR1 Band4", IIR1, BAND4, 255, 0, 5,
938 tabla_get_iir_band_audio_mixer, tabla_put_iir_band_audio_mixer),
939 SOC_SINGLE_MULTI_EXT("IIR1 Band5", IIR1, BAND5, 255, 0, 5,
940 tabla_get_iir_band_audio_mixer, tabla_put_iir_band_audio_mixer),
941 SOC_SINGLE_MULTI_EXT("IIR2 Band1", IIR2, BAND1, 255, 0, 5,
942 tabla_get_iir_band_audio_mixer, tabla_put_iir_band_audio_mixer),
943 SOC_SINGLE_MULTI_EXT("IIR2 Band2", IIR2, BAND2, 255, 0, 5,
944 tabla_get_iir_band_audio_mixer, tabla_put_iir_band_audio_mixer),
945 SOC_SINGLE_MULTI_EXT("IIR2 Band3", IIR2, BAND3, 255, 0, 5,
946 tabla_get_iir_band_audio_mixer, tabla_put_iir_band_audio_mixer),
947 SOC_SINGLE_MULTI_EXT("IIR2 Band4", IIR2, BAND4, 255, 0, 5,
948 tabla_get_iir_band_audio_mixer, tabla_put_iir_band_audio_mixer),
949 SOC_SINGLE_MULTI_EXT("IIR2 Band5", IIR2, BAND5, 255, 0, 5,
950 tabla_get_iir_band_audio_mixer, tabla_put_iir_band_audio_mixer),
Kuirong Wang0f8ade32012-02-27 16:29:45 -0800951 SOC_SINGLE_EXT("COMP1 Switch", SND_SOC_NOPM, 1, COMPANDER_1, 0,
952 tabla_get_compander, tabla_set_compander),
953 SOC_SINGLE_EXT("COMP2 Switch", SND_SOC_NOPM, 0, COMPANDER_2, 0,
954 tabla_get_compander, tabla_set_compander),
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -0700955};
956
Joonwoo Park6c1ebb62012-01-16 19:08:43 -0800957static const struct snd_kcontrol_new tabla_1_x_snd_controls[] = {
958 SOC_SINGLE("MICBIAS4 CAPLESS Switch", TABLA_1_A_MICB_4_CTL, 4, 1, 1),
959};
960
961static const struct snd_kcontrol_new tabla_2_higher_snd_controls[] = {
962 SOC_SINGLE("MICBIAS4 CAPLESS Switch", TABLA_2_A_MICB_4_CTL, 4, 1, 1),
963};
964
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -0700965static const char *rx_mix1_text[] = {
966 "ZERO", "SRC1", "SRC2", "IIR1", "IIR2", "RX1", "RX2", "RX3", "RX4",
967 "RX5", "RX6", "RX7"
968};
969
Kiran Kandi8b3a8302011-09-27 16:13:28 -0700970static const char *rx_dsm_text[] = {
971 "CIC_OUT", "DSM_INV"
972};
973
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -0700974static const char *sb_tx1_mux_text[] = {
975 "ZERO", "RMIX1", "RMIX2", "RMIX3", "RMIX4", "RMIX5", "RMIX6", "RMIX7",
976 "DEC1"
977};
978
979static const char *sb_tx5_mux_text[] = {
980 "ZERO", "RMIX1", "RMIX2", "RMIX3", "RMIX4", "RMIX5", "RMIX6", "RMIX7",
981 "DEC5"
982};
983
984static const char *sb_tx6_mux_text[] = {
985 "ZERO", "RMIX1", "RMIX2", "RMIX3", "RMIX4", "RMIX5", "RMIX6", "RMIX7",
986 "DEC6"
987};
988
989static const char const *sb_tx7_to_tx10_mux_text[] = {
990 "ZERO", "RMIX1", "RMIX2", "RMIX3", "RMIX4", "RMIX5", "RMIX6", "RMIX7",
991 "DEC1", "DEC2", "DEC3", "DEC4", "DEC5", "DEC6", "DEC7", "DEC8",
992 "DEC9", "DEC10"
993};
994
995static const char *dec1_mux_text[] = {
996 "ZERO", "DMIC1", "ADC6",
997};
998
Bhalchandra Gajare0d77e1b2011-07-08 10:54:14 -0700999static const char *dec2_mux_text[] = {
1000 "ZERO", "DMIC2", "ADC5",
1001};
1002
Bhalchandra Gajarecc6ffa02011-07-14 18:35:41 -07001003static const char *dec3_mux_text[] = {
1004 "ZERO", "DMIC3", "ADC4",
1005};
1006
1007static const char *dec4_mux_text[] = {
1008 "ZERO", "DMIC4", "ADC3",
1009};
1010
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07001011static const char *dec5_mux_text[] = {
1012 "ZERO", "DMIC5", "ADC2",
1013};
1014
1015static const char *dec6_mux_text[] = {
1016 "ZERO", "DMIC6", "ADC1",
1017};
1018
1019static const char const *dec7_mux_text[] = {
1020 "ZERO", "DMIC1", "DMIC6", "ADC1", "ADC6", "ANC1_FB", "ANC2_FB",
1021};
1022
Bhalchandra Gajare0d77e1b2011-07-08 10:54:14 -07001023static const char *dec8_mux_text[] = {
1024 "ZERO", "DMIC2", "DMIC5", "ADC2", "ADC5",
1025};
1026
Bhalchandra Gajarecc6ffa02011-07-14 18:35:41 -07001027static const char *dec9_mux_text[] = {
1028 "ZERO", "DMIC4", "DMIC5", "ADC2", "ADC3", "ADCMB", "ANC1_FB", "ANC2_FB",
1029};
1030
1031static const char *dec10_mux_text[] = {
1032 "ZERO", "DMIC3", "DMIC6", "ADC1", "ADC4", "ADCMB", "ANC1_FB", "ANC2_FB",
1033};
1034
Bradley Rubin229c6a52011-07-12 16:18:48 -07001035static const char const *anc_mux_text[] = {
1036 "ZERO", "ADC1", "ADC2", "ADC3", "ADC4", "ADC5", "ADC6", "ADC_MB",
1037 "RSVD_1", "DMIC1", "DMIC2", "DMIC3", "DMIC4", "DMIC5", "DMIC6"
1038};
1039
1040static const char const *anc1_fb_mux_text[] = {
1041 "ZERO", "EAR_HPH_L", "EAR_LINE_1",
1042};
1043
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07001044static const char *iir1_inp1_text[] = {
1045 "ZERO", "DEC1", "DEC2", "DEC3", "DEC4", "DEC5", "DEC6", "DEC7", "DEC8",
1046 "DEC9", "DEC10", "RX1", "RX2", "RX3", "RX4", "RX5", "RX6", "RX7"
1047};
1048
1049static const struct soc_enum rx_mix1_inp1_chain_enum =
1050 SOC_ENUM_SINGLE(TABLA_A_CDC_CONN_RX1_B1_CTL, 0, 12, rx_mix1_text);
1051
Bradley Rubin229c6a52011-07-12 16:18:48 -07001052static const struct soc_enum rx_mix1_inp2_chain_enum =
1053 SOC_ENUM_SINGLE(TABLA_A_CDC_CONN_RX1_B1_CTL, 4, 12, rx_mix1_text);
1054
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07001055static const struct soc_enum rx2_mix1_inp1_chain_enum =
1056 SOC_ENUM_SINGLE(TABLA_A_CDC_CONN_RX2_B1_CTL, 0, 12, rx_mix1_text);
1057
Bradley Rubin229c6a52011-07-12 16:18:48 -07001058static const struct soc_enum rx2_mix1_inp2_chain_enum =
1059 SOC_ENUM_SINGLE(TABLA_A_CDC_CONN_RX2_B1_CTL, 4, 12, rx_mix1_text);
1060
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07001061static const struct soc_enum rx3_mix1_inp1_chain_enum =
1062 SOC_ENUM_SINGLE(TABLA_A_CDC_CONN_RX3_B1_CTL, 0, 12, rx_mix1_text);
1063
Bradley Rubin74a9b4a2011-06-13 15:03:43 -07001064static const struct soc_enum rx3_mix1_inp2_chain_enum =
1065 SOC_ENUM_SINGLE(TABLA_A_CDC_CONN_RX3_B1_CTL, 4, 12, rx_mix1_text);
1066
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07001067static const struct soc_enum rx4_mix1_inp1_chain_enum =
1068 SOC_ENUM_SINGLE(TABLA_A_CDC_CONN_RX4_B1_CTL, 0, 12, rx_mix1_text);
1069
Bradley Rubin74a9b4a2011-06-13 15:03:43 -07001070static const struct soc_enum rx4_mix1_inp2_chain_enum =
1071 SOC_ENUM_SINGLE(TABLA_A_CDC_CONN_RX4_B1_CTL, 4, 12, rx_mix1_text);
1072
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07001073static const struct soc_enum rx5_mix1_inp1_chain_enum =
1074 SOC_ENUM_SINGLE(TABLA_A_CDC_CONN_RX5_B1_CTL, 0, 12, rx_mix1_text);
1075
Bradley Rubin74a9b4a2011-06-13 15:03:43 -07001076static const struct soc_enum rx5_mix1_inp2_chain_enum =
1077 SOC_ENUM_SINGLE(TABLA_A_CDC_CONN_RX5_B1_CTL, 4, 12, rx_mix1_text);
1078
1079static const struct soc_enum rx6_mix1_inp1_chain_enum =
1080 SOC_ENUM_SINGLE(TABLA_A_CDC_CONN_RX6_B1_CTL, 0, 12, rx_mix1_text);
1081
1082static const struct soc_enum rx6_mix1_inp2_chain_enum =
1083 SOC_ENUM_SINGLE(TABLA_A_CDC_CONN_RX6_B1_CTL, 4, 12, rx_mix1_text);
1084
Bhalchandra Gajare0a8ad172011-08-12 13:32:22 -07001085static const struct soc_enum rx7_mix1_inp1_chain_enum =
1086 SOC_ENUM_SINGLE(TABLA_A_CDC_CONN_RX7_B1_CTL, 0, 12, rx_mix1_text);
1087
1088static const struct soc_enum rx7_mix1_inp2_chain_enum =
1089 SOC_ENUM_SINGLE(TABLA_A_CDC_CONN_RX7_B1_CTL, 4, 12, rx_mix1_text);
1090
Kiran Kandi8b3a8302011-09-27 16:13:28 -07001091static const struct soc_enum rx4_dsm_enum =
1092 SOC_ENUM_SINGLE(TABLA_A_CDC_RX4_B6_CTL, 4, 2, rx_dsm_text);
1093
1094static const struct soc_enum rx6_dsm_enum =
1095 SOC_ENUM_SINGLE(TABLA_A_CDC_RX6_B6_CTL, 4, 2, rx_dsm_text);
1096
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07001097static const struct soc_enum sb_tx5_mux_enum =
1098 SOC_ENUM_SINGLE(TABLA_A_CDC_CONN_TX_SB_B5_CTL, 0, 9, sb_tx5_mux_text);
1099
1100static const struct soc_enum sb_tx6_mux_enum =
1101 SOC_ENUM_SINGLE(TABLA_A_CDC_CONN_TX_SB_B6_CTL, 0, 9, sb_tx6_mux_text);
1102
1103static const struct soc_enum sb_tx7_mux_enum =
1104 SOC_ENUM_SINGLE(TABLA_A_CDC_CONN_TX_SB_B7_CTL, 0, 18,
1105 sb_tx7_to_tx10_mux_text);
1106
1107static const struct soc_enum sb_tx8_mux_enum =
1108 SOC_ENUM_SINGLE(TABLA_A_CDC_CONN_TX_SB_B8_CTL, 0, 18,
1109 sb_tx7_to_tx10_mux_text);
1110
Kiran Kandi3426e512011-09-13 22:50:10 -07001111static const struct soc_enum sb_tx9_mux_enum =
1112 SOC_ENUM_SINGLE(TABLA_A_CDC_CONN_TX_SB_B9_CTL, 0, 18,
1113 sb_tx7_to_tx10_mux_text);
1114
1115static const struct soc_enum sb_tx10_mux_enum =
1116 SOC_ENUM_SINGLE(TABLA_A_CDC_CONN_TX_SB_B10_CTL, 0, 18,
1117 sb_tx7_to_tx10_mux_text);
1118
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07001119static const struct soc_enum sb_tx1_mux_enum =
1120 SOC_ENUM_SINGLE(TABLA_A_CDC_CONN_TX_SB_B1_CTL, 0, 9, sb_tx1_mux_text);
1121
1122static const struct soc_enum dec1_mux_enum =
1123 SOC_ENUM_SINGLE(TABLA_A_CDC_CONN_TX_B1_CTL, 0, 3, dec1_mux_text);
1124
Bhalchandra Gajare0d77e1b2011-07-08 10:54:14 -07001125static const struct soc_enum dec2_mux_enum =
1126 SOC_ENUM_SINGLE(TABLA_A_CDC_CONN_TX_B1_CTL, 2, 3, dec2_mux_text);
1127
Bhalchandra Gajarecc6ffa02011-07-14 18:35:41 -07001128static const struct soc_enum dec3_mux_enum =
1129 SOC_ENUM_SINGLE(TABLA_A_CDC_CONN_TX_B1_CTL, 4, 3, dec3_mux_text);
1130
1131static const struct soc_enum dec4_mux_enum =
1132 SOC_ENUM_SINGLE(TABLA_A_CDC_CONN_TX_B1_CTL, 6, 3, dec4_mux_text);
1133
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07001134static const struct soc_enum dec5_mux_enum =
1135 SOC_ENUM_SINGLE(TABLA_A_CDC_CONN_TX_B2_CTL, 0, 3, dec5_mux_text);
1136
1137static const struct soc_enum dec6_mux_enum =
1138 SOC_ENUM_SINGLE(TABLA_A_CDC_CONN_TX_B2_CTL, 2, 3, dec6_mux_text);
1139
1140static const struct soc_enum dec7_mux_enum =
1141 SOC_ENUM_SINGLE(TABLA_A_CDC_CONN_TX_B2_CTL, 4, 7, dec7_mux_text);
1142
Bhalchandra Gajare0d77e1b2011-07-08 10:54:14 -07001143static const struct soc_enum dec8_mux_enum =
1144 SOC_ENUM_SINGLE(TABLA_A_CDC_CONN_TX_B3_CTL, 0, 7, dec8_mux_text);
1145
Bhalchandra Gajarecc6ffa02011-07-14 18:35:41 -07001146static const struct soc_enum dec9_mux_enum =
1147 SOC_ENUM_SINGLE(TABLA_A_CDC_CONN_TX_B3_CTL, 3, 8, dec9_mux_text);
1148
1149static const struct soc_enum dec10_mux_enum =
1150 SOC_ENUM_SINGLE(TABLA_A_CDC_CONN_TX_B4_CTL, 0, 8, dec10_mux_text);
1151
Bradley Rubin229c6a52011-07-12 16:18:48 -07001152static const struct soc_enum anc1_mux_enum =
1153 SOC_ENUM_SINGLE(TABLA_A_CDC_CONN_ANC_B1_CTL, 0, 16, anc_mux_text);
1154
1155static const struct soc_enum anc2_mux_enum =
1156 SOC_ENUM_SINGLE(TABLA_A_CDC_CONN_ANC_B1_CTL, 4, 16, anc_mux_text);
1157
1158static const struct soc_enum anc1_fb_mux_enum =
1159 SOC_ENUM_SINGLE(TABLA_A_CDC_CONN_ANC_B2_CTL, 0, 3, anc1_fb_mux_text);
1160
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07001161static const struct soc_enum iir1_inp1_mux_enum =
1162 SOC_ENUM_SINGLE(TABLA_A_CDC_CONN_EQ1_B1_CTL, 0, 18, iir1_inp1_text);
1163
1164static const struct snd_kcontrol_new rx_mix1_inp1_mux =
1165 SOC_DAPM_ENUM("RX1 MIX1 INP1 Mux", rx_mix1_inp1_chain_enum);
1166
Bradley Rubin229c6a52011-07-12 16:18:48 -07001167static const struct snd_kcontrol_new rx_mix1_inp2_mux =
1168 SOC_DAPM_ENUM("RX1 MIX1 INP2 Mux", rx_mix1_inp2_chain_enum);
1169
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07001170static const struct snd_kcontrol_new rx2_mix1_inp1_mux =
1171 SOC_DAPM_ENUM("RX2 MIX1 INP1 Mux", rx2_mix1_inp1_chain_enum);
1172
Bradley Rubin229c6a52011-07-12 16:18:48 -07001173static const struct snd_kcontrol_new rx2_mix1_inp2_mux =
1174 SOC_DAPM_ENUM("RX2 MIX1 INP2 Mux", rx2_mix1_inp2_chain_enum);
1175
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07001176static const struct snd_kcontrol_new rx3_mix1_inp1_mux =
1177 SOC_DAPM_ENUM("RX3 MIX1 INP1 Mux", rx3_mix1_inp1_chain_enum);
1178
Bradley Rubin74a9b4a2011-06-13 15:03:43 -07001179static const struct snd_kcontrol_new rx3_mix1_inp2_mux =
1180 SOC_DAPM_ENUM("RX3 MIX1 INP2 Mux", rx3_mix1_inp2_chain_enum);
1181
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07001182static const struct snd_kcontrol_new rx4_mix1_inp1_mux =
1183 SOC_DAPM_ENUM("RX4 MIX1 INP1 Mux", rx4_mix1_inp1_chain_enum);
1184
Bradley Rubin74a9b4a2011-06-13 15:03:43 -07001185static const struct snd_kcontrol_new rx4_mix1_inp2_mux =
1186 SOC_DAPM_ENUM("RX4 MIX1 INP2 Mux", rx4_mix1_inp2_chain_enum);
1187
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07001188static const struct snd_kcontrol_new rx5_mix1_inp1_mux =
1189 SOC_DAPM_ENUM("RX5 MIX1 INP1 Mux", rx5_mix1_inp1_chain_enum);
1190
Bradley Rubin74a9b4a2011-06-13 15:03:43 -07001191static const struct snd_kcontrol_new rx5_mix1_inp2_mux =
1192 SOC_DAPM_ENUM("RX5 MIX1 INP2 Mux", rx5_mix1_inp2_chain_enum);
1193
1194static const struct snd_kcontrol_new rx6_mix1_inp1_mux =
1195 SOC_DAPM_ENUM("RX6 MIX1 INP1 Mux", rx6_mix1_inp1_chain_enum);
1196
1197static const struct snd_kcontrol_new rx6_mix1_inp2_mux =
1198 SOC_DAPM_ENUM("RX6 MIX1 INP2 Mux", rx6_mix1_inp2_chain_enum);
1199
Bhalchandra Gajare0a8ad172011-08-12 13:32:22 -07001200static const struct snd_kcontrol_new rx7_mix1_inp1_mux =
1201 SOC_DAPM_ENUM("RX7 MIX1 INP1 Mux", rx7_mix1_inp1_chain_enum);
1202
1203static const struct snd_kcontrol_new rx7_mix1_inp2_mux =
1204 SOC_DAPM_ENUM("RX7 MIX1 INP2 Mux", rx7_mix1_inp2_chain_enum);
1205
Kiran Kandi8b3a8302011-09-27 16:13:28 -07001206static const struct snd_kcontrol_new rx4_dsm_mux =
1207 SOC_DAPM_ENUM("RX4 DSM MUX Mux", rx4_dsm_enum);
1208
1209static const struct snd_kcontrol_new rx6_dsm_mux =
1210 SOC_DAPM_ENUM("RX6 DSM MUX Mux", rx6_dsm_enum);
1211
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07001212static const struct snd_kcontrol_new sb_tx5_mux =
1213 SOC_DAPM_ENUM("SLIM TX5 MUX Mux", sb_tx5_mux_enum);
1214
1215static const struct snd_kcontrol_new sb_tx6_mux =
1216 SOC_DAPM_ENUM("SLIM TX6 MUX Mux", sb_tx6_mux_enum);
1217
1218static const struct snd_kcontrol_new sb_tx7_mux =
1219 SOC_DAPM_ENUM("SLIM TX7 MUX Mux", sb_tx7_mux_enum);
1220
1221static const struct snd_kcontrol_new sb_tx8_mux =
1222 SOC_DAPM_ENUM("SLIM TX8 MUX Mux", sb_tx8_mux_enum);
1223
Kiran Kandi3426e512011-09-13 22:50:10 -07001224static const struct snd_kcontrol_new sb_tx9_mux =
1225 SOC_DAPM_ENUM("SLIM TX9 MUX Mux", sb_tx9_mux_enum);
1226
1227static const struct snd_kcontrol_new sb_tx10_mux =
1228 SOC_DAPM_ENUM("SLIM TX10 MUX Mux", sb_tx10_mux_enum);
1229
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07001230static const struct snd_kcontrol_new sb_tx1_mux =
1231 SOC_DAPM_ENUM("SLIM TX1 MUX Mux", sb_tx1_mux_enum);
1232
1233static const struct snd_kcontrol_new dec1_mux =
1234 SOC_DAPM_ENUM("DEC1 MUX Mux", dec1_mux_enum);
1235
Bhalchandra Gajare0d77e1b2011-07-08 10:54:14 -07001236static const struct snd_kcontrol_new dec2_mux =
1237 SOC_DAPM_ENUM("DEC2 MUX Mux", dec2_mux_enum);
1238
Bhalchandra Gajarecc6ffa02011-07-14 18:35:41 -07001239static const struct snd_kcontrol_new dec3_mux =
1240 SOC_DAPM_ENUM("DEC3 MUX Mux", dec3_mux_enum);
1241
1242static const struct snd_kcontrol_new dec4_mux =
1243 SOC_DAPM_ENUM("DEC4 MUX Mux", dec4_mux_enum);
1244
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07001245static const struct snd_kcontrol_new dec5_mux =
1246 SOC_DAPM_ENUM("DEC5 MUX Mux", dec5_mux_enum);
1247
1248static const struct snd_kcontrol_new dec6_mux =
1249 SOC_DAPM_ENUM("DEC6 MUX Mux", dec6_mux_enum);
1250
1251static const struct snd_kcontrol_new dec7_mux =
1252 SOC_DAPM_ENUM("DEC7 MUX Mux", dec7_mux_enum);
1253
Bradley Rubin229c6a52011-07-12 16:18:48 -07001254static const struct snd_kcontrol_new anc1_mux =
1255 SOC_DAPM_ENUM("ANC1 MUX Mux", anc1_mux_enum);
Bhalchandra Gajare0d77e1b2011-07-08 10:54:14 -07001256static const struct snd_kcontrol_new dec8_mux =
1257 SOC_DAPM_ENUM("DEC8 MUX Mux", dec8_mux_enum);
1258
Bhalchandra Gajarecc6ffa02011-07-14 18:35:41 -07001259static const struct snd_kcontrol_new dec9_mux =
1260 SOC_DAPM_ENUM("DEC9 MUX Mux", dec9_mux_enum);
1261
1262static const struct snd_kcontrol_new dec10_mux =
1263 SOC_DAPM_ENUM("DEC10 MUX Mux", dec10_mux_enum);
1264
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07001265static const struct snd_kcontrol_new iir1_inp1_mux =
1266 SOC_DAPM_ENUM("IIR1 INP1 Mux", iir1_inp1_mux_enum);
1267
Bradley Rubin229c6a52011-07-12 16:18:48 -07001268static const struct snd_kcontrol_new anc2_mux =
1269 SOC_DAPM_ENUM("ANC2 MUX Mux", anc2_mux_enum);
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07001270
Bradley Rubin229c6a52011-07-12 16:18:48 -07001271static const struct snd_kcontrol_new anc1_fb_mux =
1272 SOC_DAPM_ENUM("ANC1 FB MUX Mux", anc1_fb_mux_enum);
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07001273
Bradley Rubin229c6a52011-07-12 16:18:48 -07001274static const struct snd_kcontrol_new dac1_switch[] = {
1275 SOC_DAPM_SINGLE("Switch", TABLA_A_RX_EAR_EN, 5, 1, 0)
1276};
1277static const struct snd_kcontrol_new hphl_switch[] = {
1278 SOC_DAPM_SINGLE("Switch", TABLA_A_RX_HPH_L_DAC_CTL, 6, 1, 0)
1279};
Kiran Kandi8b3a8302011-09-27 16:13:28 -07001280
1281static const struct snd_kcontrol_new lineout3_ground_switch =
1282 SOC_DAPM_SINGLE("Switch", TABLA_A_RX_LINE_3_DAC_CTL, 6, 1, 0);
1283
1284static const struct snd_kcontrol_new lineout4_ground_switch =
1285 SOC_DAPM_SINGLE("Switch", TABLA_A_RX_LINE_4_DAC_CTL, 6, 1, 0);
Bradley Rubin74a9b4a2011-06-13 15:03:43 -07001286
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07001287static void tabla_codec_enable_adc_block(struct snd_soc_codec *codec,
1288 int enable)
1289{
1290 struct tabla_priv *tabla = snd_soc_codec_get_drvdata(codec);
1291
1292 pr_debug("%s %d\n", __func__, enable);
1293
1294 if (enable) {
1295 tabla->adc_count++;
1296 snd_soc_update_bits(codec, TABLA_A_TX_COM_BIAS, 0xE0, 0xE0);
1297 snd_soc_update_bits(codec, TABLA_A_CDC_CLK_OTHR_CTL, 0x2, 0x2);
1298 } else {
1299 tabla->adc_count--;
1300 if (!tabla->adc_count) {
1301 snd_soc_update_bits(codec, TABLA_A_CDC_CLK_OTHR_CTL,
1302 0x2, 0x0);
1303 if (!tabla->mbhc_polling_active)
1304 snd_soc_update_bits(codec, TABLA_A_TX_COM_BIAS,
1305 0xE0, 0x0);
1306 }
1307 }
1308}
1309
1310static int tabla_codec_enable_adc(struct snd_soc_dapm_widget *w,
1311 struct snd_kcontrol *kcontrol, int event)
1312{
1313 struct snd_soc_codec *codec = w->codec;
1314 u16 adc_reg;
Kiran Kandi9a2c62a82011-12-07 13:13:26 -08001315 u8 init_bit_shift;
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07001316
1317 pr_debug("%s %d\n", __func__, event);
1318
1319 if (w->reg == TABLA_A_TX_1_2_EN)
1320 adc_reg = TABLA_A_TX_1_2_TEST_CTL;
1321 else if (w->reg == TABLA_A_TX_3_4_EN)
1322 adc_reg = TABLA_A_TX_3_4_TEST_CTL;
1323 else if (w->reg == TABLA_A_TX_5_6_EN)
1324 adc_reg = TABLA_A_TX_5_6_TEST_CTL;
1325 else {
1326 pr_err("%s: Error, invalid adc register\n", __func__);
1327 return -EINVAL;
1328 }
1329
Kiran Kandi9a2c62a82011-12-07 13:13:26 -08001330 if (w->shift == 3)
1331 init_bit_shift = 6;
1332 else if (w->shift == 7)
1333 init_bit_shift = 7;
1334 else {
1335 pr_err("%s: Error, invalid init bit postion adc register\n",
1336 __func__);
1337 return -EINVAL;
1338 }
1339
1340
1341
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07001342 switch (event) {
1343 case SND_SOC_DAPM_PRE_PMU:
1344 tabla_codec_enable_adc_block(codec, 1);
Kiran Kandi9a2c62a82011-12-07 13:13:26 -08001345 snd_soc_update_bits(codec, adc_reg, 1 << init_bit_shift,
1346 1 << init_bit_shift);
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07001347 break;
1348 case SND_SOC_DAPM_POST_PMU:
Kiran Kandi9a2c62a82011-12-07 13:13:26 -08001349
1350 snd_soc_update_bits(codec, adc_reg, 1 << init_bit_shift, 0x00);
1351
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07001352 break;
1353 case SND_SOC_DAPM_POST_PMD:
1354 tabla_codec_enable_adc_block(codec, 0);
1355 break;
1356 }
1357 return 0;
1358}
1359
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07001360static int tabla_codec_enable_lineout(struct snd_soc_dapm_widget *w,
1361 struct snd_kcontrol *kcontrol, int event)
1362{
1363 struct snd_soc_codec *codec = w->codec;
1364 u16 lineout_gain_reg;
1365
Kiran Kandidb0a4b02011-08-23 09:32:09 -07001366 pr_debug("%s %d %s\n", __func__, event, w->name);
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07001367
1368 switch (w->shift) {
1369 case 0:
1370 lineout_gain_reg = TABLA_A_RX_LINE_1_GAIN;
1371 break;
1372 case 1:
1373 lineout_gain_reg = TABLA_A_RX_LINE_2_GAIN;
1374 break;
1375 case 2:
1376 lineout_gain_reg = TABLA_A_RX_LINE_3_GAIN;
1377 break;
1378 case 3:
1379 lineout_gain_reg = TABLA_A_RX_LINE_4_GAIN;
1380 break;
1381 case 4:
1382 lineout_gain_reg = TABLA_A_RX_LINE_5_GAIN;
1383 break;
1384 default:
1385 pr_err("%s: Error, incorrect lineout register value\n",
1386 __func__);
1387 return -EINVAL;
1388 }
1389
1390 switch (event) {
1391 case SND_SOC_DAPM_PRE_PMU:
1392 snd_soc_update_bits(codec, lineout_gain_reg, 0x40, 0x40);
1393 break;
1394 case SND_SOC_DAPM_POST_PMU:
Krishnankutty Kolathappilly31169f42011-11-17 10:33:11 -08001395 pr_debug("%s: sleeping 16 ms after %s PA turn on\n",
Kiran Kandidb0a4b02011-08-23 09:32:09 -07001396 __func__, w->name);
Krishnankutty Kolathappilly31169f42011-11-17 10:33:11 -08001397 usleep_range(16000, 16000);
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07001398 break;
1399 case SND_SOC_DAPM_POST_PMD:
1400 snd_soc_update_bits(codec, lineout_gain_reg, 0x40, 0x00);
1401 break;
1402 }
1403 return 0;
1404}
1405
Kiran Kandicf45f6a2011-07-17 21:10:19 -07001406
1407static int tabla_codec_enable_dmic(struct snd_soc_dapm_widget *w,
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07001408 struct snd_kcontrol *kcontrol, int event)
1409{
1410 struct snd_soc_codec *codec = w->codec;
Kiran Kandicf45f6a2011-07-17 21:10:19 -07001411 u16 tx_mux_ctl_reg, tx_dmic_ctl_reg;
1412 u8 dmic_clk_sel, dmic_clk_en;
Bhalchandra Gajare7cf018e2011-08-11 18:58:32 -07001413 unsigned int dmic;
1414 int ret;
Kiran Kandicf45f6a2011-07-17 21:10:19 -07001415
Bhalchandra Gajare7cf018e2011-08-11 18:58:32 -07001416 ret = kstrtouint(strpbrk(w->name, "123456"), 10, &dmic);
1417 if (ret < 0) {
1418 pr_err("%s: Invalid DMIC line on the codec\n", __func__);
Kiran Kandicf45f6a2011-07-17 21:10:19 -07001419 return -EINVAL;
1420 }
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07001421
Bhalchandra Gajare7cf018e2011-08-11 18:58:32 -07001422 switch (dmic) {
1423 case 1:
1424 case 2:
1425 dmic_clk_sel = 0x02;
1426 dmic_clk_en = 0x01;
1427 break;
1428
1429 case 3:
1430 case 4:
1431 dmic_clk_sel = 0x08;
1432 dmic_clk_en = 0x04;
1433 break;
1434
1435 case 5:
1436 case 6:
1437 dmic_clk_sel = 0x20;
1438 dmic_clk_en = 0x10;
1439 break;
1440
1441 default:
1442 pr_err("%s: Invalid DMIC Selection\n", __func__);
1443 return -EINVAL;
1444 }
1445
1446 tx_mux_ctl_reg = TABLA_A_CDC_TX1_MUX_CTL + 8 * (dmic - 1);
1447 tx_dmic_ctl_reg = TABLA_A_CDC_TX1_DMIC_CTL + 8 * (dmic - 1);
1448
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07001449 pr_debug("%s %d\n", __func__, event);
Kiran Kandicf45f6a2011-07-17 21:10:19 -07001450
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07001451 switch (event) {
1452 case SND_SOC_DAPM_PRE_PMU:
Kiran Kandicf45f6a2011-07-17 21:10:19 -07001453 snd_soc_update_bits(codec, tx_mux_ctl_reg, 0x1, 0x1);
1454
1455 snd_soc_update_bits(codec, TABLA_A_CDC_CLK_DMIC_CTL,
1456 dmic_clk_sel, dmic_clk_sel);
1457
1458 snd_soc_update_bits(codec, tx_dmic_ctl_reg, 0x1, 0x1);
1459
1460 snd_soc_update_bits(codec, TABLA_A_CDC_CLK_DMIC_CTL,
1461 dmic_clk_en, dmic_clk_en);
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07001462 break;
1463 case SND_SOC_DAPM_POST_PMD:
Kiran Kandicf45f6a2011-07-17 21:10:19 -07001464 snd_soc_update_bits(codec, TABLA_A_CDC_CLK_DMIC_CTL,
1465 dmic_clk_en, 0);
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07001466 break;
1467 }
1468 return 0;
1469}
1470
Bradley Rubin229c6a52011-07-12 16:18:48 -07001471static int tabla_codec_enable_anc(struct snd_soc_dapm_widget *w,
1472 struct snd_kcontrol *kcontrol, int event)
1473{
1474 struct snd_soc_codec *codec = w->codec;
1475 const char *filename;
1476 const struct firmware *fw;
1477 int i;
1478 int ret;
Bradley Rubina7096d02011-08-03 18:29:02 -07001479 int num_anc_slots;
1480 struct anc_header *anc_head;
Bradley Rubin229c6a52011-07-12 16:18:48 -07001481 struct tabla_priv *tabla = snd_soc_codec_get_drvdata(codec);
Bradley Rubina7096d02011-08-03 18:29:02 -07001482 u32 anc_writes_size = 0;
1483 int anc_size_remaining;
1484 u32 *anc_ptr;
Bradley Rubin229c6a52011-07-12 16:18:48 -07001485 u16 reg;
1486 u8 mask, val, old_val;
1487
1488 pr_debug("%s %d\n", __func__, event);
1489 switch (event) {
1490 case SND_SOC_DAPM_PRE_PMU:
1491
Bradley Rubin4283a4c2011-07-29 16:18:54 -07001492 filename = "wcd9310/wcd9310_anc.bin";
Bradley Rubin229c6a52011-07-12 16:18:48 -07001493
1494 ret = request_firmware(&fw, filename, codec->dev);
1495 if (ret != 0) {
1496 dev_err(codec->dev, "Failed to acquire ANC data: %d\n",
1497 ret);
1498 return -ENODEV;
1499 }
1500
Bradley Rubina7096d02011-08-03 18:29:02 -07001501 if (fw->size < sizeof(struct anc_header)) {
Bradley Rubin229c6a52011-07-12 16:18:48 -07001502 dev_err(codec->dev, "Not enough data\n");
1503 release_firmware(fw);
1504 return -ENOMEM;
1505 }
1506
1507 /* First number is the number of register writes */
Bradley Rubina7096d02011-08-03 18:29:02 -07001508 anc_head = (struct anc_header *)(fw->data);
1509 anc_ptr = (u32 *)((u32)fw->data + sizeof(struct anc_header));
1510 anc_size_remaining = fw->size - sizeof(struct anc_header);
1511 num_anc_slots = anc_head->num_anc_slots;
Bradley Rubin229c6a52011-07-12 16:18:48 -07001512
Bradley Rubina7096d02011-08-03 18:29:02 -07001513 if (tabla->anc_slot >= num_anc_slots) {
1514 dev_err(codec->dev, "Invalid ANC slot selected\n");
1515 release_firmware(fw);
1516 return -EINVAL;
1517 }
1518
1519 for (i = 0; i < num_anc_slots; i++) {
1520
1521 if (anc_size_remaining < TABLA_PACKED_REG_SIZE) {
1522 dev_err(codec->dev, "Invalid register format\n");
1523 release_firmware(fw);
1524 return -EINVAL;
1525 }
1526 anc_writes_size = (u32)(*anc_ptr);
1527 anc_size_remaining -= sizeof(u32);
1528 anc_ptr += 1;
1529
1530 if (anc_writes_size * TABLA_PACKED_REG_SIZE
1531 > anc_size_remaining) {
1532 dev_err(codec->dev, "Invalid register format\n");
1533 release_firmware(fw);
1534 return -ENOMEM;
1535 }
1536
1537 if (tabla->anc_slot == i)
1538 break;
1539
1540 anc_size_remaining -= (anc_writes_size *
1541 TABLA_PACKED_REG_SIZE);
Bradley Rubin939ff3f2011-08-26 17:19:34 -07001542 anc_ptr += anc_writes_size;
Bradley Rubina7096d02011-08-03 18:29:02 -07001543 }
1544 if (i == num_anc_slots) {
1545 dev_err(codec->dev, "Selected ANC slot not present\n");
Bradley Rubin229c6a52011-07-12 16:18:48 -07001546 release_firmware(fw);
1547 return -ENOMEM;
1548 }
1549
Bradley Rubina7096d02011-08-03 18:29:02 -07001550 for (i = 0; i < anc_writes_size; i++) {
1551 TABLA_CODEC_UNPACK_ENTRY(anc_ptr[i], reg,
Bradley Rubin229c6a52011-07-12 16:18:48 -07001552 mask, val);
1553 old_val = snd_soc_read(codec, reg);
Bradley Rubin4283a4c2011-07-29 16:18:54 -07001554 snd_soc_write(codec, reg, (old_val & ~mask) |
1555 (val & mask));
Bradley Rubin229c6a52011-07-12 16:18:48 -07001556 }
1557 release_firmware(fw);
Bradley Rubin229c6a52011-07-12 16:18:48 -07001558
1559 break;
1560 case SND_SOC_DAPM_POST_PMD:
1561 snd_soc_write(codec, TABLA_A_CDC_CLK_ANC_RESET_CTL, 0xFF);
1562 snd_soc_write(codec, TABLA_A_CDC_CLK_ANC_CLK_EN_CTL, 0);
1563 break;
1564 }
1565 return 0;
1566}
1567
1568
Bradley Rubincb3950a2011-08-18 13:07:26 -07001569static void tabla_codec_disable_button_presses(struct snd_soc_codec *codec)
1570{
1571 snd_soc_write(codec, TABLA_A_CDC_MBHC_VOLT_B4_CTL, 0x80);
1572 snd_soc_write(codec, TABLA_A_CDC_MBHC_VOLT_B3_CTL, 0x00);
1573}
1574
Bradley Rubin4d09cf42011-08-17 17:59:16 -07001575static void tabla_codec_start_hs_polling(struct snd_soc_codec *codec)
1576{
Bradley Rubincb3950a2011-08-18 13:07:26 -07001577 struct tabla_priv *tabla = snd_soc_codec_get_drvdata(codec);
1578
Bradley Rubin4d09cf42011-08-17 17:59:16 -07001579 snd_soc_write(codec, TABLA_A_MBHC_SCALING_MUX_1, 0x84);
Asish Bhattacharyab1aeae22012-02-15 08:29:28 +05301580 wcd9xxx_enable_irq(codec->control_data, TABLA_IRQ_MBHC_REMOVAL);
Bradley Rubincb3950a2011-08-18 13:07:26 -07001581 if (!tabla->no_mic_headset_override) {
Asish Bhattacharyab1aeae22012-02-15 08:29:28 +05301582 wcd9xxx_enable_irq(codec->control_data,
1583 TABLA_IRQ_MBHC_POTENTIAL);
1584 wcd9xxx_enable_irq(codec->control_data,
1585 TABLA_IRQ_MBHC_RELEASE);
Bradley Rubincb3950a2011-08-18 13:07:26 -07001586 } else {
1587 tabla_codec_disable_button_presses(codec);
1588 }
Bradley Rubin4d09cf42011-08-17 17:59:16 -07001589 snd_soc_write(codec, TABLA_A_CDC_MBHC_EN_CTL, 0x1);
1590 snd_soc_update_bits(codec, TABLA_A_CDC_MBHC_CLK_CTL, 0x8, 0x0);
1591 snd_soc_write(codec, TABLA_A_CDC_MBHC_EN_CTL, 0x1);
1592}
1593
1594static void tabla_codec_pause_hs_polling(struct snd_soc_codec *codec)
1595{
Bradley Rubincb3950a2011-08-18 13:07:26 -07001596 struct tabla_priv *tabla = snd_soc_codec_get_drvdata(codec);
1597
Bradley Rubin4d09cf42011-08-17 17:59:16 -07001598 snd_soc_update_bits(codec, TABLA_A_CDC_MBHC_CLK_CTL, 0x8, 0x8);
Asish Bhattacharyab1aeae22012-02-15 08:29:28 +05301599 wcd9xxx_disable_irq(codec->control_data, TABLA_IRQ_MBHC_REMOVAL);
Bradley Rubincb3950a2011-08-18 13:07:26 -07001600 if (!tabla->no_mic_headset_override) {
Asish Bhattacharyab1aeae22012-02-15 08:29:28 +05301601 wcd9xxx_disable_irq(codec->control_data,
Bradley Rubincb3950a2011-08-18 13:07:26 -07001602 TABLA_IRQ_MBHC_POTENTIAL);
Asish Bhattacharyab1aeae22012-02-15 08:29:28 +05301603 wcd9xxx_disable_irq(codec->control_data,
1604 TABLA_IRQ_MBHC_RELEASE);
Bradley Rubincb3950a2011-08-18 13:07:26 -07001605 }
Bradley Rubin4d09cf42011-08-17 17:59:16 -07001606}
1607
Bhalchandra Gajare19d9c132011-11-18 14:57:08 -08001608static void tabla_codec_switch_cfilt_mode(struct snd_soc_codec *codec,
1609 int mode)
1610{
1611 struct tabla_priv *tabla = snd_soc_codec_get_drvdata(codec);
1612 u8 reg_mode_val, cur_mode_val;
1613 bool mbhc_was_polling = false;
1614
1615 if (mode)
1616 reg_mode_val = TABLA_CFILT_FAST_MODE;
1617 else
1618 reg_mode_val = TABLA_CFILT_SLOW_MODE;
1619
1620 cur_mode_val = snd_soc_read(codec,
1621 tabla->mbhc_bias_regs.cfilt_ctl) & 0x40;
1622
1623 if (cur_mode_val != reg_mode_val) {
1624 if (tabla->mbhc_polling_active) {
1625 tabla_codec_pause_hs_polling(codec);
1626 mbhc_was_polling = true;
1627 }
1628 snd_soc_update_bits(codec,
1629 tabla->mbhc_bias_regs.cfilt_ctl, 0x40, reg_mode_val);
1630 if (mbhc_was_polling)
1631 tabla_codec_start_hs_polling(codec);
1632 pr_debug("%s: CFILT mode change (%x to %x)\n", __func__,
1633 cur_mode_val, reg_mode_val);
1634 } else {
1635 pr_debug("%s: CFILT Value is already %x\n",
1636 __func__, cur_mode_val);
1637 }
1638}
1639
1640static void tabla_codec_update_cfilt_usage(struct snd_soc_codec *codec,
1641 u8 cfilt_sel, int inc)
1642{
1643 struct tabla_priv *tabla = snd_soc_codec_get_drvdata(codec);
1644 u32 *cfilt_cnt_ptr = NULL;
1645 u16 micb_cfilt_reg;
1646
1647 switch (cfilt_sel) {
1648 case TABLA_CFILT1_SEL:
1649 cfilt_cnt_ptr = &tabla->cfilt1_cnt;
1650 micb_cfilt_reg = TABLA_A_MICB_CFILT_1_CTL;
1651 break;
1652 case TABLA_CFILT2_SEL:
1653 cfilt_cnt_ptr = &tabla->cfilt2_cnt;
1654 micb_cfilt_reg = TABLA_A_MICB_CFILT_2_CTL;
1655 break;
1656 case TABLA_CFILT3_SEL:
1657 cfilt_cnt_ptr = &tabla->cfilt3_cnt;
1658 micb_cfilt_reg = TABLA_A_MICB_CFILT_3_CTL;
1659 break;
1660 default:
1661 return; /* should not happen */
1662 }
1663
1664 if (inc) {
1665 if (!(*cfilt_cnt_ptr)++) {
1666 /* Switch CFILT to slow mode if MBHC CFILT being used */
1667 if (cfilt_sel == tabla->mbhc_bias_regs.cfilt_sel)
1668 tabla_codec_switch_cfilt_mode(codec, 0);
1669
1670 snd_soc_update_bits(codec, micb_cfilt_reg, 0x80, 0x80);
1671 }
1672 } else {
1673 /* check if count not zero, decrement
1674 * then check if zero, go ahead disable cfilter
1675 */
1676 if ((*cfilt_cnt_ptr) && !--(*cfilt_cnt_ptr)) {
1677 snd_soc_update_bits(codec, micb_cfilt_reg, 0x80, 0);
1678
1679 /* Switch CFILT to fast mode if MBHC CFILT being used */
1680 if (cfilt_sel == tabla->mbhc_bias_regs.cfilt_sel)
1681 tabla_codec_switch_cfilt_mode(codec, 1);
1682 }
1683 }
1684}
1685
Bhalchandra Gajared9ebb6c2011-10-03 19:54:41 -07001686static int tabla_find_k_value(unsigned int ldoh_v, unsigned int cfilt_mv)
1687{
1688 int rc = -EINVAL;
1689 unsigned min_mv, max_mv;
1690
1691 switch (ldoh_v) {
1692 case TABLA_LDOH_1P95_V:
1693 min_mv = 160;
1694 max_mv = 1800;
1695 break;
1696 case TABLA_LDOH_2P35_V:
1697 min_mv = 200;
1698 max_mv = 2200;
1699 break;
1700 case TABLA_LDOH_2P75_V:
1701 min_mv = 240;
1702 max_mv = 2600;
1703 break;
1704 case TABLA_LDOH_2P85_V:
1705 min_mv = 250;
1706 max_mv = 2700;
1707 break;
1708 default:
1709 goto done;
1710 }
1711
1712 if (cfilt_mv < min_mv || cfilt_mv > max_mv)
1713 goto done;
1714
1715 for (rc = 4; rc <= 44; rc++) {
1716 min_mv = max_mv * (rc) / 44;
1717 if (min_mv >= cfilt_mv) {
1718 rc -= 4;
1719 break;
1720 }
1721 }
1722done:
1723 return rc;
1724}
1725
1726static bool tabla_is_hph_pa_on(struct snd_soc_codec *codec)
1727{
1728 u8 hph_reg_val = 0;
1729 hph_reg_val = snd_soc_read(codec, TABLA_A_RX_HPH_CNP_EN);
1730
1731 return (hph_reg_val & 0x30) ? true : false;
1732}
1733
Joonwoo Parka9444452011-12-08 18:48:27 -08001734static bool tabla_is_hph_dac_on(struct snd_soc_codec *codec, int left)
1735{
1736 u8 hph_reg_val = 0;
1737 if (left)
1738 hph_reg_val = snd_soc_read(codec,
1739 TABLA_A_RX_HPH_L_DAC_CTL);
1740 else
1741 hph_reg_val = snd_soc_read(codec,
1742 TABLA_A_RX_HPH_R_DAC_CTL);
1743
1744 return (hph_reg_val & 0xC0) ? true : false;
1745}
1746
Bhalchandra Gajared9ebb6c2011-10-03 19:54:41 -07001747static void tabla_codec_switch_micbias(struct snd_soc_codec *codec,
1748 int vddio_switch)
1749{
1750 struct tabla_priv *tabla = snd_soc_codec_get_drvdata(codec);
1751 int cfilt_k_val;
Bhalchandra Gajarec1e19c42011-11-18 11:22:56 -08001752 bool mbhc_was_polling = false;
Bhalchandra Gajared9ebb6c2011-10-03 19:54:41 -07001753
1754 switch (vddio_switch) {
1755 case 1:
1756 if (tabla->mbhc_polling_active) {
Bhalchandra Gajarec1e19c42011-11-18 11:22:56 -08001757
1758 tabla_codec_pause_hs_polling(codec);
Joonwoo Park0976d012011-12-22 11:48:18 -08001759 /* VDDIO switch enabled */
Bhalchandra Gajared9ebb6c2011-10-03 19:54:41 -07001760 tabla->cfilt_k_value = snd_soc_read(codec,
1761 tabla->mbhc_bias_regs.cfilt_val);
1762 cfilt_k_val = tabla_find_k_value(
1763 tabla->pdata->micbias.ldoh_v, 1800);
1764 snd_soc_update_bits(codec,
1765 tabla->mbhc_bias_regs.cfilt_val,
1766 0xFC, (cfilt_k_val << 2));
1767
1768 snd_soc_update_bits(codec,
1769 tabla->mbhc_bias_regs.mbhc_reg, 0x80, 0x80);
1770 snd_soc_update_bits(codec,
1771 tabla->mbhc_bias_regs.mbhc_reg, 0x10, 0x00);
Bhalchandra Gajarec1e19c42011-11-18 11:22:56 -08001772 tabla_codec_start_hs_polling(codec);
Bhalchandra Gajared9ebb6c2011-10-03 19:54:41 -07001773
1774 tabla->mbhc_micbias_switched = true;
Joonwoo Park0976d012011-12-22 11:48:18 -08001775 pr_debug("%s: VDDIO switch enabled\n", __func__);
Bhalchandra Gajared9ebb6c2011-10-03 19:54:41 -07001776 }
1777 break;
1778
1779 case 0:
1780 if (tabla->mbhc_micbias_switched) {
Bhalchandra Gajarec1e19c42011-11-18 11:22:56 -08001781 if (tabla->mbhc_polling_active) {
1782 tabla_codec_pause_hs_polling(codec);
1783 mbhc_was_polling = true;
1784 }
Joonwoo Park0976d012011-12-22 11:48:18 -08001785 /* VDDIO switch disabled */
Bhalchandra Gajared9ebb6c2011-10-03 19:54:41 -07001786 if (tabla->cfilt_k_value != 0)
1787 snd_soc_update_bits(codec,
1788 tabla->mbhc_bias_regs.cfilt_val, 0XFC,
1789 tabla->cfilt_k_value);
1790 snd_soc_update_bits(codec,
1791 tabla->mbhc_bias_regs.mbhc_reg, 0x80, 0x00);
1792 snd_soc_update_bits(codec,
1793 tabla->mbhc_bias_regs.mbhc_reg, 0x10, 0x00);
1794
Bhalchandra Gajarec1e19c42011-11-18 11:22:56 -08001795 if (mbhc_was_polling)
1796 tabla_codec_start_hs_polling(codec);
1797
Bhalchandra Gajared9ebb6c2011-10-03 19:54:41 -07001798 tabla->mbhc_micbias_switched = false;
Joonwoo Park0976d012011-12-22 11:48:18 -08001799 pr_debug("%s: VDDIO switch disabled\n", __func__);
Bhalchandra Gajared9ebb6c2011-10-03 19:54:41 -07001800 }
1801 break;
1802 }
1803}
1804
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07001805static int tabla_codec_enable_micbias(struct snd_soc_dapm_widget *w,
1806 struct snd_kcontrol *kcontrol, int event)
1807{
1808 struct snd_soc_codec *codec = w->codec;
Patrick Lai3043fba2011-08-01 14:15:57 -07001809 struct tabla_priv *tabla = snd_soc_codec_get_drvdata(codec);
1810 u16 micb_int_reg;
Bradley Rubin4d09cf42011-08-17 17:59:16 -07001811 int micb_line;
Bhalchandra Gajarecc6ffa02011-07-14 18:35:41 -07001812 u8 cfilt_sel_val = 0;
Bradley Rubin229c6a52011-07-12 16:18:48 -07001813 char *internal1_text = "Internal1";
1814 char *internal2_text = "Internal2";
1815 char *internal3_text = "Internal3";
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07001816
1817 pr_debug("%s %d\n", __func__, event);
1818 switch (w->reg) {
1819 case TABLA_A_MICB_1_CTL:
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07001820 micb_int_reg = TABLA_A_MICB_1_INT_RBIAS;
Patrick Lai3043fba2011-08-01 14:15:57 -07001821 cfilt_sel_val = tabla->pdata->micbias.bias1_cfilt_sel;
Bradley Rubin4d09cf42011-08-17 17:59:16 -07001822 micb_line = TABLA_MICBIAS1;
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07001823 break;
1824 case TABLA_A_MICB_2_CTL:
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07001825 micb_int_reg = TABLA_A_MICB_2_INT_RBIAS;
Patrick Lai3043fba2011-08-01 14:15:57 -07001826 cfilt_sel_val = tabla->pdata->micbias.bias2_cfilt_sel;
Bradley Rubin4d09cf42011-08-17 17:59:16 -07001827 micb_line = TABLA_MICBIAS2;
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07001828 break;
1829 case TABLA_A_MICB_3_CTL:
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07001830 micb_int_reg = TABLA_A_MICB_3_INT_RBIAS;
Patrick Lai3043fba2011-08-01 14:15:57 -07001831 cfilt_sel_val = tabla->pdata->micbias.bias3_cfilt_sel;
Bradley Rubin4d09cf42011-08-17 17:59:16 -07001832 micb_line = TABLA_MICBIAS3;
Bhalchandra Gajarecc6ffa02011-07-14 18:35:41 -07001833 break;
Joonwoo Park6c1ebb62012-01-16 19:08:43 -08001834 case TABLA_1_A_MICB_4_CTL:
1835 case TABLA_2_A_MICB_4_CTL:
1836 micb_int_reg = tabla->reg_addr.micb_4_int_rbias;
Patrick Lai3043fba2011-08-01 14:15:57 -07001837 cfilt_sel_val = tabla->pdata->micbias.bias4_cfilt_sel;
Bradley Rubin4d09cf42011-08-17 17:59:16 -07001838 micb_line = TABLA_MICBIAS4;
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07001839 break;
1840 default:
1841 pr_err("%s: Error, invalid micbias register\n", __func__);
1842 return -EINVAL;
1843 }
1844
1845 switch (event) {
1846 case SND_SOC_DAPM_PRE_PMU:
Bhalchandra Gajared9ebb6c2011-10-03 19:54:41 -07001847 /* Decide whether to switch the micbias for MBHC */
1848 if ((w->reg == tabla->mbhc_bias_regs.ctl_reg)
1849 && tabla->mbhc_micbias_switched)
1850 tabla_codec_switch_micbias(codec, 0);
1851
Bhalchandra Gajarecc6ffa02011-07-14 18:35:41 -07001852 snd_soc_update_bits(codec, w->reg, 0x0E, 0x0A);
Patrick Lai3043fba2011-08-01 14:15:57 -07001853 tabla_codec_update_cfilt_usage(codec, cfilt_sel_val, 1);
Bradley Rubin229c6a52011-07-12 16:18:48 -07001854
1855 if (strnstr(w->name, internal1_text, 30))
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07001856 snd_soc_update_bits(codec, micb_int_reg, 0xE0, 0xE0);
Bradley Rubin229c6a52011-07-12 16:18:48 -07001857 else if (strnstr(w->name, internal2_text, 30))
1858 snd_soc_update_bits(codec, micb_int_reg, 0x1C, 0x1C);
1859 else if (strnstr(w->name, internal3_text, 30))
1860 snd_soc_update_bits(codec, micb_int_reg, 0x3, 0x3);
1861
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07001862 break;
Bradley Rubin4d09cf42011-08-17 17:59:16 -07001863 case SND_SOC_DAPM_POST_PMU:
1864 if (tabla->mbhc_polling_active &&
Joonwoo Park0976d012011-12-22 11:48:18 -08001865 tabla->micbias == micb_line) {
Bradley Rubin4d09cf42011-08-17 17:59:16 -07001866 tabla_codec_pause_hs_polling(codec);
1867 tabla_codec_start_hs_polling(codec);
1868 }
1869 break;
Bhalchandra Gajared9ebb6c2011-10-03 19:54:41 -07001870
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07001871 case SND_SOC_DAPM_POST_PMD:
Bhalchandra Gajared9ebb6c2011-10-03 19:54:41 -07001872
1873 if ((w->reg == tabla->mbhc_bias_regs.ctl_reg)
1874 && tabla_is_hph_pa_on(codec))
1875 tabla_codec_switch_micbias(codec, 1);
1876
Bradley Rubin229c6a52011-07-12 16:18:48 -07001877 if (strnstr(w->name, internal1_text, 30))
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07001878 snd_soc_update_bits(codec, micb_int_reg, 0x80, 0x00);
Bradley Rubin229c6a52011-07-12 16:18:48 -07001879 else if (strnstr(w->name, internal2_text, 30))
1880 snd_soc_update_bits(codec, micb_int_reg, 0x10, 0x00);
1881 else if (strnstr(w->name, internal3_text, 30))
1882 snd_soc_update_bits(codec, micb_int_reg, 0x2, 0x0);
1883
Patrick Lai3043fba2011-08-01 14:15:57 -07001884 tabla_codec_update_cfilt_usage(codec, cfilt_sel_val, 0);
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07001885 break;
1886 }
1887
1888 return 0;
1889}
1890
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07001891static int tabla_codec_enable_dec(struct snd_soc_dapm_widget *w,
1892 struct snd_kcontrol *kcontrol, int event)
1893{
1894 struct snd_soc_codec *codec = w->codec;
1895 u16 dec_reset_reg;
1896
1897 pr_debug("%s %d\n", __func__, event);
1898
1899 if (w->reg == TABLA_A_CDC_CLK_TX_CLK_EN_B1_CTL)
1900 dec_reset_reg = TABLA_A_CDC_CLK_TX_RESET_B1_CTL;
1901 else if (w->reg == TABLA_A_CDC_CLK_TX_CLK_EN_B2_CTL)
1902 dec_reset_reg = TABLA_A_CDC_CLK_TX_RESET_B2_CTL;
1903 else {
1904 pr_err("%s: Error, incorrect dec\n", __func__);
1905 return -EINVAL;
1906 }
1907
1908 switch (event) {
1909 case SND_SOC_DAPM_PRE_PMU:
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07001910 snd_soc_update_bits(codec, dec_reset_reg, 1 << w->shift,
1911 1 << w->shift);
1912 snd_soc_update_bits(codec, dec_reset_reg, 1 << w->shift, 0x0);
1913 break;
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07001914 }
1915 return 0;
1916}
1917
Bradley Rubin74a9b4a2011-06-13 15:03:43 -07001918static int tabla_codec_reset_interpolator(struct snd_soc_dapm_widget *w,
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07001919 struct snd_kcontrol *kcontrol, int event)
1920{
1921 struct snd_soc_codec *codec = w->codec;
1922
Kiran Kandi8b3a8302011-09-27 16:13:28 -07001923 pr_debug("%s %d %s\n", __func__, event, w->name);
1924
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07001925 switch (event) {
1926 case SND_SOC_DAPM_PRE_PMU:
Bradley Rubin74a9b4a2011-06-13 15:03:43 -07001927 snd_soc_update_bits(codec, TABLA_A_CDC_CLK_RX_RESET_CTL,
1928 1 << w->shift, 1 << w->shift);
1929 snd_soc_update_bits(codec, TABLA_A_CDC_CLK_RX_RESET_CTL,
1930 1 << w->shift, 0x0);
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07001931 break;
1932 }
1933 return 0;
1934}
1935
Bradley Rubin229c6a52011-07-12 16:18:48 -07001936static int tabla_codec_enable_ldo_h(struct snd_soc_dapm_widget *w,
1937 struct snd_kcontrol *kcontrol, int event)
1938{
1939 switch (event) {
1940 case SND_SOC_DAPM_POST_PMU:
1941 case SND_SOC_DAPM_POST_PMD:
1942 usleep_range(1000, 1000);
1943 break;
1944 }
1945 return 0;
1946}
1947
Kiran Kandi6fae8bf2011-08-15 10:36:42 -07001948
1949static void tabla_enable_rx_bias(struct snd_soc_codec *codec, u32 enable)
1950{
1951 struct tabla_priv *tabla = snd_soc_codec_get_drvdata(codec);
1952
1953 if (enable) {
1954 tabla->rx_bias_count++;
1955 if (tabla->rx_bias_count == 1)
1956 snd_soc_update_bits(codec, TABLA_A_RX_COM_BIAS,
1957 0x80, 0x80);
1958 } else {
1959 tabla->rx_bias_count--;
1960 if (!tabla->rx_bias_count)
1961 snd_soc_update_bits(codec, TABLA_A_RX_COM_BIAS,
1962 0x80, 0x00);
1963 }
1964}
1965
1966static int tabla_codec_enable_rx_bias(struct snd_soc_dapm_widget *w,
1967 struct snd_kcontrol *kcontrol, int event)
1968{
1969 struct snd_soc_codec *codec = w->codec;
1970
1971 pr_debug("%s %d\n", __func__, event);
1972
1973 switch (event) {
1974 case SND_SOC_DAPM_PRE_PMU:
1975 tabla_enable_rx_bias(codec, 1);
1976 break;
1977 case SND_SOC_DAPM_POST_PMD:
1978 tabla_enable_rx_bias(codec, 0);
1979 break;
1980 }
1981 return 0;
1982}
Kiran Kandi8b3a8302011-09-27 16:13:28 -07001983static int tabla_hphr_dac_event(struct snd_soc_dapm_widget *w,
1984 struct snd_kcontrol *kcontrol, int event)
1985{
1986 struct snd_soc_codec *codec = w->codec;
1987
1988 pr_debug("%s %s %d\n", __func__, w->name, event);
1989
1990 switch (event) {
1991 case SND_SOC_DAPM_PRE_PMU:
1992 snd_soc_update_bits(codec, w->reg, 0x40, 0x40);
1993 break;
1994 case SND_SOC_DAPM_POST_PMD:
1995 snd_soc_update_bits(codec, w->reg, 0x40, 0x00);
1996 break;
1997 }
1998 return 0;
1999}
Kiran Kandi6fae8bf2011-08-15 10:36:42 -07002000
Joonwoo Park8b1f0982011-12-08 17:12:45 -08002001static void tabla_snd_soc_jack_report(struct tabla_priv *tabla,
2002 struct snd_soc_jack *jack, int status,
2003 int mask)
2004{
2005 /* XXX: wake_lock_timeout()? */
2006 snd_soc_jack_report(jack, status, mask);
2007}
2008
Patrick Lai49efeac2011-11-03 11:01:12 -07002009static void hphocp_off_report(struct tabla_priv *tabla,
2010 u32 jack_status, int irq)
2011{
2012 struct snd_soc_codec *codec;
2013
2014 if (tabla) {
2015 pr_info("%s: clear ocp status %x\n", __func__, jack_status);
2016 codec = tabla->codec;
2017 tabla->hph_status &= ~jack_status;
2018 if (tabla->headset_jack)
Joonwoo Park8b1f0982011-12-08 17:12:45 -08002019 tabla_snd_soc_jack_report(tabla, tabla->headset_jack,
2020 tabla->hph_status,
2021 TABLA_JACK_MASK);
Joonwoo Park0976d012011-12-22 11:48:18 -08002022 snd_soc_update_bits(codec, TABLA_A_RX_HPH_OCP_CTL, 0x10, 0x00);
2023 snd_soc_update_bits(codec, TABLA_A_RX_HPH_OCP_CTL, 0x10, 0x10);
Patrick Laic7cae882011-11-18 11:52:49 -08002024 /* reset retry counter as PA is turned off signifying
2025 * start of new OCP detection session
2026 */
2027 if (TABLA_IRQ_HPH_PA_OCPL_FAULT)
2028 tabla->hphlocp_cnt = 0;
2029 else
2030 tabla->hphrocp_cnt = 0;
Asish Bhattacharyab1aeae22012-02-15 08:29:28 +05302031 wcd9xxx_enable_irq(codec->control_data, irq);
Patrick Lai49efeac2011-11-03 11:01:12 -07002032 } else {
2033 pr_err("%s: Bad tabla private data\n", __func__);
2034 }
2035}
2036
2037static void hphlocp_off_report(struct work_struct *work)
2038{
2039 struct tabla_priv *tabla = container_of(work, struct tabla_priv,
2040 hphlocp_work);
2041 hphocp_off_report(tabla, SND_JACK_OC_HPHL, TABLA_IRQ_HPH_PA_OCPL_FAULT);
2042}
2043
2044static void hphrocp_off_report(struct work_struct *work)
2045{
2046 struct tabla_priv *tabla = container_of(work, struct tabla_priv,
2047 hphrocp_work);
2048 hphocp_off_report(tabla, SND_JACK_OC_HPHR, TABLA_IRQ_HPH_PA_OCPR_FAULT);
2049}
2050
Kiran Kandibf0b1ff2011-09-15 13:55:21 -07002051static int tabla_hph_pa_event(struct snd_soc_dapm_widget *w,
2052 struct snd_kcontrol *kcontrol, int event)
2053{
Bhalchandra Gajared9ebb6c2011-10-03 19:54:41 -07002054 struct snd_soc_codec *codec = w->codec;
2055 struct tabla_priv *tabla = snd_soc_codec_get_drvdata(codec);
2056 u8 mbhc_micb_ctl_val;
Kiran Kandibf0b1ff2011-09-15 13:55:21 -07002057 pr_debug("%s: event = %d\n", __func__, event);
2058
2059 switch (event) {
Bhalchandra Gajared9ebb6c2011-10-03 19:54:41 -07002060 case SND_SOC_DAPM_PRE_PMU:
2061 mbhc_micb_ctl_val = snd_soc_read(codec,
2062 tabla->mbhc_bias_regs.ctl_reg);
2063
2064 if (!(mbhc_micb_ctl_val & 0x80)
2065 && !tabla->mbhc_micbias_switched)
2066 tabla_codec_switch_micbias(codec, 1);
2067
2068 break;
2069
Kiran Kandibf0b1ff2011-09-15 13:55:21 -07002070 case SND_SOC_DAPM_POST_PMD:
Patrick Lai49efeac2011-11-03 11:01:12 -07002071 /* schedule work is required because at the time HPH PA DAPM
2072 * event callback is called by DAPM framework, CODEC dapm mutex
2073 * would have been locked while snd_soc_jack_report also
2074 * attempts to acquire same lock.
2075 */
Joonwoo Parka9444452011-12-08 18:48:27 -08002076 if (w->shift == 5) {
2077 clear_bit(TABLA_HPHL_PA_OFF_ACK,
2078 &tabla->hph_pa_dac_state);
2079 clear_bit(TABLA_HPHL_DAC_OFF_ACK,
2080 &tabla->hph_pa_dac_state);
2081 if (tabla->hph_status & SND_JACK_OC_HPHL)
2082 schedule_work(&tabla->hphlocp_work);
2083 } else if (w->shift == 4) {
2084 clear_bit(TABLA_HPHR_PA_OFF_ACK,
2085 &tabla->hph_pa_dac_state);
2086 clear_bit(TABLA_HPHR_DAC_OFF_ACK,
2087 &tabla->hph_pa_dac_state);
2088 if (tabla->hph_status & SND_JACK_OC_HPHR)
2089 schedule_work(&tabla->hphrocp_work);
2090 }
2091
Bhalchandra Gajared9ebb6c2011-10-03 19:54:41 -07002092 if (tabla->mbhc_micbias_switched)
2093 tabla_codec_switch_micbias(codec, 0);
2094
Kiran Kandibf0b1ff2011-09-15 13:55:21 -07002095 pr_debug("%s: sleep 10 ms after %s PA disable.\n", __func__,
2096 w->name);
2097 usleep_range(10000, 10000);
2098
2099 break;
2100 }
2101 return 0;
2102}
2103
Bhalchandra Gajare02d90cd2011-09-30 16:14:00 -07002104static void tabla_get_mbhc_micbias_regs(struct snd_soc_codec *codec,
Joonwoo Park6c1ebb62012-01-16 19:08:43 -08002105 struct mbhc_micbias_regs *micbias_regs)
Bhalchandra Gajare02d90cd2011-09-30 16:14:00 -07002106{
2107 struct tabla_priv *tabla = snd_soc_codec_get_drvdata(codec);
Bhalchandra Gajare02d90cd2011-09-30 16:14:00 -07002108 unsigned int cfilt;
2109
Joonwoo Park0976d012011-12-22 11:48:18 -08002110 switch (tabla->micbias) {
Bhalchandra Gajare02d90cd2011-09-30 16:14:00 -07002111 case TABLA_MICBIAS1:
2112 cfilt = tabla->pdata->micbias.bias1_cfilt_sel;
2113 micbias_regs->mbhc_reg = TABLA_A_MICB_1_MBHC;
2114 micbias_regs->int_rbias = TABLA_A_MICB_1_INT_RBIAS;
2115 micbias_regs->ctl_reg = TABLA_A_MICB_1_CTL;
2116 break;
2117 case TABLA_MICBIAS2:
2118 cfilt = tabla->pdata->micbias.bias2_cfilt_sel;
2119 micbias_regs->mbhc_reg = TABLA_A_MICB_2_MBHC;
2120 micbias_regs->int_rbias = TABLA_A_MICB_2_INT_RBIAS;
2121 micbias_regs->ctl_reg = TABLA_A_MICB_2_CTL;
2122 break;
2123 case TABLA_MICBIAS3:
2124 cfilt = tabla->pdata->micbias.bias3_cfilt_sel;
2125 micbias_regs->mbhc_reg = TABLA_A_MICB_3_MBHC;
2126 micbias_regs->int_rbias = TABLA_A_MICB_3_INT_RBIAS;
2127 micbias_regs->ctl_reg = TABLA_A_MICB_3_CTL;
2128 break;
2129 case TABLA_MICBIAS4:
2130 cfilt = tabla->pdata->micbias.bias4_cfilt_sel;
Joonwoo Park6c1ebb62012-01-16 19:08:43 -08002131 micbias_regs->mbhc_reg = tabla->reg_addr.micb_4_mbhc;
2132 micbias_regs->int_rbias = tabla->reg_addr.micb_4_int_rbias;
2133 micbias_regs->ctl_reg = tabla->reg_addr.micb_4_ctl;
Bhalchandra Gajare02d90cd2011-09-30 16:14:00 -07002134 break;
2135 default:
2136 /* Should never reach here */
2137 pr_err("%s: Invalid MIC BIAS for MBHC\n", __func__);
Jordan Crouse239d8412011-11-23 11:47:02 -07002138 return;
Bhalchandra Gajare02d90cd2011-09-30 16:14:00 -07002139 }
2140
Bhalchandra Gajare19d9c132011-11-18 14:57:08 -08002141 micbias_regs->cfilt_sel = cfilt;
2142
Bhalchandra Gajare02d90cd2011-09-30 16:14:00 -07002143 switch (cfilt) {
2144 case TABLA_CFILT1_SEL:
2145 micbias_regs->cfilt_val = TABLA_A_MICB_CFILT_1_VAL;
2146 micbias_regs->cfilt_ctl = TABLA_A_MICB_CFILT_1_CTL;
Joonwoo Park0976d012011-12-22 11:48:18 -08002147 tabla->mbhc_data.micb_mv = tabla->pdata->micbias.cfilt1_mv;
Bhalchandra Gajare02d90cd2011-09-30 16:14:00 -07002148 break;
2149 case TABLA_CFILT2_SEL:
2150 micbias_regs->cfilt_val = TABLA_A_MICB_CFILT_2_VAL;
2151 micbias_regs->cfilt_ctl = TABLA_A_MICB_CFILT_2_CTL;
Joonwoo Park0976d012011-12-22 11:48:18 -08002152 tabla->mbhc_data.micb_mv = tabla->pdata->micbias.cfilt2_mv;
Bhalchandra Gajare02d90cd2011-09-30 16:14:00 -07002153 break;
2154 case TABLA_CFILT3_SEL:
2155 micbias_regs->cfilt_val = TABLA_A_MICB_CFILT_3_VAL;
2156 micbias_regs->cfilt_ctl = TABLA_A_MICB_CFILT_3_CTL;
Joonwoo Park0976d012011-12-22 11:48:18 -08002157 tabla->mbhc_data.micb_mv = tabla->pdata->micbias.cfilt3_mv;
Bhalchandra Gajare02d90cd2011-09-30 16:14:00 -07002158 break;
2159 }
2160}
Santosh Mardie15e2302011-11-15 10:39:23 +05302161static const struct snd_soc_dapm_widget tabla_dapm_i2s_widgets[] = {
2162 SND_SOC_DAPM_SUPPLY("RX_I2S_CLK", TABLA_A_CDC_CLK_RX_I2S_CTL,
2163 4, 0, NULL, 0),
2164 SND_SOC_DAPM_SUPPLY("TX_I2S_CLK", TABLA_A_CDC_CLK_TX_I2S_CTL, 4,
2165 0, NULL, 0),
2166};
Bhalchandra Gajare02d90cd2011-09-30 16:14:00 -07002167
Kiran Kandi8b3a8302011-09-27 16:13:28 -07002168static int tabla_lineout_dac_event(struct snd_soc_dapm_widget *w,
2169 struct snd_kcontrol *kcontrol, int event)
2170{
2171 struct snd_soc_codec *codec = w->codec;
2172
2173 pr_debug("%s %s %d\n", __func__, w->name, event);
2174
2175 switch (event) {
2176 case SND_SOC_DAPM_PRE_PMU:
2177 snd_soc_update_bits(codec, w->reg, 0x40, 0x40);
2178 break;
2179
2180 case SND_SOC_DAPM_POST_PMD:
2181 snd_soc_update_bits(codec, w->reg, 0x40, 0x00);
2182 break;
2183 }
2184 return 0;
2185}
2186
Joonwoo Park6c1ebb62012-01-16 19:08:43 -08002187static const struct snd_soc_dapm_widget tabla_1_x_dapm_widgets[] = {
2188 SND_SOC_DAPM_MICBIAS_E("MIC BIAS4 External", TABLA_1_A_MICB_4_CTL, 7,
Asish Bhattacharyab1aeae22012-02-15 08:29:28 +05302189 0, tabla_codec_enable_micbias,
2190 SND_SOC_DAPM_PRE_PMU | SND_SOC_DAPM_POST_PMU |
2191 SND_SOC_DAPM_POST_PMD),
Joonwoo Park6c1ebb62012-01-16 19:08:43 -08002192};
2193
2194static const struct snd_soc_dapm_widget tabla_2_higher_dapm_widgets[] = {
2195 SND_SOC_DAPM_MICBIAS_E("MIC BIAS4 External", TABLA_2_A_MICB_4_CTL, 7,
Asish Bhattacharyab1aeae22012-02-15 08:29:28 +05302196 0, tabla_codec_enable_micbias,
2197 SND_SOC_DAPM_PRE_PMU | SND_SOC_DAPM_POST_PMU |
2198 SND_SOC_DAPM_POST_PMD),
Joonwoo Park6c1ebb62012-01-16 19:08:43 -08002199};
2200
Santosh Mardie15e2302011-11-15 10:39:23 +05302201static const struct snd_soc_dapm_route audio_i2s_map[] = {
2202 {"RX_I2S_CLK", NULL, "CDC_CONN"},
2203 {"SLIM RX1", NULL, "RX_I2S_CLK"},
2204 {"SLIM RX2", NULL, "RX_I2S_CLK"},
2205 {"SLIM RX3", NULL, "RX_I2S_CLK"},
2206 {"SLIM RX4", NULL, "RX_I2S_CLK"},
2207
2208 {"SLIM TX7", NULL, "TX_I2S_CLK"},
2209 {"SLIM TX8", NULL, "TX_I2S_CLK"},
2210 {"SLIM TX9", NULL, "TX_I2S_CLK"},
2211 {"SLIM TX10", NULL, "TX_I2S_CLK"},
2212};
2213
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07002214static const struct snd_soc_dapm_route audio_map[] = {
2215 /* SLIMBUS Connections */
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07002216
2217 {"SLIM TX1", NULL, "SLIM TX1 MUX"},
2218 {"SLIM TX1 MUX", "DEC1", "DEC1 MUX"},
2219
2220 {"SLIM TX5", NULL, "SLIM TX5 MUX"},
2221 {"SLIM TX5 MUX", "DEC5", "DEC5 MUX"},
2222
2223 {"SLIM TX6", NULL, "SLIM TX6 MUX"},
2224 {"SLIM TX6 MUX", "DEC6", "DEC6 MUX"},
2225
2226 {"SLIM TX7", NULL, "SLIM TX7 MUX"},
2227 {"SLIM TX7 MUX", "DEC1", "DEC1 MUX"},
Bhalchandra Gajare0d77e1b2011-07-08 10:54:14 -07002228 {"SLIM TX7 MUX", "DEC2", "DEC2 MUX"},
Bhalchandra Gajarecc6ffa02011-07-14 18:35:41 -07002229 {"SLIM TX7 MUX", "DEC3", "DEC3 MUX"},
2230 {"SLIM TX7 MUX", "DEC4", "DEC4 MUX"},
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07002231 {"SLIM TX7 MUX", "DEC5", "DEC5 MUX"},
2232 {"SLIM TX7 MUX", "DEC6", "DEC6 MUX"},
Bhalchandra Gajare0d77e1b2011-07-08 10:54:14 -07002233 {"SLIM TX7 MUX", "DEC7", "DEC7 MUX"},
2234 {"SLIM TX7 MUX", "DEC8", "DEC8 MUX"},
Bhalchandra Gajarecc6ffa02011-07-14 18:35:41 -07002235 {"SLIM TX7 MUX", "DEC9", "DEC9 MUX"},
2236 {"SLIM TX7 MUX", "DEC10", "DEC10 MUX"},
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07002237
2238 {"SLIM TX8", NULL, "SLIM TX8 MUX"},
Kiran Kandicf45f6a2011-07-17 21:10:19 -07002239 {"SLIM TX8 MUX", "DEC1", "DEC1 MUX"},
2240 {"SLIM TX8 MUX", "DEC2", "DEC2 MUX"},
2241 {"SLIM TX8 MUX", "DEC3", "DEC3 MUX"},
Bhalchandra Gajare9ec83cd2011-09-23 17:25:07 -07002242 {"SLIM TX8 MUX", "DEC4", "DEC4 MUX"},
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07002243 {"SLIM TX8 MUX", "DEC5", "DEC5 MUX"},
2244 {"SLIM TX8 MUX", "DEC6", "DEC6 MUX"},
2245
Kiran Kandi3426e512011-09-13 22:50:10 -07002246 {"SLIM TX9", NULL, "SLIM TX9 MUX"},
2247 {"SLIM TX9 MUX", "DEC1", "DEC1 MUX"},
2248 {"SLIM TX9 MUX", "DEC2", "DEC2 MUX"},
2249 {"SLIM TX9 MUX", "DEC3", "DEC3 MUX"},
2250 {"SLIM TX9 MUX", "DEC4", "DEC4 MUX"},
2251 {"SLIM TX9 MUX", "DEC5", "DEC5 MUX"},
2252 {"SLIM TX9 MUX", "DEC6", "DEC6 MUX"},
2253 {"SLIM TX9 MUX", "DEC7", "DEC7 MUX"},
2254 {"SLIM TX9 MUX", "DEC8", "DEC8 MUX"},
2255 {"SLIM TX9 MUX", "DEC9", "DEC9 MUX"},
2256 {"SLIM TX9 MUX", "DEC10", "DEC10 MUX"},
2257
2258 {"SLIM TX10", NULL, "SLIM TX10 MUX"},
2259 {"SLIM TX10 MUX", "DEC1", "DEC1 MUX"},
2260 {"SLIM TX10 MUX", "DEC2", "DEC2 MUX"},
2261 {"SLIM TX10 MUX", "DEC3", "DEC3 MUX"},
2262 {"SLIM TX10 MUX", "DEC4", "DEC4 MUX"},
2263 {"SLIM TX10 MUX", "DEC5", "DEC5 MUX"},
2264 {"SLIM TX10 MUX", "DEC6", "DEC6 MUX"},
2265 {"SLIM TX10 MUX", "DEC7", "DEC7 MUX"},
2266 {"SLIM TX10 MUX", "DEC8", "DEC8 MUX"},
2267 {"SLIM TX10 MUX", "DEC9", "DEC9 MUX"},
2268 {"SLIM TX10 MUX", "DEC10", "DEC10 MUX"},
2269
2270
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07002271 /* Earpiece (RX MIX1) */
2272 {"EAR", NULL, "EAR PA"},
Kiran Kandiac034ac2011-07-29 16:39:08 -07002273 {"EAR PA", NULL, "DAC1"},
Bradley Rubin229c6a52011-07-12 16:18:48 -07002274 {"DAC1", NULL, "CP"},
2275
2276 {"ANC1 FB MUX", "EAR_HPH_L", "RX1 MIX1"},
2277 {"ANC1 FB MUX", "EAR_LINE_1", "RX2 MIX1"},
2278 {"ANC", NULL, "ANC1 FB MUX"},
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07002279
2280 /* Headset (RX MIX1 and RX MIX2) */
2281 {"HEADPHONE", NULL, "HPHL"},
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07002282 {"HEADPHONE", NULL, "HPHR"},
Bradley Rubin229c6a52011-07-12 16:18:48 -07002283
2284 {"HPHL", NULL, "HPHL DAC"},
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07002285 {"HPHR", NULL, "HPHR DAC"},
Bradley Rubin229c6a52011-07-12 16:18:48 -07002286
2287 {"HPHL DAC", NULL, "CP"},
2288 {"HPHR DAC", NULL, "CP"},
2289
2290 {"ANC", NULL, "ANC1 MUX"},
2291 {"ANC", NULL, "ANC2 MUX"},
2292 {"ANC1 MUX", "ADC1", "ADC1"},
2293 {"ANC1 MUX", "ADC2", "ADC2"},
2294 {"ANC1 MUX", "ADC3", "ADC3"},
2295 {"ANC1 MUX", "ADC4", "ADC4"},
2296 {"ANC2 MUX", "ADC1", "ADC1"},
2297 {"ANC2 MUX", "ADC2", "ADC2"},
2298 {"ANC2 MUX", "ADC3", "ADC3"},
2299 {"ANC2 MUX", "ADC4", "ADC4"},
2300
Bradley Rubine1d08622011-07-20 18:01:35 -07002301 {"ANC", NULL, "CDC_CONN"},
2302
Bradley Rubin229c6a52011-07-12 16:18:48 -07002303 {"DAC1", "Switch", "RX1 CHAIN"},
2304 {"HPHL DAC", "Switch", "RX1 CHAIN"},
Kiran Kandi8b3a8302011-09-27 16:13:28 -07002305 {"HPHR DAC", NULL, "RX2 CHAIN"},
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07002306
Kiran Kandidb0a4b02011-08-23 09:32:09 -07002307 {"LINEOUT1", NULL, "LINEOUT1 PA"},
2308 {"LINEOUT2", NULL, "LINEOUT2 PA"},
2309 {"LINEOUT3", NULL, "LINEOUT3 PA"},
2310 {"LINEOUT4", NULL, "LINEOUT4 PA"},
2311 {"LINEOUT5", NULL, "LINEOUT5 PA"},
Bradley Rubin74a9b4a2011-06-13 15:03:43 -07002312
Kiran Kandidb0a4b02011-08-23 09:32:09 -07002313 {"LINEOUT1 PA", NULL, "LINEOUT1 DAC"},
2314 {"LINEOUT2 PA", NULL, "LINEOUT2 DAC"},
2315 {"LINEOUT3 PA", NULL, "LINEOUT3 DAC"},
2316 {"LINEOUT4 PA", NULL, "LINEOUT4 DAC"},
2317 {"LINEOUT5 PA", NULL, "LINEOUT5 DAC"},
Bradley Rubin74a9b4a2011-06-13 15:03:43 -07002318
Kiran Kandi8b3a8302011-09-27 16:13:28 -07002319 {"LINEOUT1 DAC", NULL, "RX3 MIX1"},
2320 {"LINEOUT5 DAC", NULL, "RX7 MIX1"},
2321
Bradley Rubin229c6a52011-07-12 16:18:48 -07002322 {"RX1 CHAIN", NULL, "RX1 MIX1"},
2323 {"RX2 CHAIN", NULL, "RX2 MIX1"},
2324 {"RX1 CHAIN", NULL, "ANC"},
2325 {"RX2 CHAIN", NULL, "ANC"},
Bradley Rubin74a9b4a2011-06-13 15:03:43 -07002326
Kiran Kandi6fae8bf2011-08-15 10:36:42 -07002327 {"CP", NULL, "RX_BIAS"},
2328 {"LINEOUT1 DAC", NULL, "RX_BIAS"},
2329 {"LINEOUT2 DAC", NULL, "RX_BIAS"},
2330 {"LINEOUT3 DAC", NULL, "RX_BIAS"},
2331 {"LINEOUT4 DAC", NULL, "RX_BIAS"},
Kiran Kandi8b3a8302011-09-27 16:13:28 -07002332 {"LINEOUT5 DAC", NULL, "RX_BIAS"},
Kiran Kandi6fae8bf2011-08-15 10:36:42 -07002333
Kuirong Wang0f8ade32012-02-27 16:29:45 -08002334 {"RX1 MIX1", NULL, "COMP1_CLK"},
2335 {"RX2 MIX1", NULL, "COMP1_CLK"},
2336 {"RX3 MIX1", NULL, "COMP2_CLK"},
2337 {"RX5 MIX1", NULL, "COMP2_CLK"},
2338
2339
Bradley Rubin229c6a52011-07-12 16:18:48 -07002340 {"RX1 MIX1", NULL, "RX1 MIX1 INP1"},
2341 {"RX1 MIX1", NULL, "RX1 MIX1 INP2"},
2342 {"RX2 MIX1", NULL, "RX2 MIX1 INP1"},
2343 {"RX2 MIX1", NULL, "RX2 MIX1 INP2"},
Bradley Rubin74a9b4a2011-06-13 15:03:43 -07002344 {"RX3 MIX1", NULL, "RX3 MIX1 INP1"},
2345 {"RX3 MIX1", NULL, "RX3 MIX1 INP2"},
2346 {"RX4 MIX1", NULL, "RX4 MIX1 INP1"},
2347 {"RX4 MIX1", NULL, "RX4 MIX1 INP2"},
2348 {"RX5 MIX1", NULL, "RX5 MIX1 INP1"},
2349 {"RX5 MIX1", NULL, "RX5 MIX1 INP2"},
2350 {"RX6 MIX1", NULL, "RX6 MIX1 INP1"},
2351 {"RX6 MIX1", NULL, "RX6 MIX1 INP2"},
Bhalchandra Gajare0a8ad172011-08-12 13:32:22 -07002352 {"RX7 MIX1", NULL, "RX7 MIX1 INP1"},
2353 {"RX7 MIX1", NULL, "RX7 MIX1 INP2"},
Bradley Rubin74a9b4a2011-06-13 15:03:43 -07002354
Bradley Rubin229c6a52011-07-12 16:18:48 -07002355 {"RX1 MIX1 INP1", "RX1", "SLIM RX1"},
2356 {"RX1 MIX1 INP1", "RX2", "SLIM RX2"},
Santosh Mardie15e2302011-11-15 10:39:23 +05302357 {"RX1 MIX1 INP1", "RX3", "SLIM RX3"},
2358 {"RX1 MIX1 INP1", "RX4", "SLIM RX4"},
Neema Shettyd3a89262012-02-16 10:23:50 -08002359 {"RX1 MIX1 INP1", "RX6", "SLIM RX6"},
2360 {"RX1 MIX1 INP1", "RX7", "SLIM RX7"},
Bradley Rubin229c6a52011-07-12 16:18:48 -07002361 {"RX1 MIX1 INP1", "IIR1", "IIR1"},
2362 {"RX1 MIX1 INP2", "RX1", "SLIM RX1"},
2363 {"RX1 MIX1 INP2", "RX2", "SLIM RX2"},
Santosh Mardie15e2302011-11-15 10:39:23 +05302364 {"RX1 MIX1 INP2", "RX3", "SLIM RX3"},
2365 {"RX1 MIX1 INP2", "RX4", "SLIM RX4"},
Neema Shettyd3a89262012-02-16 10:23:50 -08002366 {"RX1 MIX1 INP2", "RX6", "SLIM RX6"},
2367 {"RX1 MIX1 INP2", "RX7", "SLIM RX7"},
Bradley Rubin229c6a52011-07-12 16:18:48 -07002368 {"RX1 MIX1 INP2", "IIR1", "IIR1"},
2369 {"RX2 MIX1 INP1", "RX1", "SLIM RX1"},
2370 {"RX2 MIX1 INP1", "RX2", "SLIM RX2"},
Santosh Mardie15e2302011-11-15 10:39:23 +05302371 {"RX2 MIX1 INP1", "RX3", "SLIM RX3"},
2372 {"RX2 MIX1 INP1", "RX4", "SLIM RX4"},
Neema Shettyd3a89262012-02-16 10:23:50 -08002373 {"RX2 MIX1 INP1", "RX6", "SLIM RX6"},
2374 {"RX2 MIX1 INP1", "RX7", "SLIM RX7"},
Patrick Lai16261e82011-09-30 13:25:52 -07002375 {"RX2 MIX1 INP1", "IIR1", "IIR1"},
Bradley Rubin229c6a52011-07-12 16:18:48 -07002376 {"RX2 MIX1 INP2", "RX1", "SLIM RX1"},
2377 {"RX2 MIX1 INP2", "RX2", "SLIM RX2"},
Santosh Mardie15e2302011-11-15 10:39:23 +05302378 {"RX2 MIX1 INP2", "RX3", "SLIM RX3"},
2379 {"RX2 MIX1 INP2", "RX4", "SLIM RX4"},
Neema Shettyd3a89262012-02-16 10:23:50 -08002380 {"RX2 MIX1 INP2", "RX6", "SLIM RX6"},
2381 {"RX2 MIX1 INP2", "RX7", "SLIM RX7"},
Patrick Lai16261e82011-09-30 13:25:52 -07002382 {"RX2 MIX1 INP2", "IIR1", "IIR1"},
Bradley Rubin229c6a52011-07-12 16:18:48 -07002383 {"RX3 MIX1 INP1", "RX1", "SLIM RX1"},
2384 {"RX3 MIX1 INP1", "RX2", "SLIM RX2"},
Santosh Mardie15e2302011-11-15 10:39:23 +05302385 {"RX3 MIX1 INP1", "RX3", "SLIM RX3"},
2386 {"RX3 MIX1 INP1", "RX4", "SLIM RX4"},
Neema Shettyd3a89262012-02-16 10:23:50 -08002387 {"RX3 MIX1 INP1", "RX6", "SLIM RX6"},
2388 {"RX3 MIX1 INP1", "RX7", "SLIM RX7"},
Patrick Lai16261e82011-09-30 13:25:52 -07002389 {"RX3 MIX1 INP1", "IIR1", "IIR1"},
Bradley Rubin229c6a52011-07-12 16:18:48 -07002390 {"RX3 MIX1 INP2", "RX1", "SLIM RX1"},
2391 {"RX3 MIX1 INP2", "RX2", "SLIM RX2"},
Santosh Mardie15e2302011-11-15 10:39:23 +05302392 {"RX3 MIX1 INP2", "RX3", "SLIM RX3"},
2393 {"RX3 MIX1 INP2", "RX4", "SLIM RX4"},
Neema Shettyd3a89262012-02-16 10:23:50 -08002394 {"RX3 MIX1 INP2", "RX6", "SLIM RX6"},
2395 {"RX3 MIX1 INP2", "RX7", "SLIM RX7"},
Patrick Lai16261e82011-09-30 13:25:52 -07002396 {"RX3 MIX1 INP2", "IIR1", "IIR1"},
Bradley Rubin229c6a52011-07-12 16:18:48 -07002397 {"RX4 MIX1 INP1", "RX1", "SLIM RX1"},
2398 {"RX4 MIX1 INP1", "RX2", "SLIM RX2"},
Santosh Mardie15e2302011-11-15 10:39:23 +05302399 {"RX4 MIX1 INP1", "RX3", "SLIM RX3"},
2400 {"RX4 MIX1 INP1", "RX4", "SLIM RX4"},
Neema Shettyd3a89262012-02-16 10:23:50 -08002401 {"RX4 MIX1 INP1", "RX6", "SLIM RX6"},
2402 {"RX4 MIX1 INP1", "RX7", "SLIM RX7"},
Patrick Lai16261e82011-09-30 13:25:52 -07002403 {"RX4 MIX1 INP1", "IIR1", "IIR1"},
Bradley Rubin229c6a52011-07-12 16:18:48 -07002404 {"RX4 MIX1 INP2", "RX1", "SLIM RX1"},
2405 {"RX4 MIX1 INP2", "RX2", "SLIM RX2"},
Santosh Mardie15e2302011-11-15 10:39:23 +05302406 {"RX4 MIX1 INP2", "RX3", "SLIM RX3"},
2407 {"RX4 MIX1 INP2", "RX4", "SLIM RX4"},
Neema Shettyd3a89262012-02-16 10:23:50 -08002408 {"RX4 MIX1 INP2", "RX6", "SLIM RX6"},
2409 {"RX4 MIX1 INP2", "RX7", "SLIM RX7"},
Patrick Lai16261e82011-09-30 13:25:52 -07002410 {"RX4 MIX1 INP2", "IIR1", "IIR1"},
Bradley Rubin229c6a52011-07-12 16:18:48 -07002411 {"RX5 MIX1 INP1", "RX1", "SLIM RX1"},
2412 {"RX5 MIX1 INP1", "RX2", "SLIM RX2"},
Santosh Mardie15e2302011-11-15 10:39:23 +05302413 {"RX5 MIX1 INP1", "RX3", "SLIM RX3"},
2414 {"RX5 MIX1 INP1", "RX4", "SLIM RX4"},
Neema Shettyd3a89262012-02-16 10:23:50 -08002415 {"RX5 MIX1 INP1", "RX6", "SLIM RX6"},
2416 {"RX5 MIX1 INP1", "RX7", "SLIM RX7"},
Patrick Lai16261e82011-09-30 13:25:52 -07002417 {"RX5 MIX1 INP1", "IIR1", "IIR1"},
Bradley Rubin229c6a52011-07-12 16:18:48 -07002418 {"RX5 MIX1 INP2", "RX1", "SLIM RX1"},
2419 {"RX5 MIX1 INP2", "RX2", "SLIM RX2"},
Santosh Mardie15e2302011-11-15 10:39:23 +05302420 {"RX5 MIX1 INP2", "RX3", "SLIM RX3"},
2421 {"RX5 MIX1 INP2", "RX4", "SLIM RX4"},
Neema Shettyd3a89262012-02-16 10:23:50 -08002422 {"RX5 MIX1 INP2", "RX6", "SLIM RX6"},
2423 {"RX5 MIX1 INP2", "RX7", "SLIM RX7"},
Patrick Lai16261e82011-09-30 13:25:52 -07002424 {"RX5 MIX1 INP2", "IIR1", "IIR1"},
Bradley Rubin229c6a52011-07-12 16:18:48 -07002425 {"RX6 MIX1 INP1", "RX1", "SLIM RX1"},
2426 {"RX6 MIX1 INP1", "RX2", "SLIM RX2"},
Santosh Mardie15e2302011-11-15 10:39:23 +05302427 {"RX6 MIX1 INP1", "RX3", "SLIM RX3"},
2428 {"RX6 MIX1 INP1", "RX4", "SLIM RX4"},
Neema Shettyd3a89262012-02-16 10:23:50 -08002429 {"RX6 MIX1 INP1", "RX6", "SLIM RX6"},
2430 {"RX6 MIX1 INP1", "RX7", "SLIM RX7"},
Patrick Lai16261e82011-09-30 13:25:52 -07002431 {"RX6 MIX1 INP1", "IIR1", "IIR1"},
Bradley Rubin229c6a52011-07-12 16:18:48 -07002432 {"RX6 MIX1 INP2", "RX1", "SLIM RX1"},
2433 {"RX6 MIX1 INP2", "RX2", "SLIM RX2"},
Santosh Mardie15e2302011-11-15 10:39:23 +05302434 {"RX6 MIX1 INP2", "RX3", "SLIM RX3"},
2435 {"RX6 MIX1 INP2", "RX4", "SLIM RX4"},
Neema Shettyd3a89262012-02-16 10:23:50 -08002436 {"RX6 MIX1 INP2", "RX6", "SLIM RX6"},
2437 {"RX6 MIX1 INP2", "RX7", "SLIM RX7"},
Patrick Lai16261e82011-09-30 13:25:52 -07002438 {"RX6 MIX1 INP2", "IIR1", "IIR1"},
Bhalchandra Gajare0a8ad172011-08-12 13:32:22 -07002439 {"RX7 MIX1 INP1", "RX1", "SLIM RX1"},
2440 {"RX7 MIX1 INP1", "RX2", "SLIM RX2"},
Santosh Mardie15e2302011-11-15 10:39:23 +05302441 {"RX7 MIX1 INP1", "RX3", "SLIM RX3"},
2442 {"RX7 MIX1 INP1", "RX4", "SLIM RX4"},
Neema Shettyd3a89262012-02-16 10:23:50 -08002443 {"RX7 MIX1 INP1", "RX6", "SLIM RX6"},
2444 {"RX7 MIX1 INP1", "RX7", "SLIM RX7"},
Patrick Lai16261e82011-09-30 13:25:52 -07002445 {"RX7 MIX1 INP1", "IIR1", "IIR1"},
Bhalchandra Gajare0a8ad172011-08-12 13:32:22 -07002446 {"RX7 MIX1 INP2", "RX1", "SLIM RX1"},
2447 {"RX7 MIX1 INP2", "RX2", "SLIM RX2"},
Santosh Mardie15e2302011-11-15 10:39:23 +05302448 {"RX7 MIX1 INP2", "RX3", "SLIM RX3"},
2449 {"RX7 MIX1 INP2", "RX4", "SLIM RX4"},
Neema Shettyd3a89262012-02-16 10:23:50 -08002450 {"RX7 MIX1 INP2", "RX6", "SLIM RX6"},
2451 {"RX7 MIX1 INP2", "RX7", "SLIM RX7"},
Patrick Lai16261e82011-09-30 13:25:52 -07002452 {"RX7 MIX1 INP2", "IIR1", "IIR1"},
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07002453
Bhalchandra Gajarecc6ffa02011-07-14 18:35:41 -07002454 /* Decimator Inputs */
Bhalchandra Gajarecc6ffa02011-07-14 18:35:41 -07002455 {"DEC1 MUX", "DMIC1", "DMIC1"},
Kiran Kandicf45f6a2011-07-17 21:10:19 -07002456 {"DEC1 MUX", "ADC6", "ADC6"},
Bradley Rubine1d08622011-07-20 18:01:35 -07002457 {"DEC1 MUX", NULL, "CDC_CONN"},
Kiran Kandicf45f6a2011-07-17 21:10:19 -07002458 {"DEC2 MUX", "DMIC2", "DMIC2"},
Bhalchandra Gajarecc6ffa02011-07-14 18:35:41 -07002459 {"DEC2 MUX", "ADC5", "ADC5"},
Bradley Rubine1d08622011-07-20 18:01:35 -07002460 {"DEC2 MUX", NULL, "CDC_CONN"},
Kiran Kandicf45f6a2011-07-17 21:10:19 -07002461 {"DEC3 MUX", "DMIC3", "DMIC3"},
Bhalchandra Gajarecc6ffa02011-07-14 18:35:41 -07002462 {"DEC3 MUX", "ADC4", "ADC4"},
Bradley Rubine1d08622011-07-20 18:01:35 -07002463 {"DEC3 MUX", NULL, "CDC_CONN"},
Bhalchandra Gajare7cf018e2011-08-11 18:58:32 -07002464 {"DEC4 MUX", "DMIC4", "DMIC4"},
Bhalchandra Gajarecc6ffa02011-07-14 18:35:41 -07002465 {"DEC4 MUX", "ADC3", "ADC3"},
Bradley Rubine1d08622011-07-20 18:01:35 -07002466 {"DEC4 MUX", NULL, "CDC_CONN"},
Bhalchandra Gajare7cf018e2011-08-11 18:58:32 -07002467 {"DEC5 MUX", "DMIC5", "DMIC5"},
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07002468 {"DEC5 MUX", "ADC2", "ADC2"},
Bradley Rubine1d08622011-07-20 18:01:35 -07002469 {"DEC5 MUX", NULL, "CDC_CONN"},
Bhalchandra Gajare7cf018e2011-08-11 18:58:32 -07002470 {"DEC6 MUX", "DMIC6", "DMIC6"},
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07002471 {"DEC6 MUX", "ADC1", "ADC1"},
Bradley Rubine1d08622011-07-20 18:01:35 -07002472 {"DEC6 MUX", NULL, "CDC_CONN"},
Bhalchandra Gajarecc6ffa02011-07-14 18:35:41 -07002473 {"DEC7 MUX", "DMIC1", "DMIC1"},
Kiran Kandicf45f6a2011-07-17 21:10:19 -07002474 {"DEC7 MUX", "ADC6", "ADC6"},
Bradley Rubine1d08622011-07-20 18:01:35 -07002475 {"DEC7 MUX", NULL, "CDC_CONN"},
Bhalchandra Gajarecc6ffa02011-07-14 18:35:41 -07002476 {"DEC8 MUX", "ADC5", "ADC5"},
Bradley Rubine1d08622011-07-20 18:01:35 -07002477 {"DEC8 MUX", NULL, "CDC_CONN"},
Bhalchandra Gajarecc6ffa02011-07-14 18:35:41 -07002478 {"DEC9 MUX", "ADC3", "ADC3"},
Bradley Rubine1d08622011-07-20 18:01:35 -07002479 {"DEC9 MUX", NULL, "CDC_CONN"},
Bhalchandra Gajarecc6ffa02011-07-14 18:35:41 -07002480 {"DEC10 MUX", "ADC4", "ADC4"},
Bradley Rubine1d08622011-07-20 18:01:35 -07002481 {"DEC10 MUX", NULL, "CDC_CONN"},
Bhalchandra Gajarecc6ffa02011-07-14 18:35:41 -07002482
2483 /* ADC Connections */
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07002484 {"ADC1", NULL, "AMIC1"},
2485 {"ADC2", NULL, "AMIC2"},
Bhalchandra Gajarecc6ffa02011-07-14 18:35:41 -07002486 {"ADC3", NULL, "AMIC3"},
2487 {"ADC4", NULL, "AMIC4"},
2488 {"ADC5", NULL, "AMIC5"},
2489 {"ADC6", NULL, "AMIC6"},
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07002490
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07002491 {"IIR1", NULL, "IIR1 INP1 MUX"},
Patrick Lai16261e82011-09-30 13:25:52 -07002492 {"IIR1 INP1 MUX", "DEC1", "DEC1 MUX"},
2493 {"IIR1 INP1 MUX", "DEC2", "DEC2 MUX"},
2494 {"IIR1 INP1 MUX", "DEC3", "DEC3 MUX"},
2495 {"IIR1 INP1 MUX", "DEC4", "DEC4 MUX"},
2496 {"IIR1 INP1 MUX", "DEC5", "DEC5 MUX"},
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07002497 {"IIR1 INP1 MUX", "DEC6", "DEC6 MUX"},
Patrick Lai16261e82011-09-30 13:25:52 -07002498 {"IIR1 INP1 MUX", "DEC7", "DEC7 MUX"},
2499 {"IIR1 INP1 MUX", "DEC8", "DEC8 MUX"},
2500 {"IIR1 INP1 MUX", "DEC9", "DEC9 MUX"},
2501 {"IIR1 INP1 MUX", "DEC10", "DEC10 MUX"},
Bradley Rubin229c6a52011-07-12 16:18:48 -07002502
2503 {"MIC BIAS1 Internal1", NULL, "LDO_H"},
2504 {"MIC BIAS1 Internal2", NULL, "LDO_H"},
2505 {"MIC BIAS1 External", NULL, "LDO_H"},
2506 {"MIC BIAS2 Internal1", NULL, "LDO_H"},
2507 {"MIC BIAS2 Internal2", NULL, "LDO_H"},
2508 {"MIC BIAS2 Internal3", NULL, "LDO_H"},
2509 {"MIC BIAS2 External", NULL, "LDO_H"},
2510 {"MIC BIAS3 Internal1", NULL, "LDO_H"},
2511 {"MIC BIAS3 Internal2", NULL, "LDO_H"},
2512 {"MIC BIAS3 External", NULL, "LDO_H"},
2513 {"MIC BIAS4 External", NULL, "LDO_H"},
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07002514};
2515
Kiran Kandi8b3a8302011-09-27 16:13:28 -07002516static const struct snd_soc_dapm_route tabla_1_x_lineout_2_to_4_map[] = {
2517
2518 {"RX4 DSM MUX", "DSM_INV", "RX3 MIX1"},
2519 {"RX4 DSM MUX", "CIC_OUT", "RX4 MIX1"},
2520
2521 {"LINEOUT2 DAC", NULL, "RX4 DSM MUX"},
2522
2523 {"LINEOUT3 DAC", NULL, "RX5 MIX1"},
2524 {"LINEOUT3 DAC GROUND", "Switch", "RX3 MIX1"},
2525 {"LINEOUT3 DAC", NULL, "LINEOUT3 DAC GROUND"},
2526
2527 {"RX6 DSM MUX", "DSM_INV", "RX5 MIX1"},
2528 {"RX6 DSM MUX", "CIC_OUT", "RX6 MIX1"},
2529
2530 {"LINEOUT4 DAC", NULL, "RX6 DSM MUX"},
2531 {"LINEOUT4 DAC GROUND", "Switch", "RX4 DSM MUX"},
2532 {"LINEOUT4 DAC", NULL, "LINEOUT4 DAC GROUND"},
2533};
2534
Kiran Kandi7a9fd902011-11-14 13:51:45 -08002535
2536static const struct snd_soc_dapm_route tabla_2_x_lineout_2_to_4_map[] = {
2537
2538 {"RX4 DSM MUX", "DSM_INV", "RX3 MIX1"},
2539 {"RX4 DSM MUX", "CIC_OUT", "RX4 MIX1"},
2540
2541 {"LINEOUT3 DAC", NULL, "RX4 DSM MUX"},
2542
2543 {"LINEOUT2 DAC", NULL, "RX5 MIX1"},
2544
2545 {"RX6 DSM MUX", "DSM_INV", "RX5 MIX1"},
2546 {"RX6 DSM MUX", "CIC_OUT", "RX6 MIX1"},
2547
2548 {"LINEOUT4 DAC", NULL, "RX6 DSM MUX"},
2549};
2550
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07002551static int tabla_readable(struct snd_soc_codec *ssc, unsigned int reg)
2552{
Joonwoo Park6c1ebb62012-01-16 19:08:43 -08002553 int i;
Asish Bhattacharyab1aeae22012-02-15 08:29:28 +05302554 struct wcd9xxx *tabla_core = dev_get_drvdata(ssc->dev->parent);
Joonwoo Park6c1ebb62012-01-16 19:08:43 -08002555
2556 if (TABLA_IS_1_X(tabla_core->version)) {
2557 for (i = 0; i < ARRAY_SIZE(tabla_1_reg_readable); i++) {
2558 if (tabla_1_reg_readable[i] == reg)
2559 return 1;
2560 }
2561 } else {
2562 for (i = 0; i < ARRAY_SIZE(tabla_2_reg_readable); i++) {
2563 if (tabla_2_reg_readable[i] == reg)
2564 return 1;
2565 }
2566 }
2567
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07002568 return tabla_reg_readable[reg];
2569}
2570
2571static int tabla_volatile(struct snd_soc_codec *ssc, unsigned int reg)
2572{
2573 /* Registers lower than 0x100 are top level registers which can be
2574 * written by the Tabla core driver.
2575 */
2576
2577 if ((reg >= TABLA_A_CDC_MBHC_EN_CTL) || (reg < 0x100))
2578 return 1;
2579
Ben Romberger1f045a72011-11-04 10:14:57 -07002580 /* IIR Coeff registers are not cacheable */
2581 if ((reg >= TABLA_A_CDC_IIR1_COEF_B1_CTL) &&
2582 (reg <= TABLA_A_CDC_IIR2_COEF_B5_CTL))
2583 return 1;
2584
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07002585 return 0;
2586}
2587
2588#define TABLA_FORMATS (SNDRV_PCM_FMTBIT_S16_LE)
2589static int tabla_write(struct snd_soc_codec *codec, unsigned int reg,
2590 unsigned int value)
2591{
2592 int ret;
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07002593
2594 BUG_ON(reg > TABLA_MAX_REGISTER);
2595
2596 if (!tabla_volatile(codec, reg)) {
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07002597 ret = snd_soc_cache_write(codec, reg, value);
2598 if (ret != 0)
2599 dev_err(codec->dev, "Cache write to %x failed: %d\n",
2600 reg, ret);
2601 }
2602
Asish Bhattacharyab1aeae22012-02-15 08:29:28 +05302603 return wcd9xxx_reg_write(codec->control_data, reg, value);
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07002604}
2605static unsigned int tabla_read(struct snd_soc_codec *codec,
2606 unsigned int reg)
2607{
2608 unsigned int val;
2609 int ret;
2610
2611 BUG_ON(reg > TABLA_MAX_REGISTER);
2612
2613 if (!tabla_volatile(codec, reg) && tabla_readable(codec, reg) &&
2614 reg < codec->driver->reg_cache_size) {
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07002615 ret = snd_soc_cache_read(codec, reg, &val);
2616 if (ret >= 0) {
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07002617 return val;
2618 } else
2619 dev_err(codec->dev, "Cache read from %x failed: %d\n",
2620 reg, ret);
2621 }
2622
Asish Bhattacharyab1aeae22012-02-15 08:29:28 +05302623 val = wcd9xxx_reg_read(codec->control_data, reg);
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07002624 return val;
2625}
2626
2627static void tabla_codec_enable_audio_mode_bandgap(struct snd_soc_codec *codec)
2628{
2629 snd_soc_write(codec, TABLA_A_BIAS_REF_CTL, 0x1C);
2630 snd_soc_update_bits(codec, TABLA_A_BIAS_CENTRAL_BG_CTL, 0x80,
2631 0x80);
2632 snd_soc_update_bits(codec, TABLA_A_BIAS_CENTRAL_BG_CTL, 0x04,
2633 0x04);
2634 snd_soc_update_bits(codec, TABLA_A_BIAS_CENTRAL_BG_CTL, 0x01,
2635 0x01);
2636 usleep_range(1000, 1000);
2637 snd_soc_update_bits(codec, TABLA_A_BIAS_CENTRAL_BG_CTL, 0x80,
2638 0x00);
2639}
2640
2641static void tabla_codec_enable_bandgap(struct snd_soc_codec *codec,
2642 enum tabla_bandgap_type choice)
2643{
2644 struct tabla_priv *tabla = snd_soc_codec_get_drvdata(codec);
2645
2646 /* TODO lock resources accessed by audio streams and threaded
2647 * interrupt handlers
2648 */
2649
2650 pr_debug("%s, choice is %d, current is %d\n", __func__, choice,
2651 tabla->bandgap_type);
2652
2653 if (tabla->bandgap_type == choice)
2654 return;
2655
2656 if ((tabla->bandgap_type == TABLA_BANDGAP_OFF) &&
2657 (choice == TABLA_BANDGAP_AUDIO_MODE)) {
2658 tabla_codec_enable_audio_mode_bandgap(codec);
Asish Bhattacharya486745a2012-01-20 06:41:53 +05302659 } else if (choice == TABLA_BANDGAP_MBHC_MODE) {
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07002660 snd_soc_update_bits(codec, TABLA_A_BIAS_CENTRAL_BG_CTL, 0x2,
2661 0x2);
2662 snd_soc_update_bits(codec, TABLA_A_BIAS_CENTRAL_BG_CTL, 0x80,
2663 0x80);
2664 snd_soc_update_bits(codec, TABLA_A_BIAS_CENTRAL_BG_CTL, 0x4,
2665 0x4);
Asish Bhattacharya486745a2012-01-20 06:41:53 +05302666 snd_soc_update_bits(codec, TABLA_A_BIAS_CENTRAL_BG_CTL, 0x01,
2667 0x01);
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07002668 usleep_range(1000, 1000);
2669 snd_soc_update_bits(codec, TABLA_A_BIAS_CENTRAL_BG_CTL, 0x80,
2670 0x00);
2671 } else if ((tabla->bandgap_type == TABLA_BANDGAP_MBHC_MODE) &&
2672 (choice == TABLA_BANDGAP_AUDIO_MODE)) {
2673 snd_soc_write(codec, TABLA_A_BIAS_CENTRAL_BG_CTL, 0x00);
2674 usleep_range(100, 100);
2675 tabla_codec_enable_audio_mode_bandgap(codec);
2676 } else if (choice == TABLA_BANDGAP_OFF) {
2677 snd_soc_write(codec, TABLA_A_BIAS_CENTRAL_BG_CTL, 0x00);
2678 } else {
2679 pr_err("%s: Error, Invalid bandgap settings\n", __func__);
2680 }
2681 tabla->bandgap_type = choice;
2682}
2683
2684static int tabla_codec_enable_config_mode(struct snd_soc_codec *codec,
2685 int enable)
2686{
2687 struct tabla_priv *tabla = snd_soc_codec_get_drvdata(codec);
2688
2689 if (enable) {
2690 snd_soc_update_bits(codec, TABLA_A_CONFIG_MODE_FREQ, 0x10, 0);
2691 snd_soc_write(codec, TABLA_A_BIAS_CONFIG_MODE_BG_CTL, 0x17);
2692 usleep_range(5, 5);
2693 snd_soc_update_bits(codec, TABLA_A_CONFIG_MODE_FREQ, 0x80,
2694 0x80);
2695 snd_soc_update_bits(codec, TABLA_A_CONFIG_MODE_TEST, 0x80,
2696 0x80);
2697 usleep_range(10, 10);
2698 snd_soc_update_bits(codec, TABLA_A_CONFIG_MODE_TEST, 0x80, 0);
2699 usleep_range(20, 20);
2700 snd_soc_update_bits(codec, TABLA_A_CLK_BUFF_EN1, 0x08, 0x08);
2701 } else {
2702 snd_soc_update_bits(codec, TABLA_A_BIAS_CONFIG_MODE_BG_CTL, 0x1,
2703 0);
2704 snd_soc_update_bits(codec, TABLA_A_CONFIG_MODE_FREQ, 0x80, 0);
Bhalchandra Gajareb95fb592012-01-18 12:49:17 -08002705 snd_soc_update_bits(codec, TABLA_A_CLK_BUFF_EN1, 0x08, 0x00);
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07002706 }
2707 tabla->config_mode_active = enable ? true : false;
2708
2709 return 0;
2710}
2711
2712static int tabla_codec_enable_clock_block(struct snd_soc_codec *codec,
2713 int config_mode)
2714{
2715 struct tabla_priv *tabla = snd_soc_codec_get_drvdata(codec);
2716
Bhalchandra Gajareb95fb592012-01-18 12:49:17 -08002717 pr_debug("%s: config_mode = %d\n", __func__, config_mode);
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07002718
2719 if (config_mode) {
2720 tabla_codec_enable_config_mode(codec, 1);
2721 snd_soc_write(codec, TABLA_A_CLK_BUFF_EN2, 0x00);
2722 snd_soc_write(codec, TABLA_A_CLK_BUFF_EN2, 0x02);
2723 snd_soc_write(codec, TABLA_A_CLK_BUFF_EN1, 0x0D);
2724 usleep_range(1000, 1000);
2725 } else
2726 snd_soc_update_bits(codec, TABLA_A_CLK_BUFF_EN1, 0x08, 0x00);
2727
2728 if (!config_mode && tabla->mbhc_polling_active) {
2729 snd_soc_write(codec, TABLA_A_CLK_BUFF_EN2, 0x02);
2730 tabla_codec_enable_config_mode(codec, 0);
2731
2732 }
2733
2734 snd_soc_update_bits(codec, TABLA_A_CLK_BUFF_EN1, 0x05, 0x05);
2735 snd_soc_update_bits(codec, TABLA_A_CLK_BUFF_EN2, 0x02, 0x00);
2736 snd_soc_update_bits(codec, TABLA_A_CLK_BUFF_EN2, 0x04, 0x04);
2737 snd_soc_update_bits(codec, TABLA_A_CDC_CLK_MCLK_CTL, 0x01, 0x01);
2738 usleep_range(50, 50);
2739 tabla->clock_active = true;
2740 return 0;
2741}
2742static void tabla_codec_disable_clock_block(struct snd_soc_codec *codec)
2743{
2744 struct tabla_priv *tabla = snd_soc_codec_get_drvdata(codec);
2745 pr_debug("%s\n", __func__);
2746 snd_soc_update_bits(codec, TABLA_A_CLK_BUFF_EN2, 0x04, 0x00);
2747 ndelay(160);
2748 snd_soc_update_bits(codec, TABLA_A_CLK_BUFF_EN2, 0x02, 0x02);
2749 snd_soc_update_bits(codec, TABLA_A_CLK_BUFF_EN1, 0x05, 0x00);
2750 tabla->clock_active = false;
2751}
2752
Joonwoo Park107edf02012-01-11 11:42:24 -08002753static int tabla_codec_mclk_index(const struct tabla_priv *tabla)
2754{
2755 if (tabla->mclk_freq == TABLA_MCLK_RATE_12288KHZ)
2756 return 0;
2757 else if (tabla->mclk_freq == TABLA_MCLK_RATE_9600KHZ)
2758 return 1;
2759 else {
2760 BUG_ON(1);
2761 return -EINVAL;
2762 }
2763}
2764
Bradley Rubincb1e2732011-06-23 16:49:20 -07002765static void tabla_codec_calibrate_hs_polling(struct snd_soc_codec *codec)
2766{
Joonwoo Parkc0672392012-01-11 11:03:14 -08002767 u8 *n_ready, *n_cic;
Joonwoo Park0976d012011-12-22 11:48:18 -08002768 struct tabla_mbhc_btn_detect_cfg *btn_det;
2769 struct tabla_priv *tabla = snd_soc_codec_get_drvdata(codec);
Bradley Rubincb1e2732011-06-23 16:49:20 -07002770
Joonwoo Park0976d012011-12-22 11:48:18 -08002771 btn_det = TABLA_MBHC_CAL_BTN_DET_PTR(tabla->calibration);
Bradley Rubincb1e2732011-06-23 16:49:20 -07002772
Joonwoo Park0976d012011-12-22 11:48:18 -08002773 snd_soc_write(codec, TABLA_A_CDC_MBHC_VOLT_B1_CTL,
2774 tabla->mbhc_data.v_ins_hu & 0xFF);
2775 snd_soc_write(codec, TABLA_A_CDC_MBHC_VOLT_B2_CTL,
2776 (tabla->mbhc_data.v_ins_hu >> 8) & 0xFF);
Bradley Rubincb1e2732011-06-23 16:49:20 -07002777
Joonwoo Park0976d012011-12-22 11:48:18 -08002778 snd_soc_write(codec, TABLA_A_CDC_MBHC_VOLT_B3_CTL,
2779 tabla->mbhc_data.v_b1_hu & 0xFF);
2780 snd_soc_write(codec, TABLA_A_CDC_MBHC_VOLT_B4_CTL,
2781 (tabla->mbhc_data.v_b1_hu >> 8) & 0xFF);
2782
2783 snd_soc_write(codec, TABLA_A_CDC_MBHC_VOLT_B5_CTL,
2784 tabla->mbhc_data.v_b1_h & 0xFF);
2785 snd_soc_write(codec, TABLA_A_CDC_MBHC_VOLT_B6_CTL,
2786 (tabla->mbhc_data.v_b1_h >> 8) & 0xFF);
2787
2788 snd_soc_write(codec, TABLA_A_CDC_MBHC_VOLT_B9_CTL,
2789 tabla->mbhc_data.v_brh & 0xFF);
2790 snd_soc_write(codec, TABLA_A_CDC_MBHC_VOLT_B10_CTL,
2791 (tabla->mbhc_data.v_brh >> 8) & 0xFF);
2792
2793 snd_soc_write(codec, TABLA_A_CDC_MBHC_VOLT_B11_CTL,
2794 tabla->mbhc_data.v_brl & 0xFF);
2795 snd_soc_write(codec, TABLA_A_CDC_MBHC_VOLT_B12_CTL,
2796 (tabla->mbhc_data.v_brl >> 8) & 0xFF);
2797
Joonwoo Parkc0672392012-01-11 11:03:14 -08002798 n_ready = tabla_mbhc_cal_btn_det_mp(btn_det, TABLA_BTN_DET_N_READY);
Joonwoo Park0976d012011-12-22 11:48:18 -08002799 snd_soc_write(codec, TABLA_A_CDC_MBHC_TIMER_B1_CTL,
Joonwoo Parkc0672392012-01-11 11:03:14 -08002800 n_ready[tabla_codec_mclk_index(tabla)]);
Joonwoo Park0976d012011-12-22 11:48:18 -08002801 snd_soc_write(codec, TABLA_A_CDC_MBHC_TIMER_B2_CTL,
2802 tabla->mbhc_data.npoll);
2803 snd_soc_write(codec, TABLA_A_CDC_MBHC_TIMER_B3_CTL,
2804 tabla->mbhc_data.nbounce_wait);
Joonwoo Park0976d012011-12-22 11:48:18 -08002805 n_cic = tabla_mbhc_cal_btn_det_mp(btn_det, TABLA_BTN_DET_N_CIC);
Joonwoo Park107edf02012-01-11 11:42:24 -08002806 snd_soc_write(codec, TABLA_A_CDC_MBHC_TIMER_B6_CTL,
2807 n_cic[tabla_codec_mclk_index(tabla)]);
Bradley Rubincb1e2732011-06-23 16:49:20 -07002808}
2809
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07002810static int tabla_startup(struct snd_pcm_substream *substream,
2811 struct snd_soc_dai *dai)
2812{
Kuirong Wanga545e722012-02-06 19:12:54 -08002813 struct wcd9xxx *tabla_core = dev_get_drvdata(dai->codec->dev->parent);
Kiran Kandi6fae8bf2011-08-15 10:36:42 -07002814 pr_debug("%s(): substream = %s stream = %d\n" , __func__,
2815 substream->name, substream->stream);
Kuirong Wanga545e722012-02-06 19:12:54 -08002816 if ((tabla_core != NULL) &&
2817 (tabla_core->dev != NULL) &&
2818 (tabla_core->dev->parent != NULL))
2819 pm_runtime_get_sync(tabla_core->dev->parent);
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07002820
Kiran Kandi6fae8bf2011-08-15 10:36:42 -07002821 return 0;
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07002822}
2823
2824static void tabla_shutdown(struct snd_pcm_substream *substream,
2825 struct snd_soc_dai *dai)
2826{
Kuirong Wanga545e722012-02-06 19:12:54 -08002827 struct wcd9xxx *tabla_core = dev_get_drvdata(dai->codec->dev->parent);
Kiran Kandi6fae8bf2011-08-15 10:36:42 -07002828 pr_debug("%s(): substream = %s stream = %d\n" , __func__,
2829 substream->name, substream->stream);
Kuirong Wanga545e722012-02-06 19:12:54 -08002830 if ((tabla_core != NULL) &&
2831 (tabla_core->dev != NULL) &&
2832 (tabla_core->dev->parent != NULL)) {
2833 pm_runtime_mark_last_busy(tabla_core->dev->parent);
2834 pm_runtime_put(tabla_core->dev->parent);
2835 }
Kiran Kandi6fae8bf2011-08-15 10:36:42 -07002836}
2837
2838int tabla_mclk_enable(struct snd_soc_codec *codec, int mclk_enable)
2839{
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07002840 struct tabla_priv *tabla = snd_soc_codec_get_drvdata(codec);
2841
Kiran Kandi6fae8bf2011-08-15 10:36:42 -07002842 pr_debug("%s() mclk_enable = %u\n", __func__, mclk_enable);
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07002843
Kiran Kandi6fae8bf2011-08-15 10:36:42 -07002844 if (mclk_enable) {
2845 tabla->mclk_enabled = true;
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07002846
Kiran Kandi6fae8bf2011-08-15 10:36:42 -07002847 if (tabla->mbhc_polling_active && (tabla->mclk_enabled)) {
Bradley Rubincb1e2732011-06-23 16:49:20 -07002848 tabla_codec_pause_hs_polling(codec);
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07002849 tabla_codec_enable_bandgap(codec,
Kiran Kandi6fae8bf2011-08-15 10:36:42 -07002850 TABLA_BANDGAP_AUDIO_MODE);
2851 tabla_codec_enable_clock_block(codec, 0);
Bradley Rubincb1e2732011-06-23 16:49:20 -07002852 tabla_codec_calibrate_hs_polling(codec);
2853 tabla_codec_start_hs_polling(codec);
Asish Bhattacharya486745a2012-01-20 06:41:53 +05302854 } else {
2855 tabla_codec_enable_bandgap(codec,
2856 TABLA_BANDGAP_AUDIO_MODE);
2857 tabla_codec_enable_clock_block(codec, 0);
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07002858 }
Kiran Kandi6fae8bf2011-08-15 10:36:42 -07002859 } else {
2860
2861 if (!tabla->mclk_enabled) {
2862 pr_err("Error, MCLK already diabled\n");
2863 return -EINVAL;
2864 }
2865 tabla->mclk_enabled = false;
2866
2867 if (tabla->mbhc_polling_active) {
2868 if (!tabla->mclk_enabled) {
2869 tabla_codec_pause_hs_polling(codec);
2870 tabla_codec_enable_bandgap(codec,
2871 TABLA_BANDGAP_MBHC_MODE);
2872 tabla_enable_rx_bias(codec, 1);
2873 tabla_codec_enable_clock_block(codec, 1);
2874 tabla_codec_calibrate_hs_polling(codec);
2875 tabla_codec_start_hs_polling(codec);
2876 }
2877 snd_soc_update_bits(codec, TABLA_A_CLK_BUFF_EN1,
2878 0x05, 0x01);
Asish Bhattacharya486745a2012-01-20 06:41:53 +05302879 } else {
2880 tabla_codec_disable_clock_block(codec);
2881 tabla_codec_enable_bandgap(codec,
2882 TABLA_BANDGAP_OFF);
Kiran Kandi6fae8bf2011-08-15 10:36:42 -07002883 }
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07002884 }
Kiran Kandi6fae8bf2011-08-15 10:36:42 -07002885 return 0;
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07002886}
2887
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07002888static int tabla_set_dai_sysclk(struct snd_soc_dai *dai,
2889 int clk_id, unsigned int freq, int dir)
2890{
2891 pr_debug("%s\n", __func__);
2892 return 0;
2893}
2894
2895static int tabla_set_dai_fmt(struct snd_soc_dai *dai, unsigned int fmt)
2896{
Santosh Mardie15e2302011-11-15 10:39:23 +05302897 u8 val = 0;
2898 struct tabla_priv *tabla = snd_soc_codec_get_drvdata(dai->codec);
2899
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07002900 pr_debug("%s\n", __func__);
Santosh Mardie15e2302011-11-15 10:39:23 +05302901 switch (fmt & SND_SOC_DAIFMT_MASTER_MASK) {
2902 case SND_SOC_DAIFMT_CBS_CFS:
2903 /* CPU is master */
Asish Bhattacharyab1aeae22012-02-15 08:29:28 +05302904 if (tabla->intf_type == WCD9XXX_INTERFACE_TYPE_I2C) {
Bharath Ramachandramurthy9c79f132011-11-28 11:18:57 -08002905 if (dai->id == AIF1_CAP)
Santosh Mardie15e2302011-11-15 10:39:23 +05302906 snd_soc_update_bits(dai->codec,
2907 TABLA_A_CDC_CLK_TX_I2S_CTL,
2908 TABLA_I2S_MASTER_MODE_MASK, 0);
Bharath Ramachandramurthy9c79f132011-11-28 11:18:57 -08002909 else if (dai->id == AIF1_PB)
Santosh Mardie15e2302011-11-15 10:39:23 +05302910 snd_soc_update_bits(dai->codec,
2911 TABLA_A_CDC_CLK_RX_I2S_CTL,
2912 TABLA_I2S_MASTER_MODE_MASK, 0);
2913 }
2914 break;
2915 case SND_SOC_DAIFMT_CBM_CFM:
2916 /* CPU is slave */
Asish Bhattacharyab1aeae22012-02-15 08:29:28 +05302917 if (tabla->intf_type == WCD9XXX_INTERFACE_TYPE_I2C) {
Santosh Mardie15e2302011-11-15 10:39:23 +05302918 val = TABLA_I2S_MASTER_MODE_MASK;
Bharath Ramachandramurthy9c79f132011-11-28 11:18:57 -08002919 if (dai->id == AIF1_CAP)
Santosh Mardie15e2302011-11-15 10:39:23 +05302920 snd_soc_update_bits(dai->codec,
2921 TABLA_A_CDC_CLK_TX_I2S_CTL, val, val);
Bharath Ramachandramurthy9c79f132011-11-28 11:18:57 -08002922 else if (dai->id == AIF1_PB)
Santosh Mardie15e2302011-11-15 10:39:23 +05302923 snd_soc_update_bits(dai->codec,
2924 TABLA_A_CDC_CLK_RX_I2S_CTL, val, val);
2925 }
2926 break;
2927 default:
2928 return -EINVAL;
2929 }
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07002930 return 0;
2931}
2932
Bharath Ramachandramurthy9c79f132011-11-28 11:18:57 -08002933static int tabla_set_channel_map(struct snd_soc_dai *dai,
2934 unsigned int tx_num, unsigned int *tx_slot,
2935 unsigned int rx_num, unsigned int *rx_slot)
2936
2937{
2938 struct tabla_priv *tabla = snd_soc_codec_get_drvdata(dai->codec);
2939 u32 i = 0;
2940 if (!tx_slot && !rx_slot) {
2941 pr_err("%s: Invalid\n", __func__);
2942 return -EINVAL;
2943 }
2944 pr_debug("%s: DAI-ID %x %d %d\n", __func__, dai->id, tx_num, rx_num);
2945
Neema Shettyd3a89262012-02-16 10:23:50 -08002946 if (dai->id == AIF1_PB || dai->id == AIF2_PB) {
Bharath Ramachandramurthy9c79f132011-11-28 11:18:57 -08002947 for (i = 0; i < rx_num; i++) {
2948 tabla->dai[dai->id - 1].ch_num[i] = rx_slot[i];
2949 tabla->dai[dai->id - 1].ch_act = 0;
2950 tabla->dai[dai->id - 1].ch_tot = rx_num;
2951 }
2952 } else if (dai->id == AIF1_CAP) {
2953 for (i = 0; i < tx_num; i++) {
2954 tabla->dai[dai->id - 1].ch_num[i] = tx_slot[i];
2955 tabla->dai[dai->id - 1].ch_act = 0;
2956 tabla->dai[dai->id - 1].ch_tot = tx_num;
2957 }
2958 }
2959 return 0;
2960}
2961
2962static int tabla_get_channel_map(struct snd_soc_dai *dai,
2963 unsigned int *tx_num, unsigned int *tx_slot,
2964 unsigned int *rx_num, unsigned int *rx_slot)
2965
2966{
Asish Bhattacharyab1aeae22012-02-15 08:29:28 +05302967 struct wcd9xxx *tabla = dev_get_drvdata(dai->codec->control_data);
Bharath Ramachandramurthy9c79f132011-11-28 11:18:57 -08002968
2969 u32 cnt = 0;
2970 u32 tx_ch[SLIM_MAX_TX_PORTS];
2971 u32 rx_ch[SLIM_MAX_RX_PORTS];
2972
2973 if (!rx_slot && !tx_slot) {
2974 pr_err("%s: Invalid\n", __func__);
2975 return -EINVAL;
2976 }
2977 pr_debug("%s: DAI-ID %x\n", __func__, dai->id);
2978 /* for virtual port, codec driver needs to do
2979 * housekeeping, for now should be ok
2980 */
Asish Bhattacharyab1aeae22012-02-15 08:29:28 +05302981 wcd9xxx_get_channel(tabla, rx_ch, tx_ch);
Bharath Ramachandramurthy9c79f132011-11-28 11:18:57 -08002982 if (dai->id == AIF1_PB) {
2983 *rx_num = tabla_dai[dai->id - 1].playback.channels_max;
2984 while (cnt < *rx_num) {
2985 rx_slot[cnt] = rx_ch[cnt];
2986 cnt++;
2987 }
2988 } else if (dai->id == AIF1_CAP) {
2989 *tx_num = tabla_dai[dai->id - 1].capture.channels_max;
2990 while (cnt < *tx_num) {
2991 tx_slot[cnt] = tx_ch[6 + cnt];
2992 cnt++;
2993 }
Neema Shettyd3a89262012-02-16 10:23:50 -08002994 } else if (dai->id == AIF2_PB) {
2995 *rx_num = tabla_dai[dai->id - 1].playback.channels_max;
2996 while (cnt < *rx_num) {
2997 rx_slot[cnt] = rx_ch[5 + cnt];
2998 cnt++;
2999 }
Bharath Ramachandramurthy9c79f132011-11-28 11:18:57 -08003000 }
3001 return 0;
3002}
3003
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07003004static int tabla_hw_params(struct snd_pcm_substream *substream,
3005 struct snd_pcm_hw_params *params,
3006 struct snd_soc_dai *dai)
3007{
Bhalchandra Gajare9a901fd2011-08-01 10:07:15 -07003008 struct snd_soc_codec *codec = dai->codec;
Santosh Mardie15e2302011-11-15 10:39:23 +05303009 struct tabla_priv *tabla = snd_soc_codec_get_drvdata(dai->codec);
Bhalchandra Gajare038bf3a2011-09-02 15:32:30 -07003010 u8 path, shift;
3011 u16 tx_fs_reg, rx_fs_reg;
Bhalchandra Gajare9a901fd2011-08-01 10:07:15 -07003012 u8 tx_fs_rate, rx_fs_rate, rx_state, tx_state;
Kuirong Wang0f8ade32012-02-27 16:29:45 -08003013 u32 compander_fs;
Bhalchandra Gajare9a901fd2011-08-01 10:07:15 -07003014
Bharath Ramachandramurthy9c79f132011-11-28 11:18:57 -08003015 pr_debug("%s: DAI-ID %x rate %d\n", __func__, dai->id,
3016 params_rate(params));
Bhalchandra Gajare9a901fd2011-08-01 10:07:15 -07003017
3018 switch (params_rate(params)) {
3019 case 8000:
3020 tx_fs_rate = 0x00;
3021 rx_fs_rate = 0x00;
Kuirong Wang0f8ade32012-02-27 16:29:45 -08003022 compander_fs = COMPANDER_FS_8KHZ;
Bhalchandra Gajare9a901fd2011-08-01 10:07:15 -07003023 break;
3024 case 16000:
3025 tx_fs_rate = 0x01;
3026 rx_fs_rate = 0x20;
Kuirong Wang0f8ade32012-02-27 16:29:45 -08003027 compander_fs = COMPANDER_FS_16KHZ;
Bhalchandra Gajare9a901fd2011-08-01 10:07:15 -07003028 break;
3029 case 32000:
3030 tx_fs_rate = 0x02;
3031 rx_fs_rate = 0x40;
Kuirong Wang0f8ade32012-02-27 16:29:45 -08003032 compander_fs = COMPANDER_FS_32KHZ;
Bhalchandra Gajare9a901fd2011-08-01 10:07:15 -07003033 break;
3034 case 48000:
3035 tx_fs_rate = 0x03;
3036 rx_fs_rate = 0x60;
Kuirong Wang0f8ade32012-02-27 16:29:45 -08003037 compander_fs = COMPANDER_FS_48KHZ;
Bhalchandra Gajare9a901fd2011-08-01 10:07:15 -07003038 break;
3039 default:
3040 pr_err("%s: Invalid sampling rate %d\n", __func__,
3041 params_rate(params));
3042 return -EINVAL;
3043 }
3044
3045
3046 /**
3047 * If current dai is a tx dai, set sample rate to
3048 * all the txfe paths that are currently not active
3049 */
Bharath Ramachandramurthy9c79f132011-11-28 11:18:57 -08003050 if (dai->id == AIF1_CAP) {
Bhalchandra Gajare9a901fd2011-08-01 10:07:15 -07003051
3052 tx_state = snd_soc_read(codec,
3053 TABLA_A_CDC_CLK_TX_CLK_EN_B1_CTL);
3054
3055 for (path = 1, shift = 0;
3056 path <= NUM_DECIMATORS; path++, shift++) {
3057
3058 if (path == BITS_PER_REG + 1) {
3059 shift = 0;
3060 tx_state = snd_soc_read(codec,
3061 TABLA_A_CDC_CLK_TX_CLK_EN_B2_CTL);
3062 }
3063
3064 if (!(tx_state & (1 << shift))) {
3065 tx_fs_reg = TABLA_A_CDC_TX1_CLK_FS_CTL
3066 + (BITS_PER_REG*(path-1));
3067 snd_soc_update_bits(codec, tx_fs_reg,
3068 0x03, tx_fs_rate);
3069 }
3070 }
Asish Bhattacharyab1aeae22012-02-15 08:29:28 +05303071 if (tabla->intf_type == WCD9XXX_INTERFACE_TYPE_I2C) {
Santosh Mardie15e2302011-11-15 10:39:23 +05303072 switch (params_format(params)) {
3073 case SNDRV_PCM_FORMAT_S16_LE:
3074 snd_soc_update_bits(codec,
3075 TABLA_A_CDC_CLK_TX_I2S_CTL,
3076 0x20, 0x20);
3077 break;
3078 case SNDRV_PCM_FORMAT_S32_LE:
3079 snd_soc_update_bits(codec,
3080 TABLA_A_CDC_CLK_TX_I2S_CTL,
3081 0x20, 0x00);
3082 break;
3083 default:
3084 pr_err("invalid format\n");
3085 break;
3086 }
3087 snd_soc_update_bits(codec, TABLA_A_CDC_CLK_TX_I2S_CTL,
3088 0x03, tx_fs_rate);
Bharath Ramachandramurthy9c79f132011-11-28 11:18:57 -08003089 } else {
3090 tabla->dai[dai->id - 1].rate = params_rate(params);
Santosh Mardie15e2302011-11-15 10:39:23 +05303091 }
Bhalchandra Gajare9a901fd2011-08-01 10:07:15 -07003092 }
Bhalchandra Gajare9a901fd2011-08-01 10:07:15 -07003093 /**
3094 * TODO: Need to handle case where same RX chain takes 2 or more inputs
3095 * with varying sample rates
3096 */
3097
3098 /**
3099 * If current dai is a rx dai, set sample rate to
3100 * all the rx paths that are currently not active
3101 */
Neema Shettyd3a89262012-02-16 10:23:50 -08003102 if (dai->id == AIF1_PB || dai->id == AIF2_PB) {
Bhalchandra Gajare9a901fd2011-08-01 10:07:15 -07003103
3104 rx_state = snd_soc_read(codec,
3105 TABLA_A_CDC_CLK_RX_B1_CTL);
3106
3107 for (path = 1, shift = 0;
3108 path <= NUM_INTERPOLATORS; path++, shift++) {
3109
3110 if (!(rx_state & (1 << shift))) {
3111 rx_fs_reg = TABLA_A_CDC_RX1_B5_CTL
3112 + (BITS_PER_REG*(path-1));
3113 snd_soc_update_bits(codec, rx_fs_reg,
3114 0xE0, rx_fs_rate);
Kuirong Wang0f8ade32012-02-27 16:29:45 -08003115 if (comp_rx_path[shift] < COMPANDER_MAX)
3116 tabla->comp_fs[comp_rx_path[shift]]
3117 = compander_fs;
Bhalchandra Gajare9a901fd2011-08-01 10:07:15 -07003118 }
3119 }
Asish Bhattacharyab1aeae22012-02-15 08:29:28 +05303120 if (tabla->intf_type == WCD9XXX_INTERFACE_TYPE_I2C) {
Santosh Mardie15e2302011-11-15 10:39:23 +05303121 switch (params_format(params)) {
3122 case SNDRV_PCM_FORMAT_S16_LE:
3123 snd_soc_update_bits(codec,
3124 TABLA_A_CDC_CLK_RX_I2S_CTL,
3125 0x20, 0x20);
3126 break;
3127 case SNDRV_PCM_FORMAT_S32_LE:
3128 snd_soc_update_bits(codec,
3129 TABLA_A_CDC_CLK_RX_I2S_CTL,
3130 0x20, 0x00);
3131 break;
3132 default:
3133 pr_err("invalid format\n");
3134 break;
3135 }
3136 snd_soc_update_bits(codec, TABLA_A_CDC_CLK_RX_I2S_CTL,
3137 0x03, (rx_fs_rate >> 0x05));
Bharath Ramachandramurthy9c79f132011-11-28 11:18:57 -08003138 } else {
3139 tabla->dai[dai->id - 1].rate = params_rate(params);
Santosh Mardie15e2302011-11-15 10:39:23 +05303140 }
Bhalchandra Gajare9a901fd2011-08-01 10:07:15 -07003141 }
3142
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07003143 return 0;
3144}
3145
3146static struct snd_soc_dai_ops tabla_dai_ops = {
3147 .startup = tabla_startup,
3148 .shutdown = tabla_shutdown,
3149 .hw_params = tabla_hw_params,
3150 .set_sysclk = tabla_set_dai_sysclk,
3151 .set_fmt = tabla_set_dai_fmt,
Bharath Ramachandramurthy9c79f132011-11-28 11:18:57 -08003152 .set_channel_map = tabla_set_channel_map,
3153 .get_channel_map = tabla_get_channel_map,
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07003154};
3155
3156static struct snd_soc_dai_driver tabla_dai[] = {
3157 {
3158 .name = "tabla_rx1",
Bharath Ramachandramurthy9c79f132011-11-28 11:18:57 -08003159 .id = AIF1_PB,
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07003160 .playback = {
3161 .stream_name = "AIF1 Playback",
Bhalchandra Gajare9a901fd2011-08-01 10:07:15 -07003162 .rates = WCD9310_RATES,
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07003163 .formats = TABLA_FORMATS,
3164 .rate_max = 48000,
3165 .rate_min = 8000,
3166 .channels_min = 1,
Bharath Ramachandramurthy9c79f132011-11-28 11:18:57 -08003167 .channels_max = 2,
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07003168 },
3169 .ops = &tabla_dai_ops,
3170 },
3171 {
3172 .name = "tabla_tx1",
Bharath Ramachandramurthy9c79f132011-11-28 11:18:57 -08003173 .id = AIF1_CAP,
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07003174 .capture = {
3175 .stream_name = "AIF1 Capture",
Bhalchandra Gajare9a901fd2011-08-01 10:07:15 -07003176 .rates = WCD9310_RATES,
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07003177 .formats = TABLA_FORMATS,
3178 .rate_max = 48000,
3179 .rate_min = 8000,
3180 .channels_min = 1,
Bharath Ramachandramurthy9c79f132011-11-28 11:18:57 -08003181 .channels_max = 4,
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07003182 },
3183 .ops = &tabla_dai_ops,
3184 },
Neema Shettyd3a89262012-02-16 10:23:50 -08003185 {
3186 .name = "tabla_rx2",
3187 .id = AIF2_PB,
3188 .playback = {
3189 .stream_name = "AIF2 Playback",
3190 .rates = WCD9310_RATES,
3191 .formats = TABLA_FORMATS,
3192 .rate_min = 8000,
3193 .rate_max = 48000,
3194 .channels_min = 1,
3195 .channels_max = 2,
3196 },
3197 .ops = &tabla_dai_ops,
3198 },
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07003199};
Santosh Mardie15e2302011-11-15 10:39:23 +05303200
3201static struct snd_soc_dai_driver tabla_i2s_dai[] = {
3202 {
3203 .name = "tabla_i2s_rx1",
3204 .id = 1,
3205 .playback = {
3206 .stream_name = "AIF1 Playback",
3207 .rates = WCD9310_RATES,
3208 .formats = TABLA_FORMATS,
3209 .rate_max = 48000,
3210 .rate_min = 8000,
3211 .channels_min = 1,
3212 .channels_max = 4,
3213 },
3214 .ops = &tabla_dai_ops,
3215 },
3216 {
3217 .name = "tabla_i2s_tx1",
3218 .id = 2,
3219 .capture = {
3220 .stream_name = "AIF1 Capture",
3221 .rates = WCD9310_RATES,
3222 .formats = TABLA_FORMATS,
3223 .rate_max = 48000,
3224 .rate_min = 8000,
3225 .channels_min = 1,
3226 .channels_max = 4,
3227 },
3228 .ops = &tabla_dai_ops,
3229 },
3230};
Bharath Ramachandramurthy9c79f132011-11-28 11:18:57 -08003231
3232static int tabla_codec_enable_slimrx(struct snd_soc_dapm_widget *w,
3233 struct snd_kcontrol *kcontrol, int event)
3234{
Asish Bhattacharyab1aeae22012-02-15 08:29:28 +05303235 struct wcd9xxx *tabla;
Bharath Ramachandramurthy9c79f132011-11-28 11:18:57 -08003236 struct snd_soc_codec *codec = w->codec;
3237 struct tabla_priv *tabla_p = snd_soc_codec_get_drvdata(codec);
3238 u32 j = 0;
3239 u32 ret = 0;
3240 codec->control_data = dev_get_drvdata(codec->dev->parent);
3241 tabla = codec->control_data;
3242 /* Execute the callback only if interface type is slimbus */
Asish Bhattacharyab1aeae22012-02-15 08:29:28 +05303243 if (tabla_p->intf_type != WCD9XXX_INTERFACE_TYPE_SLIMBUS)
Bharath Ramachandramurthy9c79f132011-11-28 11:18:57 -08003244 return 0;
3245 switch (event) {
3246 case SND_SOC_DAPM_POST_PMU:
3247 for (j = 0; j < ARRAY_SIZE(tabla_dai); j++) {
3248 if (tabla_dai[j].id == AIF1_CAP)
3249 continue;
3250 if (!strncmp(w->sname,
3251 tabla_dai[j].playback.stream_name, 13)) {
3252 ++tabla_p->dai[j].ch_act;
3253 break;
3254 }
3255 }
3256 if (tabla_p->dai[j].ch_act == tabla_p->dai[j].ch_tot)
Asish Bhattacharyab1aeae22012-02-15 08:29:28 +05303257 ret = wcd9xxx_cfg_slim_sch_rx(tabla,
3258 tabla_p->dai[j].ch_num,
3259 tabla_p->dai[j].ch_tot,
3260 tabla_p->dai[j].rate);
Bharath Ramachandramurthy9c79f132011-11-28 11:18:57 -08003261 break;
3262 case SND_SOC_DAPM_POST_PMD:
3263 for (j = 0; j < ARRAY_SIZE(tabla_dai); j++) {
3264 if (tabla_dai[j].id == AIF1_CAP)
3265 continue;
3266 if (!strncmp(w->sname,
3267 tabla_dai[j].playback.stream_name, 13)) {
3268 --tabla_p->dai[j].ch_act;
3269 break;
3270 }
3271 }
3272 if (!tabla_p->dai[j].ch_act) {
Asish Bhattacharyab1aeae22012-02-15 08:29:28 +05303273 ret = wcd9xxx_close_slim_sch_rx(tabla,
Bharath Ramachandramurthy9c79f132011-11-28 11:18:57 -08003274 tabla_p->dai[j].ch_num,
3275 tabla_p->dai[j].ch_tot);
3276 tabla_p->dai[j].rate = 0;
3277 memset(tabla_p->dai[j].ch_num, 0, (sizeof(u32)*
Asish Bhattacharyab1aeae22012-02-15 08:29:28 +05303278 tabla_p->dai[j].ch_tot));
Bharath Ramachandramurthy9c79f132011-11-28 11:18:57 -08003279 tabla_p->dai[j].ch_tot = 0;
3280 }
3281 }
3282 return ret;
3283}
3284
3285static int tabla_codec_enable_slimtx(struct snd_soc_dapm_widget *w,
3286 struct snd_kcontrol *kcontrol, int event)
3287{
Asish Bhattacharyab1aeae22012-02-15 08:29:28 +05303288 struct wcd9xxx *tabla;
Bharath Ramachandramurthy9c79f132011-11-28 11:18:57 -08003289 struct snd_soc_codec *codec = w->codec;
3290 struct tabla_priv *tabla_p = snd_soc_codec_get_drvdata(codec);
3291 /* index to the DAI ID, for now hardcoding */
3292 u32 j = 0;
3293 u32 ret = 0;
3294
3295 codec->control_data = dev_get_drvdata(codec->dev->parent);
3296 tabla = codec->control_data;
3297
3298 /* Execute the callback only if interface type is slimbus */
Asish Bhattacharyab1aeae22012-02-15 08:29:28 +05303299 if (tabla_p->intf_type != WCD9XXX_INTERFACE_TYPE_SLIMBUS)
Bharath Ramachandramurthy9c79f132011-11-28 11:18:57 -08003300 return 0;
3301 switch (event) {
3302 case SND_SOC_DAPM_POST_PMU:
3303 for (j = 0; j < ARRAY_SIZE(tabla_dai); j++) {
Neema Shettyd3a89262012-02-16 10:23:50 -08003304 if (tabla_dai[j].id == AIF1_PB ||
3305 tabla_dai[j].id == AIF2_PB)
Bharath Ramachandramurthy9c79f132011-11-28 11:18:57 -08003306 continue;
3307 if (!strncmp(w->sname,
3308 tabla_dai[j].capture.stream_name, 13)) {
3309 ++tabla_p->dai[j].ch_act;
3310 break;
3311 }
3312 }
3313 if (tabla_p->dai[j].ch_act == tabla_p->dai[j].ch_tot)
Asish Bhattacharyab1aeae22012-02-15 08:29:28 +05303314 ret = wcd9xxx_cfg_slim_sch_tx(tabla,
Bharath Ramachandramurthy9c79f132011-11-28 11:18:57 -08003315 tabla_p->dai[j].ch_num,
3316 tabla_p->dai[j].ch_tot,
3317 tabla_p->dai[j].rate);
3318 break;
3319 case SND_SOC_DAPM_POST_PMD:
3320 for (j = 0; j < ARRAY_SIZE(tabla_dai); j++) {
Neema Shettyd3a89262012-02-16 10:23:50 -08003321 if (tabla_dai[j].id == AIF1_PB ||
3322 tabla_dai[j].id == AIF2_PB)
Bharath Ramachandramurthy9c79f132011-11-28 11:18:57 -08003323 continue;
3324 if (!strncmp(w->sname,
3325 tabla_dai[j].capture.stream_name, 13)) {
3326 --tabla_p->dai[j].ch_act;
3327 break;
3328 }
3329 }
3330 if (!tabla_p->dai[j].ch_act) {
Asish Bhattacharyab1aeae22012-02-15 08:29:28 +05303331 ret = wcd9xxx_close_slim_sch_tx(tabla,
Bharath Ramachandramurthy9c79f132011-11-28 11:18:57 -08003332 tabla_p->dai[j].ch_num,
3333 tabla_p->dai[j].ch_tot);
3334 tabla_p->dai[j].rate = 0;
3335 memset(tabla_p->dai[j].ch_num, 0, (sizeof(u32)*
Asish Bhattacharyab1aeae22012-02-15 08:29:28 +05303336 tabla_p->dai[j].ch_tot));
Bharath Ramachandramurthy9c79f132011-11-28 11:18:57 -08003337 tabla_p->dai[j].ch_tot = 0;
3338 }
3339 }
3340 return ret;
3341}
3342
3343/* Todo: Have seperate dapm widgets for I2S and Slimbus.
3344 * Might Need to have callbacks registered only for slimbus
3345 */
3346static const struct snd_soc_dapm_widget tabla_dapm_widgets[] = {
3347 /*RX stuff */
3348 SND_SOC_DAPM_OUTPUT("EAR"),
3349
3350 SND_SOC_DAPM_PGA("EAR PA", TABLA_A_RX_EAR_EN, 4, 0, NULL, 0),
3351
3352 SND_SOC_DAPM_MIXER("DAC1", TABLA_A_RX_EAR_EN, 6, 0, dac1_switch,
3353 ARRAY_SIZE(dac1_switch)),
3354
3355 SND_SOC_DAPM_AIF_IN_E("SLIM RX1", "AIF1 Playback", 0, SND_SOC_NOPM, 0,
3356 0, tabla_codec_enable_slimrx,
3357 SND_SOC_DAPM_POST_PMU | SND_SOC_DAPM_POST_PMD),
3358 SND_SOC_DAPM_AIF_IN_E("SLIM RX2", "AIF1 Playback", 0, SND_SOC_NOPM, 0,
3359 0, tabla_codec_enable_slimrx,
3360 SND_SOC_DAPM_POST_PMU | SND_SOC_DAPM_POST_PMD),
3361
3362 SND_SOC_DAPM_AIF_IN("SLIM RX3", "AIF1 Playback", 0, SND_SOC_NOPM, 0, 0),
3363 SND_SOC_DAPM_AIF_IN("SLIM RX4", "AIF1 Playback", 0, SND_SOC_NOPM, 0, 0),
3364
Neema Shettyd3a89262012-02-16 10:23:50 -08003365 SND_SOC_DAPM_AIF_IN_E("SLIM RX6", "AIF2 Playback", 0, SND_SOC_NOPM, 0,
3366 0, tabla_codec_enable_slimrx,
3367 SND_SOC_DAPM_POST_PMU | SND_SOC_DAPM_POST_PMD),
3368 SND_SOC_DAPM_AIF_IN_E("SLIM RX7", "AIF2 Playback", 0, SND_SOC_NOPM, 0,
3369 0, tabla_codec_enable_slimrx,
3370 SND_SOC_DAPM_POST_PMU | SND_SOC_DAPM_POST_PMD),
3371
Bharath Ramachandramurthy9c79f132011-11-28 11:18:57 -08003372 /* Headphone */
3373 SND_SOC_DAPM_OUTPUT("HEADPHONE"),
3374 SND_SOC_DAPM_PGA_E("HPHL", TABLA_A_RX_HPH_CNP_EN, 5, 0, NULL, 0,
3375 tabla_hph_pa_event, SND_SOC_DAPM_PRE_PMU |
3376 SND_SOC_DAPM_POST_PMD),
3377 SND_SOC_DAPM_MIXER("HPHL DAC", TABLA_A_RX_HPH_L_DAC_CTL, 7, 0,
3378 hphl_switch, ARRAY_SIZE(hphl_switch)),
3379
3380 SND_SOC_DAPM_PGA_E("HPHR", TABLA_A_RX_HPH_CNP_EN, 4, 0, NULL, 0,
3381 tabla_hph_pa_event, SND_SOC_DAPM_PRE_PMU |
3382 SND_SOC_DAPM_POST_PMD),
3383
3384 SND_SOC_DAPM_DAC_E("HPHR DAC", NULL, TABLA_A_RX_HPH_R_DAC_CTL, 7, 0,
3385 tabla_hphr_dac_event,
3386 SND_SOC_DAPM_PRE_PMU | SND_SOC_DAPM_POST_PMD),
3387
3388 /* Speaker */
3389 SND_SOC_DAPM_OUTPUT("LINEOUT1"),
3390 SND_SOC_DAPM_OUTPUT("LINEOUT2"),
3391 SND_SOC_DAPM_OUTPUT("LINEOUT3"),
3392 SND_SOC_DAPM_OUTPUT("LINEOUT4"),
3393 SND_SOC_DAPM_OUTPUT("LINEOUT5"),
3394
3395 SND_SOC_DAPM_PGA_E("LINEOUT1 PA", TABLA_A_RX_LINE_CNP_EN, 0, 0, NULL,
3396 0, tabla_codec_enable_lineout, SND_SOC_DAPM_PRE_PMU |
3397 SND_SOC_DAPM_POST_PMU | SND_SOC_DAPM_POST_PMD),
3398 SND_SOC_DAPM_PGA_E("LINEOUT2 PA", TABLA_A_RX_LINE_CNP_EN, 1, 0, NULL,
3399 0, tabla_codec_enable_lineout, SND_SOC_DAPM_PRE_PMU |
3400 SND_SOC_DAPM_POST_PMU | SND_SOC_DAPM_POST_PMD),
3401 SND_SOC_DAPM_PGA_E("LINEOUT3 PA", TABLA_A_RX_LINE_CNP_EN, 2, 0, NULL,
3402 0, tabla_codec_enable_lineout, SND_SOC_DAPM_PRE_PMU |
3403 SND_SOC_DAPM_POST_PMU | SND_SOC_DAPM_POST_PMD),
3404 SND_SOC_DAPM_PGA_E("LINEOUT4 PA", TABLA_A_RX_LINE_CNP_EN, 3, 0, NULL,
3405 0, tabla_codec_enable_lineout, SND_SOC_DAPM_PRE_PMU |
3406 SND_SOC_DAPM_POST_PMU | SND_SOC_DAPM_POST_PMD),
3407 SND_SOC_DAPM_PGA_E("LINEOUT5 PA", TABLA_A_RX_LINE_CNP_EN, 4, 0, NULL, 0,
3408 tabla_codec_enable_lineout, SND_SOC_DAPM_PRE_PMU |
3409 SND_SOC_DAPM_POST_PMU | SND_SOC_DAPM_POST_PMD),
3410
3411 SND_SOC_DAPM_DAC_E("LINEOUT1 DAC", NULL, TABLA_A_RX_LINE_1_DAC_CTL, 7, 0
3412 , tabla_lineout_dac_event,
3413 SND_SOC_DAPM_PRE_PMU | SND_SOC_DAPM_POST_PMD),
3414 SND_SOC_DAPM_DAC_E("LINEOUT2 DAC", NULL, TABLA_A_RX_LINE_2_DAC_CTL, 7, 0
3415 , tabla_lineout_dac_event,
3416 SND_SOC_DAPM_PRE_PMU | SND_SOC_DAPM_POST_PMD),
3417 SND_SOC_DAPM_DAC_E("LINEOUT3 DAC", NULL, TABLA_A_RX_LINE_3_DAC_CTL, 7, 0
3418 , tabla_lineout_dac_event,
3419 SND_SOC_DAPM_PRE_PMU | SND_SOC_DAPM_POST_PMD),
3420 SND_SOC_DAPM_SWITCH("LINEOUT3 DAC GROUND", SND_SOC_NOPM, 0, 0,
3421 &lineout3_ground_switch),
3422 SND_SOC_DAPM_DAC_E("LINEOUT4 DAC", NULL, TABLA_A_RX_LINE_4_DAC_CTL, 7, 0
3423 , tabla_lineout_dac_event,
3424 SND_SOC_DAPM_PRE_PMU | SND_SOC_DAPM_POST_PMD),
3425 SND_SOC_DAPM_SWITCH("LINEOUT4 DAC GROUND", SND_SOC_NOPM, 0, 0,
3426 &lineout4_ground_switch),
3427 SND_SOC_DAPM_DAC_E("LINEOUT5 DAC", NULL, TABLA_A_RX_LINE_5_DAC_CTL, 7, 0
3428 , tabla_lineout_dac_event,
3429 SND_SOC_DAPM_PRE_PMU | SND_SOC_DAPM_POST_PMD),
3430
3431 SND_SOC_DAPM_MIXER_E("RX1 MIX1", TABLA_A_CDC_CLK_RX_B1_CTL, 0, 0, NULL,
3432 0, tabla_codec_reset_interpolator, SND_SOC_DAPM_PRE_PMU),
3433 SND_SOC_DAPM_MIXER_E("RX2 MIX1", TABLA_A_CDC_CLK_RX_B1_CTL, 1, 0, NULL,
3434 0, tabla_codec_reset_interpolator, SND_SOC_DAPM_PRE_PMU),
3435 SND_SOC_DAPM_MIXER_E("RX3 MIX1", TABLA_A_CDC_CLK_RX_B1_CTL, 2, 0, NULL,
3436 0, tabla_codec_reset_interpolator, SND_SOC_DAPM_PRE_PMU),
3437 SND_SOC_DAPM_MIXER_E("RX4 MIX1", TABLA_A_CDC_CLK_RX_B1_CTL, 3, 0, NULL,
3438 0, tabla_codec_reset_interpolator, SND_SOC_DAPM_PRE_PMU),
3439 SND_SOC_DAPM_MIXER_E("RX5 MIX1", TABLA_A_CDC_CLK_RX_B1_CTL, 4, 0, NULL,
3440 0, tabla_codec_reset_interpolator, SND_SOC_DAPM_PRE_PMU),
3441 SND_SOC_DAPM_MIXER_E("RX6 MIX1", TABLA_A_CDC_CLK_RX_B1_CTL, 5, 0, NULL,
3442 0, tabla_codec_reset_interpolator, SND_SOC_DAPM_PRE_PMU),
3443 SND_SOC_DAPM_MIXER_E("RX7 MIX1", TABLA_A_CDC_CLK_RX_B1_CTL, 6, 0, NULL,
3444 0, tabla_codec_reset_interpolator, SND_SOC_DAPM_PRE_PMU),
3445
3446 SND_SOC_DAPM_MUX_E("RX4 DSM MUX", TABLA_A_CDC_CLK_RX_B1_CTL, 3, 0,
3447 &rx4_dsm_mux, tabla_codec_reset_interpolator,
3448 SND_SOC_DAPM_PRE_PMU),
3449
3450 SND_SOC_DAPM_MUX_E("RX6 DSM MUX", TABLA_A_CDC_CLK_RX_B1_CTL, 5, 0,
3451 &rx6_dsm_mux, tabla_codec_reset_interpolator,
3452 SND_SOC_DAPM_PRE_PMU),
3453
3454 SND_SOC_DAPM_MIXER("RX1 CHAIN", TABLA_A_CDC_RX1_B6_CTL, 5, 0, NULL, 0),
3455 SND_SOC_DAPM_MIXER("RX2 CHAIN", TABLA_A_CDC_RX2_B6_CTL, 5, 0, NULL, 0),
3456
3457 SND_SOC_DAPM_MUX("RX1 MIX1 INP1", SND_SOC_NOPM, 0, 0,
3458 &rx_mix1_inp1_mux),
3459 SND_SOC_DAPM_MUX("RX1 MIX1 INP2", SND_SOC_NOPM, 0, 0,
3460 &rx_mix1_inp2_mux),
3461 SND_SOC_DAPM_MUX("RX2 MIX1 INP1", SND_SOC_NOPM, 0, 0,
3462 &rx2_mix1_inp1_mux),
3463 SND_SOC_DAPM_MUX("RX2 MIX1 INP2", SND_SOC_NOPM, 0, 0,
3464 &rx2_mix1_inp2_mux),
3465 SND_SOC_DAPM_MUX("RX3 MIX1 INP1", SND_SOC_NOPM, 0, 0,
3466 &rx3_mix1_inp1_mux),
3467 SND_SOC_DAPM_MUX("RX3 MIX1 INP2", SND_SOC_NOPM, 0, 0,
3468 &rx3_mix1_inp2_mux),
3469 SND_SOC_DAPM_MUX("RX4 MIX1 INP1", SND_SOC_NOPM, 0, 0,
3470 &rx4_mix1_inp1_mux),
3471 SND_SOC_DAPM_MUX("RX4 MIX1 INP2", SND_SOC_NOPM, 0, 0,
3472 &rx4_mix1_inp2_mux),
3473 SND_SOC_DAPM_MUX("RX5 MIX1 INP1", SND_SOC_NOPM, 0, 0,
3474 &rx5_mix1_inp1_mux),
3475 SND_SOC_DAPM_MUX("RX5 MIX1 INP2", SND_SOC_NOPM, 0, 0,
3476 &rx5_mix1_inp2_mux),
3477 SND_SOC_DAPM_MUX("RX6 MIX1 INP1", SND_SOC_NOPM, 0, 0,
3478 &rx6_mix1_inp1_mux),
3479 SND_SOC_DAPM_MUX("RX6 MIX1 INP2", SND_SOC_NOPM, 0, 0,
3480 &rx6_mix1_inp2_mux),
3481 SND_SOC_DAPM_MUX("RX7 MIX1 INP1", SND_SOC_NOPM, 0, 0,
3482 &rx7_mix1_inp1_mux),
3483 SND_SOC_DAPM_MUX("RX7 MIX1 INP2", SND_SOC_NOPM, 0, 0,
3484 &rx7_mix1_inp2_mux),
3485
3486 SND_SOC_DAPM_SUPPLY("CP", TABLA_A_CP_EN, 0, 0,
3487 tabla_codec_enable_charge_pump, SND_SOC_DAPM_POST_PMU |
3488 SND_SOC_DAPM_PRE_PMD),
3489
3490 SND_SOC_DAPM_SUPPLY("RX_BIAS", SND_SOC_NOPM, 0, 0,
3491 tabla_codec_enable_rx_bias, SND_SOC_DAPM_PRE_PMU |
3492 SND_SOC_DAPM_POST_PMD),
3493
3494 /* TX */
3495
3496 SND_SOC_DAPM_SUPPLY("CDC_CONN", TABLA_A_CDC_CLK_OTHR_CTL, 2, 0, NULL,
3497 0),
3498
3499 SND_SOC_DAPM_SUPPLY("LDO_H", TABLA_A_LDO_H_MODE_1, 7, 0,
3500 tabla_codec_enable_ldo_h, SND_SOC_DAPM_POST_PMU),
3501
Kuirong Wang0f8ade32012-02-27 16:29:45 -08003502 SND_SOC_DAPM_SUPPLY("COMP1_CLK", SND_SOC_NOPM, 0, 0,
3503 tabla_config_compander, SND_SOC_DAPM_PRE_PMU |
3504 SND_SOC_DAPM_POST_PMU | SND_SOC_DAPM_PRE_POST_PMD),
3505 SND_SOC_DAPM_SUPPLY("COMP2_CLK", SND_SOC_NOPM, 1, 0,
3506 tabla_config_compander, SND_SOC_DAPM_PRE_PMU |
3507 SND_SOC_DAPM_POST_PMU | SND_SOC_DAPM_PRE_POST_PMD),
3508
Bharath Ramachandramurthy9c79f132011-11-28 11:18:57 -08003509 SND_SOC_DAPM_INPUT("AMIC1"),
3510 SND_SOC_DAPM_MICBIAS_E("MIC BIAS1 External", TABLA_A_MICB_1_CTL, 7, 0,
3511 tabla_codec_enable_micbias, SND_SOC_DAPM_PRE_PMU |
3512 SND_SOC_DAPM_POST_PMU | SND_SOC_DAPM_POST_PMD),
3513 SND_SOC_DAPM_MICBIAS_E("MIC BIAS1 Internal1", TABLA_A_MICB_1_CTL, 7, 0,
3514 tabla_codec_enable_micbias, SND_SOC_DAPM_PRE_PMU |
3515 SND_SOC_DAPM_POST_PMU | SND_SOC_DAPM_POST_PMD),
3516 SND_SOC_DAPM_MICBIAS_E("MIC BIAS1 Internal2", TABLA_A_MICB_1_CTL, 7, 0,
3517 tabla_codec_enable_micbias, SND_SOC_DAPM_PRE_PMU |
3518 SND_SOC_DAPM_POST_PMU | SND_SOC_DAPM_POST_PMD),
3519 SND_SOC_DAPM_ADC_E("ADC1", NULL, TABLA_A_TX_1_2_EN, 7, 0,
3520 tabla_codec_enable_adc, SND_SOC_DAPM_PRE_PMU |
3521 SND_SOC_DAPM_POST_PMU | SND_SOC_DAPM_POST_PMD),
3522
3523 SND_SOC_DAPM_INPUT("AMIC3"),
3524 SND_SOC_DAPM_ADC_E("ADC3", NULL, TABLA_A_TX_3_4_EN, 7, 0,
3525 tabla_codec_enable_adc, SND_SOC_DAPM_PRE_PMU |
3526 SND_SOC_DAPM_POST_PMU | SND_SOC_DAPM_POST_PMD),
3527
3528 SND_SOC_DAPM_INPUT("AMIC4"),
3529 SND_SOC_DAPM_ADC_E("ADC4", NULL, TABLA_A_TX_3_4_EN, 3, 0,
3530 tabla_codec_enable_adc, SND_SOC_DAPM_PRE_PMU |
3531 SND_SOC_DAPM_POST_PMU | SND_SOC_DAPM_POST_PMD),
3532
3533 SND_SOC_DAPM_INPUT("AMIC5"),
3534 SND_SOC_DAPM_ADC_E("ADC5", NULL, TABLA_A_TX_5_6_EN, 7, 0,
3535 tabla_codec_enable_adc, SND_SOC_DAPM_POST_PMU),
3536
3537 SND_SOC_DAPM_INPUT("AMIC6"),
3538 SND_SOC_DAPM_ADC_E("ADC6", NULL, TABLA_A_TX_5_6_EN, 3, 0,
3539 tabla_codec_enable_adc, SND_SOC_DAPM_POST_PMU),
3540
3541 SND_SOC_DAPM_MUX_E("DEC1 MUX", TABLA_A_CDC_CLK_TX_CLK_EN_B1_CTL, 0, 0,
3542 &dec1_mux, tabla_codec_enable_dec, SND_SOC_DAPM_PRE_PMU),
3543
3544 SND_SOC_DAPM_MUX_E("DEC2 MUX", TABLA_A_CDC_CLK_TX_CLK_EN_B1_CTL, 1, 0,
3545 &dec2_mux, tabla_codec_enable_dec, SND_SOC_DAPM_PRE_PMU),
3546
3547 SND_SOC_DAPM_MUX_E("DEC3 MUX", TABLA_A_CDC_CLK_TX_CLK_EN_B1_CTL, 2, 0,
3548 &dec3_mux, tabla_codec_enable_dec, SND_SOC_DAPM_PRE_PMU),
3549
3550 SND_SOC_DAPM_MUX_E("DEC4 MUX", TABLA_A_CDC_CLK_TX_CLK_EN_B1_CTL, 3, 0,
3551 &dec4_mux, tabla_codec_enable_dec, SND_SOC_DAPM_PRE_PMU),
3552
3553 SND_SOC_DAPM_MUX_E("DEC5 MUX", TABLA_A_CDC_CLK_TX_CLK_EN_B1_CTL, 4, 0,
3554 &dec5_mux, tabla_codec_enable_dec, SND_SOC_DAPM_PRE_PMU),
3555
3556 SND_SOC_DAPM_MUX_E("DEC6 MUX", TABLA_A_CDC_CLK_TX_CLK_EN_B1_CTL, 5, 0,
3557 &dec6_mux, tabla_codec_enable_dec, SND_SOC_DAPM_PRE_PMU),
3558
3559 SND_SOC_DAPM_MUX_E("DEC7 MUX", TABLA_A_CDC_CLK_TX_CLK_EN_B1_CTL, 6, 0,
3560 &dec7_mux, tabla_codec_enable_dec, SND_SOC_DAPM_PRE_PMU),
3561
3562 SND_SOC_DAPM_MUX_E("DEC8 MUX", TABLA_A_CDC_CLK_TX_CLK_EN_B1_CTL, 7, 0,
3563 &dec8_mux, tabla_codec_enable_dec, SND_SOC_DAPM_PRE_PMU),
3564
3565 SND_SOC_DAPM_MUX_E("DEC9 MUX", TABLA_A_CDC_CLK_TX_CLK_EN_B2_CTL, 0, 0,
3566 &dec9_mux, tabla_codec_enable_dec, SND_SOC_DAPM_PRE_PMU),
3567
3568 SND_SOC_DAPM_MUX_E("DEC10 MUX", TABLA_A_CDC_CLK_TX_CLK_EN_B2_CTL, 1, 0,
3569 &dec10_mux, tabla_codec_enable_dec, SND_SOC_DAPM_PRE_PMU),
3570
3571 SND_SOC_DAPM_MUX("ANC1 MUX", SND_SOC_NOPM, 0, 0, &anc1_mux),
3572 SND_SOC_DAPM_MUX("ANC2 MUX", SND_SOC_NOPM, 0, 0, &anc2_mux),
3573
3574 SND_SOC_DAPM_MIXER_E("ANC", SND_SOC_NOPM, 0, 0, NULL, 0,
3575 tabla_codec_enable_anc, SND_SOC_DAPM_PRE_PMU |
3576 SND_SOC_DAPM_POST_PMD),
3577
3578 SND_SOC_DAPM_MUX("ANC1 FB MUX", SND_SOC_NOPM, 0, 0, &anc1_fb_mux),
3579
3580 SND_SOC_DAPM_INPUT("AMIC2"),
3581 SND_SOC_DAPM_MICBIAS_E("MIC BIAS2 External", TABLA_A_MICB_2_CTL, 7, 0,
3582 tabla_codec_enable_micbias, SND_SOC_DAPM_PRE_PMU |
3583 SND_SOC_DAPM_POST_PMU | SND_SOC_DAPM_POST_PMD),
3584 SND_SOC_DAPM_MICBIAS_E("MIC BIAS2 Internal1", TABLA_A_MICB_2_CTL, 7, 0,
3585 tabla_codec_enable_micbias, SND_SOC_DAPM_PRE_PMU |
3586 SND_SOC_DAPM_POST_PMU | SND_SOC_DAPM_POST_PMD),
3587 SND_SOC_DAPM_MICBIAS_E("MIC BIAS2 Internal2", TABLA_A_MICB_2_CTL, 7, 0,
3588 tabla_codec_enable_micbias, SND_SOC_DAPM_PRE_PMU |
3589 SND_SOC_DAPM_POST_PMU | SND_SOC_DAPM_POST_PMD),
3590 SND_SOC_DAPM_MICBIAS_E("MIC BIAS2 Internal3", TABLA_A_MICB_2_CTL, 7, 0,
3591 tabla_codec_enable_micbias, SND_SOC_DAPM_PRE_PMU |
3592 SND_SOC_DAPM_POST_PMU | SND_SOC_DAPM_POST_PMD),
3593 SND_SOC_DAPM_MICBIAS_E("MIC BIAS3 External", TABLA_A_MICB_3_CTL, 7, 0,
3594 tabla_codec_enable_micbias, SND_SOC_DAPM_PRE_PMU |
3595 SND_SOC_DAPM_POST_PMU | SND_SOC_DAPM_POST_PMD),
3596 SND_SOC_DAPM_MICBIAS_E("MIC BIAS3 Internal1", TABLA_A_MICB_3_CTL, 7, 0,
3597 tabla_codec_enable_micbias, SND_SOC_DAPM_PRE_PMU |
3598 SND_SOC_DAPM_POST_PMU | SND_SOC_DAPM_POST_PMD),
3599 SND_SOC_DAPM_MICBIAS_E("MIC BIAS3 Internal2", TABLA_A_MICB_3_CTL, 7, 0,
3600 tabla_codec_enable_micbias, SND_SOC_DAPM_PRE_PMU |
3601 SND_SOC_DAPM_POST_PMU | SND_SOC_DAPM_POST_PMD),
3602 SND_SOC_DAPM_ADC_E("ADC2", NULL, TABLA_A_TX_1_2_EN, 3, 0,
3603 tabla_codec_enable_adc, SND_SOC_DAPM_PRE_PMU |
3604 SND_SOC_DAPM_POST_PMU | SND_SOC_DAPM_POST_PMD),
3605
3606 SND_SOC_DAPM_MUX("SLIM TX1 MUX", SND_SOC_NOPM, 0, 0, &sb_tx1_mux),
3607 SND_SOC_DAPM_AIF_OUT("SLIM TX1", "AIF1 Capture", NULL, SND_SOC_NOPM,
3608 0, 0),
3609
3610 SND_SOC_DAPM_MUX("SLIM TX5 MUX", SND_SOC_NOPM, 0, 0, &sb_tx5_mux),
3611 SND_SOC_DAPM_AIF_OUT("SLIM TX5", "AIF1 Capture", NULL, SND_SOC_NOPM,
3612 4, 0),
3613
3614 SND_SOC_DAPM_MUX("SLIM TX6 MUX", SND_SOC_NOPM, 0, 0, &sb_tx6_mux),
3615 SND_SOC_DAPM_AIF_OUT("SLIM TX6", "AIF1 Capture", NULL, SND_SOC_NOPM,
3616 5, 0),
3617
3618 SND_SOC_DAPM_MUX("SLIM TX7 MUX", SND_SOC_NOPM, 0, 0, &sb_tx7_mux),
3619 SND_SOC_DAPM_AIF_OUT_E("SLIM TX7", "AIF1 Capture", 0, SND_SOC_NOPM, 0,
3620 0, tabla_codec_enable_slimtx,
3621 SND_SOC_DAPM_POST_PMU | SND_SOC_DAPM_POST_PMD),
3622
3623 SND_SOC_DAPM_MUX("SLIM TX8 MUX", SND_SOC_NOPM, 0, 0, &sb_tx8_mux),
3624 SND_SOC_DAPM_AIF_OUT_E("SLIM TX8", "AIF1 Capture", 0, SND_SOC_NOPM, 0,
3625 0, tabla_codec_enable_slimtx,
3626 SND_SOC_DAPM_POST_PMU | SND_SOC_DAPM_POST_PMD),
3627
3628 SND_SOC_DAPM_MUX("SLIM TX9 MUX", SND_SOC_NOPM, 0, 0, &sb_tx9_mux),
3629 SND_SOC_DAPM_AIF_OUT_E("SLIM TX9", "AIF1 Capture", NULL, SND_SOC_NOPM,
3630 0, 0, tabla_codec_enable_slimtx,
3631 SND_SOC_DAPM_POST_PMU | SND_SOC_DAPM_POST_PMD),
3632
3633 SND_SOC_DAPM_MUX("SLIM TX10 MUX", SND_SOC_NOPM, 0, 0, &sb_tx10_mux),
3634 SND_SOC_DAPM_AIF_OUT_E("SLIM TX10", "AIF1 Capture", NULL, SND_SOC_NOPM,
3635 0, 0, tabla_codec_enable_slimtx,
3636 SND_SOC_DAPM_POST_PMU | SND_SOC_DAPM_POST_PMD),
3637
3638 /* Digital Mic Inputs */
3639 SND_SOC_DAPM_ADC_E("DMIC1", NULL, SND_SOC_NOPM, 0, 0,
3640 tabla_codec_enable_dmic, SND_SOC_DAPM_PRE_PMU |
3641 SND_SOC_DAPM_POST_PMD),
3642
3643 SND_SOC_DAPM_ADC_E("DMIC2", NULL, SND_SOC_NOPM, 0, 0,
3644 tabla_codec_enable_dmic, SND_SOC_DAPM_PRE_PMU |
3645 SND_SOC_DAPM_POST_PMD),
3646
3647 SND_SOC_DAPM_ADC_E("DMIC3", NULL, SND_SOC_NOPM, 0, 0,
3648 tabla_codec_enable_dmic, SND_SOC_DAPM_PRE_PMU |
3649 SND_SOC_DAPM_POST_PMD),
3650
3651 SND_SOC_DAPM_ADC_E("DMIC4", NULL, SND_SOC_NOPM, 0, 0,
3652 tabla_codec_enable_dmic, SND_SOC_DAPM_PRE_PMU |
3653 SND_SOC_DAPM_POST_PMD),
3654
3655 SND_SOC_DAPM_ADC_E("DMIC5", NULL, SND_SOC_NOPM, 0, 0,
3656 tabla_codec_enable_dmic, SND_SOC_DAPM_PRE_PMU |
3657 SND_SOC_DAPM_POST_PMD),
3658 SND_SOC_DAPM_ADC_E("DMIC6", NULL, SND_SOC_NOPM, 0, 0,
3659 tabla_codec_enable_dmic, SND_SOC_DAPM_PRE_PMU |
3660 SND_SOC_DAPM_POST_PMD),
3661
3662 /* Sidetone */
3663 SND_SOC_DAPM_MUX("IIR1 INP1 MUX", SND_SOC_NOPM, 0, 0, &iir1_inp1_mux),
3664 SND_SOC_DAPM_PGA("IIR1", TABLA_A_CDC_CLK_SD_CTL, 0, 0, NULL, 0),
3665};
3666
Bradley Rubin89ffd0a2011-07-21 16:04:06 -07003667static short tabla_codec_read_sta_result(struct snd_soc_codec *codec)
Bradley Rubincb1e2732011-06-23 16:49:20 -07003668{
3669 u8 bias_msb, bias_lsb;
3670 short bias_value;
3671
Bradley Rubin89ffd0a2011-07-21 16:04:06 -07003672 bias_msb = snd_soc_read(codec, TABLA_A_CDC_MBHC_B3_STATUS);
3673 bias_lsb = snd_soc_read(codec, TABLA_A_CDC_MBHC_B2_STATUS);
3674 bias_value = (bias_msb << 8) | bias_lsb;
3675 return bias_value;
3676}
3677
3678static short tabla_codec_read_dce_result(struct snd_soc_codec *codec)
3679{
3680 u8 bias_msb, bias_lsb;
3681 short bias_value;
3682
3683 bias_msb = snd_soc_read(codec, TABLA_A_CDC_MBHC_B5_STATUS);
3684 bias_lsb = snd_soc_read(codec, TABLA_A_CDC_MBHC_B4_STATUS);
3685 bias_value = (bias_msb << 8) | bias_lsb;
3686 return bias_value;
3687}
3688
Joonwoo Park0976d012011-12-22 11:48:18 -08003689static short tabla_codec_sta_dce(struct snd_soc_codec *codec, int dce)
Bradley Rubin89ffd0a2011-07-21 16:04:06 -07003690{
Joonwoo Park0976d012011-12-22 11:48:18 -08003691 struct tabla_priv *tabla = snd_soc_codec_get_drvdata(codec);
Bradley Rubin89ffd0a2011-07-21 16:04:06 -07003692 short bias_value;
3693
Joonwoo Park925914c2012-01-05 13:35:18 -08003694 /* Turn on the override */
3695 snd_soc_update_bits(codec, TABLA_A_CDC_MBHC_B1_CTL, 0x4, 0x4);
Bradley Rubincb1e2732011-06-23 16:49:20 -07003696 if (dce) {
Bradley Rubin89ffd0a2011-07-21 16:04:06 -07003697 snd_soc_update_bits(codec, TABLA_A_CDC_MBHC_CLK_CTL, 0x8, 0x8);
3698 snd_soc_write(codec, TABLA_A_CDC_MBHC_EN_CTL, 0x4);
3699 snd_soc_update_bits(codec, TABLA_A_CDC_MBHC_CLK_CTL, 0x8, 0x0);
Joonwoo Park433149a2012-01-11 09:53:54 -08003700 usleep_range(tabla->mbhc_data.t_sta_dce,
3701 tabla->mbhc_data.t_sta_dce);
Bradley Rubin89ffd0a2011-07-21 16:04:06 -07003702 snd_soc_write(codec, TABLA_A_CDC_MBHC_EN_CTL, 0x4);
Joonwoo Park0976d012011-12-22 11:48:18 -08003703 usleep_range(tabla->mbhc_data.t_dce,
3704 tabla->mbhc_data.t_dce);
Bradley Rubin89ffd0a2011-07-21 16:04:06 -07003705 bias_value = tabla_codec_read_dce_result(codec);
Bradley Rubincb1e2732011-06-23 16:49:20 -07003706 } else {
Bradley Rubin89ffd0a2011-07-21 16:04:06 -07003707 snd_soc_update_bits(codec, TABLA_A_CDC_MBHC_CLK_CTL, 0x8, 0x8);
Bradley Rubincb1e2732011-06-23 16:49:20 -07003708 snd_soc_write(codec, TABLA_A_CDC_MBHC_EN_CTL, 0x2);
3709 snd_soc_update_bits(codec, TABLA_A_CDC_MBHC_CLK_CTL, 0x8, 0x0);
Joonwoo Park433149a2012-01-11 09:53:54 -08003710 usleep_range(tabla->mbhc_data.t_sta_dce,
3711 tabla->mbhc_data.t_sta_dce);
Joonwoo Park0976d012011-12-22 11:48:18 -08003712 snd_soc_write(codec, TABLA_A_CDC_MBHC_EN_CTL, 0x2);
3713 usleep_range(tabla->mbhc_data.t_sta,
3714 tabla->mbhc_data.t_sta);
Bradley Rubin89ffd0a2011-07-21 16:04:06 -07003715 bias_value = tabla_codec_read_sta_result(codec);
3716 snd_soc_update_bits(codec, TABLA_A_CDC_MBHC_CLK_CTL, 0x8, 0x8);
3717 snd_soc_write(codec, TABLA_A_CDC_MBHC_EN_CTL, 0x0);
Bradley Rubincb1e2732011-06-23 16:49:20 -07003718 }
Joonwoo Park925914c2012-01-05 13:35:18 -08003719 /* Turn off the override after measuring mic voltage */
3720 snd_soc_update_bits(codec, TABLA_A_CDC_MBHC_B1_CTL, 0x04, 0x00);
Bradley Rubincb1e2732011-06-23 16:49:20 -07003721
Bradley Rubincb1e2732011-06-23 16:49:20 -07003722 return bias_value;
3723}
3724
Bhalchandra Gajare343cbb02011-09-07 18:58:19 -07003725static short tabla_codec_setup_hs_polling(struct snd_soc_codec *codec)
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07003726{
3727 struct tabla_priv *tabla = snd_soc_codec_get_drvdata(codec);
Bhalchandra Gajare343cbb02011-09-07 18:58:19 -07003728 short bias_value;
Bhalchandra Gajare19d9c132011-11-18 14:57:08 -08003729 u8 cfilt_mode;
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07003730
Joonwoo Park0976d012011-12-22 11:48:18 -08003731 if (!tabla->calibration) {
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07003732 pr_err("Error, no tabla calibration\n");
Bradley Rubincb1e2732011-06-23 16:49:20 -07003733 return -ENODEV;
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07003734 }
3735
3736 tabla->mbhc_polling_active = true;
3737
Kiran Kandi6fae8bf2011-08-15 10:36:42 -07003738 if (!tabla->mclk_enabled) {
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07003739 tabla_codec_enable_bandgap(codec, TABLA_BANDGAP_MBHC_MODE);
Kiran Kandi6fae8bf2011-08-15 10:36:42 -07003740 tabla_enable_rx_bias(codec, 1);
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07003741 tabla_codec_enable_clock_block(codec, 1);
3742 }
3743
3744 snd_soc_update_bits(codec, TABLA_A_CLK_BUFF_EN1, 0x05, 0x01);
3745
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07003746 snd_soc_update_bits(codec, TABLA_A_TX_COM_BIAS, 0xE0, 0xE0);
3747
Bhalchandra Gajare19d9c132011-11-18 14:57:08 -08003748 /* Make sure CFILT is in fast mode, save current mode */
Joonwoo Parkf4267c22012-01-10 13:25:24 -08003749 cfilt_mode = snd_soc_read(codec, tabla->mbhc_bias_regs.cfilt_ctl);
3750 snd_soc_update_bits(codec, tabla->mbhc_bias_regs.cfilt_ctl, 0x70, 0x00);
Patrick Lai3043fba2011-08-01 14:15:57 -07003751
Joonwoo Parkf4267c22012-01-10 13:25:24 -08003752 snd_soc_update_bits(codec, tabla->mbhc_bias_regs.ctl_reg, 0x1F, 0x16);
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07003753
3754 snd_soc_update_bits(codec, TABLA_A_CDC_MBHC_CLK_CTL, 0x2, 0x2);
Bradley Rubincb1e2732011-06-23 16:49:20 -07003755 snd_soc_write(codec, TABLA_A_MBHC_SCALING_MUX_1, 0x84);
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07003756
3757 snd_soc_update_bits(codec, TABLA_A_TX_7_MBHC_EN, 0x80, 0x80);
3758 snd_soc_update_bits(codec, TABLA_A_TX_7_MBHC_EN, 0x1F, 0x1C);
3759 snd_soc_update_bits(codec, TABLA_A_TX_7_MBHC_TEST_CTL, 0x40, 0x40);
3760
3761 snd_soc_update_bits(codec, TABLA_A_TX_7_MBHC_EN, 0x80, 0x00);
Bradley Rubincb1e2732011-06-23 16:49:20 -07003762 snd_soc_update_bits(codec, TABLA_A_CDC_MBHC_CLK_CTL, 0x8, 0x8);
3763 snd_soc_update_bits(codec, TABLA_A_CDC_MBHC_CLK_CTL, 0x8, 0x00);
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07003764
Joonwoo Park925914c2012-01-05 13:35:18 -08003765 snd_soc_update_bits(codec, TABLA_A_CDC_MBHC_B1_CTL, 0x2, 0x2);
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07003766 snd_soc_update_bits(codec, TABLA_A_CDC_MBHC_CLK_CTL, 0x8, 0x8);
3767
Bradley Rubincb1e2732011-06-23 16:49:20 -07003768 tabla_codec_calibrate_hs_polling(codec);
3769
Joonwoo Park0976d012011-12-22 11:48:18 -08003770 bias_value = tabla_codec_sta_dce(codec, 0);
3771 snd_soc_update_bits(codec, tabla->mbhc_bias_regs.cfilt_ctl, 0x40,
3772 cfilt_mode);
Bradley Rubin89ffd0a2011-07-21 16:04:06 -07003773 snd_soc_update_bits(codec, TABLA_A_MBHC_HPH, 0x13, 0x00);
Bradley Rubincb1e2732011-06-23 16:49:20 -07003774
Bhalchandra Gajare343cbb02011-09-07 18:58:19 -07003775 return bias_value;
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07003776}
3777
3778static int tabla_codec_enable_hs_detect(struct snd_soc_codec *codec,
3779 int insertion)
3780{
3781 struct tabla_priv *tabla = snd_soc_codec_get_drvdata(codec);
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07003782 int central_bias_enabled = 0;
Joonwoo Park0976d012011-12-22 11:48:18 -08003783 const struct tabla_mbhc_general_cfg *generic =
3784 TABLA_MBHC_CAL_GENERAL_PTR(tabla->calibration);
3785 const struct tabla_mbhc_plug_detect_cfg *plug_det =
3786 TABLA_MBHC_CAL_PLUG_DET_PTR(tabla->calibration);
Bhalchandra Gajare5ea376d2011-11-30 14:21:20 -08003787 u8 wg_time;
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07003788
Joonwoo Park0976d012011-12-22 11:48:18 -08003789 if (!tabla->calibration) {
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07003790 pr_err("Error, no tabla calibration\n");
3791 return -EINVAL;
3792 }
3793
3794 snd_soc_update_bits(codec, TABLA_A_CDC_MBHC_INT_CTL, 0x1, 0);
3795
Bhalchandra Gajare7fc72332011-10-13 19:01:55 -07003796 if (insertion) {
3797 /* Make sure mic bias and Mic line schmitt trigger
3798 * are turned OFF
3799 */
3800 snd_soc_update_bits(codec, tabla->mbhc_bias_regs.ctl_reg,
3801 0x81, 0x01);
3802 snd_soc_update_bits(codec, tabla->mbhc_bias_regs.mbhc_reg,
3803 0x90, 0x00);
Bhalchandra Gajare5ea376d2011-11-30 14:21:20 -08003804 wg_time = snd_soc_read(codec, TABLA_A_RX_HPH_CNP_WG_TIME) ;
3805 wg_time += 1;
Bhalchandra Gajare7fc72332011-10-13 19:01:55 -07003806
3807 /* Enable HPH Schmitt Trigger */
Bhalchandra Gajare5ea376d2011-11-30 14:21:20 -08003808 snd_soc_update_bits(codec, TABLA_A_MBHC_HPH, 0x11, 0x11);
Bhalchandra Gajare7fc72332011-10-13 19:01:55 -07003809 snd_soc_update_bits(codec, TABLA_A_MBHC_HPH, 0x0C,
Joonwoo Park0976d012011-12-22 11:48:18 -08003810 plug_det->hph_current << 2);
Bhalchandra Gajare7fc72332011-10-13 19:01:55 -07003811
Bhalchandra Gajare5ea376d2011-11-30 14:21:20 -08003812 /* Turn off HPH PAs and DAC's during insertion detection to
3813 * avoid false insertion interrupts
Bhalchandra Gajare7fc72332011-10-13 19:01:55 -07003814 */
3815 if (tabla->mbhc_micbias_switched)
3816 tabla_codec_switch_micbias(codec, 0);
3817 snd_soc_update_bits(codec, TABLA_A_RX_HPH_CNP_EN, 0x30, 0x00);
Bhalchandra Gajare5ea376d2011-11-30 14:21:20 -08003818 snd_soc_update_bits(codec, TABLA_A_RX_HPH_L_DAC_CTL,
Joonwoo Park0976d012011-12-22 11:48:18 -08003819 0xC0, 0x00);
Bhalchandra Gajare5ea376d2011-11-30 14:21:20 -08003820 snd_soc_update_bits(codec, TABLA_A_RX_HPH_R_DAC_CTL,
Joonwoo Park0976d012011-12-22 11:48:18 -08003821 0xC0, 0x00);
Bhalchandra Gajare5ea376d2011-11-30 14:21:20 -08003822 usleep_range(wg_time * 1000, wg_time * 1000);
Bhalchandra Gajare7fc72332011-10-13 19:01:55 -07003823
3824 /* setup for insetion detection */
Bhalchandra Gajare5ea376d2011-11-30 14:21:20 -08003825 snd_soc_update_bits(codec, TABLA_A_MBHC_HPH, 0x02, 0x02);
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07003826 snd_soc_update_bits(codec, TABLA_A_CDC_MBHC_INT_CTL, 0x2, 0);
Bhalchandra Gajare7fc72332011-10-13 19:01:55 -07003827 } else {
3828 /* Make sure the HPH schmitt trigger is OFF */
3829 snd_soc_update_bits(codec, TABLA_A_MBHC_HPH, 0x12, 0x00);
3830
3831 /* enable the mic line schmitt trigger */
3832 snd_soc_update_bits(codec, tabla->mbhc_bias_regs.mbhc_reg, 0x60,
Joonwoo Park0976d012011-12-22 11:48:18 -08003833 plug_det->mic_current << 5);
Bhalchandra Gajare7fc72332011-10-13 19:01:55 -07003834 snd_soc_update_bits(codec, tabla->mbhc_bias_regs.mbhc_reg,
3835 0x80, 0x80);
Joonwoo Park0976d012011-12-22 11:48:18 -08003836 usleep_range(plug_det->t_mic_pid, plug_det->t_mic_pid);
Bhalchandra Gajare7fc72332011-10-13 19:01:55 -07003837 snd_soc_update_bits(codec, tabla->mbhc_bias_regs.mbhc_reg,
3838 0x10, 0x10);
3839
3840 /* Setup for low power removal detection */
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07003841 snd_soc_update_bits(codec, TABLA_A_CDC_MBHC_INT_CTL, 0x2, 0x2);
Bhalchandra Gajare7fc72332011-10-13 19:01:55 -07003842 }
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07003843
3844 if (snd_soc_read(codec, TABLA_A_CDC_MBHC_B1_CTL) & 0x4) {
3845 if (!(tabla->clock_active)) {
3846 tabla_codec_enable_config_mode(codec, 1);
3847 snd_soc_update_bits(codec, TABLA_A_CDC_MBHC_B1_CTL,
Bradley Rubincb1e2732011-06-23 16:49:20 -07003848 0x06, 0);
Joonwoo Park0976d012011-12-22 11:48:18 -08003849 usleep_range(generic->t_shutdown_plug_rem,
3850 generic->t_shutdown_plug_rem);
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07003851 tabla_codec_enable_config_mode(codec, 0);
3852 } else
3853 snd_soc_update_bits(codec, TABLA_A_CDC_MBHC_B1_CTL,
Bradley Rubincb1e2732011-06-23 16:49:20 -07003854 0x06, 0);
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07003855 }
3856
Bhalchandra Gajare02d90cd2011-09-30 16:14:00 -07003857 snd_soc_update_bits(codec, tabla->mbhc_bias_regs.int_rbias, 0x80, 0);
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07003858
3859 /* If central bandgap disabled */
3860 if (!(snd_soc_read(codec, TABLA_A_PIN_CTL_OE1) & 1)) {
3861 snd_soc_update_bits(codec, TABLA_A_PIN_CTL_OE1, 0x3, 0x3);
Joonwoo Park0976d012011-12-22 11:48:18 -08003862 usleep_range(generic->t_bg_fast_settle,
3863 generic->t_bg_fast_settle);
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07003864 central_bias_enabled = 1;
3865 }
3866
3867 /* If LDO_H disabled */
3868 if (snd_soc_read(codec, TABLA_A_PIN_CTL_OE0) & 0x80) {
3869 snd_soc_update_bits(codec, TABLA_A_PIN_CTL_OE0, 0x10, 0);
3870 snd_soc_update_bits(codec, TABLA_A_PIN_CTL_OE0, 0x80, 0x80);
Joonwoo Park0976d012011-12-22 11:48:18 -08003871 usleep_range(generic->t_ldoh, generic->t_ldoh);
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07003872 snd_soc_update_bits(codec, TABLA_A_PIN_CTL_OE0, 0x80, 0);
3873
3874 if (central_bias_enabled)
3875 snd_soc_update_bits(codec, TABLA_A_PIN_CTL_OE1, 0x1, 0);
3876 }
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07003877
Joonwoo Park6c1ebb62012-01-16 19:08:43 -08003878 snd_soc_update_bits(codec, tabla->reg_addr.micb_4_mbhc, 0x3,
3879 tabla->micbias);
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07003880
Asish Bhattacharyab1aeae22012-02-15 08:29:28 +05303881 wcd9xxx_enable_irq(codec->control_data, TABLA_IRQ_MBHC_INSERTION);
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07003882 snd_soc_update_bits(codec, TABLA_A_CDC_MBHC_INT_CTL, 0x1, 0x1);
3883 return 0;
3884}
3885
Joonwoo Park0976d012011-12-22 11:48:18 -08003886static u16 tabla_codec_v_sta_dce(struct snd_soc_codec *codec, bool dce,
3887 s16 vin_mv)
3888{
3889 short diff, zero;
3890 struct tabla_priv *tabla;
3891 u32 mb_mv, in;
3892
3893 tabla = snd_soc_codec_get_drvdata(codec);
3894 mb_mv = tabla->mbhc_data.micb_mv;
3895
3896 if (mb_mv == 0) {
3897 pr_err("%s: Mic Bias voltage is set to zero\n", __func__);
3898 return -EINVAL;
3899 }
3900
3901 if (dce) {
3902 diff = tabla->mbhc_data.dce_mb - tabla->mbhc_data.dce_z;
3903 zero = tabla->mbhc_data.dce_z;
3904 } else {
3905 diff = tabla->mbhc_data.sta_mb - tabla->mbhc_data.sta_z;
3906 zero = tabla->mbhc_data.sta_z;
3907 }
3908 in = (u32) diff * vin_mv;
3909
3910 return (u16) (in / mb_mv) + zero;
3911}
3912
3913static s32 tabla_codec_sta_dce_v(struct snd_soc_codec *codec, s8 dce,
3914 u16 bias_value)
3915{
3916 struct tabla_priv *tabla;
3917 s32 mv;
3918
3919 tabla = snd_soc_codec_get_drvdata(codec);
3920
3921 if (dce) {
3922 mv = ((s32)bias_value - (s32)tabla->mbhc_data.dce_z) *
3923 (s32)tabla->mbhc_data.micb_mv /
3924 (s32)(tabla->mbhc_data.dce_mb - tabla->mbhc_data.dce_z);
3925 } else {
3926 mv = ((s32)bias_value - (s32)tabla->mbhc_data.sta_z) *
3927 (s32)tabla->mbhc_data.micb_mv /
3928 (s32)(tabla->mbhc_data.sta_mb - tabla->mbhc_data.sta_z);
3929 }
3930
3931 return mv;
3932}
3933
Bhalchandra Gajare0a792b12011-09-06 16:36:58 -07003934static void btn0_lpress_fn(struct work_struct *work)
3935{
3936 struct delayed_work *delayed_work;
3937 struct tabla_priv *tabla;
Joonwoo Park0976d012011-12-22 11:48:18 -08003938 short bias_value;
3939 int dce_mv, sta_mv;
Joonwoo Park816b8e62012-01-23 16:03:21 -08003940 struct tabla *core;
Bhalchandra Gajare0a792b12011-09-06 16:36:58 -07003941
3942 pr_debug("%s:\n", __func__);
3943
3944 delayed_work = to_delayed_work(work);
3945 tabla = container_of(delayed_work, struct tabla_priv, btn0_dwork);
Joonwoo Park816b8e62012-01-23 16:03:21 -08003946 core = dev_get_drvdata(tabla->codec->dev->parent);
Bhalchandra Gajare0a792b12011-09-06 16:36:58 -07003947
3948 if (tabla) {
3949 if (tabla->button_jack) {
Joonwoo Park0976d012011-12-22 11:48:18 -08003950 bias_value = tabla_codec_read_sta_result(tabla->codec);
3951 sta_mv = tabla_codec_sta_dce_v(tabla->codec, 0,
Asish Bhattacharyab1aeae22012-02-15 08:29:28 +05303952 bias_value);
Joonwoo Park0976d012011-12-22 11:48:18 -08003953 bias_value = tabla_codec_read_dce_result(tabla->codec);
3954 dce_mv = tabla_codec_sta_dce_v(tabla->codec, 1,
Asish Bhattacharyab1aeae22012-02-15 08:29:28 +05303955 bias_value);
Joonwoo Park0976d012011-12-22 11:48:18 -08003956 pr_debug("%s: Reporting long button press event"
3957 " STA: %d, DCE: %d\n", __func__,
3958 sta_mv, dce_mv);
Joonwoo Park8b1f0982011-12-08 17:12:45 -08003959 tabla_snd_soc_jack_report(tabla, tabla->button_jack,
3960 SND_JACK_BTN_0,
3961 SND_JACK_BTN_0);
Bhalchandra Gajare0a792b12011-09-06 16:36:58 -07003962 }
3963 } else {
3964 pr_err("%s: Bad tabla private data\n", __func__);
3965 }
3966
3967}
Bhalchandra Gajared9ebb6c2011-10-03 19:54:41 -07003968
Joonwoo Park0976d012011-12-22 11:48:18 -08003969void tabla_mbhc_cal(struct snd_soc_codec *codec)
3970{
3971 struct tabla_priv *tabla;
3972 struct tabla_mbhc_btn_detect_cfg *btn_det;
3973 u8 cfilt_mode, bg_mode;
3974 u8 ncic, nmeas, navg;
3975 u32 mclk_rate;
3976 u32 dce_wait, sta_wait;
3977 u8 *n_cic;
3978
3979 tabla = snd_soc_codec_get_drvdata(codec);
3980
3981 /* First compute the DCE / STA wait times
3982 * depending on tunable parameters.
3983 * The value is computed in microseconds
3984 */
3985 btn_det = TABLA_MBHC_CAL_BTN_DET_PTR(tabla->calibration);
3986 n_cic = tabla_mbhc_cal_btn_det_mp(btn_det, TABLA_BTN_DET_N_CIC);
Joonwoo Park107edf02012-01-11 11:42:24 -08003987 ncic = n_cic[tabla_codec_mclk_index(tabla)];
Joonwoo Park0976d012011-12-22 11:48:18 -08003988 nmeas = TABLA_MBHC_CAL_BTN_DET_PTR(tabla->calibration)->n_meas;
3989 navg = TABLA_MBHC_CAL_GENERAL_PTR(tabla->calibration)->mbhc_navg;
3990 mclk_rate = tabla->mclk_freq;
Joonwoo Park433149a2012-01-11 09:53:54 -08003991 dce_wait = (1000 * 512 * ncic * (nmeas + 1)) / (mclk_rate / 1000);
3992 sta_wait = (1000 * 128 * (navg + 1)) / (mclk_rate / 1000);
Joonwoo Park0976d012011-12-22 11:48:18 -08003993
3994 tabla->mbhc_data.t_dce = dce_wait;
3995 tabla->mbhc_data.t_sta = sta_wait;
3996
3997 /* LDOH and CFILT are already configured during pdata handling.
3998 * Only need to make sure CFILT and bandgap are in Fast mode.
3999 * Need to restore defaults once calculation is done.
4000 */
4001 cfilt_mode = snd_soc_read(codec, tabla->mbhc_bias_regs.cfilt_ctl);
4002 snd_soc_update_bits(codec, tabla->mbhc_bias_regs.cfilt_ctl, 0x40, 0x00);
4003 bg_mode = snd_soc_update_bits(codec, TABLA_A_BIAS_CENTRAL_BG_CTL, 0x02,
4004 0x02);
4005
4006 /* Micbias, CFILT, LDOH, MBHC MUX mode settings
4007 * to perform ADC calibration
4008 */
4009 snd_soc_update_bits(codec, tabla->mbhc_bias_regs.ctl_reg, 0x60,
4010 tabla->micbias << 5);
4011 snd_soc_update_bits(codec, tabla->mbhc_bias_regs.ctl_reg, 0x01, 0x00);
4012 snd_soc_update_bits(codec, TABLA_A_LDO_H_MODE_1, 0x60, 0x60);
4013 snd_soc_write(codec, TABLA_A_TX_7_MBHC_TEST_CTL, 0x78);
4014 snd_soc_update_bits(codec, TABLA_A_CDC_MBHC_B1_CTL, 0x04, 0x04);
4015
4016 /* DCE measurement for 0 volts */
4017 snd_soc_write(codec, TABLA_A_CDC_MBHC_CLK_CTL, 0x0A);
4018 snd_soc_write(codec, TABLA_A_CDC_MBHC_EN_CTL, 0x04);
4019 snd_soc_write(codec, TABLA_A_CDC_MBHC_CLK_CTL, 0x02);
Joonwoo Park0976d012011-12-22 11:48:18 -08004020 snd_soc_write(codec, TABLA_A_MBHC_SCALING_MUX_1, 0x81);
4021 usleep_range(100, 100);
4022 snd_soc_write(codec, TABLA_A_CDC_MBHC_EN_CTL, 0x04);
4023 usleep_range(tabla->mbhc_data.t_dce, tabla->mbhc_data.t_dce);
4024 tabla->mbhc_data.dce_z = tabla_codec_read_dce_result(codec);
4025
4026 /* DCE measurment for MB voltage */
4027 snd_soc_write(codec, TABLA_A_CDC_MBHC_CLK_CTL, 0x0A);
4028 snd_soc_write(codec, TABLA_A_CDC_MBHC_CLK_CTL, 0x02);
4029 snd_soc_write(codec, TABLA_A_MBHC_SCALING_MUX_1, 0x82);
4030 usleep_range(100, 100);
4031 snd_soc_write(codec, TABLA_A_CDC_MBHC_EN_CTL, 0x04);
4032 usleep_range(tabla->mbhc_data.t_dce, tabla->mbhc_data.t_dce);
4033 tabla->mbhc_data.dce_mb = tabla_codec_read_dce_result(codec);
4034
4035 /* Sta measuremnt for 0 volts */
4036 snd_soc_write(codec, TABLA_A_CDC_MBHC_CLK_CTL, 0x0A);
4037 snd_soc_write(codec, TABLA_A_CDC_MBHC_EN_CTL, 0x02);
4038 snd_soc_write(codec, TABLA_A_CDC_MBHC_CLK_CTL, 0x02);
Joonwoo Park0976d012011-12-22 11:48:18 -08004039 snd_soc_write(codec, TABLA_A_MBHC_SCALING_MUX_1, 0x81);
4040 usleep_range(100, 100);
4041 snd_soc_write(codec, TABLA_A_CDC_MBHC_EN_CTL, 0x02);
4042 usleep_range(tabla->mbhc_data.t_sta, tabla->mbhc_data.t_sta);
4043 tabla->mbhc_data.sta_z = tabla_codec_read_sta_result(codec);
4044
4045 /* STA Measurement for MB Voltage */
4046 snd_soc_write(codec, TABLA_A_MBHC_SCALING_MUX_1, 0x82);
4047 usleep_range(100, 100);
4048 snd_soc_write(codec, TABLA_A_CDC_MBHC_EN_CTL, 0x02);
4049 usleep_range(tabla->mbhc_data.t_sta, tabla->mbhc_data.t_sta);
4050 tabla->mbhc_data.sta_mb = tabla_codec_read_sta_result(codec);
4051
4052 /* Restore default settings. */
4053 snd_soc_update_bits(codec, TABLA_A_CDC_MBHC_B1_CTL, 0x04, 0x00);
4054 snd_soc_update_bits(codec, tabla->mbhc_bias_regs.cfilt_ctl, 0x40,
4055 cfilt_mode);
4056 snd_soc_update_bits(codec, TABLA_A_BIAS_CENTRAL_BG_CTL, 0x02, bg_mode);
4057
4058 snd_soc_write(codec, TABLA_A_MBHC_SCALING_MUX_1, 0x84);
4059 usleep_range(100, 100);
4060}
4061
4062void *tabla_mbhc_cal_btn_det_mp(const struct tabla_mbhc_btn_detect_cfg* btn_det,
4063 const enum tabla_mbhc_btn_det_mem mem)
4064{
4065 void *ret = &btn_det->_v_btn_low;
4066
4067 switch (mem) {
4068 case TABLA_BTN_DET_GAIN:
4069 ret += sizeof(btn_det->_n_cic);
4070 case TABLA_BTN_DET_N_CIC:
4071 ret += sizeof(btn_det->_n_ready);
Joonwoo Parkc0672392012-01-11 11:03:14 -08004072 case TABLA_BTN_DET_N_READY:
Joonwoo Park0976d012011-12-22 11:48:18 -08004073 ret += sizeof(btn_det->_v_btn_high[0]) * btn_det->num_btn;
4074 case TABLA_BTN_DET_V_BTN_HIGH:
4075 ret += sizeof(btn_det->_v_btn_low[0]) * btn_det->num_btn;
4076 case TABLA_BTN_DET_V_BTN_LOW:
4077 /* do nothing */
4078 break;
4079 default:
4080 ret = NULL;
4081 }
4082
4083 return ret;
4084}
4085
4086static void tabla_mbhc_calc_thres(struct snd_soc_codec *codec)
4087{
4088 struct tabla_priv *tabla;
4089 s16 btn_mv = 0, btn_delta_mv;
4090 struct tabla_mbhc_btn_detect_cfg *btn_det;
4091 struct tabla_mbhc_plug_type_cfg *plug_type;
4092 u16 *btn_high;
Joonwoo Parkc0672392012-01-11 11:03:14 -08004093 u8 *n_ready;
Joonwoo Park0976d012011-12-22 11:48:18 -08004094 int i;
4095
4096 tabla = snd_soc_codec_get_drvdata(codec);
4097 btn_det = TABLA_MBHC_CAL_BTN_DET_PTR(tabla->calibration);
4098 plug_type = TABLA_MBHC_CAL_PLUG_TYPE_PTR(tabla->calibration);
4099
Joonwoo Parkc0672392012-01-11 11:03:14 -08004100 n_ready = tabla_mbhc_cal_btn_det_mp(btn_det, TABLA_BTN_DET_N_READY);
Joonwoo Park0976d012011-12-22 11:48:18 -08004101 if (tabla->mclk_freq == TABLA_MCLK_RATE_12288KHZ) {
Joonwoo Park0976d012011-12-22 11:48:18 -08004102 tabla->mbhc_data.npoll = 9;
4103 tabla->mbhc_data.nbounce_wait = 30;
4104 } else if (tabla->mclk_freq == TABLA_MCLK_RATE_9600KHZ) {
Joonwoo Park0976d012011-12-22 11:48:18 -08004105 tabla->mbhc_data.npoll = 7;
4106 tabla->mbhc_data.nbounce_wait = 23;
Joonwoo Parkc0672392012-01-11 11:03:14 -08004107 }
Joonwoo Park0976d012011-12-22 11:48:18 -08004108
Joonwoo Park433149a2012-01-11 09:53:54 -08004109 tabla->mbhc_data.t_sta_dce = ((1000 * 256) / (tabla->mclk_freq / 1000) *
Joonwoo Parkc0672392012-01-11 11:03:14 -08004110 n_ready[tabla_codec_mclk_index(tabla)]) +
4111 10;
Joonwoo Park0976d012011-12-22 11:48:18 -08004112 tabla->mbhc_data.v_ins_hu =
4113 tabla_codec_v_sta_dce(codec, STA, plug_type->v_hs_max);
4114 tabla->mbhc_data.v_ins_h =
4115 tabla_codec_v_sta_dce(codec, DCE, plug_type->v_hs_max);
4116
4117 btn_high = tabla_mbhc_cal_btn_det_mp(btn_det, TABLA_BTN_DET_V_BTN_HIGH);
4118 for (i = 0; i < btn_det->num_btn; i++)
4119 btn_mv = btn_high[i] > btn_mv ? btn_high[i] : btn_mv;
4120
4121 tabla->mbhc_data.v_b1_h = tabla_codec_v_sta_dce(codec, DCE, btn_mv);
4122 btn_delta_mv = btn_mv + btn_det->v_btn_press_delta_sta;
4123
4124 tabla->mbhc_data.v_b1_hu =
4125 tabla_codec_v_sta_dce(codec, STA, btn_delta_mv);
4126
4127 btn_delta_mv = btn_mv + btn_det->v_btn_press_delta_cic;
4128
4129 tabla->mbhc_data.v_b1_huc =
4130 tabla_codec_v_sta_dce(codec, DCE, btn_delta_mv);
4131
4132 tabla->mbhc_data.v_brh = tabla->mbhc_data.v_b1_h;
4133 tabla->mbhc_data.v_brl = 0xFA55;
4134
4135 tabla->mbhc_data.v_no_mic =
4136 tabla_codec_v_sta_dce(codec, STA, plug_type->v_no_mic);
4137}
4138
4139void tabla_mbhc_init(struct snd_soc_codec *codec)
4140{
4141 struct tabla_priv *tabla;
4142 struct tabla_mbhc_general_cfg *generic;
4143 struct tabla_mbhc_btn_detect_cfg *btn_det;
4144 int n;
Joonwoo Park0976d012011-12-22 11:48:18 -08004145 u8 *n_cic, *gain;
Asish Bhattacharyab1aeae22012-02-15 08:29:28 +05304146 struct wcd9xxx *tabla_core = dev_get_drvdata(codec->dev->parent);
Joonwoo Park0976d012011-12-22 11:48:18 -08004147
4148 tabla = snd_soc_codec_get_drvdata(codec);
4149 generic = TABLA_MBHC_CAL_GENERAL_PTR(tabla->calibration);
4150 btn_det = TABLA_MBHC_CAL_BTN_DET_PTR(tabla->calibration);
4151
Joonwoo Park0976d012011-12-22 11:48:18 -08004152 for (n = 0; n < 8; n++) {
Kuirong Wangcd4b6da2012-01-16 22:54:45 -08004153 if ((!TABLA_IS_1_X(tabla_core->version)) || n != 7) {
Joonwoo Park0976d012011-12-22 11:48:18 -08004154 snd_soc_update_bits(codec,
4155 TABLA_A_CDC_MBHC_FEATURE_B1_CFG,
4156 0x07, n);
4157 snd_soc_write(codec, TABLA_A_CDC_MBHC_FEATURE_B2_CFG,
4158 btn_det->c[n]);
4159 }
4160 }
4161 snd_soc_update_bits(codec, TABLA_A_CDC_MBHC_B2_CTL, 0x07,
4162 btn_det->nc);
4163
4164 n_cic = tabla_mbhc_cal_btn_det_mp(btn_det, TABLA_BTN_DET_N_CIC);
4165 snd_soc_update_bits(codec, TABLA_A_CDC_MBHC_TIMER_B6_CTL, 0xFF,
Joonwoo Park107edf02012-01-11 11:42:24 -08004166 n_cic[tabla_codec_mclk_index(tabla)]);
Joonwoo Park0976d012011-12-22 11:48:18 -08004167
4168 gain = tabla_mbhc_cal_btn_det_mp(btn_det, TABLA_BTN_DET_GAIN);
Joonwoo Park107edf02012-01-11 11:42:24 -08004169 snd_soc_update_bits(codec, TABLA_A_CDC_MBHC_B2_CTL, 0x78,
4170 gain[tabla_codec_mclk_index(tabla)] << 3);
Joonwoo Park0976d012011-12-22 11:48:18 -08004171
4172 snd_soc_update_bits(codec, TABLA_A_CDC_MBHC_TIMER_B4_CTL, 0x70,
4173 generic->mbhc_nsa << 4);
4174
4175 snd_soc_update_bits(codec, TABLA_A_CDC_MBHC_TIMER_B4_CTL, 0x0F,
4176 btn_det->n_meas);
4177
4178 snd_soc_write(codec, TABLA_A_CDC_MBHC_TIMER_B5_CTL, generic->mbhc_navg);
4179
4180 snd_soc_update_bits(codec, TABLA_A_CDC_MBHC_B1_CTL, 0x80, 0x80);
4181
4182 snd_soc_update_bits(codec, TABLA_A_CDC_MBHC_B1_CTL, 0x78,
4183 btn_det->mbhc_nsc << 3);
4184
Joonwoo Park6c1ebb62012-01-16 19:08:43 -08004185 snd_soc_update_bits(codec, tabla->reg_addr.micb_4_mbhc, 0x03,
4186 TABLA_MICBIAS2);
Joonwoo Park0976d012011-12-22 11:48:18 -08004187
4188 snd_soc_update_bits(codec, TABLA_A_CDC_MBHC_B1_CTL, 0x02, 0x02);
4189}
4190
Patrick Lai64b43262011-12-06 17:29:15 -08004191static bool tabla_mbhc_fw_validate(const struct firmware *fw)
4192{
4193 u32 cfg_offset;
4194 struct tabla_mbhc_imped_detect_cfg *imped_cfg;
4195 struct tabla_mbhc_btn_detect_cfg *btn_cfg;
4196
4197 if (fw->size < TABLA_MBHC_CAL_MIN_SIZE)
4198 return false;
4199
4200 /* previous check guarantees that there is enough fw data up
4201 * to num_btn
4202 */
4203 btn_cfg = TABLA_MBHC_CAL_BTN_DET_PTR(fw->data);
4204 cfg_offset = (u32) ((void *) btn_cfg - (void *) fw->data);
4205 if (fw->size < (cfg_offset + TABLA_MBHC_CAL_BTN_SZ(btn_cfg)))
4206 return false;
4207
4208 /* previous check guarantees that there is enough fw data up
4209 * to start of impedance detection configuration
4210 */
4211 imped_cfg = TABLA_MBHC_CAL_IMPED_DET_PTR(fw->data);
4212 cfg_offset = (u32) ((void *) imped_cfg - (void *) fw->data);
4213
4214 if (fw->size < (cfg_offset + TABLA_MBHC_CAL_IMPED_MIN_SZ))
4215 return false;
4216
4217 if (fw->size < (cfg_offset + TABLA_MBHC_CAL_IMPED_SZ(imped_cfg)))
4218 return false;
4219
4220 return true;
4221}
4222static void mbhc_fw_read(struct work_struct *work)
4223{
4224 struct delayed_work *dwork;
4225 struct tabla_priv *tabla;
4226 struct snd_soc_codec *codec;
4227 const struct firmware *fw;
4228 int ret = -1, retry = 0, rc;
4229
4230 dwork = to_delayed_work(work);
4231 tabla = container_of(dwork, struct tabla_priv,
4232 mbhc_firmware_dwork);
4233 codec = tabla->codec;
4234
4235 while (retry < MBHC_FW_READ_ATTEMPTS) {
4236 retry++;
4237 pr_info("%s:Attempt %d to request MBHC firmware\n",
4238 __func__, retry);
4239 ret = request_firmware(&fw, "wcd9310/wcd9310_mbhc.bin",
4240 codec->dev);
4241
4242 if (ret != 0) {
4243 usleep_range(MBHC_FW_READ_TIMEOUT,
4244 MBHC_FW_READ_TIMEOUT);
4245 } else {
4246 pr_info("%s: MBHC Firmware read succesful\n", __func__);
4247 break;
4248 }
4249 }
4250
4251 if (ret != 0) {
4252 pr_err("%s: Cannot load MBHC firmware use default cal\n",
4253 __func__);
4254 } else if (tabla_mbhc_fw_validate(fw) == false) {
4255 pr_err("%s: Invalid MBHC cal data size use default cal\n",
4256 __func__);
4257 release_firmware(fw);
4258 } else {
4259 tabla->calibration = (void *)fw->data;
4260 tabla->mbhc_fw = fw;
4261 }
4262
4263 tabla->mclk_cb(codec, 1);
4264 tabla_mbhc_init(codec);
4265 tabla_mbhc_cal(codec);
4266 tabla_mbhc_calc_thres(codec);
4267 tabla->mclk_cb(codec, 0);
4268 tabla_codec_calibrate_hs_polling(codec);
4269 rc = tabla_codec_enable_hs_detect(codec, 1);
4270
4271 if (IS_ERR_VALUE(rc))
4272 pr_err("%s: Failed to setup MBHC detection\n", __func__);
4273
4274}
4275
Bradley Rubincb1e2732011-06-23 16:49:20 -07004276int tabla_hs_detect(struct snd_soc_codec *codec,
Joonwoo Park0976d012011-12-22 11:48:18 -08004277 struct snd_soc_jack *headset_jack,
4278 struct snd_soc_jack *button_jack,
4279 void *calibration, enum tabla_micbias_num micbias,
4280 int (*mclk_cb_fn) (struct snd_soc_codec*, int),
4281 int read_fw_bin, u32 mclk_rate)
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07004282{
4283 struct tabla_priv *tabla;
Patrick Lai64b43262011-12-06 17:29:15 -08004284 int rc = 0;
Patrick Lai49efeac2011-11-03 11:01:12 -07004285
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07004286 if (!codec || !calibration) {
4287 pr_err("Error: no codec or calibration\n");
4288 return -EINVAL;
4289 }
Joonwoo Park107edf02012-01-11 11:42:24 -08004290
4291 if (mclk_rate != TABLA_MCLK_RATE_12288KHZ) {
4292 if (mclk_rate == TABLA_MCLK_RATE_9600KHZ)
4293 pr_err("Error: clock rate %dHz is not yet supported\n",
Asish Bhattacharyab1aeae22012-02-15 08:29:28 +05304294 mclk_rate);
Joonwoo Park107edf02012-01-11 11:42:24 -08004295 else
4296 pr_err("Error: unsupported clock rate %d\n", mclk_rate);
4297 return -EINVAL;
4298 }
4299
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07004300 tabla = snd_soc_codec_get_drvdata(codec);
Bradley Rubincb1e2732011-06-23 16:49:20 -07004301 tabla->headset_jack = headset_jack;
4302 tabla->button_jack = button_jack;
Joonwoo Park0976d012011-12-22 11:48:18 -08004303 tabla->micbias = micbias;
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07004304 tabla->calibration = calibration;
Joonwoo Park0976d012011-12-22 11:48:18 -08004305 tabla->mclk_cb = mclk_cb_fn;
4306 tabla->mclk_freq = mclk_rate;
Bhalchandra Gajare02d90cd2011-09-30 16:14:00 -07004307 tabla_get_mbhc_micbias_regs(codec, &tabla->mbhc_bias_regs);
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07004308
Bhalchandra Gajare19d9c132011-11-18 14:57:08 -08004309 /* Put CFILT in fast mode by default */
4310 snd_soc_update_bits(codec, tabla->mbhc_bias_regs.cfilt_ctl,
4311 0x40, TABLA_CFILT_FAST_MODE);
Patrick Lai64b43262011-12-06 17:29:15 -08004312 INIT_DELAYED_WORK(&tabla->mbhc_firmware_dwork, mbhc_fw_read);
Bhalchandra Gajare0a792b12011-09-06 16:36:58 -07004313 INIT_DELAYED_WORK(&tabla->btn0_dwork, btn0_lpress_fn);
Patrick Lai49efeac2011-11-03 11:01:12 -07004314 INIT_WORK(&tabla->hphlocp_work, hphlocp_off_report);
4315 INIT_WORK(&tabla->hphrocp_work, hphrocp_off_report);
Joonwoo Park0976d012011-12-22 11:48:18 -08004316
4317 if (!read_fw_bin) {
4318 tabla->mclk_cb(codec, 1);
4319 tabla_mbhc_init(codec);
4320 tabla_mbhc_cal(codec);
4321 tabla_mbhc_calc_thres(codec);
4322 tabla->mclk_cb(codec, 0);
4323 tabla_codec_calibrate_hs_polling(codec);
4324 rc = tabla_codec_enable_hs_detect(codec, 1);
4325 } else {
Patrick Lai64b43262011-12-06 17:29:15 -08004326 schedule_delayed_work(&tabla->mbhc_firmware_dwork,
4327 usecs_to_jiffies(MBHC_FW_READ_TIMEOUT));
Joonwoo Park0976d012011-12-22 11:48:18 -08004328 }
Patrick Lai49efeac2011-11-03 11:01:12 -07004329
4330 if (!IS_ERR_VALUE(rc)) {
4331 snd_soc_update_bits(codec, TABLA_A_RX_HPH_OCP_CTL, 0x10,
4332 0x10);
Asish Bhattacharyab1aeae22012-02-15 08:29:28 +05304333 wcd9xxx_enable_irq(codec->control_data,
Patrick Lai49efeac2011-11-03 11:01:12 -07004334 TABLA_IRQ_HPH_PA_OCPL_FAULT);
Asish Bhattacharyab1aeae22012-02-15 08:29:28 +05304335 wcd9xxx_enable_irq(codec->control_data,
Patrick Lai49efeac2011-11-03 11:01:12 -07004336 TABLA_IRQ_HPH_PA_OCPR_FAULT);
4337 }
4338
4339 return rc;
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07004340}
4341EXPORT_SYMBOL_GPL(tabla_hs_detect);
4342
Joonwoo Park6b9b03f2012-01-23 18:48:54 -08004343static int tabla_determine_button(const struct tabla_priv *priv,
4344 const s32 bias_mv)
4345{
4346 s16 *v_btn_low, *v_btn_high;
4347 struct tabla_mbhc_btn_detect_cfg *btn_det;
4348 int i, btn = -1;
4349
4350 btn_det = TABLA_MBHC_CAL_BTN_DET_PTR(priv->calibration);
4351 v_btn_low = tabla_mbhc_cal_btn_det_mp(btn_det, TABLA_BTN_DET_V_BTN_LOW);
4352 v_btn_high = tabla_mbhc_cal_btn_det_mp(btn_det,
Asish Bhattacharyab1aeae22012-02-15 08:29:28 +05304353 TABLA_BTN_DET_V_BTN_HIGH);
Joonwoo Park6b9b03f2012-01-23 18:48:54 -08004354 for (i = 0; i < btn_det->num_btn; i++) {
4355 if ((v_btn_low[i] <= bias_mv) && (v_btn_high[i] >= bias_mv)) {
4356 btn = i;
4357 break;
4358 }
4359 }
4360
4361 if (btn == -1)
4362 pr_debug("%s: couldn't find button number for mic mv %d\n",
4363 __func__, bias_mv);
4364
4365 return btn;
4366}
4367
4368static int tabla_get_button_mask(const int btn)
4369{
4370 int mask = 0;
4371 switch (btn) {
4372 case 0:
4373 mask = SND_JACK_BTN_0;
4374 break;
4375 case 1:
4376 mask = SND_JACK_BTN_1;
4377 break;
4378 case 2:
4379 mask = SND_JACK_BTN_2;
4380 break;
4381 case 3:
4382 mask = SND_JACK_BTN_3;
4383 break;
4384 case 4:
4385 mask = SND_JACK_BTN_4;
4386 break;
4387 case 5:
4388 mask = SND_JACK_BTN_5;
4389 break;
4390 case 6:
4391 mask = SND_JACK_BTN_6;
4392 break;
4393 case 7:
4394 mask = SND_JACK_BTN_7;
4395 break;
4396 }
4397 return mask;
4398}
4399
Bradley Rubincb1e2732011-06-23 16:49:20 -07004400static irqreturn_t tabla_dce_handler(int irq, void *data)
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07004401{
Joonwoo Park6b9b03f2012-01-23 18:48:54 -08004402 int i, mask;
4403 short bias_value_dce;
4404 s32 bias_mv_dce;
4405 int btn = -1, meas = 0;
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07004406 struct tabla_priv *priv = data;
Joonwoo Park6b9b03f2012-01-23 18:48:54 -08004407 const struct tabla_mbhc_btn_detect_cfg *d =
4408 TABLA_MBHC_CAL_BTN_DET_PTR(priv->calibration);
4409 short btnmeas[d->n_btn_meas + 1];
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07004410 struct snd_soc_codec *codec = priv->codec;
Asish Bhattacharyab1aeae22012-02-15 08:29:28 +05304411 struct wcd9xxx *core = dev_get_drvdata(priv->codec->dev->parent);
Bradley Rubincb1e2732011-06-23 16:49:20 -07004412
Asish Bhattacharyab1aeae22012-02-15 08:29:28 +05304413 wcd9xxx_disable_irq(codec->control_data, TABLA_IRQ_MBHC_REMOVAL);
4414 wcd9xxx_disable_irq(codec->control_data, TABLA_IRQ_MBHC_POTENTIAL);
Bradley Rubincb1e2732011-06-23 16:49:20 -07004415
Joonwoo Park6b9b03f2012-01-23 18:48:54 -08004416 bias_value_dce = tabla_codec_read_dce_result(codec);
4417 bias_mv_dce = tabla_codec_sta_dce_v(codec, 1, bias_value_dce);
Bradley Rubin89ffd0a2011-07-21 16:04:06 -07004418
Joonwoo Park6b9b03f2012-01-23 18:48:54 -08004419 /* determine pressed button */
4420 btnmeas[meas++] = tabla_determine_button(priv, bias_mv_dce);
4421 pr_debug("%s: meas %d - DCE %d,%d, button %d\n", __func__,
4422 meas - 1, bias_value_dce, bias_mv_dce, btnmeas[meas - 1]);
4423 if (d->n_btn_meas == 0)
4424 btn = btnmeas[0];
4425 for (; ((d->n_btn_meas) && (meas < (d->n_btn_meas + 1))); meas++) {
4426 bias_value_dce = tabla_codec_sta_dce(codec, 1);
4427 bias_mv_dce = tabla_codec_sta_dce_v(codec, 1, bias_value_dce);
4428 btnmeas[meas] = tabla_determine_button(priv, bias_mv_dce);
4429 pr_debug("%s: meas %d - DCE %d,%d, button %d\n",
4430 __func__, meas, bias_value_dce, bias_mv_dce,
4431 btnmeas[meas]);
4432 /* if large enough measurements are collected,
4433 * start to check if last all n_btn_con measurements were
4434 * in same button low/high range */
4435 if (meas + 1 >= d->n_btn_con) {
4436 for (i = 0; i < d->n_btn_con; i++)
4437 if ((btnmeas[meas] < 0) ||
4438 (btnmeas[meas] != btnmeas[meas - i]))
4439 break;
4440 if (i == d->n_btn_con) {
4441 /* button pressed */
4442 btn = btnmeas[meas];
4443 break;
4444 }
4445 }
4446 /* if left measurements are less than n_btn_con,
4447 * it's impossible to find button number */
4448 if ((d->n_btn_meas - meas) < d->n_btn_con)
4449 break;
Joonwoo Park8b1f0982011-12-08 17:12:45 -08004450 }
Bhalchandra Gajare0a792b12011-09-06 16:36:58 -07004451
Joonwoo Park6b9b03f2012-01-23 18:48:54 -08004452 if (btn >= 0) {
4453 mask = tabla_get_button_mask(btn);
4454 priv->buttons_pressed |= mask;
4455
4456 msleep(100);
4457
4458 /* XXX: assuming button 0 has the lowest micbias voltage */
4459 if (btn == 0) {
Asish Bhattacharyab1aeae22012-02-15 08:29:28 +05304460 wcd9xxx_lock_sleep(core);
Joonwoo Park6b9b03f2012-01-23 18:48:54 -08004461 if (schedule_delayed_work(&priv->btn0_dwork,
4462 msecs_to_jiffies(400)) == 0) {
4463 WARN(1, "Button pressed twice without release"
4464 "event\n");
Asish Bhattacharyab1aeae22012-02-15 08:29:28 +05304465 wcd9xxx_unlock_sleep(core);
Joonwoo Park6b9b03f2012-01-23 18:48:54 -08004466 }
4467 } else {
4468 pr_debug("%s: Reporting short button %d(0x%x) press\n",
4469 __func__, btn, mask);
4470 tabla_snd_soc_jack_report(priv, priv->button_jack, mask,
4471 mask);
4472 }
Joonwoo Park816b8e62012-01-23 16:03:21 -08004473 } else {
Joonwoo Park6b9b03f2012-01-23 18:48:54 -08004474 pr_debug("%s: bogus button press, too short press?\n",
4475 __func__);
Joonwoo Park816b8e62012-01-23 16:03:21 -08004476 }
Joonwoo Park6b9b03f2012-01-23 18:48:54 -08004477
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07004478 return IRQ_HANDLED;
4479}
4480
Bradley Rubincb1e2732011-06-23 16:49:20 -07004481static irqreturn_t tabla_release_handler(int irq, void *data)
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07004482{
Joonwoo Parke5d3aa92012-01-11 14:47:15 -08004483 int ret;
4484 short mb_v;
Joonwoo Park816b8e62012-01-23 16:03:21 -08004485 struct tabla_priv *priv = data;
4486 struct snd_soc_codec *codec = priv->codec;
Asish Bhattacharyab1aeae22012-02-15 08:29:28 +05304487 struct wcd9xxx *core = dev_get_drvdata(priv->codec->dev->parent);
Bhalchandra Gajare0a792b12011-09-06 16:36:58 -07004488
Joonwoo Park6b9b03f2012-01-23 18:48:54 -08004489 pr_debug("%s: enter\n", __func__);
Asish Bhattacharyab1aeae22012-02-15 08:29:28 +05304490 wcd9xxx_disable_irq(codec->control_data, TABLA_IRQ_MBHC_RELEASE);
Bhalchandra Gajare0a792b12011-09-06 16:36:58 -07004491
Bradley Rubincb1e2732011-06-23 16:49:20 -07004492 if (priv->buttons_pressed & SND_JACK_BTN_0) {
Bhalchandra Gajare0a792b12011-09-06 16:36:58 -07004493 ret = cancel_delayed_work(&priv->btn0_dwork);
Bhalchandra Gajare0a792b12011-09-06 16:36:58 -07004494 if (ret == 0) {
Joonwoo Park6b9b03f2012-01-23 18:48:54 -08004495 pr_debug("%s: Reporting long button 0 release event\n",
4496 __func__);
Joonwoo Park0976d012011-12-22 11:48:18 -08004497 if (priv->button_jack)
Joonwoo Park8b1f0982011-12-08 17:12:45 -08004498 tabla_snd_soc_jack_report(priv,
4499 priv->button_jack, 0,
4500 SND_JACK_BTN_0);
Bhalchandra Gajare0a792b12011-09-06 16:36:58 -07004501 } else {
Joonwoo Park8b1f0982011-12-08 17:12:45 -08004502 /* if scheduled btn0_dwork is canceled from here,
4503 * we have to unlock from here instead btn0_work */
Asish Bhattacharyab1aeae22012-02-15 08:29:28 +05304504 wcd9xxx_unlock_sleep(core);
Joonwoo Park0976d012011-12-22 11:48:18 -08004505 mb_v = tabla_codec_sta_dce(codec, 0);
4506 pr_debug("%s: Mic Voltage on release STA: %d,%d\n",
4507 __func__, mb_v,
4508 tabla_codec_sta_dce_v(codec, 0, mb_v));
Bhalchandra Gajare0a792b12011-09-06 16:36:58 -07004509
Joonwoo Parke5d3aa92012-01-11 14:47:15 -08004510 if (mb_v < (short)priv->mbhc_data.v_b1_hu ||
4511 mb_v > (short)priv->mbhc_data.v_ins_hu)
Bhalchandra Gajare0a792b12011-09-06 16:36:58 -07004512 pr_debug("%s: Fake buttton press interrupt\n",
Joonwoo Park6b9b03f2012-01-23 18:48:54 -08004513 __func__);
Joonwoo Park0976d012011-12-22 11:48:18 -08004514 else if (priv->button_jack) {
Joonwoo Park6b9b03f2012-01-23 18:48:54 -08004515 pr_debug("%s: Reporting short button 0 "
Joonwoo Park0976d012011-12-22 11:48:18 -08004516 "press and release\n", __func__);
4517 tabla_snd_soc_jack_report(priv,
4518 priv->button_jack,
4519 SND_JACK_BTN_0,
4520 SND_JACK_BTN_0);
4521 tabla_snd_soc_jack_report(priv,
Joonwoo Park6b9b03f2012-01-23 18:48:54 -08004522 priv->button_jack, 0,
4523 SND_JACK_BTN_0);
Bhalchandra Gajare0a792b12011-09-06 16:36:58 -07004524 }
4525 }
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07004526
Bradley Rubincb1e2732011-06-23 16:49:20 -07004527 priv->buttons_pressed &= ~SND_JACK_BTN_0;
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07004528 }
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07004529
Joonwoo Park6b9b03f2012-01-23 18:48:54 -08004530 if (priv->buttons_pressed) {
4531 pr_debug("%s:reporting button release mask 0x%x\n", __func__,
4532 priv->buttons_pressed);
4533 tabla_snd_soc_jack_report(priv, priv->button_jack, 0,
4534 priv->buttons_pressed);
4535 /* hardware doesn't detect another button press until
4536 * already pressed button is released.
4537 * therefore buttons_pressed has only one button's mask. */
4538 priv->buttons_pressed &= ~TABLA_JACK_BUTTON_MASK;
4539 }
4540
Bradley Rubin688c66a2011-08-16 12:25:13 -07004541 tabla_codec_start_hs_polling(codec);
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07004542 return IRQ_HANDLED;
4543}
4544
Bradley Rubincb1e2732011-06-23 16:49:20 -07004545static void tabla_codec_shutdown_hs_removal_detect(struct snd_soc_codec *codec)
4546{
4547 struct tabla_priv *tabla = snd_soc_codec_get_drvdata(codec);
Joonwoo Park0976d012011-12-22 11:48:18 -08004548 const struct tabla_mbhc_general_cfg *generic =
4549 TABLA_MBHC_CAL_GENERAL_PTR(tabla->calibration);
Bradley Rubincb1e2732011-06-23 16:49:20 -07004550
Kiran Kandi6fae8bf2011-08-15 10:36:42 -07004551 if (!tabla->mclk_enabled && !tabla->mbhc_polling_active)
Bradley Rubincb1e2732011-06-23 16:49:20 -07004552 tabla_codec_enable_config_mode(codec, 1);
4553
4554 snd_soc_update_bits(codec, TABLA_A_CDC_MBHC_CLK_CTL, 0x2, 0x2);
4555 snd_soc_update_bits(codec, TABLA_A_CDC_MBHC_B1_CTL, 0x6, 0x0);
Bradley Rubincb1e2732011-06-23 16:49:20 -07004556
Joonwoo Park0976d012011-12-22 11:48:18 -08004557 snd_soc_update_bits(codec, tabla->mbhc_bias_regs.mbhc_reg, 0x80, 0x00);
4558
4559 usleep_range(generic->t_shutdown_plug_rem,
4560 generic->t_shutdown_plug_rem);
Bradley Rubincb1e2732011-06-23 16:49:20 -07004561
4562 snd_soc_update_bits(codec, TABLA_A_CDC_MBHC_CLK_CTL, 0xA, 0x8);
Kiran Kandi6fae8bf2011-08-15 10:36:42 -07004563 if (!tabla->mclk_enabled && !tabla->mbhc_polling_active)
Bradley Rubincb1e2732011-06-23 16:49:20 -07004564 tabla_codec_enable_config_mode(codec, 0);
4565
4566 snd_soc_write(codec, TABLA_A_MBHC_SCALING_MUX_1, 0x00);
4567}
4568
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07004569static void tabla_codec_shutdown_hs_polling(struct snd_soc_codec *codec)
4570{
4571 struct tabla_priv *tabla = snd_soc_codec_get_drvdata(codec);
Bradley Rubincb1e2732011-06-23 16:49:20 -07004572
4573 tabla_codec_shutdown_hs_removal_detect(codec);
4574
Kiran Kandi6fae8bf2011-08-15 10:36:42 -07004575 if (!tabla->mclk_enabled) {
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07004576 snd_soc_update_bits(codec, TABLA_A_TX_COM_BIAS, 0xE0, 0x00);
Asish Bhattacharya486745a2012-01-20 06:41:53 +05304577 tabla_codec_disable_clock_block(codec);
4578 tabla_codec_enable_bandgap(codec, TABLA_BANDGAP_OFF);
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07004579 }
4580
4581 tabla->mbhc_polling_active = false;
4582}
4583
Patrick Lai49efeac2011-11-03 11:01:12 -07004584static irqreturn_t tabla_hphl_ocp_irq(int irq, void *data)
4585{
4586 struct tabla_priv *tabla = data;
4587 struct snd_soc_codec *codec;
4588
4589 pr_info("%s: received HPHL OCP irq\n", __func__);
4590
4591 if (tabla) {
4592 codec = tabla->codec;
Patrick Laic7cae882011-11-18 11:52:49 -08004593 if (tabla->hphlocp_cnt++ < TABLA_OCP_ATTEMPT) {
4594 pr_info("%s: retry\n", __func__);
4595 snd_soc_update_bits(codec, TABLA_A_RX_HPH_OCP_CTL, 0x10,
4596 0x00);
4597 snd_soc_update_bits(codec, TABLA_A_RX_HPH_OCP_CTL, 0x10,
4598 0x10);
4599 } else {
Asish Bhattacharyab1aeae22012-02-15 08:29:28 +05304600 wcd9xxx_disable_irq(codec->control_data,
Patrick Laic7cae882011-11-18 11:52:49 -08004601 TABLA_IRQ_HPH_PA_OCPL_FAULT);
4602 tabla->hphlocp_cnt = 0;
4603 tabla->hph_status |= SND_JACK_OC_HPHL;
4604 if (tabla->headset_jack)
4605 tabla_snd_soc_jack_report(tabla,
4606 tabla->headset_jack,
4607 tabla->hph_status,
4608 TABLA_JACK_MASK);
Patrick Lai49efeac2011-11-03 11:01:12 -07004609 }
4610 } else {
4611 pr_err("%s: Bad tabla private data\n", __func__);
4612 }
4613
4614 return IRQ_HANDLED;
4615}
4616
4617static irqreturn_t tabla_hphr_ocp_irq(int irq, void *data)
4618{
4619 struct tabla_priv *tabla = data;
4620 struct snd_soc_codec *codec;
4621
4622 pr_info("%s: received HPHR OCP irq\n", __func__);
4623
4624 if (tabla) {
4625 codec = tabla->codec;
Patrick Laic7cae882011-11-18 11:52:49 -08004626 if (tabla->hphrocp_cnt++ < TABLA_OCP_ATTEMPT) {
4627 pr_info("%s: retry\n", __func__);
4628 snd_soc_update_bits(codec, TABLA_A_RX_HPH_OCP_CTL, 0x10,
4629 0x00);
4630 snd_soc_update_bits(codec, TABLA_A_RX_HPH_OCP_CTL, 0x10,
4631 0x10);
4632 } else {
Asish Bhattacharyab1aeae22012-02-15 08:29:28 +05304633 wcd9xxx_disable_irq(codec->control_data,
Patrick Laic7cae882011-11-18 11:52:49 -08004634 TABLA_IRQ_HPH_PA_OCPR_FAULT);
4635 tabla->hphrocp_cnt = 0;
4636 tabla->hph_status |= SND_JACK_OC_HPHR;
4637 if (tabla->headset_jack)
4638 tabla_snd_soc_jack_report(tabla,
4639 tabla->headset_jack,
4640 tabla->hph_status,
4641 TABLA_JACK_MASK);
Patrick Lai49efeac2011-11-03 11:01:12 -07004642 }
4643 } else {
4644 pr_err("%s: Bad tabla private data\n", __func__);
4645 }
4646
4647 return IRQ_HANDLED;
4648}
4649
Joonwoo Parka9444452011-12-08 18:48:27 -08004650static void tabla_sync_hph_state(struct tabla_priv *tabla)
4651{
4652 if (test_and_clear_bit(TABLA_HPHR_PA_OFF_ACK,
Asish Bhattacharyab1aeae22012-02-15 08:29:28 +05304653 &tabla->hph_pa_dac_state)) {
Joonwoo Parka9444452011-12-08 18:48:27 -08004654 pr_debug("%s: HPHR clear flag and enable PA\n", __func__);
4655 snd_soc_update_bits(tabla->codec, TABLA_A_RX_HPH_CNP_EN, 0x10,
4656 1 << 4);
4657 }
4658 if (test_and_clear_bit(TABLA_HPHL_PA_OFF_ACK,
Asish Bhattacharyab1aeae22012-02-15 08:29:28 +05304659 &tabla->hph_pa_dac_state)) {
Joonwoo Parka9444452011-12-08 18:48:27 -08004660 pr_debug("%s: HPHL clear flag and enable PA\n", __func__);
4661 snd_soc_update_bits(tabla->codec, TABLA_A_RX_HPH_CNP_EN, 0x20,
4662 1 << 5);
4663 }
4664
4665 if (test_and_clear_bit(TABLA_HPHR_DAC_OFF_ACK,
Asish Bhattacharyab1aeae22012-02-15 08:29:28 +05304666 &tabla->hph_pa_dac_state)) {
Joonwoo Parka9444452011-12-08 18:48:27 -08004667 pr_debug("%s: HPHR clear flag and enable DAC\n", __func__);
4668 snd_soc_update_bits(tabla->codec, TABLA_A_RX_HPH_R_DAC_CTL,
4669 0xC0, 0xC0);
4670 }
4671 if (test_and_clear_bit(TABLA_HPHL_DAC_OFF_ACK,
Asish Bhattacharyab1aeae22012-02-15 08:29:28 +05304672 &tabla->hph_pa_dac_state)) {
Joonwoo Parka9444452011-12-08 18:48:27 -08004673 pr_debug("%s: HPHL clear flag and enable DAC\n", __func__);
4674 snd_soc_update_bits(tabla->codec, TABLA_A_RX_HPH_L_DAC_CTL,
4675 0xC0, 0xC0);
4676 }
4677}
4678
Bradley Rubincb1e2732011-06-23 16:49:20 -07004679static irqreturn_t tabla_hs_insert_irq(int irq, void *data)
4680{
4681 struct tabla_priv *priv = data;
4682 struct snd_soc_codec *codec = priv->codec;
Joonwoo Park0976d012011-12-22 11:48:18 -08004683 const struct tabla_mbhc_plug_detect_cfg *plug_det =
4684 TABLA_MBHC_CAL_PLUG_DET_PTR(priv->calibration);
Bradley Rubin355611a2011-08-24 14:01:18 -07004685 int ldo_h_on, micb_cfilt_on;
Joonwoo Park0976d012011-12-22 11:48:18 -08004686 short mb_v;
Bhalchandra Gajare7fc72332011-10-13 19:01:55 -07004687 u8 is_removal;
Joonwoo Park0976d012011-12-22 11:48:18 -08004688 int mic_mv;
Bhalchandra Gajare343cbb02011-09-07 18:58:19 -07004689
Joonwoo Parkf4267c22012-01-10 13:25:24 -08004690 pr_debug("%s: enter\n", __func__);
Asish Bhattacharyab1aeae22012-02-15 08:29:28 +05304691 wcd9xxx_disable_irq(codec->control_data, TABLA_IRQ_MBHC_INSERTION);
Joonwoo Park8b1f0982011-12-08 17:12:45 -08004692
Bhalchandra Gajare7fc72332011-10-13 19:01:55 -07004693 is_removal = snd_soc_read(codec, TABLA_A_CDC_MBHC_INT_CTL) & 0x02;
4694 snd_soc_update_bits(codec, TABLA_A_CDC_MBHC_INT_CTL, 0x03, 0x00);
4695
4696 /* Turn off both HPH and MIC line schmitt triggers */
Joonwoo Park0976d012011-12-22 11:48:18 -08004697 snd_soc_update_bits(codec, priv->mbhc_bias_regs.mbhc_reg, 0x90, 0x00);
Bhalchandra Gajare7fc72332011-10-13 19:01:55 -07004698 snd_soc_update_bits(codec, TABLA_A_MBHC_HPH, 0x13, 0x00);
Bradley Rubincb1e2732011-06-23 16:49:20 -07004699
Joonwoo Parkf4267c22012-01-10 13:25:24 -08004700 if (priv->mbhc_fake_ins_start &&
4701 time_after(jiffies, priv->mbhc_fake_ins_start +
Asish Bhattacharyab1aeae22012-02-15 08:29:28 +05304702 msecs_to_jiffies(TABLA_FAKE_INS_THRESHOLD_MS))) {
Bhalchandra Gajare9494fa262011-11-10 19:25:59 -08004703 pr_debug("%s: fake context interrupt, reset insertion\n",
Joonwoo Parkf4267c22012-01-10 13:25:24 -08004704 __func__);
4705 priv->mbhc_fake_ins_start = 0;
Bhalchandra Gajare9494fa262011-11-10 19:25:59 -08004706 tabla_codec_shutdown_hs_polling(codec);
4707 tabla_codec_enable_hs_detect(codec, 1);
4708 return IRQ_HANDLED;
4709 }
4710
Bradley Rubin355611a2011-08-24 14:01:18 -07004711 ldo_h_on = snd_soc_read(codec, TABLA_A_LDO_H_MODE_1) & 0x80;
Joonwoo Park0976d012011-12-22 11:48:18 -08004712 micb_cfilt_on = snd_soc_read(codec, priv->mbhc_bias_regs.cfilt_ctl)
4713 & 0x80;
Bradley Rubin355611a2011-08-24 14:01:18 -07004714
4715 if (!ldo_h_on)
4716 snd_soc_update_bits(codec, TABLA_A_LDO_H_MODE_1, 0x80, 0x80);
4717 if (!micb_cfilt_on)
Bhalchandra Gajare02d90cd2011-09-30 16:14:00 -07004718 snd_soc_update_bits(codec, priv->mbhc_bias_regs.cfilt_ctl,
Joonwoo Park0976d012011-12-22 11:48:18 -08004719 0x80, 0x80);
4720 if (plug_det->t_ins_complete > 20)
4721 msleep(plug_det->t_ins_complete);
4722 else
4723 usleep_range(plug_det->t_ins_complete * 1000,
4724 plug_det->t_ins_complete * 1000);
Bradley Rubincb1e2732011-06-23 16:49:20 -07004725
Bhalchandra Gajare7fc72332011-10-13 19:01:55 -07004726 if (!ldo_h_on)
4727 snd_soc_update_bits(codec, TABLA_A_LDO_H_MODE_1, 0x80, 0x0);
4728 if (!micb_cfilt_on)
4729 snd_soc_update_bits(codec, priv->mbhc_bias_regs.cfilt_ctl,
Joonwoo Park0976d012011-12-22 11:48:18 -08004730 0x80, 0x0);
Bhalchandra Gajare7fc72332011-10-13 19:01:55 -07004731
4732 if (is_removal) {
Bhalchandra Gajared9ebb6c2011-10-03 19:54:41 -07004733 /*
4734 * If headphone is removed while playback is in progress,
4735 * it is possible that micbias will be switched to VDDIO.
4736 */
4737 if (priv->mbhc_micbias_switched)
4738 tabla_codec_switch_micbias(codec, 0);
Patrick Lai72aa4da2011-12-08 12:38:18 -08004739 priv->hph_status &= ~SND_JACK_HEADPHONE;
Joonwoo Parka9444452011-12-08 18:48:27 -08004740
4741 /* If headphone PA is on, check if userspace receives
4742 * removal event to sync-up PA's state */
4743 if (tabla_is_hph_pa_on(codec)) {
4744 set_bit(TABLA_HPHL_PA_OFF_ACK, &priv->hph_pa_dac_state);
4745 set_bit(TABLA_HPHR_PA_OFF_ACK, &priv->hph_pa_dac_state);
4746 }
4747
4748 if (tabla_is_hph_dac_on(codec, 1))
4749 set_bit(TABLA_HPHL_DAC_OFF_ACK,
4750 &priv->hph_pa_dac_state);
4751 if (tabla_is_hph_dac_on(codec, 0))
4752 set_bit(TABLA_HPHR_DAC_OFF_ACK,
4753 &priv->hph_pa_dac_state);
4754
Bradley Rubincb1e2732011-06-23 16:49:20 -07004755 if (priv->headset_jack) {
4756 pr_debug("%s: Reporting removal\n", __func__);
Joonwoo Park8b1f0982011-12-08 17:12:45 -08004757 tabla_snd_soc_jack_report(priv, priv->headset_jack,
4758 priv->hph_status,
4759 TABLA_JACK_MASK);
Bradley Rubincb1e2732011-06-23 16:49:20 -07004760 }
4761 tabla_codec_shutdown_hs_removal_detect(codec);
4762 tabla_codec_enable_hs_detect(codec, 1);
4763 return IRQ_HANDLED;
4764 }
4765
Joonwoo Park0976d012011-12-22 11:48:18 -08004766 mb_v = tabla_codec_setup_hs_polling(codec);
4767 mic_mv = tabla_codec_sta_dce_v(codec, 0, mb_v);
Bradley Rubin355611a2011-08-24 14:01:18 -07004768
Joonwoo Park0976d012011-12-22 11:48:18 -08004769 if (mb_v > (short) priv->mbhc_data.v_ins_hu) {
Joonwoo Parkf4267c22012-01-10 13:25:24 -08004770 pr_debug("%s: Fake insertion interrupt since %dmsec ago, "
4771 "STA : %d,%d\n", __func__,
4772 (priv->mbhc_fake_ins_start ?
4773 jiffies_to_msecs(jiffies -
4774 priv->mbhc_fake_ins_start) :
4775 0),
4776 mb_v, mic_mv);
4777 if (time_after(jiffies,
Asish Bhattacharyab1aeae22012-02-15 08:29:28 +05304778 priv->mbhc_fake_ins_start +
4779 msecs_to_jiffies(TABLA_FAKE_INS_THRESHOLD_MS))) {
Joonwoo Parkf4267c22012-01-10 13:25:24 -08004780 /* Disable HPH trigger and enable MIC line trigger */
4781 snd_soc_update_bits(codec, TABLA_A_MBHC_HPH, 0x12,
4782 0x00);
4783 snd_soc_update_bits(codec,
4784 priv->mbhc_bias_regs.mbhc_reg, 0x60,
4785 plug_det->mic_current << 5);
4786 snd_soc_update_bits(codec,
4787 priv->mbhc_bias_regs.mbhc_reg,
4788 0x80, 0x80);
4789 usleep_range(plug_det->t_mic_pid, plug_det->t_mic_pid);
4790 snd_soc_update_bits(codec,
4791 priv->mbhc_bias_regs.mbhc_reg,
4792 0x10, 0x10);
4793 } else {
4794 if (priv->mbhc_fake_ins_start == 0)
4795 priv->mbhc_fake_ins_start = jiffies;
4796 /* Setup normal insert detection
4797 * Enable HPH Schmitt Trigger
4798 */
4799 snd_soc_update_bits(codec, TABLA_A_MBHC_HPH,
4800 0x13 | 0x0C,
4801 0x13 | plug_det->hph_current << 2);
4802 }
Bhalchandra Gajare9494fa262011-11-10 19:25:59 -08004803 /* Setup for insertion detection */
4804 snd_soc_update_bits(codec, TABLA_A_CDC_MBHC_INT_CTL, 0x2, 0);
Asish Bhattacharyab1aeae22012-02-15 08:29:28 +05304805 wcd9xxx_enable_irq(codec->control_data,
4806 TABLA_IRQ_MBHC_INSERTION);
Bhalchandra Gajare9494fa262011-11-10 19:25:59 -08004807 snd_soc_update_bits(codec, TABLA_A_CDC_MBHC_INT_CTL, 0x1, 0x1);
4808
Joonwoo Park0976d012011-12-22 11:48:18 -08004809 } else if (mb_v < (short) priv->mbhc_data.v_no_mic) {
4810 pr_debug("%s: Headphone Detected, mb_v: %d,%d\n",
4811 __func__, mb_v, mic_mv);
Joonwoo Parkf4267c22012-01-10 13:25:24 -08004812 priv->mbhc_fake_ins_start = 0;
Patrick Lai49efeac2011-11-03 11:01:12 -07004813 priv->hph_status |= SND_JACK_HEADPHONE;
Bradley Rubincb1e2732011-06-23 16:49:20 -07004814 if (priv->headset_jack) {
4815 pr_debug("%s: Reporting insertion %d\n", __func__,
Joonwoo Park0976d012011-12-22 11:48:18 -08004816 SND_JACK_HEADPHONE);
Joonwoo Park8b1f0982011-12-08 17:12:45 -08004817 tabla_snd_soc_jack_report(priv, priv->headset_jack,
4818 priv->hph_status,
4819 TABLA_JACK_MASK);
Bradley Rubincb1e2732011-06-23 16:49:20 -07004820 }
4821 tabla_codec_shutdown_hs_polling(codec);
4822 tabla_codec_enable_hs_detect(codec, 0);
Joonwoo Parka9444452011-12-08 18:48:27 -08004823 tabla_sync_hph_state(priv);
Bhalchandra Gajare343cbb02011-09-07 18:58:19 -07004824 } else {
Joonwoo Park0976d012011-12-22 11:48:18 -08004825 pr_debug("%s: Headset detected, mb_v: %d,%d\n",
4826 __func__, mb_v, mic_mv);
Joonwoo Parkf4267c22012-01-10 13:25:24 -08004827 priv->mbhc_fake_ins_start = 0;
Patrick Lai49efeac2011-11-03 11:01:12 -07004828 priv->hph_status |= SND_JACK_HEADSET;
Bradley Rubincb1e2732011-06-23 16:49:20 -07004829 if (priv->headset_jack) {
4830 pr_debug("%s: Reporting insertion %d\n", __func__,
Joonwoo Park0976d012011-12-22 11:48:18 -08004831 SND_JACK_HEADSET);
Joonwoo Park8b1f0982011-12-08 17:12:45 -08004832 tabla_snd_soc_jack_report(priv, priv->headset_jack,
4833 priv->hph_status,
4834 TABLA_JACK_MASK);
Bradley Rubincb1e2732011-06-23 16:49:20 -07004835 }
Joonwoo Parkf4267c22012-01-10 13:25:24 -08004836 /* avoid false button press detect */
4837 msleep(50);
Bradley Rubincb1e2732011-06-23 16:49:20 -07004838 tabla_codec_start_hs_polling(codec);
Joonwoo Parka9444452011-12-08 18:48:27 -08004839 tabla_sync_hph_state(priv);
Bradley Rubincb1e2732011-06-23 16:49:20 -07004840 }
4841
4842 return IRQ_HANDLED;
4843}
4844
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07004845static irqreturn_t tabla_hs_remove_irq(int irq, void *data)
4846{
Joonwoo Park6b9b03f2012-01-23 18:48:54 -08004847 short bias_value;
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07004848 struct tabla_priv *priv = data;
4849 struct snd_soc_codec *codec = priv->codec;
Joonwoo Park0976d012011-12-22 11:48:18 -08004850 const struct tabla_mbhc_general_cfg *generic =
4851 TABLA_MBHC_CAL_GENERAL_PTR(priv->calibration);
Joonwoo Park6b9b03f2012-01-23 18:48:54 -08004852 int fake_removal = 0;
4853 int min_us = TABLA_FAKE_REMOVAL_MIN_PERIOD_MS * 1000;
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07004854
Joonwoo Park6b9b03f2012-01-23 18:48:54 -08004855 pr_debug("%s: enter, removal interrupt\n", __func__);
Asish Bhattacharyab1aeae22012-02-15 08:29:28 +05304856 wcd9xxx_disable_irq(codec->control_data, TABLA_IRQ_MBHC_REMOVAL);
4857 wcd9xxx_disable_irq(codec->control_data, TABLA_IRQ_MBHC_POTENTIAL);
4858 wcd9xxx_disable_irq(codec->control_data, TABLA_IRQ_MBHC_RELEASE);
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07004859
Joonwoo Park0976d012011-12-22 11:48:18 -08004860 usleep_range(generic->t_shutdown_plug_rem,
4861 generic->t_shutdown_plug_rem);
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07004862
Joonwoo Park6b9b03f2012-01-23 18:48:54 -08004863 do {
4864 bias_value = tabla_codec_sta_dce(codec, 1);
4865 pr_debug("%s: DCE %d,%d, %d us left\n", __func__, bias_value,
4866 tabla_codec_sta_dce_v(codec, 1, bias_value), min_us);
4867 if (bias_value < (short)priv->mbhc_data.v_ins_h) {
4868 fake_removal = 1;
4869 break;
4870 }
4871 min_us -= priv->mbhc_data.t_dce;
4872 } while (min_us > 0);
Bradley Rubin89ffd0a2011-07-21 16:04:06 -07004873
Joonwoo Park6b9b03f2012-01-23 18:48:54 -08004874 if (fake_removal) {
Bradley Rubin89ffd0a2011-07-21 16:04:06 -07004875 pr_debug("False alarm, headset not actually removed\n");
4876 tabla_codec_start_hs_polling(codec);
4877 } else {
Bhalchandra Gajared9ebb6c2011-10-03 19:54:41 -07004878 /*
4879 * If this removal is not false, first check the micbias
4880 * switch status and switch it to LDOH if it is already
4881 * switched to VDDIO.
4882 */
4883 if (priv->mbhc_micbias_switched)
4884 tabla_codec_switch_micbias(codec, 0);
Patrick Lai49efeac2011-11-03 11:01:12 -07004885 priv->hph_status &= ~SND_JACK_HEADSET;
Bradley Rubin89ffd0a2011-07-21 16:04:06 -07004886 if (priv->headset_jack) {
4887 pr_debug("%s: Reporting removal\n", __func__);
Joonwoo Park8b1f0982011-12-08 17:12:45 -08004888 tabla_snd_soc_jack_report(priv, priv->headset_jack, 0,
4889 TABLA_JACK_MASK);
Bradley Rubin89ffd0a2011-07-21 16:04:06 -07004890 }
4891 tabla_codec_shutdown_hs_polling(codec);
4892
4893 tabla_codec_enable_hs_detect(codec, 1);
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07004894 }
Joonwoo Park8b1f0982011-12-08 17:12:45 -08004895
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07004896 return IRQ_HANDLED;
4897}
4898
4899static unsigned long slimbus_value;
4900
4901static irqreturn_t tabla_slimbus_irq(int irq, void *data)
4902{
4903 struct tabla_priv *priv = data;
4904 struct snd_soc_codec *codec = priv->codec;
4905 int i, j;
4906 u8 val;
4907
Asish Bhattacharyab1aeae22012-02-15 08:29:28 +05304908 for (i = 0; i < WCD9XXX_SLIM_NUM_PORT_REG; i++) {
4909 slimbus_value = wcd9xxx_interface_reg_read(codec->control_data,
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07004910 TABLA_SLIM_PGD_PORT_INT_STATUS0 + i);
4911 for_each_set_bit(j, &slimbus_value, BITS_PER_BYTE) {
Asish Bhattacharyab1aeae22012-02-15 08:29:28 +05304912 val = wcd9xxx_interface_reg_read(codec->control_data,
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07004913 TABLA_SLIM_PGD_PORT_INT_SOURCE0 + i*8 + j);
4914 if (val & 0x1)
4915 pr_err_ratelimited("overflow error on port %x,"
4916 " value %x\n", i*8 + j, val);
4917 if (val & 0x2)
4918 pr_err_ratelimited("underflow error on port %x,"
4919 " value %x\n", i*8 + j, val);
4920 }
Asish Bhattacharyab1aeae22012-02-15 08:29:28 +05304921 wcd9xxx_interface_reg_write(codec->control_data,
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07004922 TABLA_SLIM_PGD_PORT_INT_CLR0 + i, 0xFF);
4923 }
4924
4925 return IRQ_HANDLED;
4926}
4927
Patrick Lai3043fba2011-08-01 14:15:57 -07004928
4929static int tabla_handle_pdata(struct tabla_priv *tabla)
4930{
4931 struct snd_soc_codec *codec = tabla->codec;
Asish Bhattacharyab1aeae22012-02-15 08:29:28 +05304932 struct wcd9xxx_pdata *pdata = tabla->pdata;
Patrick Lai3043fba2011-08-01 14:15:57 -07004933 int k1, k2, k3, rc = 0;
Santosh Mardi22920282011-10-26 02:38:40 +05304934 u8 leg_mode = pdata->amic_settings.legacy_mode;
4935 u8 txfe_bypass = pdata->amic_settings.txfe_enable;
4936 u8 txfe_buff = pdata->amic_settings.txfe_buff;
4937 u8 flag = pdata->amic_settings.use_pdata;
4938 u8 i = 0, j = 0;
4939 u8 val_txfe = 0, value = 0;
Patrick Lai3043fba2011-08-01 14:15:57 -07004940
4941 if (!pdata) {
4942 rc = -ENODEV;
4943 goto done;
4944 }
4945
4946 /* Make sure settings are correct */
4947 if ((pdata->micbias.ldoh_v > TABLA_LDOH_2P85_V) ||
4948 (pdata->micbias.bias1_cfilt_sel > TABLA_CFILT3_SEL) ||
4949 (pdata->micbias.bias2_cfilt_sel > TABLA_CFILT3_SEL) ||
4950 (pdata->micbias.bias3_cfilt_sel > TABLA_CFILT3_SEL) ||
4951 (pdata->micbias.bias4_cfilt_sel > TABLA_CFILT3_SEL)) {
4952 rc = -EINVAL;
4953 goto done;
4954 }
4955
4956 /* figure out k value */
4957 k1 = tabla_find_k_value(pdata->micbias.ldoh_v,
4958 pdata->micbias.cfilt1_mv);
4959 k2 = tabla_find_k_value(pdata->micbias.ldoh_v,
4960 pdata->micbias.cfilt2_mv);
4961 k3 = tabla_find_k_value(pdata->micbias.ldoh_v,
4962 pdata->micbias.cfilt3_mv);
4963
4964 if (IS_ERR_VALUE(k1) || IS_ERR_VALUE(k2) || IS_ERR_VALUE(k3)) {
4965 rc = -EINVAL;
4966 goto done;
4967 }
4968
4969 /* Set voltage level and always use LDO */
4970 snd_soc_update_bits(codec, TABLA_A_LDO_H_MODE_1, 0x0C,
4971 (pdata->micbias.ldoh_v << 2));
4972
4973 snd_soc_update_bits(codec, TABLA_A_MICB_CFILT_1_VAL, 0xFC,
4974 (k1 << 2));
4975 snd_soc_update_bits(codec, TABLA_A_MICB_CFILT_2_VAL, 0xFC,
4976 (k2 << 2));
4977 snd_soc_update_bits(codec, TABLA_A_MICB_CFILT_3_VAL, 0xFC,
4978 (k3 << 2));
4979
4980 snd_soc_update_bits(codec, TABLA_A_MICB_1_CTL, 0x60,
4981 (pdata->micbias.bias1_cfilt_sel << 5));
4982 snd_soc_update_bits(codec, TABLA_A_MICB_2_CTL, 0x60,
4983 (pdata->micbias.bias2_cfilt_sel << 5));
4984 snd_soc_update_bits(codec, TABLA_A_MICB_3_CTL, 0x60,
4985 (pdata->micbias.bias3_cfilt_sel << 5));
Joonwoo Park6c1ebb62012-01-16 19:08:43 -08004986 snd_soc_update_bits(codec, tabla->reg_addr.micb_4_ctl, 0x60,
4987 (pdata->micbias.bias4_cfilt_sel << 5));
Patrick Lai3043fba2011-08-01 14:15:57 -07004988
Santosh Mardi22920282011-10-26 02:38:40 +05304989 for (i = 0; i < 6; j++, i += 2) {
4990 if (flag & (0x01 << i)) {
4991 value = (leg_mode & (0x01 << i)) ? 0x10 : 0x00;
4992 val_txfe = (txfe_bypass & (0x01 << i)) ? 0x20 : 0x00;
4993 val_txfe = val_txfe |
4994 ((txfe_buff & (0x01 << i)) ? 0x10 : 0x00);
4995 snd_soc_update_bits(codec, TABLA_A_TX_1_2_EN + j * 10,
4996 0x10, value);
4997 snd_soc_update_bits(codec,
4998 TABLA_A_TX_1_2_TEST_EN + j * 10,
4999 0x30, val_txfe);
5000 }
5001 if (flag & (0x01 << (i + 1))) {
5002 value = (leg_mode & (0x01 << (i + 1))) ? 0x01 : 0x00;
5003 val_txfe = (txfe_bypass &
5004 (0x01 << (i + 1))) ? 0x02 : 0x00;
5005 val_txfe |= (txfe_buff &
5006 (0x01 << (i + 1))) ? 0x01 : 0x00;
5007 snd_soc_update_bits(codec, TABLA_A_TX_1_2_EN + j * 10,
5008 0x01, value);
5009 snd_soc_update_bits(codec,
5010 TABLA_A_TX_1_2_TEST_EN + j * 10,
5011 0x03, val_txfe);
5012 }
5013 }
5014 if (flag & 0x40) {
5015 value = (leg_mode & 0x40) ? 0x10 : 0x00;
5016 value = value | ((txfe_bypass & 0x40) ? 0x02 : 0x00);
5017 value = value | ((txfe_buff & 0x40) ? 0x01 : 0x00);
5018 snd_soc_update_bits(codec, TABLA_A_TX_7_MBHC_EN,
5019 0x13, value);
5020 }
Patrick Lai49efeac2011-11-03 11:01:12 -07005021
5022 if (pdata->ocp.use_pdata) {
5023 /* not defined in CODEC specification */
5024 if (pdata->ocp.hph_ocp_limit == 1 ||
5025 pdata->ocp.hph_ocp_limit == 5) {
5026 rc = -EINVAL;
5027 goto done;
5028 }
5029 snd_soc_update_bits(codec, TABLA_A_RX_COM_OCP_CTL,
5030 0x0F, pdata->ocp.num_attempts);
5031 snd_soc_write(codec, TABLA_A_RX_COM_OCP_COUNT,
5032 ((pdata->ocp.run_time << 4) | pdata->ocp.wait_time));
5033 snd_soc_update_bits(codec, TABLA_A_RX_HPH_OCP_CTL,
5034 0xE0, (pdata->ocp.hph_ocp_limit << 5));
5035 }
Patrick Lai3043fba2011-08-01 14:15:57 -07005036done:
5037 return rc;
5038}
5039
Kiran Kandi1f6fd722011-08-11 10:36:11 -07005040static const struct tabla_reg_mask_val tabla_1_1_reg_defaults[] = {
5041
5042 /* Tabla 1.1 MICBIAS changes */
5043 TABLA_REG_VAL(TABLA_A_MICB_1_INT_RBIAS, 0x24),
5044 TABLA_REG_VAL(TABLA_A_MICB_2_INT_RBIAS, 0x24),
5045 TABLA_REG_VAL(TABLA_A_MICB_3_INT_RBIAS, 0x24),
Kiran Kandi1f6fd722011-08-11 10:36:11 -07005046
5047 /* Tabla 1.1 HPH changes */
5048 TABLA_REG_VAL(TABLA_A_RX_HPH_BIAS_PA, 0x57),
5049 TABLA_REG_VAL(TABLA_A_RX_HPH_BIAS_LDO, 0x56),
5050
5051 /* Tabla 1.1 EAR PA changes */
5052 TABLA_REG_VAL(TABLA_A_RX_EAR_BIAS_PA, 0xA6),
5053 TABLA_REG_VAL(TABLA_A_RX_EAR_GAIN, 0x02),
5054 TABLA_REG_VAL(TABLA_A_RX_EAR_VCM, 0x03),
5055
5056 /* Tabla 1.1 Lineout_5 Changes */
5057 TABLA_REG_VAL(TABLA_A_RX_LINE_5_GAIN, 0x10),
5058
5059 /* Tabla 1.1 RX Changes */
5060 TABLA_REG_VAL(TABLA_A_CDC_RX1_B5_CTL, 0x78),
5061 TABLA_REG_VAL(TABLA_A_CDC_RX2_B5_CTL, 0x78),
5062 TABLA_REG_VAL(TABLA_A_CDC_RX3_B5_CTL, 0x78),
5063 TABLA_REG_VAL(TABLA_A_CDC_RX4_B5_CTL, 0x78),
5064 TABLA_REG_VAL(TABLA_A_CDC_RX5_B5_CTL, 0x78),
5065 TABLA_REG_VAL(TABLA_A_CDC_RX6_B5_CTL, 0x78),
5066 TABLA_REG_VAL(TABLA_A_CDC_RX7_B5_CTL, 0x78),
5067
5068 /* Tabla 1.1 RX1 and RX2 Changes */
5069 TABLA_REG_VAL(TABLA_A_CDC_RX1_B6_CTL, 0xA0),
5070 TABLA_REG_VAL(TABLA_A_CDC_RX2_B6_CTL, 0xA0),
5071
5072 /* Tabla 1.1 RX3 to RX7 Changes */
5073 TABLA_REG_VAL(TABLA_A_CDC_RX3_B6_CTL, 0x80),
5074 TABLA_REG_VAL(TABLA_A_CDC_RX4_B6_CTL, 0x80),
5075 TABLA_REG_VAL(TABLA_A_CDC_RX5_B6_CTL, 0x80),
5076 TABLA_REG_VAL(TABLA_A_CDC_RX6_B6_CTL, 0x80),
5077 TABLA_REG_VAL(TABLA_A_CDC_RX7_B6_CTL, 0x80),
5078
5079 /* Tabla 1.1 CLASSG Changes */
5080 TABLA_REG_VAL(TABLA_A_CDC_CLSG_FREQ_THRESH_B3_CTL, 0x1B),
5081};
5082
5083static const struct tabla_reg_mask_val tabla_2_0_reg_defaults[] = {
Kiran Kandi1f6fd722011-08-11 10:36:11 -07005084 /* Tabla 2.0 MICBIAS changes */
5085 TABLA_REG_VAL(TABLA_A_MICB_2_MBHC, 0x02),
5086};
5087
Joonwoo Park6c1ebb62012-01-16 19:08:43 -08005088static const struct tabla_reg_mask_val tabla_1_x_only_reg_2_0_defaults[] = {
5089 TABLA_REG_VAL(TABLA_1_A_MICB_4_INT_RBIAS, 0x24),
5090};
5091
5092static const struct tabla_reg_mask_val tabla_2_only_reg_2_0_defaults[] = {
5093 TABLA_REG_VAL(TABLA_2_A_MICB_4_INT_RBIAS, 0x24),
5094};
5095
Kiran Kandi1f6fd722011-08-11 10:36:11 -07005096static void tabla_update_reg_defaults(struct snd_soc_codec *codec)
5097{
5098 u32 i;
Asish Bhattacharyab1aeae22012-02-15 08:29:28 +05305099 struct wcd9xxx *tabla_core = dev_get_drvdata(codec->dev->parent);
Kiran Kandi1f6fd722011-08-11 10:36:11 -07005100
5101 for (i = 0; i < ARRAY_SIZE(tabla_1_1_reg_defaults); i++)
5102 snd_soc_write(codec, tabla_1_1_reg_defaults[i].reg,
5103 tabla_1_1_reg_defaults[i].val);
5104
5105 for (i = 0; i < ARRAY_SIZE(tabla_2_0_reg_defaults); i++)
5106 snd_soc_write(codec, tabla_2_0_reg_defaults[i].reg,
5107 tabla_2_0_reg_defaults[i].val);
Joonwoo Park6c1ebb62012-01-16 19:08:43 -08005108
5109 if (TABLA_IS_1_X(tabla_core->version)) {
5110 for (i = 0; i < ARRAY_SIZE(tabla_1_x_only_reg_2_0_defaults);
5111 i++)
5112 snd_soc_write(codec,
5113 tabla_1_x_only_reg_2_0_defaults[i].reg,
5114 tabla_1_x_only_reg_2_0_defaults[i].val);
5115 } else {
5116 for (i = 0; i < ARRAY_SIZE(tabla_2_only_reg_2_0_defaults); i++)
5117 snd_soc_write(codec,
5118 tabla_2_only_reg_2_0_defaults[i].reg,
5119 tabla_2_only_reg_2_0_defaults[i].val);
5120 }
Kiran Kandi1f6fd722011-08-11 10:36:11 -07005121}
5122
5123static const struct tabla_reg_mask_val tabla_codec_reg_init_val[] = {
Patrick Laic7cae882011-11-18 11:52:49 -08005124 /* Initialize current threshold to 350MA
5125 * number of wait and run cycles to 4096
5126 */
Patrick Lai49efeac2011-11-03 11:01:12 -07005127 {TABLA_A_RX_HPH_OCP_CTL, 0xE0, 0x60},
Patrick Laic7cae882011-11-18 11:52:49 -08005128 {TABLA_A_RX_COM_OCP_COUNT, 0xFF, 0xFF},
Kiran Kandi1f6fd722011-08-11 10:36:11 -07005129
Santosh Mardi32171012011-10-28 23:32:06 +05305130 {TABLA_A_QFUSE_CTL, 0xFF, 0x03},
5131
Kiran Kandi1f6fd722011-08-11 10:36:11 -07005132 /* Initialize gain registers to use register gain */
5133 {TABLA_A_RX_HPH_L_GAIN, 0x10, 0x10},
5134 {TABLA_A_RX_HPH_R_GAIN, 0x10, 0x10},
5135 {TABLA_A_RX_LINE_1_GAIN, 0x10, 0x10},
5136 {TABLA_A_RX_LINE_2_GAIN, 0x10, 0x10},
5137 {TABLA_A_RX_LINE_3_GAIN, 0x10, 0x10},
5138 {TABLA_A_RX_LINE_4_GAIN, 0x10, 0x10},
5139
5140 /* Initialize mic biases to differential mode */
5141 {TABLA_A_MICB_1_INT_RBIAS, 0x24, 0x24},
5142 {TABLA_A_MICB_2_INT_RBIAS, 0x24, 0x24},
5143 {TABLA_A_MICB_3_INT_RBIAS, 0x24, 0x24},
Kiran Kandi1f6fd722011-08-11 10:36:11 -07005144
5145 {TABLA_A_CDC_CONN_CLSG_CTL, 0x3C, 0x14},
5146
5147 /* Use 16 bit sample size for TX1 to TX6 */
5148 {TABLA_A_CDC_CONN_TX_SB_B1_CTL, 0x30, 0x20},
5149 {TABLA_A_CDC_CONN_TX_SB_B2_CTL, 0x30, 0x20},
5150 {TABLA_A_CDC_CONN_TX_SB_B3_CTL, 0x30, 0x20},
5151 {TABLA_A_CDC_CONN_TX_SB_B4_CTL, 0x30, 0x20},
5152 {TABLA_A_CDC_CONN_TX_SB_B5_CTL, 0x30, 0x20},
5153 {TABLA_A_CDC_CONN_TX_SB_B6_CTL, 0x30, 0x20},
5154
5155 /* Use 16 bit sample size for TX7 to TX10 */
5156 {TABLA_A_CDC_CONN_TX_SB_B7_CTL, 0x60, 0x40},
5157 {TABLA_A_CDC_CONN_TX_SB_B8_CTL, 0x60, 0x40},
5158 {TABLA_A_CDC_CONN_TX_SB_B9_CTL, 0x60, 0x40},
5159 {TABLA_A_CDC_CONN_TX_SB_B10_CTL, 0x60, 0x40},
5160
5161 /* Use 16 bit sample size for RX */
5162 {TABLA_A_CDC_CONN_RX_SB_B1_CTL, 0xFF, 0xAA},
5163 {TABLA_A_CDC_CONN_RX_SB_B2_CTL, 0xFF, 0xAA},
5164
5165 /*enable HPF filter for TX paths */
5166 {TABLA_A_CDC_TX1_MUX_CTL, 0x8, 0x0},
5167 {TABLA_A_CDC_TX2_MUX_CTL, 0x8, 0x0},
5168 {TABLA_A_CDC_TX3_MUX_CTL, 0x8, 0x0},
5169 {TABLA_A_CDC_TX4_MUX_CTL, 0x8, 0x0},
5170 {TABLA_A_CDC_TX5_MUX_CTL, 0x8, 0x0},
5171 {TABLA_A_CDC_TX6_MUX_CTL, 0x8, 0x0},
5172 {TABLA_A_CDC_TX7_MUX_CTL, 0x8, 0x0},
5173 {TABLA_A_CDC_TX8_MUX_CTL, 0x8, 0x0},
5174 {TABLA_A_CDC_TX9_MUX_CTL, 0x8, 0x0},
5175 {TABLA_A_CDC_TX10_MUX_CTL, 0x8, 0x0},
5176};
5177
Joonwoo Park6c1ebb62012-01-16 19:08:43 -08005178static const struct tabla_reg_mask_val tabla_1_x_codec_reg_init_val[] = {
5179 /* Initialize mic biases to differential mode */
5180 {TABLA_1_A_MICB_4_INT_RBIAS, 0x24, 0x24},
5181};
5182
5183static const struct tabla_reg_mask_val tabla_2_higher_codec_reg_init_val[] = {
5184 /* Initialize mic biases to differential mode */
5185 {TABLA_2_A_MICB_4_INT_RBIAS, 0x24, 0x24},
5186};
5187
Kiran Kandi1f6fd722011-08-11 10:36:11 -07005188static void tabla_codec_init_reg(struct snd_soc_codec *codec)
5189{
5190 u32 i;
Asish Bhattacharyab1aeae22012-02-15 08:29:28 +05305191 struct wcd9xxx *tabla_core = dev_get_drvdata(codec->dev->parent);
Kiran Kandi1f6fd722011-08-11 10:36:11 -07005192
5193 for (i = 0; i < ARRAY_SIZE(tabla_codec_reg_init_val); i++)
5194 snd_soc_update_bits(codec, tabla_codec_reg_init_val[i].reg,
5195 tabla_codec_reg_init_val[i].mask,
5196 tabla_codec_reg_init_val[i].val);
Joonwoo Park6c1ebb62012-01-16 19:08:43 -08005197 if (TABLA_IS_1_X(tabla_core->version)) {
5198 for (i = 0; i < ARRAY_SIZE(tabla_1_x_codec_reg_init_val); i++)
5199 snd_soc_update_bits(codec,
5200 tabla_1_x_codec_reg_init_val[i].reg,
5201 tabla_1_x_codec_reg_init_val[i].mask,
5202 tabla_1_x_codec_reg_init_val[i].val);
5203 } else {
5204 for (i = 0; i < ARRAY_SIZE(tabla_2_higher_codec_reg_init_val);
5205 i++)
5206 snd_soc_update_bits(codec,
5207 tabla_2_higher_codec_reg_init_val[i].reg,
5208 tabla_2_higher_codec_reg_init_val[i].mask,
5209 tabla_2_higher_codec_reg_init_val[i].val);
5210 }
5211}
5212
5213static void tabla_update_reg_address(struct tabla_priv *priv)
5214{
Asish Bhattacharyab1aeae22012-02-15 08:29:28 +05305215 struct wcd9xxx *tabla_core = dev_get_drvdata(priv->codec->dev->parent);
Joonwoo Park6c1ebb62012-01-16 19:08:43 -08005216 struct tabla_reg_address *reg_addr = &priv->reg_addr;
5217
5218 if (TABLA_IS_1_X(tabla_core->version)) {
5219 reg_addr->micb_4_ctl = TABLA_1_A_MICB_4_CTL;
5220 reg_addr->micb_4_int_rbias = TABLA_1_A_MICB_4_INT_RBIAS;
5221 reg_addr->micb_4_int_rbias = TABLA_1_A_MICB_4_INT_RBIAS;
5222 } else if (TABLA_IS_2_0(tabla_core->version)) {
5223 reg_addr->micb_4_ctl = TABLA_2_A_MICB_4_CTL;
5224 reg_addr->micb_4_int_rbias = TABLA_2_A_MICB_4_INT_RBIAS;
5225 reg_addr->micb_4_int_rbias = TABLA_2_A_MICB_4_INT_RBIAS;
5226 }
Kiran Kandi1f6fd722011-08-11 10:36:11 -07005227}
5228
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07005229static int tabla_codec_probe(struct snd_soc_codec *codec)
5230{
Asish Bhattacharyab1aeae22012-02-15 08:29:28 +05305231 struct wcd9xxx *control;
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07005232 struct tabla_priv *tabla;
5233 struct snd_soc_dapm_context *dapm = &codec->dapm;
5234 int ret = 0;
5235 int i;
Bharath Ramachandramurthy9c79f132011-11-28 11:18:57 -08005236 int ch_cnt;
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07005237
5238 codec->control_data = dev_get_drvdata(codec->dev->parent);
5239 control = codec->control_data;
5240
5241 tabla = kzalloc(sizeof(struct tabla_priv), GFP_KERNEL);
5242 if (!tabla) {
5243 dev_err(codec->dev, "Failed to allocate private data\n");
5244 return -ENOMEM;
5245 }
5246
Bhalchandra Gajare02d90cd2011-09-30 16:14:00 -07005247 /* Make sure mbhc micbias register addresses are zeroed out */
5248 memset(&tabla->mbhc_bias_regs, 0,
5249 sizeof(struct mbhc_micbias_regs));
Bhalchandra Gajared9ebb6c2011-10-03 19:54:41 -07005250 tabla->cfilt_k_value = 0;
5251 tabla->mbhc_micbias_switched = false;
Bhalchandra Gajare02d90cd2011-09-30 16:14:00 -07005252
Joonwoo Park0976d012011-12-22 11:48:18 -08005253 /* Make sure mbhc intenal calibration data is zeroed out */
5254 memset(&tabla->mbhc_data, 0,
5255 sizeof(struct mbhc_internal_cal_data));
Joonwoo Park433149a2012-01-11 09:53:54 -08005256 tabla->mbhc_data.t_sta_dce = DEFAULT_DCE_STA_WAIT;
Joonwoo Park0976d012011-12-22 11:48:18 -08005257 tabla->mbhc_data.t_dce = DEFAULT_DCE_WAIT;
5258 tabla->mbhc_data.t_sta = DEFAULT_STA_WAIT;
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07005259 snd_soc_codec_set_drvdata(codec, tabla);
5260
Kiran Kandi6fae8bf2011-08-15 10:36:42 -07005261 tabla->mclk_enabled = false;
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07005262 tabla->bandgap_type = TABLA_BANDGAP_OFF;
5263 tabla->clock_active = false;
5264 tabla->config_mode_active = false;
5265 tabla->mbhc_polling_active = false;
Joonwoo Parkf4267c22012-01-10 13:25:24 -08005266 tabla->mbhc_fake_ins_start = 0;
Bradley Rubincb3950a2011-08-18 13:07:26 -07005267 tabla->no_mic_headset_override = false;
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07005268 tabla->codec = codec;
Kuirong Wang0f8ade32012-02-27 16:29:45 -08005269 for (i = 0; i < COMPANDER_MAX; i++) {
5270 tabla->comp_enabled[i] = 0;
5271 tabla->comp_fs[i] = COMPANDER_FS_48KHZ;
5272 }
Patrick Lai3043fba2011-08-01 14:15:57 -07005273 tabla->pdata = dev_get_platdata(codec->dev->parent);
Asish Bhattacharyab1aeae22012-02-15 08:29:28 +05305274 tabla->intf_type = wcd9xxx_get_intf_type();
Patrick Lai3043fba2011-08-01 14:15:57 -07005275
Joonwoo Park6c1ebb62012-01-16 19:08:43 -08005276 tabla_update_reg_address(tabla);
Santosh Mardi22920282011-10-26 02:38:40 +05305277 tabla_update_reg_defaults(codec);
5278 tabla_codec_init_reg(codec);
Santosh Mardi22920282011-10-26 02:38:40 +05305279 ret = tabla_handle_pdata(tabla);
Patrick Lai3043fba2011-08-01 14:15:57 -07005280 if (IS_ERR_VALUE(ret)) {
5281 pr_err("%s: bad pdata\n", __func__);
5282 goto err_pdata;
5283 }
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07005284
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07005285 snd_soc_add_controls(codec, tabla_snd_controls,
Joonwoo Park6c1ebb62012-01-16 19:08:43 -08005286 ARRAY_SIZE(tabla_snd_controls));
5287 if (TABLA_IS_1_X(control->version))
5288 snd_soc_add_controls(codec, tabla_1_x_snd_controls,
5289 ARRAY_SIZE(tabla_1_x_snd_controls));
5290 else
5291 snd_soc_add_controls(codec, tabla_2_higher_snd_controls,
5292 ARRAY_SIZE(tabla_2_higher_snd_controls));
5293
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07005294 snd_soc_dapm_new_controls(dapm, tabla_dapm_widgets,
Joonwoo Park6c1ebb62012-01-16 19:08:43 -08005295 ARRAY_SIZE(tabla_dapm_widgets));
5296 if (TABLA_IS_1_X(control->version))
5297 snd_soc_dapm_new_controls(dapm, tabla_1_x_dapm_widgets,
5298 ARRAY_SIZE(tabla_1_x_dapm_widgets));
5299 else
5300 snd_soc_dapm_new_controls(dapm, tabla_2_higher_dapm_widgets,
5301 ARRAY_SIZE(tabla_2_higher_dapm_widgets));
5302
Asish Bhattacharyab1aeae22012-02-15 08:29:28 +05305303 if (tabla->intf_type == WCD9XXX_INTERFACE_TYPE_I2C) {
Santosh Mardie15e2302011-11-15 10:39:23 +05305304 snd_soc_dapm_new_controls(dapm, tabla_dapm_i2s_widgets,
5305 ARRAY_SIZE(tabla_dapm_i2s_widgets));
5306 snd_soc_dapm_add_routes(dapm, audio_i2s_map,
5307 ARRAY_SIZE(audio_i2s_map));
5308 }
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07005309 snd_soc_dapm_add_routes(dapm, audio_map, ARRAY_SIZE(audio_map));
Kiran Kandi8b3a8302011-09-27 16:13:28 -07005310
Joonwoo Park6c1ebb62012-01-16 19:08:43 -08005311 if (TABLA_IS_1_X(control->version)) {
Kiran Kandi7a9fd902011-11-14 13:51:45 -08005312 snd_soc_dapm_add_routes(dapm, tabla_1_x_lineout_2_to_4_map,
Joonwoo Park6c1ebb62012-01-16 19:08:43 -08005313 ARRAY_SIZE(tabla_1_x_lineout_2_to_4_map));
5314 } else if (TABLA_IS_2_0(control->version)) {
Kiran Kandi7a9fd902011-11-14 13:51:45 -08005315 snd_soc_dapm_add_routes(dapm, tabla_2_x_lineout_2_to_4_map,
Joonwoo Park6c1ebb62012-01-16 19:08:43 -08005316 ARRAY_SIZE(tabla_2_x_lineout_2_to_4_map));
Kiran Kandi7a9fd902011-11-14 13:51:45 -08005317 } else {
5318 pr_err("%s : ERROR. Unsupported Tabla version 0x%2x\n",
Asish Bhattacharyab1aeae22012-02-15 08:29:28 +05305319 __func__, control->version);
Kiran Kandi7a9fd902011-11-14 13:51:45 -08005320 goto err_pdata;
5321 }
5322
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07005323 snd_soc_dapm_sync(dapm);
5324
Asish Bhattacharyab1aeae22012-02-15 08:29:28 +05305325 ret = wcd9xxx_request_irq(codec->control_data, TABLA_IRQ_MBHC_INSERTION,
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07005326 tabla_hs_insert_irq, "Headset insert detect", tabla);
5327 if (ret) {
5328 pr_err("%s: Failed to request irq %d\n", __func__,
5329 TABLA_IRQ_MBHC_INSERTION);
5330 goto err_insert_irq;
5331 }
Asish Bhattacharyab1aeae22012-02-15 08:29:28 +05305332 wcd9xxx_disable_irq(codec->control_data, TABLA_IRQ_MBHC_INSERTION);
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07005333
Asish Bhattacharyab1aeae22012-02-15 08:29:28 +05305334 ret = wcd9xxx_request_irq(codec->control_data, TABLA_IRQ_MBHC_REMOVAL,
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07005335 tabla_hs_remove_irq, "Headset remove detect", tabla);
5336 if (ret) {
5337 pr_err("%s: Failed to request irq %d\n", __func__,
5338 TABLA_IRQ_MBHC_REMOVAL);
5339 goto err_remove_irq;
5340 }
Asish Bhattacharyab1aeae22012-02-15 08:29:28 +05305341 wcd9xxx_disable_irq(codec->control_data, TABLA_IRQ_MBHC_REMOVAL);
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07005342
Asish Bhattacharyab1aeae22012-02-15 08:29:28 +05305343 ret = wcd9xxx_request_irq(codec->control_data, TABLA_IRQ_MBHC_POTENTIAL,
Bradley Rubincb1e2732011-06-23 16:49:20 -07005344 tabla_dce_handler, "DC Estimation detect", tabla);
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07005345 if (ret) {
5346 pr_err("%s: Failed to request irq %d\n", __func__,
5347 TABLA_IRQ_MBHC_POTENTIAL);
5348 goto err_potential_irq;
5349 }
Asish Bhattacharyab1aeae22012-02-15 08:29:28 +05305350 wcd9xxx_disable_irq(codec->control_data, TABLA_IRQ_MBHC_POTENTIAL);
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07005351
Asish Bhattacharyab1aeae22012-02-15 08:29:28 +05305352 ret = wcd9xxx_request_irq(codec->control_data, TABLA_IRQ_MBHC_RELEASE,
Bradley Rubincb1e2732011-06-23 16:49:20 -07005353 tabla_release_handler, "Button Release detect", tabla);
5354 if (ret) {
5355 pr_err("%s: Failed to request irq %d\n", __func__,
5356 TABLA_IRQ_MBHC_RELEASE);
5357 goto err_release_irq;
5358 }
Asish Bhattacharyab1aeae22012-02-15 08:29:28 +05305359 wcd9xxx_disable_irq(codec->control_data, TABLA_IRQ_MBHC_RELEASE);
Bradley Rubincb1e2732011-06-23 16:49:20 -07005360
Asish Bhattacharyab1aeae22012-02-15 08:29:28 +05305361 ret = wcd9xxx_request_irq(codec->control_data, TABLA_IRQ_SLIMBUS,
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07005362 tabla_slimbus_irq, "SLIMBUS Slave", tabla);
5363 if (ret) {
5364 pr_err("%s: Failed to request irq %d\n", __func__,
5365 TABLA_IRQ_SLIMBUS);
5366 goto err_slimbus_irq;
5367 }
5368
Asish Bhattacharyab1aeae22012-02-15 08:29:28 +05305369 for (i = 0; i < WCD9XXX_SLIM_NUM_PORT_REG; i++)
5370 wcd9xxx_interface_reg_write(codec->control_data,
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07005371 TABLA_SLIM_PGD_PORT_INT_EN0 + i, 0xFF);
5372
Asish Bhattacharyab1aeae22012-02-15 08:29:28 +05305373 ret = wcd9xxx_request_irq(codec->control_data,
Patrick Lai49efeac2011-11-03 11:01:12 -07005374 TABLA_IRQ_HPH_PA_OCPL_FAULT, tabla_hphl_ocp_irq,
5375 "HPH_L OCP detect", tabla);
5376 if (ret) {
5377 pr_err("%s: Failed to request irq %d\n", __func__,
5378 TABLA_IRQ_HPH_PA_OCPL_FAULT);
5379 goto err_hphl_ocp_irq;
5380 }
Asish Bhattacharyab1aeae22012-02-15 08:29:28 +05305381 wcd9xxx_disable_irq(codec->control_data, TABLA_IRQ_HPH_PA_OCPL_FAULT);
Patrick Lai49efeac2011-11-03 11:01:12 -07005382
Asish Bhattacharyab1aeae22012-02-15 08:29:28 +05305383 ret = wcd9xxx_request_irq(codec->control_data,
Patrick Lai49efeac2011-11-03 11:01:12 -07005384 TABLA_IRQ_HPH_PA_OCPR_FAULT, tabla_hphr_ocp_irq,
5385 "HPH_R OCP detect", tabla);
5386 if (ret) {
5387 pr_err("%s: Failed to request irq %d\n", __func__,
5388 TABLA_IRQ_HPH_PA_OCPR_FAULT);
5389 goto err_hphr_ocp_irq;
5390 }
Asish Bhattacharyab1aeae22012-02-15 08:29:28 +05305391 wcd9xxx_disable_irq(codec->control_data, TABLA_IRQ_HPH_PA_OCPR_FAULT);
Bharath Ramachandramurthy9c79f132011-11-28 11:18:57 -08005392 for (i = 0; i < ARRAY_SIZE(tabla_dai); i++) {
5393 switch (tabla_dai[i].id) {
5394 case AIF1_PB:
5395 ch_cnt = tabla_dai[i].playback.channels_max;
5396 break;
5397 case AIF1_CAP:
5398 ch_cnt = tabla_dai[i].capture.channels_max;
5399 break;
Neema Shettyd3a89262012-02-16 10:23:50 -08005400 case AIF2_PB:
5401 ch_cnt = tabla_dai[i].playback.channels_max;
5402 break;
Bharath Ramachandramurthy9c79f132011-11-28 11:18:57 -08005403 default:
5404 continue;
5405 }
5406 tabla->dai[i].ch_num = kzalloc((sizeof(unsigned int)*
5407 ch_cnt), GFP_KERNEL);
5408 }
Patrick Lai49efeac2011-11-03 11:01:12 -07005409
Bradley Rubincb3950a2011-08-18 13:07:26 -07005410#ifdef CONFIG_DEBUG_FS
5411 debug_tabla_priv = tabla;
5412#endif
5413
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07005414 return ret;
5415
Patrick Lai49efeac2011-11-03 11:01:12 -07005416err_hphr_ocp_irq:
Asish Bhattacharyab1aeae22012-02-15 08:29:28 +05305417 wcd9xxx_free_irq(codec->control_data,
5418 TABLA_IRQ_HPH_PA_OCPL_FAULT, tabla);
Patrick Lai49efeac2011-11-03 11:01:12 -07005419err_hphl_ocp_irq:
Asish Bhattacharyab1aeae22012-02-15 08:29:28 +05305420 wcd9xxx_free_irq(codec->control_data, TABLA_IRQ_SLIMBUS, tabla);
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07005421err_slimbus_irq:
Asish Bhattacharyab1aeae22012-02-15 08:29:28 +05305422 wcd9xxx_free_irq(codec->control_data, TABLA_IRQ_MBHC_RELEASE, tabla);
Bradley Rubincb1e2732011-06-23 16:49:20 -07005423err_release_irq:
Asish Bhattacharyab1aeae22012-02-15 08:29:28 +05305424 wcd9xxx_free_irq(codec->control_data, TABLA_IRQ_MBHC_POTENTIAL, tabla);
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07005425err_potential_irq:
Asish Bhattacharyab1aeae22012-02-15 08:29:28 +05305426 wcd9xxx_free_irq(codec->control_data, TABLA_IRQ_MBHC_REMOVAL, tabla);
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07005427err_remove_irq:
Asish Bhattacharyab1aeae22012-02-15 08:29:28 +05305428 wcd9xxx_free_irq(codec->control_data, TABLA_IRQ_MBHC_INSERTION, tabla);
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07005429err_insert_irq:
Patrick Lai3043fba2011-08-01 14:15:57 -07005430err_pdata:
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07005431 kfree(tabla);
5432 return ret;
5433}
5434static int tabla_codec_remove(struct snd_soc_codec *codec)
5435{
Bharath Ramachandramurthy9c79f132011-11-28 11:18:57 -08005436 int i;
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07005437 struct tabla_priv *tabla = snd_soc_codec_get_drvdata(codec);
Asish Bhattacharyab1aeae22012-02-15 08:29:28 +05305438 wcd9xxx_free_irq(codec->control_data, TABLA_IRQ_SLIMBUS, tabla);
5439 wcd9xxx_free_irq(codec->control_data, TABLA_IRQ_MBHC_RELEASE, tabla);
5440 wcd9xxx_free_irq(codec->control_data, TABLA_IRQ_MBHC_POTENTIAL, tabla);
5441 wcd9xxx_free_irq(codec->control_data, TABLA_IRQ_MBHC_REMOVAL, tabla);
5442 wcd9xxx_free_irq(codec->control_data, TABLA_IRQ_MBHC_INSERTION, tabla);
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07005443 tabla_codec_disable_clock_block(codec);
5444 tabla_codec_enable_bandgap(codec, TABLA_BANDGAP_OFF);
Patrick Lai64b43262011-12-06 17:29:15 -08005445 if (tabla->mbhc_fw)
5446 release_firmware(tabla->mbhc_fw);
Bharath Ramachandramurthy9c79f132011-11-28 11:18:57 -08005447 for (i = 0; i < ARRAY_SIZE(tabla_dai); i++)
5448 kfree(tabla->dai[i].ch_num);
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07005449 kfree(tabla);
5450 return 0;
5451}
5452static struct snd_soc_codec_driver soc_codec_dev_tabla = {
5453 .probe = tabla_codec_probe,
5454 .remove = tabla_codec_remove,
5455 .read = tabla_read,
5456 .write = tabla_write,
5457
5458 .readable_register = tabla_readable,
5459 .volatile_register = tabla_volatile,
5460
5461 .reg_cache_size = TABLA_CACHE_SIZE,
5462 .reg_cache_default = tabla_reg_defaults,
5463 .reg_word_size = 1,
5464};
Bradley Rubincb3950a2011-08-18 13:07:26 -07005465
5466#ifdef CONFIG_DEBUG_FS
5467static struct dentry *debugfs_poke;
5468
5469static int codec_debug_open(struct inode *inode, struct file *file)
5470{
5471 file->private_data = inode->i_private;
5472 return 0;
5473}
5474
5475static ssize_t codec_debug_write(struct file *filp,
5476 const char __user *ubuf, size_t cnt, loff_t *ppos)
5477{
5478 char lbuf[32];
5479 char *buf;
5480 int rc;
5481
5482 if (cnt > sizeof(lbuf) - 1)
5483 return -EINVAL;
5484
5485 rc = copy_from_user(lbuf, ubuf, cnt);
5486 if (rc)
5487 return -EFAULT;
5488
5489 lbuf[cnt] = '\0';
5490 buf = (char *)lbuf;
5491 debug_tabla_priv->no_mic_headset_override = (*strsep(&buf, " ") == '0')
5492 ? false : true;
Bradley Rubincb3950a2011-08-18 13:07:26 -07005493 return rc;
5494}
5495
5496static const struct file_operations codec_debug_ops = {
5497 .open = codec_debug_open,
5498 .write = codec_debug_write,
5499};
5500#endif
5501
Joonwoo Park8b1f0982011-12-08 17:12:45 -08005502#ifdef CONFIG_PM
5503static int tabla_suspend(struct device *dev)
5504{
Joonwoo Park816b8e62012-01-23 16:03:21 -08005505 dev_dbg(dev, "%s: system suspend\n", __func__);
5506 return 0;
Joonwoo Park8b1f0982011-12-08 17:12:45 -08005507}
5508
5509static int tabla_resume(struct device *dev)
5510{
Joonwoo Park816b8e62012-01-23 16:03:21 -08005511 dev_dbg(dev, "%s: system resume\n", __func__);
5512 return 0;
Joonwoo Park8b1f0982011-12-08 17:12:45 -08005513}
5514
5515static const struct dev_pm_ops tabla_pm_ops = {
5516 .suspend = tabla_suspend,
5517 .resume = tabla_resume,
5518};
5519#endif
5520
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07005521static int __devinit tabla_probe(struct platform_device *pdev)
5522{
Santosh Mardie15e2302011-11-15 10:39:23 +05305523 int ret = 0;
Bradley Rubincb3950a2011-08-18 13:07:26 -07005524#ifdef CONFIG_DEBUG_FS
5525 debugfs_poke = debugfs_create_file("TRRS",
5526 S_IFREG | S_IRUGO, NULL, (void *) "TRRS", &codec_debug_ops);
5527
5528#endif
Asish Bhattacharyab1aeae22012-02-15 08:29:28 +05305529 if (wcd9xxx_get_intf_type() == WCD9XXX_INTERFACE_TYPE_SLIMBUS)
Santosh Mardie15e2302011-11-15 10:39:23 +05305530 ret = snd_soc_register_codec(&pdev->dev, &soc_codec_dev_tabla,
5531 tabla_dai, ARRAY_SIZE(tabla_dai));
Asish Bhattacharyab1aeae22012-02-15 08:29:28 +05305532 else if (wcd9xxx_get_intf_type() == WCD9XXX_INTERFACE_TYPE_I2C)
Santosh Mardie15e2302011-11-15 10:39:23 +05305533 ret = snd_soc_register_codec(&pdev->dev, &soc_codec_dev_tabla,
5534 tabla_i2s_dai, ARRAY_SIZE(tabla_i2s_dai));
5535 return ret;
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07005536}
5537static int __devexit tabla_remove(struct platform_device *pdev)
5538{
5539 snd_soc_unregister_codec(&pdev->dev);
Bradley Rubincb3950a2011-08-18 13:07:26 -07005540
5541#ifdef CONFIG_DEBUG_FS
5542 debugfs_remove(debugfs_poke);
5543#endif
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07005544 return 0;
5545}
5546static struct platform_driver tabla_codec_driver = {
5547 .probe = tabla_probe,
5548 .remove = tabla_remove,
5549 .driver = {
5550 .name = "tabla_codec",
5551 .owner = THIS_MODULE,
Joonwoo Park8b1f0982011-12-08 17:12:45 -08005552#ifdef CONFIG_PM
5553 .pm = &tabla_pm_ops,
5554#endif
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07005555 },
5556};
5557
Kuirong Wangcd4b6da2012-01-16 22:54:45 -08005558static struct platform_driver tabla1x_codec_driver = {
5559 .probe = tabla_probe,
5560 .remove = tabla_remove,
5561 .driver = {
5562 .name = "tabla1x_codec",
5563 .owner = THIS_MODULE,
5564#ifdef CONFIG_PM
5565 .pm = &tabla_pm_ops,
5566#endif
5567 },
5568};
5569
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07005570static int __init tabla_codec_init(void)
5571{
Kuirong Wangcd4b6da2012-01-16 22:54:45 -08005572 int rtn = platform_driver_register(&tabla_codec_driver);
5573 if (rtn == 0) {
5574 rtn = platform_driver_register(&tabla1x_codec_driver);
5575 if (rtn != 0)
5576 platform_driver_unregister(&tabla_codec_driver);
5577 }
5578 return rtn;
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07005579}
5580
5581static void __exit tabla_codec_exit(void)
5582{
Kuirong Wangcd4b6da2012-01-16 22:54:45 -08005583 platform_driver_unregister(&tabla1x_codec_driver);
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07005584 platform_driver_unregister(&tabla_codec_driver);
5585}
5586
5587module_init(tabla_codec_init);
5588module_exit(tabla_codec_exit);
5589
5590MODULE_DESCRIPTION("Tabla codec driver");
5591MODULE_VERSION("1.0");
5592MODULE_LICENSE("GPL v2");