blob: 9a495634d0c238aeaef80aa3b675dc5a3ef3f8e8 [file] [log] [blame]
Arnd Bergmannfef1c772005-06-23 09:43:37 +10001/*
Arnd Bergmannf3f66f52005-10-31 20:08:37 -05002 * linux/arch/powerpc/platforms/cell/cell_setup.c
Arnd Bergmannfef1c772005-06-23 09:43:37 +10003 *
4 * Copyright (C) 1995 Linus Torvalds
5 * Adapted from 'alpha' version by Gary Thomas
6 * Modified by Cort Dougan (cort@cs.nmt.edu)
7 * Modified by PPC64 Team, IBM Corp
Arnd Bergmannf3f66f52005-10-31 20:08:37 -05008 * Modified by Cell Team, IBM Deutschland Entwicklung GmbH
Arnd Bergmannfef1c772005-06-23 09:43:37 +10009 *
10 * This program is free software; you can redistribute it and/or
11 * modify it under the terms of the GNU General Public License
12 * as published by the Free Software Foundation; either version
13 * 2 of the License, or (at your option) any later version.
14 */
15#undef DEBUG
16
17#include <linux/config.h>
18#include <linux/sched.h>
19#include <linux/kernel.h>
20#include <linux/mm.h>
21#include <linux/stddef.h>
22#include <linux/unistd.h>
23#include <linux/slab.h>
24#include <linux/user.h>
25#include <linux/reboot.h>
26#include <linux/init.h>
27#include <linux/delay.h>
28#include <linux/irq.h>
29#include <linux/seq_file.h>
30#include <linux/root_dev.h>
31#include <linux/console.h>
32
33#include <asm/mmu.h>
34#include <asm/processor.h>
35#include <asm/io.h>
36#include <asm/pgtable.h>
37#include <asm/prom.h>
38#include <asm/rtas.h>
39#include <asm/pci-bridge.h>
40#include <asm/iommu.h>
41#include <asm/dma.h>
42#include <asm/machdep.h>
43#include <asm/time.h>
44#include <asm/nvram.h>
45#include <asm/cputable.h>
Stephen Rothwelld3878992005-09-28 02:50:25 +100046#include <asm/ppc-pci.h>
Paul Mackerras40ef8cb2005-10-10 22:50:37 +100047#include <asm/irq.h>
Arnd Bergmannfef1c772005-06-23 09:43:37 +100048
Arnd Bergmannf3f66f52005-10-31 20:08:37 -050049#include "interrupt.h"
50#include "iommu.h"
Arnd Bergmannfef1c772005-06-23 09:43:37 +100051
52#ifdef DEBUG
53#define DBG(fmt...) udbg_printf(fmt)
54#else
55#define DBG(fmt...)
56#endif
57
Arnd Bergmannf3f66f52005-10-31 20:08:37 -050058void cell_show_cpuinfo(struct seq_file *m)
Arnd Bergmannfef1c772005-06-23 09:43:37 +100059{
60 struct device_node *root;
61 const char *model = "";
62
63 root = of_find_node_by_path("/");
64 if (root)
65 model = get_property(root, "model", NULL);
Arnd Bergmannf3f66f52005-10-31 20:08:37 -050066 seq_printf(m, "machine\t\t: CHRP %s\n", model);
Arnd Bergmannfef1c772005-06-23 09:43:37 +100067 of_node_put(root);
68}
69
Arnd Bergmannf3f66f52005-10-31 20:08:37 -050070static void cell_progress(char *s, unsigned short hex)
Arnd Bergmannfef1c772005-06-23 09:43:37 +100071{
72 printk("*** %04x : %s\n", hex, s ? s : "");
73}
74
Arnd Bergmannf3f66f52005-10-31 20:08:37 -050075static void __init cell_setup_arch(void)
Arnd Bergmannfef1c772005-06-23 09:43:37 +100076{
Arnd Bergmanncebf5892005-06-23 09:43:43 +100077 ppc_md.init_IRQ = iic_init_IRQ;
78 ppc_md.get_irq = iic_get_irq;
79
Arnd Bergmannfef1c772005-06-23 09:43:37 +100080#ifdef CONFIG_SMP
Arnd Bergmannf3f66f52005-10-31 20:08:37 -050081 smp_init_cell();
Arnd Bergmannfef1c772005-06-23 09:43:37 +100082#endif
83
84 /* init to some ~sane value until calibrate_delay() runs */
85 loops_per_jiffy = 50000000;
86
87 if (ROOT_DEV == 0) {
88 printk("No ramdisk, default root is /dev/hda2\n");
89 ROOT_DEV = Root_HDA2;
90 }
91
92 /* Find and initialize PCI host bridges */
93 init_pci_config_tokens();
94 find_and_init_phbs();
Arnd Bergmanncebf5892005-06-23 09:43:43 +100095 spider_init_IRQ();
Arnd Bergmannfef1c772005-06-23 09:43:37 +100096#ifdef CONFIG_DUMMY_CONSOLE
97 conswitchp = &dummy_con;
98#endif
99
Arnd Bergmannf3f66f52005-10-31 20:08:37 -0500100 mmio_nvram_init();
Arnd Bergmannfef1c772005-06-23 09:43:37 +1000101}
102
103/*
104 * Early initialization. Relocation is on but do not reference unbolted pages
105 */
Arnd Bergmannf3f66f52005-10-31 20:08:37 -0500106static void __init cell_init_early(void)
Arnd Bergmannfef1c772005-06-23 09:43:37 +1000107{
Arnd Bergmannf3f66f52005-10-31 20:08:37 -0500108 DBG(" -> cell_init_early()\n");
Arnd Bergmannfef1c772005-06-23 09:43:37 +1000109
110 hpte_init_native();
111
Arnd Bergmannf3f66f52005-10-31 20:08:37 -0500112 cell_init_iommu();
Arnd Bergmannfef1c772005-06-23 09:43:37 +1000113
Arnd Bergmannf3f66f52005-10-31 20:08:37 -0500114 ppc64_interrupt_controller = IC_CELL_PIC;
Arnd Bergmannfef1c772005-06-23 09:43:37 +1000115
Arnd Bergmannf3f66f52005-10-31 20:08:37 -0500116 DBG(" <- cell_init_early()\n");
Arnd Bergmannfef1c772005-06-23 09:43:37 +1000117}
118
119
Arnd Bergmannf3f66f52005-10-31 20:08:37 -0500120static int __init cell_probe(int platform)
Arnd Bergmannfef1c772005-06-23 09:43:37 +1000121{
Arnd Bergmannf3f66f52005-10-31 20:08:37 -0500122 if (platform != PLATFORM_CELL)
Arnd Bergmannfef1c772005-06-23 09:43:37 +1000123 return 0;
124
125 return 1;
126}
127
Arnd Bergmannf3f66f52005-10-31 20:08:37 -0500128struct machdep_calls __initdata cell_md = {
129 .probe = cell_probe,
130 .setup_arch = cell_setup_arch,
131 .init_early = cell_init_early,
132 .show_cpuinfo = cell_show_cpuinfo,
Arnd Bergmannfef1c772005-06-23 09:43:37 +1000133 .restart = rtas_restart,
134 .power_off = rtas_power_off,
135 .halt = rtas_halt,
136 .get_boot_time = rtas_get_boot_time,
137 .get_rtc_time = rtas_get_rtc_time,
138 .set_rtc_time = rtas_set_rtc_time,
139 .calibrate_decr = generic_calibrate_decr,
Arnd Bergmannf3f66f52005-10-31 20:08:37 -0500140 .progress = cell_progress,
Arnd Bergmannfef1c772005-06-23 09:43:37 +1000141};