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Robert P. J. Day96532ba2008-02-03 15:06:26 +02001#ifndef _LINUX_DMA_MAPPING_H
2#define _LINUX_DMA_MAPPING_H
Linus Torvalds1da177e2005-04-16 15:20:36 -07003
4#include <linux/device.h>
5#include <linux/err.h>
FUJITA Tomonorif0402a22009-01-05 23:59:01 +09006#include <linux/dma-attrs.h>
7#include <linux/scatterlist.h>
Linus Torvalds1da177e2005-04-16 15:20:36 -07008
9/* These definitions mirror those in pci.h, so they can be used
10 * interchangeably with their PCI_ counterparts */
11enum dma_data_direction {
12 DMA_BIDIRECTIONAL = 0,
13 DMA_TO_DEVICE = 1,
14 DMA_FROM_DEVICE = 2,
15 DMA_NONE = 3,
16};
17
FUJITA Tomonorif0402a22009-01-05 23:59:01 +090018struct dma_map_ops {
19 void* (*alloc_coherent)(struct device *dev, size_t size,
20 dma_addr_t *dma_handle, gfp_t gfp);
21 void (*free_coherent)(struct device *dev, size_t size,
22 void *vaddr, dma_addr_t dma_handle);
23 dma_addr_t (*map_page)(struct device *dev, struct page *page,
24 unsigned long offset, size_t size,
25 enum dma_data_direction dir,
26 struct dma_attrs *attrs);
27 void (*unmap_page)(struct device *dev, dma_addr_t dma_handle,
28 size_t size, enum dma_data_direction dir,
29 struct dma_attrs *attrs);
30 int (*map_sg)(struct device *dev, struct scatterlist *sg,
31 int nents, enum dma_data_direction dir,
32 struct dma_attrs *attrs);
33 void (*unmap_sg)(struct device *dev,
34 struct scatterlist *sg, int nents,
35 enum dma_data_direction dir,
36 struct dma_attrs *attrs);
37 void (*sync_single_for_cpu)(struct device *dev,
38 dma_addr_t dma_handle, size_t size,
39 enum dma_data_direction dir);
40 void (*sync_single_for_device)(struct device *dev,
41 dma_addr_t dma_handle, size_t size,
42 enum dma_data_direction dir);
FUJITA Tomonorif0402a22009-01-05 23:59:01 +090043 void (*sync_sg_for_cpu)(struct device *dev,
44 struct scatterlist *sg, int nents,
45 enum dma_data_direction dir);
46 void (*sync_sg_for_device)(struct device *dev,
47 struct scatterlist *sg, int nents,
48 enum dma_data_direction dir);
49 int (*mapping_error)(struct device *dev, dma_addr_t dma_addr);
50 int (*dma_supported)(struct device *dev, u64 mask);
FUJITA Tomonorif726f302009-08-04 19:08:24 +000051 int (*set_dma_mask)(struct device *dev, u64 mask);
FUJITA Tomonorif0402a22009-01-05 23:59:01 +090052 int is_phys;
53};
54
Andrew Morton8f286c32007-10-18 03:05:07 -070055#define DMA_BIT_MASK(n) (((n) == 64) ? ~0ULL : ((1ULL<<(n))-1))
Borislav Petkov34c65382007-10-18 03:05:06 -070056
Jiri Slabyd68412b2009-06-18 16:49:18 -070057typedef u64 DMA_nnBIT_MASK __deprecated;
58
Andrew Morton8f286c32007-10-18 03:05:07 -070059/*
60 * NOTE: do not use the below macros in new code and do not add new definitions
61 * here.
62 *
63 * Instead, just open-code DMA_BIT_MASK(n) within your driver
64 */
Jiri Slabyd68412b2009-06-18 16:49:18 -070065#define DMA_64BIT_MASK (DMA_nnBIT_MASK)DMA_BIT_MASK(64)
66#define DMA_48BIT_MASK (DMA_nnBIT_MASK)DMA_BIT_MASK(48)
67#define DMA_47BIT_MASK (DMA_nnBIT_MASK)DMA_BIT_MASK(47)
68#define DMA_40BIT_MASK (DMA_nnBIT_MASK)DMA_BIT_MASK(40)
69#define DMA_39BIT_MASK (DMA_nnBIT_MASK)DMA_BIT_MASK(39)
70#define DMA_35BIT_MASK (DMA_nnBIT_MASK)DMA_BIT_MASK(35)
71#define DMA_32BIT_MASK (DMA_nnBIT_MASK)DMA_BIT_MASK(32)
72#define DMA_31BIT_MASK (DMA_nnBIT_MASK)DMA_BIT_MASK(31)
73#define DMA_30BIT_MASK (DMA_nnBIT_MASK)DMA_BIT_MASK(30)
74#define DMA_29BIT_MASK (DMA_nnBIT_MASK)DMA_BIT_MASK(29)
75#define DMA_28BIT_MASK (DMA_nnBIT_MASK)DMA_BIT_MASK(28)
76#define DMA_24BIT_MASK (DMA_nnBIT_MASK)DMA_BIT_MASK(24)
Linus Torvalds1da177e2005-04-16 15:20:36 -070077
James Bottomley32e8f702007-10-16 01:23:55 -070078#define DMA_MASK_NONE 0x0ULL
79
Rolf Eike Beerd6bd3a32006-09-29 01:59:48 -070080static inline int valid_dma_direction(int dma_direction)
81{
82 return ((dma_direction == DMA_BIDIRECTIONAL) ||
83 (dma_direction == DMA_TO_DEVICE) ||
84 (dma_direction == DMA_FROM_DEVICE));
85}
86
James Bottomley32e8f702007-10-16 01:23:55 -070087static inline int is_device_dma_capable(struct device *dev)
88{
89 return dev->dma_mask != NULL && *dev->dma_mask != DMA_MASK_NONE;
90}
91
Dan Williams1b0fac42007-07-15 23:40:26 -070092#ifdef CONFIG_HAS_DMA
Linus Torvalds1da177e2005-04-16 15:20:36 -070093#include <asm/dma-mapping.h>
Dan Williams1b0fac42007-07-15 23:40:26 -070094#else
95#include <asm-generic/dma-mapping-broken.h>
96#endif
Linus Torvalds1da177e2005-04-16 15:20:36 -070097
FUJITA Tomonori589fc9a2008-09-12 19:42:34 +090098static inline u64 dma_get_mask(struct device *dev)
99{
FUJITA Tomonori07a2c012008-09-19 02:02:05 +0900100 if (dev && dev->dma_mask && *dev->dma_mask)
FUJITA Tomonori589fc9a2008-09-12 19:42:34 +0900101 return *dev->dma_mask;
Yang Hongyang284901a2009-04-06 19:01:15 -0700102 return DMA_BIT_MASK(32);
FUJITA Tomonori589fc9a2008-09-12 19:42:34 +0900103}
104
FUJITA Tomonori6a1961f2010-03-10 15:23:39 -0800105static inline int dma_set_coherent_mask(struct device *dev, u64 mask)
106{
107 if (!dma_supported(dev, mask))
108 return -EIO;
109 dev->coherent_dma_mask = mask;
110 return 0;
111}
112
Linus Torvalds1da177e2005-04-16 15:20:36 -0700113extern u64 dma_get_required_mask(struct device *dev);
114
FUJITA Tomonori6b7b6512008-02-04 22:27:55 -0800115static inline unsigned int dma_get_max_seg_size(struct device *dev)
116{
117 return dev->dma_parms ? dev->dma_parms->max_segment_size : 65536;
118}
119
120static inline unsigned int dma_set_max_seg_size(struct device *dev,
121 unsigned int size)
122{
123 if (dev->dma_parms) {
124 dev->dma_parms->max_segment_size = size;
125 return 0;
126 } else
127 return -EIO;
128}
129
FUJITA Tomonorid22a6962008-02-04 22:28:13 -0800130static inline unsigned long dma_get_seg_boundary(struct device *dev)
131{
132 return dev->dma_parms ?
133 dev->dma_parms->segment_boundary_mask : 0xffffffff;
134}
135
136static inline int dma_set_seg_boundary(struct device *dev, unsigned long mask)
137{
138 if (dev->dma_parms) {
139 dev->dma_parms->segment_boundary_mask = mask;
140 return 0;
141 } else
142 return -EIO;
143}
144
Linus Torvalds1da177e2005-04-16 15:20:36 -0700145/* flags for the coherent memory api */
146#define DMA_MEMORY_MAP 0x01
147#define DMA_MEMORY_IO 0x02
148#define DMA_MEMORY_INCLUDES_CHILDREN 0x04
149#define DMA_MEMORY_EXCLUSIVE 0x08
150
151#ifndef ARCH_HAS_DMA_DECLARE_COHERENT_MEMORY
152static inline int
153dma_declare_coherent_memory(struct device *dev, dma_addr_t bus_addr,
154 dma_addr_t device_addr, size_t size, int flags)
155{
156 return 0;
157}
158
159static inline void
160dma_release_declared_memory(struct device *dev)
161{
162}
163
164static inline void *
165dma_mark_declared_memory_occupied(struct device *dev,
166 dma_addr_t device_addr, size_t size)
167{
168 return ERR_PTR(-EBUSY);
169}
170#endif
171
Tejun Heo9ac78492007-01-20 16:00:26 +0900172/*
173 * Managed DMA API
174 */
175extern void *dmam_alloc_coherent(struct device *dev, size_t size,
176 dma_addr_t *dma_handle, gfp_t gfp);
177extern void dmam_free_coherent(struct device *dev, size_t size, void *vaddr,
178 dma_addr_t dma_handle);
179extern void *dmam_alloc_noncoherent(struct device *dev, size_t size,
180 dma_addr_t *dma_handle, gfp_t gfp);
181extern void dmam_free_noncoherent(struct device *dev, size_t size, void *vaddr,
182 dma_addr_t dma_handle);
183#ifdef ARCH_HAS_DMA_DECLARE_COHERENT_MEMORY
184extern int dmam_declare_coherent_memory(struct device *dev, dma_addr_t bus_addr,
185 dma_addr_t device_addr, size_t size,
186 int flags);
187extern void dmam_release_declared_memory(struct device *dev);
188#else /* ARCH_HAS_DMA_DECLARE_COHERENT_MEMORY */
189static inline int dmam_declare_coherent_memory(struct device *dev,
190 dma_addr_t bus_addr, dma_addr_t device_addr,
191 size_t size, gfp_t gfp)
192{
193 return 0;
194}
195
196static inline void dmam_release_declared_memory(struct device *dev)
197{
198}
199#endif /* ARCH_HAS_DMA_DECLARE_COHERENT_MEMORY */
200
Arthur Kepner74bc7ce2008-04-29 01:00:30 -0700201#ifndef CONFIG_HAVE_DMA_ATTRS
202struct dma_attrs;
203
204#define dma_map_single_attrs(dev, cpu_addr, size, dir, attrs) \
205 dma_map_single(dev, cpu_addr, size, dir)
206
207#define dma_unmap_single_attrs(dev, dma_addr, size, dir, attrs) \
208 dma_unmap_single(dev, dma_addr, size, dir)
209
210#define dma_map_sg_attrs(dev, sgl, nents, dir, attrs) \
211 dma_map_sg(dev, sgl, nents, dir)
212
213#define dma_unmap_sg_attrs(dev, sgl, nents, dir, attrs) \
214 dma_unmap_sg(dev, sgl, nents, dir)
215
216#endif /* CONFIG_HAVE_DMA_ATTRS */
217
FUJITA Tomonori0acedc12010-03-10 15:23:31 -0800218#ifdef CONFIG_NEED_DMA_MAP_STATE
219#define DEFINE_DMA_UNMAP_ADDR(ADDR_NAME) dma_addr_t ADDR_NAME
220#define DEFINE_DMA_UNMAP_LEN(LEN_NAME) __u32 LEN_NAME
221#define dma_unmap_addr(PTR, ADDR_NAME) ((PTR)->ADDR_NAME)
222#define dma_unmap_addr_set(PTR, ADDR_NAME, VAL) (((PTR)->ADDR_NAME) = (VAL))
223#define dma_unmap_len(PTR, LEN_NAME) ((PTR)->LEN_NAME)
224#define dma_unmap_len_set(PTR, LEN_NAME, VAL) (((PTR)->LEN_NAME) = (VAL))
225#else
226#define DEFINE_DMA_UNMAP_ADDR(ADDR_NAME)
227#define DEFINE_DMA_UNMAP_LEN(LEN_NAME)
228#define dma_unmap_addr(PTR, ADDR_NAME) (0)
229#define dma_unmap_addr_set(PTR, ADDR_NAME, VAL) do { } while (0)
230#define dma_unmap_len(PTR, LEN_NAME) (0)
231#define dma_unmap_len_set(PTR, LEN_NAME, VAL) do { } while (0)
232#endif
233
Linus Torvalds1da177e2005-04-16 15:20:36 -0700234#endif