blob: c8ee8d28767b6832167e65c98a00ca859e26d87f [file] [log] [blame]
Linus Torvalds1da177e2005-04-16 15:20:36 -07001/*
2 * This file is subject to the terms and conditions of the GNU General Public
3 * License. See the file "COPYING" in the main directory of this archive
4 * for more details.
5 *
6 * Driver for SGI's IOC3 based Ethernet cards as found in the PCI card.
7 *
Ralf Baechlebbfb86c2007-07-25 12:31:57 +01008 * Copyright (C) 1999, 2000, 01, 03, 06 Ralf Baechle
Linus Torvalds1da177e2005-04-16 15:20:36 -07009 * Copyright (C) 1995, 1999, 2000, 2001 by Silicon Graphics, Inc.
10 *
11 * References:
12 * o IOC3 ASIC specification 4.51, 1996-04-18
13 * o IEEE 802.3 specification, 2000 edition
14 * o DP38840A Specification, National Semiconductor, March 1997
15 *
16 * To do:
17 *
18 * o Handle allocation failures in ioc3_alloc_skb() more gracefully.
19 * o Handle allocation failures in ioc3_init_rings().
20 * o Use prefetching for large packets. What is a good lower limit for
21 * prefetching?
22 * o We're probably allocating a bit too much memory.
23 * o Use hardware checksums.
24 * o Convert to using a IOC3 meta driver.
25 * o Which PHYs might possibly be attached to the IOC3 in real live,
26 * which workarounds are required for them? Do we ever have Lucent's?
27 * o For the 2.5 branch kill the mii-tool ioctls.
28 */
29
30#define IOC3_NAME "ioc3-eth"
Andy Gospodarekd5b20692006-09-11 17:39:18 -040031#define IOC3_VERSION "2.6.3-4"
Linus Torvalds1da177e2005-04-16 15:20:36 -070032
Linus Torvalds1da177e2005-04-16 15:20:36 -070033#include <linux/init.h>
34#include <linux/delay.h>
35#include <linux/kernel.h>
36#include <linux/mm.h>
37#include <linux/errno.h>
38#include <linux/module.h>
39#include <linux/pci.h>
40#include <linux/crc32.h>
41#include <linux/mii.h>
42#include <linux/in.h>
43#include <linux/ip.h>
44#include <linux/tcp.h>
45#include <linux/udp.h>
Matthias Gehre910638a2006-03-28 01:56:48 -080046#include <linux/dma-mapping.h>
Tejun Heo5a0e3ad2010-03-24 17:04:11 +090047#include <linux/gfp.h>
Linus Torvalds1da177e2005-04-16 15:20:36 -070048
49#ifdef CONFIG_SERIAL_8250
Ralf Baechle15a93802005-11-08 23:10:51 +000050#include <linux/serial_core.h>
51#include <linux/serial_8250.h>
Ralf Baechle0491d1f2007-08-26 18:51:22 +010052#include <linux/serial_reg.h>
Linus Torvalds1da177e2005-04-16 15:20:36 -070053#endif
54
55#include <linux/netdevice.h>
56#include <linux/etherdevice.h>
57#include <linux/ethtool.h>
58#include <linux/skbuff.h>
59#include <net/ip.h>
60
61#include <asm/byteorder.h>
Linus Torvalds1da177e2005-04-16 15:20:36 -070062#include <asm/io.h>
63#include <asm/pgtable.h>
64#include <asm/uaccess.h>
65#include <asm/sn/types.h>
Linus Torvalds1da177e2005-04-16 15:20:36 -070066#include <asm/sn/ioc3.h>
Linus Torvalds1da177e2005-04-16 15:20:36 -070067#include <asm/pci/bridge.h>
68
69/*
70 * 64 RX buffers. This is tunable in the range of 16 <= x < 512. The
71 * value must be a power of two.
72 */
73#define RX_BUFFS 64
74
75#define ETCSR_FD ((17<<ETCSR_IPGR2_SHIFT) | (11<<ETCSR_IPGR1_SHIFT) | 21)
76#define ETCSR_HD ((21<<ETCSR_IPGR2_SHIFT) | (21<<ETCSR_IPGR1_SHIFT) | 21)
77
78/* Private per NIC data of the driver. */
79struct ioc3_private {
80 struct ioc3 *regs;
81 unsigned long *rxr; /* pointer to receiver ring */
82 struct ioc3_etxd *txr;
83 struct sk_buff *rx_skbs[512];
84 struct sk_buff *tx_skbs[128];
Linus Torvalds1da177e2005-04-16 15:20:36 -070085 int rx_ci; /* RX consumer index */
86 int rx_pi; /* RX producer index */
87 int tx_ci; /* TX consumer index */
88 int tx_pi; /* TX producer index */
89 int txqlen;
90 u32 emcr, ehar_h, ehar_l;
91 spinlock_t ioc3_lock;
92 struct mii_if_info mii;
Ralf Baechlebbfb86c2007-07-25 12:31:57 +010093 unsigned long flags;
94#define IOC3_FLAG_RX_CHECKSUMS 1
95
Linus Torvalds1da177e2005-04-16 15:20:36 -070096 struct pci_dev *pdev;
97
98 /* Members used by autonegotiation */
99 struct timer_list ioc3_timer;
100};
101
102static inline struct net_device *priv_netdev(struct ioc3_private *dev)
103{
104 return (void *)dev - ((sizeof(struct net_device) + 31) & ~31);
105}
106
107static int ioc3_ioctl(struct net_device *dev, struct ifreq *rq, int cmd);
108static void ioc3_set_multicast_list(struct net_device *dev);
109static int ioc3_start_xmit(struct sk_buff *skb, struct net_device *dev);
110static void ioc3_timeout(struct net_device *dev);
111static inline unsigned int ioc3_hash(const unsigned char *addr);
112static inline void ioc3_stop(struct ioc3_private *ip);
113static void ioc3_init(struct net_device *dev);
114
115static const char ioc3_str[] = "IOC3 Ethernet";
Jeff Garzik7282d492006-09-13 14:30:00 -0400116static const struct ethtool_ops ioc3_ethtool_ops;
Linus Torvalds1da177e2005-04-16 15:20:36 -0700117
118/* We use this to acquire receive skb's that we can DMA directly into. */
119
120#define IOC3_CACHELINE 128UL
121
122static inline unsigned long aligned_rx_skb_addr(unsigned long addr)
123{
124 return (~addr + 1) & (IOC3_CACHELINE - 1UL);
125}
126
127static inline struct sk_buff * ioc3_alloc_skb(unsigned long length,
128 unsigned int gfp_mask)
129{
130 struct sk_buff *skb;
131
132 skb = alloc_skb(length + IOC3_CACHELINE - 1, gfp_mask);
133 if (likely(skb)) {
134 int offset = aligned_rx_skb_addr((unsigned long) skb->data);
135 if (offset)
136 skb_reserve(skb, offset);
137 }
138
139 return skb;
140}
141
142static inline unsigned long ioc3_map(void *ptr, unsigned long vdev)
143{
144#ifdef CONFIG_SGI_IP27
Ralf Baechled955d902006-06-17 18:57:39 +0100145 vdev <<= 57; /* Shift to PCI64_ATTR_VIRTUAL */
Linus Torvalds1da177e2005-04-16 15:20:36 -0700146
147 return vdev | (0xaUL << PCI64_ATTR_TARG_SHFT) | PCI64_ATTR_PREF |
148 ((unsigned long)ptr & TO_PHYS_MASK);
149#else
150 return virt_to_bus(ptr);
151#endif
152}
153
154/* BEWARE: The IOC3 documentation documents the size of rx buffers as
155 1644 while it's actually 1664. This one was nasty to track down ... */
156#define RX_OFFSET 10
157#define RX_BUF_ALLOC_SIZE (1664 + RX_OFFSET + IOC3_CACHELINE)
158
159/* DMA barrier to separate cached and uncached accesses. */
160#define BARRIER() \
161 __asm__("sync" ::: "memory")
162
163
164#define IOC3_SIZE 0x100000
165
166/*
167 * IOC3 is a big endian device
168 *
169 * Unorthodox but makes the users of these macros more readable - the pointer
170 * to the IOC3's memory mapped registers is expected as struct ioc3 * ioc3
171 * in the environment.
172 */
173#define ioc3_r_mcr() be32_to_cpu(ioc3->mcr)
174#define ioc3_w_mcr(v) do { ioc3->mcr = cpu_to_be32(v); } while (0)
175#define ioc3_w_gpcr_s(v) do { ioc3->gpcr_s = cpu_to_be32(v); } while (0)
176#define ioc3_r_emcr() be32_to_cpu(ioc3->emcr)
177#define ioc3_w_emcr(v) do { ioc3->emcr = cpu_to_be32(v); } while (0)
178#define ioc3_r_eisr() be32_to_cpu(ioc3->eisr)
179#define ioc3_w_eisr(v) do { ioc3->eisr = cpu_to_be32(v); } while (0)
180#define ioc3_r_eier() be32_to_cpu(ioc3->eier)
181#define ioc3_w_eier(v) do { ioc3->eier = cpu_to_be32(v); } while (0)
182#define ioc3_r_ercsr() be32_to_cpu(ioc3->ercsr)
183#define ioc3_w_ercsr(v) do { ioc3->ercsr = cpu_to_be32(v); } while (0)
184#define ioc3_r_erbr_h() be32_to_cpu(ioc3->erbr_h)
185#define ioc3_w_erbr_h(v) do { ioc3->erbr_h = cpu_to_be32(v); } while (0)
186#define ioc3_r_erbr_l() be32_to_cpu(ioc3->erbr_l)
187#define ioc3_w_erbr_l(v) do { ioc3->erbr_l = cpu_to_be32(v); } while (0)
188#define ioc3_r_erbar() be32_to_cpu(ioc3->erbar)
189#define ioc3_w_erbar(v) do { ioc3->erbar = cpu_to_be32(v); } while (0)
190#define ioc3_r_ercir() be32_to_cpu(ioc3->ercir)
191#define ioc3_w_ercir(v) do { ioc3->ercir = cpu_to_be32(v); } while (0)
192#define ioc3_r_erpir() be32_to_cpu(ioc3->erpir)
193#define ioc3_w_erpir(v) do { ioc3->erpir = cpu_to_be32(v); } while (0)
194#define ioc3_r_ertr() be32_to_cpu(ioc3->ertr)
195#define ioc3_w_ertr(v) do { ioc3->ertr = cpu_to_be32(v); } while (0)
196#define ioc3_r_etcsr() be32_to_cpu(ioc3->etcsr)
197#define ioc3_w_etcsr(v) do { ioc3->etcsr = cpu_to_be32(v); } while (0)
198#define ioc3_r_ersr() be32_to_cpu(ioc3->ersr)
199#define ioc3_w_ersr(v) do { ioc3->ersr = cpu_to_be32(v); } while (0)
200#define ioc3_r_etcdc() be32_to_cpu(ioc3->etcdc)
201#define ioc3_w_etcdc(v) do { ioc3->etcdc = cpu_to_be32(v); } while (0)
202#define ioc3_r_ebir() be32_to_cpu(ioc3->ebir)
203#define ioc3_w_ebir(v) do { ioc3->ebir = cpu_to_be32(v); } while (0)
204#define ioc3_r_etbr_h() be32_to_cpu(ioc3->etbr_h)
205#define ioc3_w_etbr_h(v) do { ioc3->etbr_h = cpu_to_be32(v); } while (0)
206#define ioc3_r_etbr_l() be32_to_cpu(ioc3->etbr_l)
207#define ioc3_w_etbr_l(v) do { ioc3->etbr_l = cpu_to_be32(v); } while (0)
208#define ioc3_r_etcir() be32_to_cpu(ioc3->etcir)
209#define ioc3_w_etcir(v) do { ioc3->etcir = cpu_to_be32(v); } while (0)
210#define ioc3_r_etpir() be32_to_cpu(ioc3->etpir)
211#define ioc3_w_etpir(v) do { ioc3->etpir = cpu_to_be32(v); } while (0)
212#define ioc3_r_emar_h() be32_to_cpu(ioc3->emar_h)
213#define ioc3_w_emar_h(v) do { ioc3->emar_h = cpu_to_be32(v); } while (0)
214#define ioc3_r_emar_l() be32_to_cpu(ioc3->emar_l)
215#define ioc3_w_emar_l(v) do { ioc3->emar_l = cpu_to_be32(v); } while (0)
216#define ioc3_r_ehar_h() be32_to_cpu(ioc3->ehar_h)
217#define ioc3_w_ehar_h(v) do { ioc3->ehar_h = cpu_to_be32(v); } while (0)
218#define ioc3_r_ehar_l() be32_to_cpu(ioc3->ehar_l)
219#define ioc3_w_ehar_l(v) do { ioc3->ehar_l = cpu_to_be32(v); } while (0)
220#define ioc3_r_micr() be32_to_cpu(ioc3->micr)
221#define ioc3_w_micr(v) do { ioc3->micr = cpu_to_be32(v); } while (0)
222#define ioc3_r_midr_r() be32_to_cpu(ioc3->midr_r)
223#define ioc3_w_midr_r(v) do { ioc3->midr_r = cpu_to_be32(v); } while (0)
224#define ioc3_r_midr_w() be32_to_cpu(ioc3->midr_w)
225#define ioc3_w_midr_w(v) do { ioc3->midr_w = cpu_to_be32(v); } while (0)
226
227static inline u32 mcr_pack(u32 pulse, u32 sample)
228{
229 return (pulse << 10) | (sample << 2);
230}
231
232static int nic_wait(struct ioc3 *ioc3)
233{
234 u32 mcr;
235
236 do {
237 mcr = ioc3_r_mcr();
238 } while (!(mcr & 2));
239
240 return mcr & 1;
241}
242
243static int nic_reset(struct ioc3 *ioc3)
244{
245 int presence;
246
247 ioc3_w_mcr(mcr_pack(500, 65));
248 presence = nic_wait(ioc3);
249
250 ioc3_w_mcr(mcr_pack(0, 500));
251 nic_wait(ioc3);
252
253 return presence;
254}
255
256static inline int nic_read_bit(struct ioc3 *ioc3)
257{
258 int result;
259
260 ioc3_w_mcr(mcr_pack(6, 13));
261 result = nic_wait(ioc3);
262 ioc3_w_mcr(mcr_pack(0, 100));
263 nic_wait(ioc3);
264
265 return result;
266}
267
268static inline void nic_write_bit(struct ioc3 *ioc3, int bit)
269{
270 if (bit)
271 ioc3_w_mcr(mcr_pack(6, 110));
272 else
273 ioc3_w_mcr(mcr_pack(80, 30));
274
275 nic_wait(ioc3);
276}
277
278/*
279 * Read a byte from an iButton device
280 */
281static u32 nic_read_byte(struct ioc3 *ioc3)
282{
283 u32 result = 0;
284 int i;
285
286 for (i = 0; i < 8; i++)
287 result = (result >> 1) | (nic_read_bit(ioc3) << 7);
288
289 return result;
290}
291
292/*
293 * Write a byte to an iButton device
294 */
295static void nic_write_byte(struct ioc3 *ioc3, int byte)
296{
297 int i, bit;
298
299 for (i = 8; i; i--) {
300 bit = byte & 1;
301 byte >>= 1;
302
303 nic_write_bit(ioc3, bit);
304 }
305}
306
307static u64 nic_find(struct ioc3 *ioc3, int *last)
308{
309 int a, b, index, disc;
310 u64 address = 0;
311
312 nic_reset(ioc3);
313 /* Search ROM. */
314 nic_write_byte(ioc3, 0xf0);
315
316 /* Algorithm from ``Book of iButton Standards''. */
317 for (index = 0, disc = 0; index < 64; index++) {
318 a = nic_read_bit(ioc3);
319 b = nic_read_bit(ioc3);
320
321 if (a && b) {
322 printk("NIC search failed (not fatal).\n");
323 *last = 0;
324 return 0;
325 }
326
327 if (!a && !b) {
328 if (index == *last) {
329 address |= 1UL << index;
330 } else if (index > *last) {
331 address &= ~(1UL << index);
332 disc = index;
333 } else if ((address & (1UL << index)) == 0)
334 disc = index;
335 nic_write_bit(ioc3, address & (1UL << index));
336 continue;
337 } else {
338 if (a)
339 address |= 1UL << index;
340 else
341 address &= ~(1UL << index);
342 nic_write_bit(ioc3, a);
343 continue;
344 }
345 }
346
347 *last = disc;
348
349 return address;
350}
351
352static int nic_init(struct ioc3 *ioc3)
353{
Alan Coxf49343a2007-07-10 17:05:16 +0100354 const char *unknown = "unknown";
355 const char *type = unknown;
Linus Torvalds1da177e2005-04-16 15:20:36 -0700356 u8 crc;
357 u8 serial[6];
358 int save = 0, i;
359
Linus Torvalds1da177e2005-04-16 15:20:36 -0700360 while (1) {
361 u64 reg;
362 reg = nic_find(ioc3, &save);
363
364 switch (reg & 0xff) {
365 case 0x91:
366 type = "DS1981U";
367 break;
368 default:
369 if (save == 0) {
370 /* Let the caller try again. */
371 return -1;
372 }
373 continue;
374 }
375
376 nic_reset(ioc3);
377
378 /* Match ROM. */
379 nic_write_byte(ioc3, 0x55);
380 for (i = 0; i < 8; i++)
381 nic_write_byte(ioc3, (reg >> (i << 3)) & 0xff);
382
383 reg >>= 8; /* Shift out type. */
384 for (i = 0; i < 6; i++) {
385 serial[i] = reg & 0xff;
386 reg >>= 8;
387 }
388 crc = reg & 0xff;
389 break;
390 }
391
392 printk("Found %s NIC", type);
Johannes Berg7c510e42008-10-27 17:47:26 -0700393 if (type != unknown)
394 printk (" registration number %pM, CRC %02x", serial, crc);
Linus Torvalds1da177e2005-04-16 15:20:36 -0700395 printk(".\n");
396
397 return 0;
398}
399
400/*
401 * Read the NIC (Number-In-a-Can) device used to store the MAC address on
402 * SN0 / SN00 nodeboards and PCI cards.
403 */
404static void ioc3_get_eaddr_nic(struct ioc3_private *ip)
405{
406 struct ioc3 *ioc3 = ip->regs;
407 u8 nic[14];
408 int tries = 2; /* There may be some problem with the battery? */
409 int i;
410
411 ioc3_w_gpcr_s(1 << 21);
412
413 while (tries--) {
414 if (!nic_init(ioc3))
415 break;
416 udelay(500);
417 }
418
419 if (tries < 0) {
420 printk("Failed to read MAC address\n");
421 return;
422 }
423
424 /* Read Memory. */
425 nic_write_byte(ioc3, 0xf0);
426 nic_write_byte(ioc3, 0x00);
427 nic_write_byte(ioc3, 0x00);
428
429 for (i = 13; i >= 0; i--)
430 nic[i] = nic_read_byte(ioc3);
431
432 for (i = 2; i < 8; i++)
433 priv_netdev(ip)->dev_addr[i - 2] = nic[i];
434}
435
436/*
437 * Ok, this is hosed by design. It's necessary to know what machine the
438 * NIC is in in order to know how to read the NIC address. We also have
439 * to know if it's a PCI card or a NIC in on the node board ...
440 */
441static void ioc3_get_eaddr(struct ioc3_private *ip)
442{
Linus Torvalds1da177e2005-04-16 15:20:36 -0700443 ioc3_get_eaddr_nic(ip);
444
Johannes Berge1749612008-10-27 15:59:26 -0700445 printk("Ethernet address is %pM.\n", priv_netdev(ip)->dev_addr);
Linus Torvalds1da177e2005-04-16 15:20:36 -0700446}
447
448static void __ioc3_set_mac_address(struct net_device *dev)
449{
450 struct ioc3_private *ip = netdev_priv(dev);
451 struct ioc3 *ioc3 = ip->regs;
452
453 ioc3_w_emar_h((dev->dev_addr[5] << 8) | dev->dev_addr[4]);
454 ioc3_w_emar_l((dev->dev_addr[3] << 24) | (dev->dev_addr[2] << 16) |
455 (dev->dev_addr[1] << 8) | dev->dev_addr[0]);
456}
457
458static int ioc3_set_mac_address(struct net_device *dev, void *addr)
459{
460 struct ioc3_private *ip = netdev_priv(dev);
461 struct sockaddr *sa = addr;
462
463 memcpy(dev->dev_addr, sa->sa_data, dev->addr_len);
464
465 spin_lock_irq(&ip->ioc3_lock);
466 __ioc3_set_mac_address(dev);
467 spin_unlock_irq(&ip->ioc3_lock);
468
469 return 0;
470}
471
472/*
473 * Caller must hold the ioc3_lock ever for MII readers. This is also
474 * used to protect the transmitter side but it's low contention.
475 */
476static int ioc3_mdio_read(struct net_device *dev, int phy, int reg)
477{
478 struct ioc3_private *ip = netdev_priv(dev);
479 struct ioc3 *ioc3 = ip->regs;
480
481 while (ioc3_r_micr() & MICR_BUSY);
482 ioc3_w_micr((phy << MICR_PHYADDR_SHIFT) | reg | MICR_READTRIG);
483 while (ioc3_r_micr() & MICR_BUSY);
484
Ralf Baechle852ea222005-08-02 11:01:27 +0100485 return ioc3_r_midr_r() & MIDR_DATA_MASK;
Linus Torvalds1da177e2005-04-16 15:20:36 -0700486}
487
488static void ioc3_mdio_write(struct net_device *dev, int phy, int reg, int data)
489{
490 struct ioc3_private *ip = netdev_priv(dev);
491 struct ioc3 *ioc3 = ip->regs;
492
493 while (ioc3_r_micr() & MICR_BUSY);
494 ioc3_w_midr_w(data);
495 ioc3_w_micr((phy << MICR_PHYADDR_SHIFT) | reg);
496 while (ioc3_r_micr() & MICR_BUSY);
497}
498
499static int ioc3_mii_init(struct ioc3_private *ip);
500
501static struct net_device_stats *ioc3_get_stats(struct net_device *dev)
502{
503 struct ioc3_private *ip = netdev_priv(dev);
504 struct ioc3 *ioc3 = ip->regs;
505
Ralf Baechle0a17ee92010-07-05 02:59:38 +0000506 dev->stats.collisions += (ioc3_r_etcdc() & ETCDC_COLLCNT_MASK);
507 return &dev->stats;
Linus Torvalds1da177e2005-04-16 15:20:36 -0700508}
509
Linus Torvalds1da177e2005-04-16 15:20:36 -0700510static void ioc3_tcpudp_checksum(struct sk_buff *skb, uint32_t hwsum, int len)
511{
512 struct ethhdr *eh = eth_hdr(skb);
513 uint32_t csum, ehsum;
514 unsigned int proto;
515 struct iphdr *ih;
516 uint16_t *ew;
517 unsigned char *cp;
518
519 /*
520 * Did hardware handle the checksum at all? The cases we can handle
521 * are:
522 *
523 * - TCP and UDP checksums of IPv4 only.
524 * - IPv6 would be doable but we keep that for later ...
525 * - Only unfragmented packets. Did somebody already tell you
526 * fragmentation is evil?
527 * - don't care about packet size. Worst case when processing a
528 * malformed packet we'll try to access the packet at ip header +
529 * 64 bytes which is still inside the skb. Even in the unlikely
530 * case where the checksum is right the higher layers will still
531 * drop the packet as appropriate.
532 */
Eric Dumazet17d0cdf2009-06-11 17:23:24 -0700533 if (eh->h_proto != htons(ETH_P_IP))
Linus Torvalds1da177e2005-04-16 15:20:36 -0700534 return;
535
536 ih = (struct iphdr *) ((char *)eh + ETH_HLEN);
537 if (ih->frag_off & htons(IP_MF | IP_OFFSET))
538 return;
539
540 proto = ih->protocol;
541 if (proto != IPPROTO_TCP && proto != IPPROTO_UDP)
542 return;
543
544 /* Same as tx - compute csum of pseudo header */
545 csum = hwsum +
546 (ih->tot_len - (ih->ihl << 2)) +
547 htons((uint16_t)ih->protocol) +
548 (ih->saddr >> 16) + (ih->saddr & 0xffff) +
549 (ih->daddr >> 16) + (ih->daddr & 0xffff);
550
551 /* Sum up ethernet dest addr, src addr and protocol */
552 ew = (uint16_t *) eh;
553 ehsum = ew[0] + ew[1] + ew[2] + ew[3] + ew[4] + ew[5] + ew[6];
554
555 ehsum = (ehsum & 0xffff) + (ehsum >> 16);
556 ehsum = (ehsum & 0xffff) + (ehsum >> 16);
557
558 csum += 0xffff ^ ehsum;
559
560 /* In the next step we also subtract the 1's complement
561 checksum of the trailing ethernet CRC. */
562 cp = (char *)eh + len; /* points at trailing CRC */
563 if (len & 1) {
564 csum += 0xffff ^ (uint16_t) ((cp[1] << 8) | cp[0]);
565 csum += 0xffff ^ (uint16_t) ((cp[3] << 8) | cp[2]);
566 } else {
567 csum += 0xffff ^ (uint16_t) ((cp[0] << 8) | cp[1]);
568 csum += 0xffff ^ (uint16_t) ((cp[2] << 8) | cp[3]);
569 }
570
571 csum = (csum & 0xffff) + (csum >> 16);
572 csum = (csum & 0xffff) + (csum >> 16);
573
574 if (csum == 0xffff)
575 skb->ip_summed = CHECKSUM_UNNECESSARY;
576}
Linus Torvalds1da177e2005-04-16 15:20:36 -0700577
Ralf Baechle0a17ee92010-07-05 02:59:38 +0000578static inline void ioc3_rx(struct net_device *dev)
Linus Torvalds1da177e2005-04-16 15:20:36 -0700579{
Ralf Baechle0a17ee92010-07-05 02:59:38 +0000580 struct ioc3_private *ip = netdev_priv(dev);
Linus Torvalds1da177e2005-04-16 15:20:36 -0700581 struct sk_buff *skb, *new_skb;
582 struct ioc3 *ioc3 = ip->regs;
583 int rx_entry, n_entry, len;
584 struct ioc3_erxbuf *rxb;
585 unsigned long *rxr;
586 u32 w0, err;
587
588 rxr = (unsigned long *) ip->rxr; /* Ring base */
589 rx_entry = ip->rx_ci; /* RX consume index */
590 n_entry = ip->rx_pi;
591
592 skb = ip->rx_skbs[rx_entry];
593 rxb = (struct ioc3_erxbuf *) (skb->data - RX_OFFSET);
594 w0 = be32_to_cpu(rxb->w0);
595
596 while (w0 & ERXBUF_V) {
597 err = be32_to_cpu(rxb->err); /* It's valid ... */
598 if (err & ERXBUF_GOODPKT) {
599 len = ((w0 >> ERXBUF_BYTECNT_SHIFT) & 0x7ff) - 4;
600 skb_trim(skb, len);
Ralf Baechle0a17ee92010-07-05 02:59:38 +0000601 skb->protocol = eth_type_trans(skb, dev);
Linus Torvalds1da177e2005-04-16 15:20:36 -0700602
603 new_skb = ioc3_alloc_skb(RX_BUF_ALLOC_SIZE, GFP_ATOMIC);
604 if (!new_skb) {
605 /* Ouch, drop packet and just recycle packet
606 to keep the ring filled. */
Ralf Baechle0a17ee92010-07-05 02:59:38 +0000607 dev->stats.rx_dropped++;
Linus Torvalds1da177e2005-04-16 15:20:36 -0700608 new_skb = skb;
609 goto next;
610 }
611
Ralf Baechlebbfb86c2007-07-25 12:31:57 +0100612 if (likely(ip->flags & IOC3_FLAG_RX_CHECKSUMS))
613 ioc3_tcpudp_checksum(skb,
614 w0 & ERXBUF_IPCKSUM_MASK, len);
Linus Torvalds1da177e2005-04-16 15:20:36 -0700615
616 netif_rx(skb);
617
618 ip->rx_skbs[rx_entry] = NULL; /* Poison */
619
Linus Torvalds1da177e2005-04-16 15:20:36 -0700620 /* Because we reserve afterwards. */
621 skb_put(new_skb, (1664 + RX_OFFSET));
622 rxb = (struct ioc3_erxbuf *) new_skb->data;
623 skb_reserve(new_skb, RX_OFFSET);
624
Ralf Baechle0a17ee92010-07-05 02:59:38 +0000625 dev->stats.rx_packets++; /* Statistics */
626 dev->stats.rx_bytes += len;
Linus Torvalds1da177e2005-04-16 15:20:36 -0700627 } else {
Ralf Baechle0a17ee92010-07-05 02:59:38 +0000628 /* The frame is invalid and the skb never
629 reached the network layer so we can just
630 recycle it. */
631 new_skb = skb;
632 dev->stats.rx_errors++;
Linus Torvalds1da177e2005-04-16 15:20:36 -0700633 }
634 if (err & ERXBUF_CRCERR) /* Statistics */
Ralf Baechle0a17ee92010-07-05 02:59:38 +0000635 dev->stats.rx_crc_errors++;
Linus Torvalds1da177e2005-04-16 15:20:36 -0700636 if (err & ERXBUF_FRAMERR)
Ralf Baechle0a17ee92010-07-05 02:59:38 +0000637 dev->stats.rx_frame_errors++;
Linus Torvalds1da177e2005-04-16 15:20:36 -0700638next:
639 ip->rx_skbs[n_entry] = new_skb;
640 rxr[n_entry] = cpu_to_be64(ioc3_map(rxb, 1));
641 rxb->w0 = 0; /* Clear valid flag */
642 n_entry = (n_entry + 1) & 511; /* Update erpir */
643
644 /* Now go on to the next ring entry. */
645 rx_entry = (rx_entry + 1) & 511;
646 skb = ip->rx_skbs[rx_entry];
647 rxb = (struct ioc3_erxbuf *) (skb->data - RX_OFFSET);
648 w0 = be32_to_cpu(rxb->w0);
649 }
650 ioc3_w_erpir((n_entry << 3) | ERPIR_ARM);
651 ip->rx_pi = n_entry;
652 ip->rx_ci = rx_entry;
653}
654
Ralf Baechle0a17ee92010-07-05 02:59:38 +0000655static inline void ioc3_tx(struct net_device *dev)
Linus Torvalds1da177e2005-04-16 15:20:36 -0700656{
Ralf Baechle0a17ee92010-07-05 02:59:38 +0000657 struct ioc3_private *ip = netdev_priv(dev);
Linus Torvalds1da177e2005-04-16 15:20:36 -0700658 unsigned long packets, bytes;
659 struct ioc3 *ioc3 = ip->regs;
660 int tx_entry, o_entry;
661 struct sk_buff *skb;
662 u32 etcir;
663
664 spin_lock(&ip->ioc3_lock);
665 etcir = ioc3_r_etcir();
666
667 tx_entry = (etcir >> 7) & 127;
668 o_entry = ip->tx_ci;
669 packets = 0;
670 bytes = 0;
671
672 while (o_entry != tx_entry) {
673 packets++;
674 skb = ip->tx_skbs[o_entry];
675 bytes += skb->len;
676 dev_kfree_skb_irq(skb);
677 ip->tx_skbs[o_entry] = NULL;
678
679 o_entry = (o_entry + 1) & 127; /* Next */
680
681 etcir = ioc3_r_etcir(); /* More pkts sent? */
682 tx_entry = (etcir >> 7) & 127;
683 }
684
Ralf Baechle0a17ee92010-07-05 02:59:38 +0000685 dev->stats.tx_packets += packets;
686 dev->stats.tx_bytes += bytes;
Linus Torvalds1da177e2005-04-16 15:20:36 -0700687 ip->txqlen -= packets;
688
689 if (ip->txqlen < 128)
Ralf Baechle0a17ee92010-07-05 02:59:38 +0000690 netif_wake_queue(dev);
Linus Torvalds1da177e2005-04-16 15:20:36 -0700691
692 ip->tx_ci = o_entry;
693 spin_unlock(&ip->ioc3_lock);
694}
695
696/*
697 * Deal with fatal IOC3 errors. This condition might be caused by a hard or
698 * software problems, so we should try to recover
699 * more gracefully if this ever happens. In theory we might be flooded
700 * with such error interrupts if something really goes wrong, so we might
701 * also consider to take the interface down.
702 */
Ralf Baechle0a17ee92010-07-05 02:59:38 +0000703static void ioc3_error(struct net_device *dev, u32 eisr)
Linus Torvalds1da177e2005-04-16 15:20:36 -0700704{
Ralf Baechle0a17ee92010-07-05 02:59:38 +0000705 struct ioc3_private *ip = netdev_priv(dev);
Linus Torvalds1da177e2005-04-16 15:20:36 -0700706 unsigned char *iface = dev->name;
707
708 spin_lock(&ip->ioc3_lock);
709
710 if (eisr & EISR_RXOFLO)
711 printk(KERN_ERR "%s: RX overflow.\n", iface);
712 if (eisr & EISR_RXBUFOFLO)
713 printk(KERN_ERR "%s: RX buffer overflow.\n", iface);
714 if (eisr & EISR_RXMEMERR)
715 printk(KERN_ERR "%s: RX PCI error.\n", iface);
716 if (eisr & EISR_RXPARERR)
717 printk(KERN_ERR "%s: RX SSRAM parity error.\n", iface);
718 if (eisr & EISR_TXBUFUFLO)
719 printk(KERN_ERR "%s: TX buffer underflow.\n", iface);
720 if (eisr & EISR_TXMEMERR)
721 printk(KERN_ERR "%s: TX PCI error.\n", iface);
722
723 ioc3_stop(ip);
724 ioc3_init(dev);
725 ioc3_mii_init(ip);
726
727 netif_wake_queue(dev);
728
729 spin_unlock(&ip->ioc3_lock);
730}
731
732/* The interrupt handler does all of the Rx thread work and cleans up
733 after the Tx thread. */
David Howells7d12e782006-10-05 14:55:46 +0100734static irqreturn_t ioc3_interrupt(int irq, void *_dev)
Linus Torvalds1da177e2005-04-16 15:20:36 -0700735{
736 struct net_device *dev = (struct net_device *)_dev;
737 struct ioc3_private *ip = netdev_priv(dev);
738 struct ioc3 *ioc3 = ip->regs;
739 const u32 enabled = EISR_RXTIMERINT | EISR_RXOFLO | EISR_RXBUFOFLO |
740 EISR_RXMEMERR | EISR_RXPARERR | EISR_TXBUFUFLO |
741 EISR_TXEXPLICIT | EISR_TXMEMERR;
742 u32 eisr;
743
744 eisr = ioc3_r_eisr() & enabled;
745
746 ioc3_w_eisr(eisr);
747 (void) ioc3_r_eisr(); /* Flush */
748
749 if (eisr & (EISR_RXOFLO | EISR_RXBUFOFLO | EISR_RXMEMERR |
750 EISR_RXPARERR | EISR_TXBUFUFLO | EISR_TXMEMERR))
Ralf Baechle0a17ee92010-07-05 02:59:38 +0000751 ioc3_error(dev, eisr);
Linus Torvalds1da177e2005-04-16 15:20:36 -0700752 if (eisr & EISR_RXTIMERINT)
Ralf Baechle0a17ee92010-07-05 02:59:38 +0000753 ioc3_rx(dev);
Linus Torvalds1da177e2005-04-16 15:20:36 -0700754 if (eisr & EISR_TXEXPLICIT)
Ralf Baechle0a17ee92010-07-05 02:59:38 +0000755 ioc3_tx(dev);
Linus Torvalds1da177e2005-04-16 15:20:36 -0700756
757 return IRQ_HANDLED;
758}
759
760static inline void ioc3_setup_duplex(struct ioc3_private *ip)
761{
762 struct ioc3 *ioc3 = ip->regs;
763
764 if (ip->mii.full_duplex) {
765 ioc3_w_etcsr(ETCSR_FD);
766 ip->emcr |= EMCR_DUPLEX;
767 } else {
768 ioc3_w_etcsr(ETCSR_HD);
769 ip->emcr &= ~EMCR_DUPLEX;
770 }
771 ioc3_w_emcr(ip->emcr);
772}
773
774static void ioc3_timer(unsigned long data)
775{
776 struct ioc3_private *ip = (struct ioc3_private *) data;
777
778 /* Print the link status if it has changed */
779 mii_check_media(&ip->mii, 1, 0);
780 ioc3_setup_duplex(ip);
781
782 ip->ioc3_timer.expires = jiffies + ((12 * HZ)/10); /* 1.2s */
783 add_timer(&ip->ioc3_timer);
784}
785
786/*
787 * Try to find a PHY. There is no apparent relation between the MII addresses
788 * in the SGI documentation and what we find in reality, so we simply probe
789 * for the PHY. It seems IOC3 PHYs usually live on address 31. One of my
790 * onboard IOC3s has the special oddity that probing doesn't seem to find it
791 * yet the interface seems to work fine, so if probing fails we for now will
792 * simply default to PHY 31 instead of bailing out.
793 */
794static int ioc3_mii_init(struct ioc3_private *ip)
795{
796 struct net_device *dev = priv_netdev(ip);
797 int i, found = 0, res = 0;
798 int ioc3_phy_workaround = 1;
799 u16 word;
800
801 for (i = 0; i < 32; i++) {
802 word = ioc3_mdio_read(dev, i, MII_PHYSID1);
803
804 if (word != 0xffff && word != 0x0000) {
805 found = 1;
806 break; /* Found a PHY */
807 }
808 }
809
810 if (!found) {
811 if (ioc3_phy_workaround)
812 i = 31;
813 else {
814 ip->mii.phy_id = -1;
815 res = -ENODEV;
816 goto out;
817 }
818 }
819
820 ip->mii.phy_id = i;
Ralf Baechlef0ba7352007-02-17 02:51:15 +0000821
822out:
823 return res;
824}
825
826static void ioc3_mii_start(struct ioc3_private *ip)
827{
Linus Torvalds1da177e2005-04-16 15:20:36 -0700828 ip->ioc3_timer.expires = jiffies + (12 * HZ)/10; /* 1.2 sec. */
829 ip->ioc3_timer.data = (unsigned long) ip;
Joe Perchesc061b182010-08-23 18:20:03 +0000830 ip->ioc3_timer.function = ioc3_timer;
Linus Torvalds1da177e2005-04-16 15:20:36 -0700831 add_timer(&ip->ioc3_timer);
Linus Torvalds1da177e2005-04-16 15:20:36 -0700832}
833
834static inline void ioc3_clean_rx_ring(struct ioc3_private *ip)
835{
836 struct sk_buff *skb;
837 int i;
838
839 for (i = ip->rx_ci; i & 15; i++) {
840 ip->rx_skbs[ip->rx_pi] = ip->rx_skbs[ip->rx_ci];
841 ip->rxr[ip->rx_pi++] = ip->rxr[ip->rx_ci++];
842 }
843 ip->rx_pi &= 511;
844 ip->rx_ci &= 511;
845
846 for (i = ip->rx_ci; i != ip->rx_pi; i = (i+1) & 511) {
847 struct ioc3_erxbuf *rxb;
848 skb = ip->rx_skbs[i];
849 rxb = (struct ioc3_erxbuf *) (skb->data - RX_OFFSET);
850 rxb->w0 = 0;
851 }
852}
853
854static inline void ioc3_clean_tx_ring(struct ioc3_private *ip)
855{
856 struct sk_buff *skb;
857 int i;
858
859 for (i=0; i < 128; i++) {
860 skb = ip->tx_skbs[i];
861 if (skb) {
862 ip->tx_skbs[i] = NULL;
863 dev_kfree_skb_any(skb);
864 }
865 ip->txr[i].cmd = 0;
866 }
867 ip->tx_pi = 0;
868 ip->tx_ci = 0;
869}
870
871static void ioc3_free_rings(struct ioc3_private *ip)
872{
873 struct sk_buff *skb;
874 int rx_entry, n_entry;
875
876 if (ip->txr) {
877 ioc3_clean_tx_ring(ip);
878 free_pages((unsigned long)ip->txr, 2);
879 ip->txr = NULL;
880 }
881
882 if (ip->rxr) {
883 n_entry = ip->rx_ci;
884 rx_entry = ip->rx_pi;
885
886 while (n_entry != rx_entry) {
887 skb = ip->rx_skbs[n_entry];
888 if (skb)
889 dev_kfree_skb_any(skb);
890
891 n_entry = (n_entry + 1) & 511;
892 }
893 free_page((unsigned long)ip->rxr);
894 ip->rxr = NULL;
895 }
896}
897
898static void ioc3_alloc_rings(struct net_device *dev)
899{
900 struct ioc3_private *ip = netdev_priv(dev);
901 struct ioc3_erxbuf *rxb;
902 unsigned long *rxr;
903 int i;
904
905 if (ip->rxr == NULL) {
906 /* Allocate and initialize rx ring. 4kb = 512 entries */
907 ip->rxr = (unsigned long *) get_zeroed_page(GFP_ATOMIC);
908 rxr = (unsigned long *) ip->rxr;
909 if (!rxr)
910 printk("ioc3_alloc_rings(): get_zeroed_page() failed!\n");
911
912 /* Now the rx buffers. The RX ring may be larger but
913 we only allocate 16 buffers for now. Need to tune
914 this for performance and memory later. */
915 for (i = 0; i < RX_BUFFS; i++) {
916 struct sk_buff *skb;
917
918 skb = ioc3_alloc_skb(RX_BUF_ALLOC_SIZE, GFP_ATOMIC);
919 if (!skb) {
920 show_free_areas();
921 continue;
922 }
923
924 ip->rx_skbs[i] = skb;
Linus Torvalds1da177e2005-04-16 15:20:36 -0700925
926 /* Because we reserve afterwards. */
927 skb_put(skb, (1664 + RX_OFFSET));
928 rxb = (struct ioc3_erxbuf *) skb->data;
929 rxr[i] = cpu_to_be64(ioc3_map(rxb, 1));
930 skb_reserve(skb, RX_OFFSET);
931 }
932 ip->rx_ci = 0;
933 ip->rx_pi = RX_BUFFS;
934 }
935
936 if (ip->txr == NULL) {
937 /* Allocate and initialize tx rings. 16kb = 128 bufs. */
938 ip->txr = (struct ioc3_etxd *)__get_free_pages(GFP_KERNEL, 2);
939 if (!ip->txr)
940 printk("ioc3_alloc_rings(): __get_free_pages() failed!\n");
941 ip->tx_pi = 0;
942 ip->tx_ci = 0;
943 }
944}
945
946static void ioc3_init_rings(struct net_device *dev)
947{
948 struct ioc3_private *ip = netdev_priv(dev);
949 struct ioc3 *ioc3 = ip->regs;
950 unsigned long ring;
951
952 ioc3_free_rings(ip);
953 ioc3_alloc_rings(dev);
954
955 ioc3_clean_rx_ring(ip);
956 ioc3_clean_tx_ring(ip);
957
958 /* Now the rx ring base, consume & produce registers. */
959 ring = ioc3_map(ip->rxr, 0);
960 ioc3_w_erbr_h(ring >> 32);
961 ioc3_w_erbr_l(ring & 0xffffffff);
962 ioc3_w_ercir(ip->rx_ci << 3);
963 ioc3_w_erpir((ip->rx_pi << 3) | ERPIR_ARM);
964
965 ring = ioc3_map(ip->txr, 0);
966
967 ip->txqlen = 0; /* nothing queued */
968
969 /* Now the tx ring base, consume & produce registers. */
970 ioc3_w_etbr_h(ring >> 32);
971 ioc3_w_etbr_l(ring & 0xffffffff);
972 ioc3_w_etpir(ip->tx_pi << 7);
973 ioc3_w_etcir(ip->tx_ci << 7);
974 (void) ioc3_r_etcir(); /* Flush */
975}
976
977static inline void ioc3_ssram_disc(struct ioc3_private *ip)
978{
979 struct ioc3 *ioc3 = ip->regs;
980 volatile u32 *ssram0 = &ioc3->ssram[0x0000];
981 volatile u32 *ssram1 = &ioc3->ssram[0x4000];
982 unsigned int pattern = 0x5555;
983
984 /* Assume the larger size SSRAM and enable parity checking */
985 ioc3_w_emcr(ioc3_r_emcr() | (EMCR_BUFSIZ | EMCR_RAMPAR));
986
987 *ssram0 = pattern;
988 *ssram1 = ~pattern & IOC3_SSRAM_DM;
989
990 if ((*ssram0 & IOC3_SSRAM_DM) != pattern ||
991 (*ssram1 & IOC3_SSRAM_DM) != (~pattern & IOC3_SSRAM_DM)) {
992 /* set ssram size to 64 KB */
993 ip->emcr = EMCR_RAMPAR;
994 ioc3_w_emcr(ioc3_r_emcr() & ~EMCR_BUFSIZ);
995 } else
996 ip->emcr = EMCR_BUFSIZ | EMCR_RAMPAR;
997}
998
999static void ioc3_init(struct net_device *dev)
1000{
1001 struct ioc3_private *ip = netdev_priv(dev);
1002 struct ioc3 *ioc3 = ip->regs;
1003
Ralf Baechlecfadbd22006-10-18 02:15:37 +01001004 del_timer_sync(&ip->ioc3_timer); /* Kill if running */
Linus Torvalds1da177e2005-04-16 15:20:36 -07001005
1006 ioc3_w_emcr(EMCR_RST); /* Reset */
1007 (void) ioc3_r_emcr(); /* Flush WB */
1008 udelay(4); /* Give it time ... */
1009 ioc3_w_emcr(0);
1010 (void) ioc3_r_emcr();
1011
1012 /* Misc registers */
1013#ifdef CONFIG_SGI_IP27
1014 ioc3_w_erbar(PCI64_ATTR_BAR >> 32); /* Barrier on last store */
1015#else
1016 ioc3_w_erbar(0); /* Let PCI API get it right */
1017#endif
1018 (void) ioc3_r_etcdc(); /* Clear on read */
1019 ioc3_w_ercsr(15); /* RX low watermark */
1020 ioc3_w_ertr(0); /* Interrupt immediately */
1021 __ioc3_set_mac_address(dev);
1022 ioc3_w_ehar_h(ip->ehar_h);
1023 ioc3_w_ehar_l(ip->ehar_l);
1024 ioc3_w_ersr(42); /* XXX should be random */
1025
1026 ioc3_init_rings(dev);
1027
1028 ip->emcr |= ((RX_OFFSET / 2) << EMCR_RXOFF_SHIFT) | EMCR_TXDMAEN |
1029 EMCR_TXEN | EMCR_RXDMAEN | EMCR_RXEN | EMCR_PADEN;
1030 ioc3_w_emcr(ip->emcr);
1031 ioc3_w_eier(EISR_RXTIMERINT | EISR_RXOFLO | EISR_RXBUFOFLO |
1032 EISR_RXMEMERR | EISR_RXPARERR | EISR_TXBUFUFLO |
1033 EISR_TXEXPLICIT | EISR_TXMEMERR);
1034 (void) ioc3_r_eier();
1035}
1036
1037static inline void ioc3_stop(struct ioc3_private *ip)
1038{
1039 struct ioc3 *ioc3 = ip->regs;
1040
1041 ioc3_w_emcr(0); /* Shutup */
1042 ioc3_w_eier(0); /* Disable interrupts */
1043 (void) ioc3_r_eier(); /* Flush */
1044}
1045
1046static int ioc3_open(struct net_device *dev)
1047{
1048 struct ioc3_private *ip = netdev_priv(dev);
1049
Thomas Gleixner1fb9df52006-07-01 19:29:39 -07001050 if (request_irq(dev->irq, ioc3_interrupt, IRQF_SHARED, ioc3_str, dev)) {
Linus Torvalds1da177e2005-04-16 15:20:36 -07001051 printk(KERN_ERR "%s: Can't get irq %d\n", dev->name, dev->irq);
1052
1053 return -EAGAIN;
1054 }
1055
1056 ip->ehar_h = 0;
1057 ip->ehar_l = 0;
1058 ioc3_init(dev);
Ralf Baechlef0ba7352007-02-17 02:51:15 +00001059 ioc3_mii_start(ip);
Linus Torvalds1da177e2005-04-16 15:20:36 -07001060
1061 netif_start_queue(dev);
1062 return 0;
1063}
1064
1065static int ioc3_close(struct net_device *dev)
1066{
1067 struct ioc3_private *ip = netdev_priv(dev);
1068
Ralf Baechlecfadbd22006-10-18 02:15:37 +01001069 del_timer_sync(&ip->ioc3_timer);
Linus Torvalds1da177e2005-04-16 15:20:36 -07001070
1071 netif_stop_queue(dev);
1072
1073 ioc3_stop(ip);
1074 free_irq(dev->irq, dev);
1075
1076 ioc3_free_rings(ip);
1077 return 0;
1078}
1079
1080/*
1081 * MENET cards have four IOC3 chips, which are attached to two sets of
1082 * PCI slot resources each: the primary connections are on slots
1083 * 0..3 and the secondaries are on 4..7
1084 *
1085 * All four ethernets are brought out to connectors; six serial ports
1086 * (a pair from each of the first three IOC3s) are brought out to
1087 * MiniDINs; all other subdevices are left swinging in the wind, leave
1088 * them disabled.
1089 */
Linus Torvalds1da177e2005-04-16 15:20:36 -07001090
Alan Coxf49343a2007-07-10 17:05:16 +01001091static int ioc3_adjacent_is_ioc3(struct pci_dev *pdev, int slot)
1092{
1093 struct pci_dev *dev = pci_get_slot(pdev->bus, PCI_DEVFN(slot, 0));
1094 int ret = 0;
1095
1096 if (dev) {
1097 if (dev->vendor == PCI_VENDOR_ID_SGI &&
1098 dev->device == PCI_DEVICE_ID_SGI_IOC3)
1099 ret = 1;
1100 pci_dev_put(dev);
1101 }
1102
1103 return ret;
1104}
1105
1106static int ioc3_is_menet(struct pci_dev *pdev)
1107{
1108 return pdev->bus->parent == NULL &&
1109 ioc3_adjacent_is_ioc3(pdev, 0) &&
1110 ioc3_adjacent_is_ioc3(pdev, 1) &&
1111 ioc3_adjacent_is_ioc3(pdev, 2);
Linus Torvalds1da177e2005-04-16 15:20:36 -07001112}
1113
1114#ifdef CONFIG_SERIAL_8250
1115/*
1116 * Note about serial ports and consoles:
1117 * For console output, everyone uses the IOC3 UARTA (offset 0x178)
1118 * connected to the master node (look in ip27_setup_console() and
1119 * ip27prom_console_write()).
1120 *
1121 * For serial (/dev/ttyS0 etc), we can not have hardcoded serial port
1122 * addresses on a partitioned machine. Since we currently use the ioc3
1123 * serial ports, we use dynamic serial port discovery that the serial.c
1124 * driver uses for pci/pnp ports (there is an entry for the SGI ioc3
1125 * boards in pci_boards[]). Unfortunately, UARTA's pio address is greater
1126 * than UARTB's, although UARTA on o200s has traditionally been known as
1127 * port 0. So, we just use one serial port from each ioc3 (since the
1128 * serial driver adds addresses to get to higher ports).
1129 *
1130 * The first one to do a register_console becomes the preferred console
1131 * (if there is no kernel command line console= directive). /dev/console
1132 * (ie 5, 1) is then "aliased" into the device number returned by the
1133 * "device" routine referred to in this console structure
1134 * (ip27prom_console_dev).
1135 *
1136 * Also look in ip27-pci.c:pci_fixup_ioc3() for some comments on working
1137 * around ioc3 oddities in this respect.
1138 *
Ralf Baechle0491d1f2007-08-26 18:51:22 +01001139 * The IOC3 serials use a 22MHz clock rate with an additional divider which
1140 * can be programmed in the SCR register if the DLAB bit is set.
1141 *
1142 * Register to interrupt zero because we share the interrupt with
1143 * the serial driver which we don't properly support yet.
1144 *
1145 * Can't use UPF_IOREMAP as the whole of IOC3 resources have already been
1146 * registered.
Linus Torvalds1da177e2005-04-16 15:20:36 -07001147 */
Ralf Baechle0491d1f2007-08-26 18:51:22 +01001148static void __devinit ioc3_8250_register(struct ioc3_uartregs __iomem *uart)
1149{
1150#define COSMISC_CONSTANT 6
1151
1152 struct uart_port port = {
1153 .irq = 0,
1154 .flags = UPF_SKIP_TEST | UPF_BOOT_AUTOCONF,
1155 .iotype = UPIO_MEM,
1156 .regshift = 0,
1157 .uartclk = (22000000 << 1) / COSMISC_CONSTANT,
1158
1159 .membase = (unsigned char __iomem *) uart,
1160 .mapbase = (unsigned long) uart,
1161 };
1162 unsigned char lcr;
1163
1164 lcr = uart->iu_lcr;
1165 uart->iu_lcr = lcr | UART_LCR_DLAB;
1166 uart->iu_scr = COSMISC_CONSTANT,
1167 uart->iu_lcr = lcr;
1168 uart->iu_lcr;
1169 serial8250_register_port(&port);
1170}
Linus Torvalds1da177e2005-04-16 15:20:36 -07001171
1172static void __devinit ioc3_serial_probe(struct pci_dev *pdev, struct ioc3 *ioc3)
1173{
Linus Torvalds1da177e2005-04-16 15:20:36 -07001174 /*
1175 * We need to recognice and treat the fourth MENET serial as it
1176 * does not have an SuperIO chip attached to it, therefore attempting
1177 * to access it will result in bus errors. We call something an
1178 * MENET if PCI slot 0, 1, 2 and 3 of a master PCI bus all have an IOC3
1179 * in it. This is paranoid but we want to avoid blowing up on a
1180 * showhorn PCI box that happens to have 4 IOC3 cards in it so it's
1181 * not paranoid enough ...
1182 */
1183 if (ioc3_is_menet(pdev) && PCI_SLOT(pdev->devfn) == 3)
1184 return;
1185
Ralf Baechle15a93802005-11-08 23:10:51 +00001186 /*
Ralf Baechle0491d1f2007-08-26 18:51:22 +01001187 * Switch IOC3 to PIO mode. It probably already was but let's be
1188 * paranoid
Ralf Baechle15a93802005-11-08 23:10:51 +00001189 */
Ralf Baechle0491d1f2007-08-26 18:51:22 +01001190 ioc3->gpcr_s = GPCR_UARTA_MODESEL | GPCR_UARTB_MODESEL;
1191 ioc3->gpcr_s;
1192 ioc3->gppr_6 = 0;
1193 ioc3->gppr_6;
1194 ioc3->gppr_7 = 0;
1195 ioc3->gppr_7;
1196 ioc3->sscr_a = ioc3->sscr_a & ~SSCR_DMA_EN;
1197 ioc3->sscr_a;
1198 ioc3->sscr_b = ioc3->sscr_b & ~SSCR_DMA_EN;
1199 ioc3->sscr_b;
1200 /* Disable all SA/B interrupts except for SA/B_INT in SIO_IEC. */
1201 ioc3->sio_iec &= ~ (SIO_IR_SA_TX_MT | SIO_IR_SA_RX_FULL |
1202 SIO_IR_SA_RX_HIGH | SIO_IR_SA_RX_TIMER |
1203 SIO_IR_SA_DELTA_DCD | SIO_IR_SA_DELTA_CTS |
1204 SIO_IR_SA_TX_EXPLICIT | SIO_IR_SA_MEMERR);
1205 ioc3->sio_iec |= SIO_IR_SA_INT;
1206 ioc3->sscr_a = 0;
1207 ioc3->sio_iec &= ~ (SIO_IR_SB_TX_MT | SIO_IR_SB_RX_FULL |
1208 SIO_IR_SB_RX_HIGH | SIO_IR_SB_RX_TIMER |
1209 SIO_IR_SB_DELTA_DCD | SIO_IR_SB_DELTA_CTS |
1210 SIO_IR_SB_TX_EXPLICIT | SIO_IR_SB_MEMERR);
1211 ioc3->sio_iec |= SIO_IR_SB_INT;
1212 ioc3->sscr_b = 0;
Linus Torvalds1da177e2005-04-16 15:20:36 -07001213
Ralf Baechle0491d1f2007-08-26 18:51:22 +01001214 ioc3_8250_register(&ioc3->sregs.uarta);
1215 ioc3_8250_register(&ioc3->sregs.uartb);
Linus Torvalds1da177e2005-04-16 15:20:36 -07001216}
1217#endif
1218
Alexander Beregalov2b142542009-04-11 07:44:55 +00001219static const struct net_device_ops ioc3_netdev_ops = {
1220 .ndo_open = ioc3_open,
1221 .ndo_stop = ioc3_close,
1222 .ndo_start_xmit = ioc3_start_xmit,
1223 .ndo_tx_timeout = ioc3_timeout,
1224 .ndo_get_stats = ioc3_get_stats,
1225 .ndo_set_multicast_list = ioc3_set_multicast_list,
1226 .ndo_do_ioctl = ioc3_ioctl,
1227 .ndo_validate_addr = eth_validate_addr,
1228 .ndo_set_mac_address = ioc3_set_mac_address,
1229 .ndo_change_mtu = eth_change_mtu,
1230};
1231
Ralf Baechle725e49c2008-03-08 16:58:33 +00001232static int __devinit ioc3_probe(struct pci_dev *pdev,
1233 const struct pci_device_id *ent)
Linus Torvalds1da177e2005-04-16 15:20:36 -07001234{
1235 unsigned int sw_physid1, sw_physid2;
1236 struct net_device *dev = NULL;
1237 struct ioc3_private *ip;
1238 struct ioc3 *ioc3;
1239 unsigned long ioc3_base, ioc3_size;
1240 u32 vendor, model, rev;
1241 int err, pci_using_dac;
1242
1243 /* Configure DMA attributes. */
Yang Hongyang6a355282009-04-06 19:01:13 -07001244 err = pci_set_dma_mask(pdev, DMA_BIT_MASK(64));
Linus Torvalds1da177e2005-04-16 15:20:36 -07001245 if (!err) {
1246 pci_using_dac = 1;
Yang Hongyang6a355282009-04-06 19:01:13 -07001247 err = pci_set_consistent_dma_mask(pdev, DMA_BIT_MASK(64));
Linus Torvalds1da177e2005-04-16 15:20:36 -07001248 if (err < 0) {
1249 printk(KERN_ERR "%s: Unable to obtain 64 bit DMA "
1250 "for consistent allocations\n", pci_name(pdev));
1251 goto out;
1252 }
1253 } else {
Yang Hongyang284901a2009-04-06 19:01:15 -07001254 err = pci_set_dma_mask(pdev, DMA_BIT_MASK(32));
Linus Torvalds1da177e2005-04-16 15:20:36 -07001255 if (err) {
1256 printk(KERN_ERR "%s: No usable DMA configuration, "
1257 "aborting.\n", pci_name(pdev));
1258 goto out;
1259 }
1260 pci_using_dac = 0;
1261 }
1262
1263 if (pci_enable_device(pdev))
1264 return -ENODEV;
1265
1266 dev = alloc_etherdev(sizeof(struct ioc3_private));
1267 if (!dev) {
1268 err = -ENOMEM;
1269 goto out_disable;
1270 }
1271
1272 if (pci_using_dac)
1273 dev->features |= NETIF_F_HIGHDMA;
1274
1275 err = pci_request_regions(pdev, "ioc3");
1276 if (err)
1277 goto out_free;
1278
Linus Torvalds1da177e2005-04-16 15:20:36 -07001279 SET_NETDEV_DEV(dev, &pdev->dev);
1280
1281 ip = netdev_priv(dev);
1282
1283 dev->irq = pdev->irq;
1284
1285 ioc3_base = pci_resource_start(pdev, 0);
1286 ioc3_size = pci_resource_len(pdev, 0);
1287 ioc3 = (struct ioc3 *) ioremap(ioc3_base, ioc3_size);
1288 if (!ioc3) {
1289 printk(KERN_CRIT "ioc3eth(%s): ioremap failed, goodbye.\n",
1290 pci_name(pdev));
1291 err = -ENOMEM;
1292 goto out_res;
1293 }
1294 ip->regs = ioc3;
1295
1296#ifdef CONFIG_SERIAL_8250
1297 ioc3_serial_probe(pdev, ioc3);
1298#endif
1299
1300 spin_lock_init(&ip->ioc3_lock);
1301 init_timer(&ip->ioc3_timer);
1302
1303 ioc3_stop(ip);
1304 ioc3_init(dev);
1305
1306 ip->pdev = pdev;
1307
1308 ip->mii.phy_id_mask = 0x1f;
1309 ip->mii.reg_num_mask = 0x1f;
1310 ip->mii.dev = dev;
1311 ip->mii.mdio_read = ioc3_mdio_read;
1312 ip->mii.mdio_write = ioc3_mdio_write;
1313
1314 ioc3_mii_init(ip);
1315
1316 if (ip->mii.phy_id == -1) {
1317 printk(KERN_CRIT "ioc3-eth(%s): Didn't find a PHY, goodbye.\n",
1318 pci_name(pdev));
1319 err = -ENODEV;
1320 goto out_stop;
1321 }
1322
Ralf Baechlef0ba7352007-02-17 02:51:15 +00001323 ioc3_mii_start(ip);
Linus Torvalds1da177e2005-04-16 15:20:36 -07001324 ioc3_ssram_disc(ip);
1325 ioc3_get_eaddr(ip);
1326
1327 /* The IOC3-specific entries in the device structure. */
Linus Torvalds1da177e2005-04-16 15:20:36 -07001328 dev->watchdog_timeo = 5 * HZ;
Alexander Beregalov2b142542009-04-11 07:44:55 +00001329 dev->netdev_ops = &ioc3_netdev_ops;
Linus Torvalds1da177e2005-04-16 15:20:36 -07001330 dev->ethtool_ops = &ioc3_ethtool_ops;
Linus Torvalds1da177e2005-04-16 15:20:36 -07001331 dev->features = NETIF_F_IP_CSUM;
Linus Torvalds1da177e2005-04-16 15:20:36 -07001332
Linus Torvalds1da177e2005-04-16 15:20:36 -07001333 sw_physid1 = ioc3_mdio_read(dev, ip->mii.phy_id, MII_PHYSID1);
1334 sw_physid2 = ioc3_mdio_read(dev, ip->mii.phy_id, MII_PHYSID2);
1335
1336 err = register_netdev(dev);
1337 if (err)
1338 goto out_stop;
1339
1340 mii_check_media(&ip->mii, 1, 1);
Ralf Baechle852ea222005-08-02 11:01:27 +01001341 ioc3_setup_duplex(ip);
Linus Torvalds1da177e2005-04-16 15:20:36 -07001342
1343 vendor = (sw_physid1 << 12) | (sw_physid2 >> 4);
1344 model = (sw_physid2 >> 4) & 0x3f;
1345 rev = sw_physid2 & 0xf;
1346 printk(KERN_INFO "%s: Using PHY %d, vendor 0x%x, model %d, "
1347 "rev %d.\n", dev->name, ip->mii.phy_id, vendor, model, rev);
1348 printk(KERN_INFO "%s: IOC3 SSRAM has %d kbyte.\n", dev->name,
1349 ip->emcr & EMCR_BUFSIZ ? 128 : 64);
1350
1351 return 0;
1352
1353out_stop:
1354 ioc3_stop(ip);
Ralf Baechlef0ba7352007-02-17 02:51:15 +00001355 del_timer_sync(&ip->ioc3_timer);
Linus Torvalds1da177e2005-04-16 15:20:36 -07001356 ioc3_free_rings(ip);
1357out_res:
1358 pci_release_regions(pdev);
1359out_free:
1360 free_netdev(dev);
1361out_disable:
1362 /*
1363 * We should call pci_disable_device(pdev); here if the IOC3 wasn't
1364 * such a weird device ...
1365 */
1366out:
1367 return err;
1368}
1369
1370static void __devexit ioc3_remove_one (struct pci_dev *pdev)
1371{
1372 struct net_device *dev = pci_get_drvdata(pdev);
1373 struct ioc3_private *ip = netdev_priv(dev);
1374 struct ioc3 *ioc3 = ip->regs;
1375
1376 unregister_netdev(dev);
Ralf Baechlef0ba7352007-02-17 02:51:15 +00001377 del_timer_sync(&ip->ioc3_timer);
1378
Linus Torvalds1da177e2005-04-16 15:20:36 -07001379 iounmap(ioc3);
1380 pci_release_regions(pdev);
1381 free_netdev(dev);
1382 /*
1383 * We should call pci_disable_device(pdev); here if the IOC3 wasn't
1384 * such a weird device ...
1385 */
1386}
1387
Alexey Dobriyana3aa1882010-01-07 11:58:11 +00001388static DEFINE_PCI_DEVICE_TABLE(ioc3_pci_tbl) = {
Linus Torvalds1da177e2005-04-16 15:20:36 -07001389 { PCI_VENDOR_ID_SGI, PCI_DEVICE_ID_SGI_IOC3, PCI_ANY_ID, PCI_ANY_ID },
1390 { 0 }
1391};
1392MODULE_DEVICE_TABLE(pci, ioc3_pci_tbl);
1393
1394static struct pci_driver ioc3_driver = {
1395 .name = "ioc3-eth",
1396 .id_table = ioc3_pci_tbl,
1397 .probe = ioc3_probe,
1398 .remove = __devexit_p(ioc3_remove_one),
1399};
1400
1401static int __init ioc3_init_module(void)
1402{
Ralf Baechle70f1e002005-11-13 10:13:05 +00001403 return pci_register_driver(&ioc3_driver);
Linus Torvalds1da177e2005-04-16 15:20:36 -07001404}
1405
1406static void __exit ioc3_cleanup_module(void)
1407{
1408 pci_unregister_driver(&ioc3_driver);
1409}
1410
1411static int ioc3_start_xmit(struct sk_buff *skb, struct net_device *dev)
1412{
1413 unsigned long data;
1414 struct ioc3_private *ip = netdev_priv(dev);
1415 struct ioc3 *ioc3 = ip->regs;
1416 unsigned int len;
1417 struct ioc3_etxd *desc;
1418 uint32_t w0 = 0;
1419 int produce;
1420
Linus Torvalds1da177e2005-04-16 15:20:36 -07001421 /*
1422 * IOC3 has a fairly simple minded checksumming hardware which simply
1423 * adds up the 1's complement checksum for the entire packet and
1424 * inserts it at an offset which can be specified in the descriptor
1425 * into the transmit packet. This means we have to compensate for the
1426 * MAC header which should not be summed and the TCP/UDP pseudo headers
1427 * manually.
1428 */
Patrick McHardy84fa7932006-08-29 16:44:56 -07001429 if (skb->ip_summed == CHECKSUM_PARTIAL) {
Arnaldo Carvalho de Meloeddc9ec2007-04-20 22:47:35 -07001430 const struct iphdr *ih = ip_hdr(skb);
1431 const int proto = ntohs(ih->protocol);
Linus Torvalds1da177e2005-04-16 15:20:36 -07001432 unsigned int csoff;
Linus Torvalds1da177e2005-04-16 15:20:36 -07001433 uint32_t csum, ehsum;
1434 uint16_t *eh;
1435
1436 /* The MAC header. skb->mac seem the logic approach
1437 to find the MAC header - except it's a NULL pointer ... */
1438 eh = (uint16_t *) skb->data;
1439
1440 /* Sum up dest addr, src addr and protocol */
1441 ehsum = eh[0] + eh[1] + eh[2] + eh[3] + eh[4] + eh[5] + eh[6];
1442
1443 /* Fold ehsum. can't use csum_fold which negates also ... */
1444 ehsum = (ehsum & 0xffff) + (ehsum >> 16);
1445 ehsum = (ehsum & 0xffff) + (ehsum >> 16);
1446
1447 /* Skip IP header; it's sum is always zero and was
1448 already filled in by ip_output.c */
1449 csum = csum_tcpudp_nofold(ih->saddr, ih->daddr,
1450 ih->tot_len - (ih->ihl << 2),
1451 proto, 0xffff ^ ehsum);
1452
1453 csum = (csum & 0xffff) + (csum >> 16); /* Fold again */
1454 csum = (csum & 0xffff) + (csum >> 16);
1455
1456 csoff = ETH_HLEN + (ih->ihl << 2);
1457 if (proto == IPPROTO_UDP) {
1458 csoff += offsetof(struct udphdr, check);
Arnaldo Carvalho de Melo4bedb452007-03-13 14:28:48 -03001459 udp_hdr(skb)->check = csum;
Linus Torvalds1da177e2005-04-16 15:20:36 -07001460 }
1461 if (proto == IPPROTO_TCP) {
1462 csoff += offsetof(struct tcphdr, check);
Arnaldo Carvalho de Meloaa8223c2007-04-10 21:04:22 -07001463 tcp_hdr(skb)->check = csum;
Linus Torvalds1da177e2005-04-16 15:20:36 -07001464 }
1465
1466 w0 = ETXD_DOCHECKSUM | (csoff << ETXD_CHKOFF_SHIFT);
1467 }
Linus Torvalds1da177e2005-04-16 15:20:36 -07001468
1469 spin_lock_irq(&ip->ioc3_lock);
1470
1471 data = (unsigned long) skb->data;
1472 len = skb->len;
1473
1474 produce = ip->tx_pi;
1475 desc = &ip->txr[produce];
1476
1477 if (len <= 104) {
1478 /* Short packet, let's copy it directly into the ring. */
Arnaldo Carvalho de Melod626f622007-03-27 18:55:52 -03001479 skb_copy_from_linear_data(skb, desc->data, skb->len);
Linus Torvalds1da177e2005-04-16 15:20:36 -07001480 if (len < ETH_ZLEN) {
1481 /* Very short packet, pad with zeros at the end. */
1482 memset(desc->data + len, 0, ETH_ZLEN - len);
1483 len = ETH_ZLEN;
1484 }
1485 desc->cmd = cpu_to_be32(len | ETXD_INTWHENDONE | ETXD_D0V | w0);
1486 desc->bufcnt = cpu_to_be32(len);
1487 } else if ((data ^ (data + len - 1)) & 0x4000) {
1488 unsigned long b2 = (data | 0x3fffUL) + 1UL;
1489 unsigned long s1 = b2 - data;
1490 unsigned long s2 = data + len - b2;
1491
1492 desc->cmd = cpu_to_be32(len | ETXD_INTWHENDONE |
1493 ETXD_B1V | ETXD_B2V | w0);
1494 desc->bufcnt = cpu_to_be32((s1 << ETXD_B1CNT_SHIFT) |
1495 (s2 << ETXD_B2CNT_SHIFT));
1496 desc->p1 = cpu_to_be64(ioc3_map(skb->data, 1));
1497 desc->p2 = cpu_to_be64(ioc3_map((void *) b2, 1));
1498 } else {
1499 /* Normal sized packet that doesn't cross a page boundary. */
1500 desc->cmd = cpu_to_be32(len | ETXD_INTWHENDONE | ETXD_B1V | w0);
1501 desc->bufcnt = cpu_to_be32(len << ETXD_B1CNT_SHIFT);
1502 desc->p1 = cpu_to_be64(ioc3_map(skb->data, 1));
1503 }
1504
1505 BARRIER();
1506
Linus Torvalds1da177e2005-04-16 15:20:36 -07001507 ip->tx_skbs[produce] = skb; /* Remember skb */
1508 produce = (produce + 1) & 127;
1509 ip->tx_pi = produce;
1510 ioc3_w_etpir(produce << 7); /* Fire ... */
1511
1512 ip->txqlen++;
1513
1514 if (ip->txqlen >= 127)
1515 netif_stop_queue(dev);
1516
1517 spin_unlock_irq(&ip->ioc3_lock);
1518
Patrick McHardy6ed10652009-06-23 06:03:08 +00001519 return NETDEV_TX_OK;
Linus Torvalds1da177e2005-04-16 15:20:36 -07001520}
1521
1522static void ioc3_timeout(struct net_device *dev)
1523{
1524 struct ioc3_private *ip = netdev_priv(dev);
1525
1526 printk(KERN_ERR "%s: transmit timed out, resetting\n", dev->name);
1527
1528 spin_lock_irq(&ip->ioc3_lock);
1529
1530 ioc3_stop(ip);
1531 ioc3_init(dev);
1532 ioc3_mii_init(ip);
Ralf Baechlef0ba7352007-02-17 02:51:15 +00001533 ioc3_mii_start(ip);
Linus Torvalds1da177e2005-04-16 15:20:36 -07001534
1535 spin_unlock_irq(&ip->ioc3_lock);
1536
1537 netif_wake_queue(dev);
1538}
1539
1540/*
1541 * Given a multicast ethernet address, this routine calculates the
1542 * address's bit index in the logical address filter mask
1543 */
1544
1545static inline unsigned int ioc3_hash(const unsigned char *addr)
1546{
1547 unsigned int temp = 0;
1548 u32 crc;
1549 int bits;
1550
1551 crc = ether_crc_le(ETH_ALEN, addr);
1552
1553 crc &= 0x3f; /* bit reverse lowest 6 bits for hash index */
1554 for (bits = 6; --bits >= 0; ) {
1555 temp <<= 1;
1556 temp |= (crc & 0x1);
1557 crc >>= 1;
1558 }
1559
1560 return temp;
1561}
1562
1563static void ioc3_get_drvinfo (struct net_device *dev,
1564 struct ethtool_drvinfo *info)
1565{
1566 struct ioc3_private *ip = netdev_priv(dev);
Ralf Baechle852ea222005-08-02 11:01:27 +01001567
Linus Torvalds1da177e2005-04-16 15:20:36 -07001568 strcpy (info->driver, IOC3_NAME);
1569 strcpy (info->version, IOC3_VERSION);
1570 strcpy (info->bus_info, pci_name(ip->pdev));
1571}
1572
1573static int ioc3_get_settings(struct net_device *dev, struct ethtool_cmd *cmd)
1574{
1575 struct ioc3_private *ip = netdev_priv(dev);
1576 int rc;
1577
1578 spin_lock_irq(&ip->ioc3_lock);
1579 rc = mii_ethtool_gset(&ip->mii, cmd);
1580 spin_unlock_irq(&ip->ioc3_lock);
1581
1582 return rc;
1583}
1584
1585static int ioc3_set_settings(struct net_device *dev, struct ethtool_cmd *cmd)
1586{
1587 struct ioc3_private *ip = netdev_priv(dev);
1588 int rc;
1589
1590 spin_lock_irq(&ip->ioc3_lock);
1591 rc = mii_ethtool_sset(&ip->mii, cmd);
1592 spin_unlock_irq(&ip->ioc3_lock);
Ralf Baechle852ea222005-08-02 11:01:27 +01001593
Linus Torvalds1da177e2005-04-16 15:20:36 -07001594 return rc;
1595}
1596
1597static int ioc3_nway_reset(struct net_device *dev)
1598{
1599 struct ioc3_private *ip = netdev_priv(dev);
1600 int rc;
1601
1602 spin_lock_irq(&ip->ioc3_lock);
1603 rc = mii_nway_restart(&ip->mii);
1604 spin_unlock_irq(&ip->ioc3_lock);
1605
1606 return rc;
1607}
1608
1609static u32 ioc3_get_link(struct net_device *dev)
1610{
1611 struct ioc3_private *ip = netdev_priv(dev);
1612 int rc;
1613
1614 spin_lock_irq(&ip->ioc3_lock);
1615 rc = mii_link_ok(&ip->mii);
1616 spin_unlock_irq(&ip->ioc3_lock);
1617
1618 return rc;
1619}
1620
Ralf Baechlebbfb86c2007-07-25 12:31:57 +01001621static u32 ioc3_get_rx_csum(struct net_device *dev)
1622{
1623 struct ioc3_private *ip = netdev_priv(dev);
1624
1625 return ip->flags & IOC3_FLAG_RX_CHECKSUMS;
1626}
1627
1628static int ioc3_set_rx_csum(struct net_device *dev, u32 data)
1629{
1630 struct ioc3_private *ip = netdev_priv(dev);
1631
1632 spin_lock_bh(&ip->ioc3_lock);
1633 if (data)
1634 ip->flags |= IOC3_FLAG_RX_CHECKSUMS;
1635 else
1636 ip->flags &= ~IOC3_FLAG_RX_CHECKSUMS;
1637 spin_unlock_bh(&ip->ioc3_lock);
1638
1639 return 0;
1640}
1641
Jeff Garzik7282d492006-09-13 14:30:00 -04001642static const struct ethtool_ops ioc3_ethtool_ops = {
Linus Torvalds1da177e2005-04-16 15:20:36 -07001643 .get_drvinfo = ioc3_get_drvinfo,
1644 .get_settings = ioc3_get_settings,
1645 .set_settings = ioc3_set_settings,
1646 .nway_reset = ioc3_nway_reset,
1647 .get_link = ioc3_get_link,
Ralf Baechlebbfb86c2007-07-25 12:31:57 +01001648 .get_rx_csum = ioc3_get_rx_csum,
1649 .set_rx_csum = ioc3_set_rx_csum,
1650 .get_tx_csum = ethtool_op_get_tx_csum,
1651 .set_tx_csum = ethtool_op_set_tx_csum
Linus Torvalds1da177e2005-04-16 15:20:36 -07001652};
1653
1654static int ioc3_ioctl(struct net_device *dev, struct ifreq *rq, int cmd)
1655{
1656 struct ioc3_private *ip = netdev_priv(dev);
1657 int rc;
1658
1659 spin_lock_irq(&ip->ioc3_lock);
1660 rc = generic_mii_ioctl(&ip->mii, if_mii(rq), cmd, NULL);
1661 spin_unlock_irq(&ip->ioc3_lock);
1662
1663 return rc;
1664}
1665
1666static void ioc3_set_multicast_list(struct net_device *dev)
1667{
Jiri Pirko22bedad2010-04-01 21:22:57 +00001668 struct netdev_hw_addr *ha;
Linus Torvalds1da177e2005-04-16 15:20:36 -07001669 struct ioc3_private *ip = netdev_priv(dev);
1670 struct ioc3 *ioc3 = ip->regs;
1671 u64 ehar = 0;
Linus Torvalds1da177e2005-04-16 15:20:36 -07001672
1673 netif_stop_queue(dev); /* Lock out others. */
1674
1675 if (dev->flags & IFF_PROMISC) { /* Set promiscuous. */
Linus Torvalds1da177e2005-04-16 15:20:36 -07001676 ip->emcr |= EMCR_PROMISC;
1677 ioc3_w_emcr(ip->emcr);
1678 (void) ioc3_r_emcr();
1679 } else {
1680 ip->emcr &= ~EMCR_PROMISC;
1681 ioc3_w_emcr(ip->emcr); /* Clear promiscuous. */
1682 (void) ioc3_r_emcr();
1683
Jiri Pirko4cd24ea2010-02-08 04:30:35 +00001684 if ((dev->flags & IFF_ALLMULTI) ||
1685 (netdev_mc_count(dev) > 64)) {
Linus Torvalds1da177e2005-04-16 15:20:36 -07001686 /* Too many for hashing to make sense or we want all
1687 multicast packets anyway, so skip computing all the
1688 hashes and just accept all packets. */
1689 ip->ehar_h = 0xffffffff;
1690 ip->ehar_l = 0xffffffff;
1691 } else {
Jiri Pirko22bedad2010-04-01 21:22:57 +00001692 netdev_for_each_mc_addr(ha, dev) {
1693 char *addr = ha->addr;
Linus Torvalds1da177e2005-04-16 15:20:36 -07001694
1695 if (!(*addr & 1))
1696 continue;
1697
1698 ehar |= (1UL << ioc3_hash(addr));
1699 }
1700 ip->ehar_h = ehar >> 32;
1701 ip->ehar_l = ehar & 0xffffffff;
1702 }
1703 ioc3_w_ehar_h(ip->ehar_h);
1704 ioc3_w_ehar_l(ip->ehar_l);
1705 }
1706
1707 netif_wake_queue(dev); /* Let us get going again. */
1708}
1709
1710MODULE_AUTHOR("Ralf Baechle <ralf@linux-mips.org>");
1711MODULE_DESCRIPTION("SGI IOC3 Ethernet driver");
1712MODULE_LICENSE("GPL");
1713
1714module_init(ioc3_init_module);
1715module_exit(ioc3_cleanup_module);