blob: db23200c487426d6fd9d9b04e53e518b88ebd50f [file] [log] [blame]
Ben Hutchings94e61082008-03-05 16:52:39 +00001#include <linux/delay.h>
Linus Torvalds1da177e2005-04-16 15:20:36 -07002#include <linux/pci.h>
3#include <linux/module.h>
Al Virof6a57032006-10-18 01:47:25 -04004#include <linux/sched.h>
Linus Torvalds1da177e2005-04-16 15:20:36 -07005#include <linux/ioport.h>
Matthew Wilcox7ea7e982006-10-19 09:41:28 -06006#include <linux/wait.h>
Linus Torvalds1da177e2005-04-16 15:20:36 -07007
Adrian Bunk48b19142005-11-06 01:45:08 +01008#include "pci.h"
9
Linus Torvalds1da177e2005-04-16 15:20:36 -070010/*
11 * This interrupt-safe spinlock protects all accesses to PCI
12 * configuration space.
13 */
14
15static DEFINE_SPINLOCK(pci_lock);
16
17/*
18 * Wrappers for all PCI configuration access functions. They just check
19 * alignment, do locking and call the low-level functions pointed to
20 * by pci_dev->ops.
21 */
22
23#define PCI_byte_BAD 0
24#define PCI_word_BAD (pos & 1)
25#define PCI_dword_BAD (pos & 3)
26
27#define PCI_OP_READ(size,type,len) \
28int pci_bus_read_config_##size \
29 (struct pci_bus *bus, unsigned int devfn, int pos, type *value) \
30{ \
31 int res; \
32 unsigned long flags; \
33 u32 data = 0; \
34 if (PCI_##size##_BAD) return PCIBIOS_BAD_REGISTER_NUMBER; \
35 spin_lock_irqsave(&pci_lock, flags); \
36 res = bus->ops->read(bus, devfn, pos, len, &data); \
37 *value = (type)data; \
38 spin_unlock_irqrestore(&pci_lock, flags); \
39 return res; \
40}
41
42#define PCI_OP_WRITE(size,type,len) \
43int pci_bus_write_config_##size \
44 (struct pci_bus *bus, unsigned int devfn, int pos, type value) \
45{ \
46 int res; \
47 unsigned long flags; \
48 if (PCI_##size##_BAD) return PCIBIOS_BAD_REGISTER_NUMBER; \
49 spin_lock_irqsave(&pci_lock, flags); \
50 res = bus->ops->write(bus, devfn, pos, len, value); \
51 spin_unlock_irqrestore(&pci_lock, flags); \
52 return res; \
53}
54
55PCI_OP_READ(byte, u8, 1)
56PCI_OP_READ(word, u16, 2)
57PCI_OP_READ(dword, u32, 4)
58PCI_OP_WRITE(byte, u8, 1)
59PCI_OP_WRITE(word, u16, 2)
60PCI_OP_WRITE(dword, u32, 4)
61
62EXPORT_SYMBOL(pci_bus_read_config_byte);
63EXPORT_SYMBOL(pci_bus_read_config_word);
64EXPORT_SYMBOL(pci_bus_read_config_dword);
65EXPORT_SYMBOL(pci_bus_write_config_byte);
66EXPORT_SYMBOL(pci_bus_write_config_word);
67EXPORT_SYMBOL(pci_bus_write_config_dword);
Brian Kinge04b0ea2005-09-27 01:21:55 -070068
Huang Yinga72b46c2009-04-24 10:45:17 +080069/**
70 * pci_bus_set_ops - Set raw operations of pci bus
71 * @bus: pci bus struct
72 * @ops: new raw operations
73 *
74 * Return previous raw operations
75 */
76struct pci_ops *pci_bus_set_ops(struct pci_bus *bus, struct pci_ops *ops)
77{
78 struct pci_ops *old_ops;
79 unsigned long flags;
80
81 spin_lock_irqsave(&pci_lock, flags);
82 old_ops = bus->ops;
83 bus->ops = ops;
84 spin_unlock_irqrestore(&pci_lock, flags);
85 return old_ops;
86}
87EXPORT_SYMBOL(pci_bus_set_ops);
Stephen Hemminger287d19c2008-12-18 09:17:16 -080088
89/**
90 * pci_read_vpd - Read one entry from Vital Product Data
91 * @dev: pci device struct
92 * @pos: offset in vpd space
93 * @count: number of bytes to read
94 * @buf: pointer to where to store result
95 *
96 */
97ssize_t pci_read_vpd(struct pci_dev *dev, loff_t pos, size_t count, void *buf)
98{
99 if (!dev->vpd || !dev->vpd->ops)
100 return -ENODEV;
101 return dev->vpd->ops->read(dev, pos, count, buf);
102}
103EXPORT_SYMBOL(pci_read_vpd);
104
105/**
106 * pci_write_vpd - Write entry to Vital Product Data
107 * @dev: pci device struct
108 * @pos: offset in vpd space
Randy Dunlapcffb2fa2009-04-10 15:17:50 -0700109 * @count: number of bytes to write
110 * @buf: buffer containing write data
Stephen Hemminger287d19c2008-12-18 09:17:16 -0800111 *
112 */
113ssize_t pci_write_vpd(struct pci_dev *dev, loff_t pos, size_t count, const void *buf)
114{
115 if (!dev->vpd || !dev->vpd->ops)
116 return -ENODEV;
117 return dev->vpd->ops->write(dev, pos, count, buf);
118}
119EXPORT_SYMBOL(pci_write_vpd);
120
Matthew Wilcox7ea7e982006-10-19 09:41:28 -0600121/*
122 * The following routines are to prevent the user from accessing PCI config
123 * space when it's unsafe to do so. Some devices require this during BIST and
124 * we're required to prevent it during D-state transitions.
125 *
126 * We have a bit per device to indicate it's blocked and a global wait queue
127 * for callers to sleep on until devices are unblocked.
128 */
129static DECLARE_WAIT_QUEUE_HEAD(pci_ucfg_wait);
Brian Kinge04b0ea2005-09-27 01:21:55 -0700130
Matthew Wilcox7ea7e982006-10-19 09:41:28 -0600131static noinline void pci_wait_ucfg(struct pci_dev *dev)
132{
133 DECLARE_WAITQUEUE(wait, current);
134
135 __add_wait_queue(&pci_ucfg_wait, &wait);
136 do {
137 set_current_state(TASK_UNINTERRUPTIBLE);
138 spin_unlock_irq(&pci_lock);
139 schedule();
140 spin_lock_irq(&pci_lock);
141 } while (dev->block_ucfg_access);
142 __remove_wait_queue(&pci_ucfg_wait, &wait);
Brian Kinge04b0ea2005-09-27 01:21:55 -0700143}
144
145#define PCI_USER_READ_CONFIG(size,type) \
146int pci_user_read_config_##size \
147 (struct pci_dev *dev, int pos, type *val) \
148{ \
Brian Kinge04b0ea2005-09-27 01:21:55 -0700149 int ret = 0; \
150 u32 data = -1; \
151 if (PCI_##size##_BAD) return PCIBIOS_BAD_REGISTER_NUMBER; \
Matthew Wilcox7ea7e982006-10-19 09:41:28 -0600152 spin_lock_irq(&pci_lock); \
153 if (unlikely(dev->block_ucfg_access)) pci_wait_ucfg(dev); \
154 ret = dev->bus->ops->read(dev->bus, dev->devfn, \
Brian Kinge04b0ea2005-09-27 01:21:55 -0700155 pos, sizeof(type), &data); \
Matthew Wilcox7ea7e982006-10-19 09:41:28 -0600156 spin_unlock_irq(&pci_lock); \
Brian Kinge04b0ea2005-09-27 01:21:55 -0700157 *val = (type)data; \
158 return ret; \
159}
160
161#define PCI_USER_WRITE_CONFIG(size,type) \
162int pci_user_write_config_##size \
163 (struct pci_dev *dev, int pos, type val) \
164{ \
Brian Kinge04b0ea2005-09-27 01:21:55 -0700165 int ret = -EIO; \
166 if (PCI_##size##_BAD) return PCIBIOS_BAD_REGISTER_NUMBER; \
Matthew Wilcox7ea7e982006-10-19 09:41:28 -0600167 spin_lock_irq(&pci_lock); \
168 if (unlikely(dev->block_ucfg_access)) pci_wait_ucfg(dev); \
169 ret = dev->bus->ops->write(dev->bus, dev->devfn, \
Brian Kinge04b0ea2005-09-27 01:21:55 -0700170 pos, sizeof(type), val); \
Matthew Wilcox7ea7e982006-10-19 09:41:28 -0600171 spin_unlock_irq(&pci_lock); \
Brian Kinge04b0ea2005-09-27 01:21:55 -0700172 return ret; \
173}
174
175PCI_USER_READ_CONFIG(byte, u8)
176PCI_USER_READ_CONFIG(word, u16)
177PCI_USER_READ_CONFIG(dword, u32)
178PCI_USER_WRITE_CONFIG(byte, u8)
179PCI_USER_WRITE_CONFIG(word, u16)
180PCI_USER_WRITE_CONFIG(dword, u32)
181
Ben Hutchings94e61082008-03-05 16:52:39 +0000182/* VPD access through PCI 2.2+ VPD capability */
183
184#define PCI_VPD_PCI22_SIZE (PCI_VPD_ADDR_MASK + 1)
185
186struct pci_vpd_pci22 {
187 struct pci_vpd base;
Stephen Hemminger1120f8b2008-12-18 09:17:16 -0800188 struct mutex lock;
189 u16 flag;
Ben Hutchings94e61082008-03-05 16:52:39 +0000190 bool busy;
Stephen Hemminger1120f8b2008-12-18 09:17:16 -0800191 u8 cap;
Ben Hutchings94e61082008-03-05 16:52:39 +0000192};
193
Stephen Hemminger1120f8b2008-12-18 09:17:16 -0800194/*
195 * Wait for last operation to complete.
196 * This code has to spin since there is no other notification from the PCI
197 * hardware. Since the VPD is often implemented by serial attachment to an
198 * EEPROM, it may take many milliseconds to complete.
199 */
Ben Hutchings94e61082008-03-05 16:52:39 +0000200static int pci_vpd_pci22_wait(struct pci_dev *dev)
201{
202 struct pci_vpd_pci22 *vpd =
203 container_of(dev->vpd, struct pci_vpd_pci22, base);
Stephen Hemminger1120f8b2008-12-18 09:17:16 -0800204 unsigned long timeout = jiffies + HZ/20 + 2;
205 u16 status;
Ben Hutchings94e61082008-03-05 16:52:39 +0000206 int ret;
207
208 if (!vpd->busy)
209 return 0;
210
Ben Hutchings94e61082008-03-05 16:52:39 +0000211 for (;;) {
Stephen Hemminger1120f8b2008-12-18 09:17:16 -0800212 ret = pci_user_read_config_word(dev, vpd->cap + PCI_VPD_ADDR,
Ben Hutchings94e61082008-03-05 16:52:39 +0000213 &status);
Stephen Hemminger1120f8b2008-12-18 09:17:16 -0800214 if (ret)
Ben Hutchings94e61082008-03-05 16:52:39 +0000215 return ret;
Stephen Hemminger1120f8b2008-12-18 09:17:16 -0800216
217 if ((status & PCI_VPD_ADDR_F) == vpd->flag) {
Ben Hutchings94e61082008-03-05 16:52:39 +0000218 vpd->busy = false;
219 return 0;
220 }
Stephen Hemminger1120f8b2008-12-18 09:17:16 -0800221
222 if (time_after(jiffies, timeout))
Ben Hutchings94e61082008-03-05 16:52:39 +0000223 return -ETIMEDOUT;
Stephen Hemminger1120f8b2008-12-18 09:17:16 -0800224 if (fatal_signal_pending(current))
225 return -EINTR;
226 if (!cond_resched())
227 udelay(10);
Ben Hutchings94e61082008-03-05 16:52:39 +0000228 }
229}
230
Stephen Hemminger287d19c2008-12-18 09:17:16 -0800231static ssize_t pci_vpd_pci22_read(struct pci_dev *dev, loff_t pos, size_t count,
232 void *arg)
Ben Hutchings94e61082008-03-05 16:52:39 +0000233{
234 struct pci_vpd_pci22 *vpd =
235 container_of(dev->vpd, struct pci_vpd_pci22, base);
Stephen Hemminger287d19c2008-12-18 09:17:16 -0800236 int ret;
237 loff_t end = pos + count;
238 u8 *buf = arg;
Ben Hutchings94e61082008-03-05 16:52:39 +0000239
Stephen Hemminger287d19c2008-12-18 09:17:16 -0800240 if (pos < 0 || pos > vpd->base.len || end > vpd->base.len)
Ben Hutchings94e61082008-03-05 16:52:39 +0000241 return -EINVAL;
Ben Hutchings94e61082008-03-05 16:52:39 +0000242
Stephen Hemminger1120f8b2008-12-18 09:17:16 -0800243 if (mutex_lock_killable(&vpd->lock))
244 return -EINTR;
245
Ben Hutchings94e61082008-03-05 16:52:39 +0000246 ret = pci_vpd_pci22_wait(dev);
247 if (ret < 0)
248 goto out;
Stephen Hemminger1120f8b2008-12-18 09:17:16 -0800249
Stephen Hemminger287d19c2008-12-18 09:17:16 -0800250 while (pos < end) {
251 u32 val;
252 unsigned int i, skip;
253
254 ret = pci_user_write_config_word(dev, vpd->cap + PCI_VPD_ADDR,
255 pos & ~3);
256 if (ret < 0)
257 break;
258 vpd->busy = true;
259 vpd->flag = PCI_VPD_ADDR_F;
260 ret = pci_vpd_pci22_wait(dev);
261 if (ret < 0)
262 break;
263
264 ret = pci_user_read_config_dword(dev, vpd->cap + PCI_VPD_DATA, &val);
265 if (ret < 0)
266 break;
267
268 skip = pos & 3;
269 for (i = 0; i < sizeof(u32); i++) {
270 if (i >= skip) {
271 *buf++ = val;
272 if (++pos == end)
273 break;
274 }
275 val >>= 8;
276 }
277 }
Ben Hutchings94e61082008-03-05 16:52:39 +0000278out:
Stephen Hemminger1120f8b2008-12-18 09:17:16 -0800279 mutex_unlock(&vpd->lock);
Stephen Hemminger287d19c2008-12-18 09:17:16 -0800280 return ret ? ret : count;
Ben Hutchings94e61082008-03-05 16:52:39 +0000281}
282
Stephen Hemminger287d19c2008-12-18 09:17:16 -0800283static ssize_t pci_vpd_pci22_write(struct pci_dev *dev, loff_t pos, size_t count,
284 const void *arg)
Ben Hutchings94e61082008-03-05 16:52:39 +0000285{
286 struct pci_vpd_pci22 *vpd =
287 container_of(dev->vpd, struct pci_vpd_pci22, base);
Stephen Hemminger287d19c2008-12-18 09:17:16 -0800288 const u8 *buf = arg;
289 loff_t end = pos + count;
Stephen Hemminger1120f8b2008-12-18 09:17:16 -0800290 int ret = 0;
Ben Hutchings94e61082008-03-05 16:52:39 +0000291
Stephen Hemminger287d19c2008-12-18 09:17:16 -0800292 if (pos < 0 || (pos & 3) || (count & 3) || end > vpd->base.len)
Ben Hutchings94e61082008-03-05 16:52:39 +0000293 return -EINVAL;
294
Stephen Hemminger1120f8b2008-12-18 09:17:16 -0800295 if (mutex_lock_killable(&vpd->lock))
296 return -EINTR;
Stephen Hemminger287d19c2008-12-18 09:17:16 -0800297
Ben Hutchings94e61082008-03-05 16:52:39 +0000298 ret = pci_vpd_pci22_wait(dev);
299 if (ret < 0)
300 goto out;
Stephen Hemminger287d19c2008-12-18 09:17:16 -0800301
302 while (pos < end) {
303 u32 val;
304
305 val = *buf++;
306 val |= *buf++ << 8;
307 val |= *buf++ << 16;
308 val |= *buf++ << 24;
309
310 ret = pci_user_write_config_dword(dev, vpd->cap + PCI_VPD_DATA, val);
311 if (ret < 0)
312 break;
313 ret = pci_user_write_config_word(dev, vpd->cap + PCI_VPD_ADDR,
314 pos | PCI_VPD_ADDR_F);
315 if (ret < 0)
316 break;
317
318 vpd->busy = true;
319 vpd->flag = 0;
320 ret = pci_vpd_pci22_wait(dev);
321
322 pos += sizeof(u32);
323 }
Ben Hutchings94e61082008-03-05 16:52:39 +0000324out:
Stephen Hemminger1120f8b2008-12-18 09:17:16 -0800325 mutex_unlock(&vpd->lock);
Stephen Hemminger287d19c2008-12-18 09:17:16 -0800326 return ret ? ret : count;
Ben Hutchings94e61082008-03-05 16:52:39 +0000327}
328
Ben Hutchings94e61082008-03-05 16:52:39 +0000329static void pci_vpd_pci22_release(struct pci_dev *dev)
330{
331 kfree(container_of(dev->vpd, struct pci_vpd_pci22, base));
332}
333
Stephen Hemminger287d19c2008-12-18 09:17:16 -0800334static const struct pci_vpd_ops pci_vpd_pci22_ops = {
Ben Hutchings94e61082008-03-05 16:52:39 +0000335 .read = pci_vpd_pci22_read,
336 .write = pci_vpd_pci22_write,
Ben Hutchings94e61082008-03-05 16:52:39 +0000337 .release = pci_vpd_pci22_release,
338};
339
340int pci_vpd_pci22_init(struct pci_dev *dev)
341{
342 struct pci_vpd_pci22 *vpd;
343 u8 cap;
344
345 cap = pci_find_capability(dev, PCI_CAP_ID_VPD);
346 if (!cap)
347 return -ENODEV;
348 vpd = kzalloc(sizeof(*vpd), GFP_ATOMIC);
349 if (!vpd)
350 return -ENOMEM;
351
Benjamin Li99cb2332008-07-02 10:59:04 -0700352 vpd->base.len = PCI_VPD_PCI22_SIZE;
Ben Hutchings94e61082008-03-05 16:52:39 +0000353 vpd->base.ops = &pci_vpd_pci22_ops;
Stephen Hemminger1120f8b2008-12-18 09:17:16 -0800354 mutex_init(&vpd->lock);
Ben Hutchings94e61082008-03-05 16:52:39 +0000355 vpd->cap = cap;
356 vpd->busy = false;
357 dev->vpd = &vpd->base;
358 return 0;
359}
360
Brian Kinge04b0ea2005-09-27 01:21:55 -0700361/**
Stephen Hemmingerdb567942008-12-18 09:17:16 -0800362 * pci_vpd_truncate - Set available Vital Product Data size
363 * @dev: pci device struct
364 * @size: available memory in bytes
365 *
366 * Adjust size of available VPD area.
367 */
368int pci_vpd_truncate(struct pci_dev *dev, size_t size)
369{
370 if (!dev->vpd)
371 return -EINVAL;
372
373 /* limited by the access method */
374 if (size > dev->vpd->len)
375 return -EINVAL;
376
377 dev->vpd->len = size;
Anton Vorontsovd407e322009-04-01 02:23:41 +0400378 if (dev->vpd->attr)
379 dev->vpd->attr->size = size;
Stephen Hemmingerdb567942008-12-18 09:17:16 -0800380
381 return 0;
382}
383EXPORT_SYMBOL(pci_vpd_truncate);
384
385/**
Brian Kinge04b0ea2005-09-27 01:21:55 -0700386 * pci_block_user_cfg_access - Block userspace PCI config reads/writes
387 * @dev: pci device struct
388 *
Matthew Wilcox7ea7e982006-10-19 09:41:28 -0600389 * When user access is blocked, any reads or writes to config space will
390 * sleep until access is unblocked again. We don't allow nesting of
391 * block/unblock calls.
392 */
Brian Kinge04b0ea2005-09-27 01:21:55 -0700393void pci_block_user_cfg_access(struct pci_dev *dev)
394{
395 unsigned long flags;
Matthew Wilcox7ea7e982006-10-19 09:41:28 -0600396 int was_blocked;
Brian Kinge04b0ea2005-09-27 01:21:55 -0700397
Brian Kinge04b0ea2005-09-27 01:21:55 -0700398 spin_lock_irqsave(&pci_lock, flags);
Matthew Wilcox7ea7e982006-10-19 09:41:28 -0600399 was_blocked = dev->block_ucfg_access;
Brian Kinge04b0ea2005-09-27 01:21:55 -0700400 dev->block_ucfg_access = 1;
401 spin_unlock_irqrestore(&pci_lock, flags);
Matthew Wilcox7ea7e982006-10-19 09:41:28 -0600402
403 /* If we BUG() inside the pci_lock, we're guaranteed to hose
404 * the machine */
405 BUG_ON(was_blocked);
Brian Kinge04b0ea2005-09-27 01:21:55 -0700406}
407EXPORT_SYMBOL_GPL(pci_block_user_cfg_access);
408
409/**
410 * pci_unblock_user_cfg_access - Unblock userspace PCI config reads/writes
411 * @dev: pci device struct
412 *
413 * This function allows userspace PCI config accesses to resume.
Matthew Wilcox7ea7e982006-10-19 09:41:28 -0600414 */
Brian Kinge04b0ea2005-09-27 01:21:55 -0700415void pci_unblock_user_cfg_access(struct pci_dev *dev)
416{
417 unsigned long flags;
418
Brian Kinge04b0ea2005-09-27 01:21:55 -0700419 spin_lock_irqsave(&pci_lock, flags);
Matthew Wilcox7ea7e982006-10-19 09:41:28 -0600420
421 /* This indicates a problem in the caller, but we don't need
422 * to kill them, unlike a double-block above. */
423 WARN_ON(!dev->block_ucfg_access);
424
Brian Kinge04b0ea2005-09-27 01:21:55 -0700425 dev->block_ucfg_access = 0;
Matthew Wilcox7ea7e982006-10-19 09:41:28 -0600426 wake_up_all(&pci_ucfg_wait);
Brian Kinge04b0ea2005-09-27 01:21:55 -0700427 spin_unlock_irqrestore(&pci_lock, flags);
428}
429EXPORT_SYMBOL_GPL(pci_unblock_user_cfg_access);